JP2006261247A - Solid state imaging device and its fabrication process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a solid state imaging device in which light is taken into a photoelectric converting section efficiently. <P>SOLUTION: In the solid state imaging device having a plurality of pixels, each of the plurality of pixels comprises: a microlens 63 for condensing light; a photoelectric converting section 11 performing photoelectric conversion of light condensed by the microlens; first, second and third electrode layers 12, 30, and 31 formed between the microlens and the photoelectric converting section while being arranged from the side close to the photoelectric converting section toward the side close to the microlens; a first optical waveguide 41 formed on a first interlayer insulating film 20 between the first electrode layer 12 and the second electrode layer 30; and a second optical waveguide 42 formed on a second interlayer insulating film 21 between the second electrode layer 30 and the third electrode layer 31 wherein the second optical waveguide is formed to partially enter the first interlayer insulating film. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a technique for improving the light receiving efficiency of a solid-state imaging device used in an imaging apparatus such as a digital still camera.

  In recent years, solid-state image sensors used in digital still cameras and the like have been improved in image quality by increasing the number of pixels, while at the same time reducing the cost by reducing the chip size. For this reason, the size of one pixel constituting the solid-state imaging device is decreasing year by year, and the area of the photoelectric conversion unit is also decreasing accordingly.

  Since the light receiving sensitivity is lowered when the area of the photoelectric conversion unit is reduced, Patent Document 1 discloses a solid-state imaging device in which an optical waveguide is provided between the light incident surface and the photoelectric conversion unit to improve the light collection characteristics. . In the solid-state imaging device disclosed in Patent Document 1, an optical waveguide made of silicon nitride (SiN), which is a high refractive index material, is provided on the light incident side of the photoelectric conversion unit, and the surrounding interlayer insulating film layer is low. By using BPSG which is a refractive index material, the light collection characteristic is improved by totally reflecting incident light at the boundary surface.

  In addition, a CMOS solid-state image sensor characterized by low power consumption is effective in a small portable device with a digital camera function, but the CMOS solid-state image sensor has a plurality of electrode wiring layers stacked in the light incident direction. Since it is necessary to provide an insulating film between the electrode wiring layers, it is difficult to capture light having a large incident angle due to an increase in the thickness of the element. Therefore, it is expected that the light condensing characteristic for light having a large incident angle is improved by forming the optical waveguide also in the CMOS type solid-state imaging device. However, the aspect of the optical waveguide is caused by the thickness of the plurality of interlayer insulating films. Since the ratio (ratio between the size and the length of the opening of the optical waveguide) increases, voids are generated when an optical waveguide formed of silicon nitride (SiN) is embedded, and uniform embedding cannot be performed.

  Therefore, in the solid-state imaging device disclosed in Patent Document 2, the optical waveguide is composed of a plurality of layers, and the aspect ratio of one optical waveguide is reduced so that silicon nitride (SiN) is uniformly embedded in the optical waveguide. I try to do it.

  FIG. 9 is a cross-sectional view of one pixel of the solid-state imaging device 100 disclosed in Patent Document 2. A photoelectric conversion unit 111 is formed on the silicon substrate 110. Reference numeral 112 denotes a polysilicon electrode for transferring charges generated in the photoelectric conversion unit. A first optical waveguide 141 is formed in the interlayer insulating film 120 between the polysilicon electrode 112 and the electrode 130. A second optical waveguide 142 is formed in the interlayer insulating film 121 between the electrode 130 and the electrode 131. Further, a passivation film 143, a planarizing layer 160, a color filter layer 161, a planarizing layer 162, and a microlens 163 are formed on the electrode 131.

In Patent Document 2, the optical waveguides 141 and 142 are formed by forming a silicon nitride film SiN by a high density plasma CVD method.
JP 2000-150845 A JP 2004-193500 A

  However, the plurality of optical waveguides formed in the solid-state imaging device disclosed in Patent Document 2 are the same as the first optical waveguide 141 and the first optical waveguide 141 when the optical waveguide is formed, as shown in the cross-sectional view of the solid-state imaging device in FIG. In consideration of the alignment accuracy of the second optical waveguide 142, the diameter of the second optical waveguide 142 on the light incident side is configured to be smaller than the diameter of the first optical waveguide 141. Therefore, a part 164 of the light having a large angle incident on the solid-state imaging device reaches the polysilicon electrode 112 and is partially absorbed as shown in FIG. It was.

  Further, since the length of the optical waveguide (film layer thickness) formed in the CMOS type solid-state imaging device is about 2 μm, it is necessary to reduce the stress of the silicon nitride film SiN film. In the film formation of the silicon nitride film SiN film by the method, there is a drawback that it is impossible to form a film with a low refractive index and a high refractive index.

  Furthermore, since the minimum line width of the electrodes constituting the CMOS type solid-state image sensor is limited, if the openings of the optical waveguides in the plane of the solid-state image sensor are configured to be the same, depending on the pixel size of the solid-state image sensor However, there is a drawback in that it cannot efficiently capture light at the peripheral pixels of the solid-state imaging device.

  Accordingly, the present invention has been made in view of the above-described problems, and an object thereof is to enable light to be efficiently taken into a photoelectric conversion unit in a solid-state imaging device.

  In order to solve the above-described problems and achieve the object, a solid-state imaging device according to the present invention is a solid-state imaging device having a plurality of pixels, and each of the plurality of pixels collects light, A photoelectric conversion unit that photoelectrically converts light collected by the microlens, and is formed between the microlens and the photoelectric conversion unit, and sequentially from a side closer to the photoelectric conversion unit toward a side closer to the microlens. And a first optical waveguide formed in a first interlayer insulating film between the first electrode layer and the second electrode layer. And a second optical waveguide formed in a second interlayer insulating film between the second electrode layer and the third electrode layer, and the second optical waveguide is a part of the second optical waveguide Is formed to enter the first interlayer insulating film. That.

  Further, a method for manufacturing a solid-state imaging device according to the present invention is a method for manufacturing a solid-state imaging device, wherein a photoelectric conversion unit forming step for forming a photoelectric conversion unit that photoelectrically converts incident light on a silicon substrate; A first electrode layer forming step of forming a first electrode layer on the silicon substrate; a first interlayer insulating film forming step of forming a first interlayer insulating film on the first electrode layer; A first optical waveguide forming step of forming a first optical waveguide in one interlayer insulating film; a second electrode layer forming step of forming a second electrode layer on the first interlayer insulating film; A second interlayer insulating film forming step of forming a second interlayer insulating film on the second electrode layer; and a second optical waveguide in the second interlayer insulating film, a part of which is the first optical waveguide. And a second optical waveguide forming step of forming so as to enter one interlayer insulating film. To.

  According to the present invention, in a solid-state imaging device, light can be efficiently taken into a photoelectric conversion unit.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

  1 to 4 are diagrams showing a CMOS solid-state image sensor according to a first embodiment of the present invention. FIG. 1 is a schematic plan view of the CMOS solid-state image sensor. FIGS. 2A to 2C are CMOS solid-state image sensors. FIG. 3 and FIG. 4 are explanatory views of the manufacturing process of the CMOS type solid-state imaging device.

  A solid-state image sensor used for a digital camera or the like is composed of several million pixels. FIG. 1 is a plan view schematically showing the CMOS solid-state image sensor 1 with 8 × 6 pixels. In FIG. 1, 11 is a photoelectric conversion unit, 42 is an opening of an optical waveguide, and 63 is a microlens. In the figure, the photoelectric conversion units 11 are arranged at uniform intervals in the xy plane. On the other hand, the openings of the microlens 11 and the optical waveguide 42 are eccentric from the photoelectric conversion unit 11 by an amount proportional to the distance from the center of the solid-state imaging device 1. Here, the opening shape of the optical waveguide 42 is the same in the xy plane.

  With reference to FIG. 2A thru | or FIG. 2C, the cross-section of the CMOS type solid-state image sensor 1 of this embodiment is demonstrated.

  2B is a cross-sectional view of the pixel at a position b (substantially central position of the CMOS solid-state image sensor 1) shown in the schematic plan view of the CMOS solid-state image sensor 1 in FIG.

  In FIG. 2B, the photoelectric conversion unit 11 is formed on the silicon substrate 10. 12 is a polysilicon electrode, 41 is a first optical waveguide, 42 is a second optical waveguide, 60 is a planarizing layer, 61 is a color filter layer, 62 is a planarizing layer, and 63 is a microlens.

  The polysilicon electrode 12 is a first electrode for transferring charges generated in the photoelectric conversion unit 11, and the second electrode 30 and the third electrode 31 selectively output the transferred charges to the outside. It is an electrode for doing.

  A first optical waveguide 41 is formed in the first interlayer insulating film 20 between the first electrode (first electrode layer) 12 and the second electrode (second electrode layer) 30. . The first optical waveguide 41 is formed so as to be substantially symmetric with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11. Here, the effective light receiving region refers to a region that is not covered with the polysilicon electrode 12 in the light receiving region of the photoelectric conversion unit 11.

  On the other hand, a second optical waveguide 42 is formed in the second interlayer insulating film 21 between the second electrode 30 and the third electrode (third electrode layer) 31. The central axis of the opening on the light incident side of the second optical waveguide 42 is also formed so as to be substantially symmetric with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11. Here, since the second optical waveguide 42 has a large opening on the light incident side, a part of the second optical waveguide 42 is also formed in the first interlayer insulating film 20. In other words, a part of the lower end portion of the second optical waveguide 42 enters the first interlayer insulating film 20.

  Since the opening on the light incident side of the second optical waveguide 42 is large, a light beam having a wide angle of view from a lens having a small F value can be taken in without being lost, and the amount of light received with respect to the F value of the lens of the solid-state imaging device 1. It is possible to improve the proportionality.

  2A is a cross-sectional view of a pixel (a pixel in which the photoelectric conversion unit 11 is located at a distance hx from the center of the solid-state imaging device 1) at the position a shown in the schematic plan view of the CMOS solid-state imaging device in FIG.

  A first optical waveguide 41 is formed in the first interlayer insulating film 20 between the first electrode 12 and the second electrode 30. The first optical waveguide 41 is formed so as to be substantially symmetrical with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11.

On the other hand, a second optical waveguide 42 is formed in the second interlayer insulating film 21 between the second electrode 30 and the third electrode 31. The central axis (line indicated by B in the figure) of the opening on the light incident side of the second optical waveguide 42 is relative to the central axis (line indicated by A in the figure) of the effective light receiving region of the photoelectric conversion unit 11. In the figure, it is decentered toward the center of the solid-state imaging device 1 by δx. The amount of eccentricity δx with respect to the photoelectric conversion unit 11 at the center of the opening of the second optical waveguide 42 is substantially proportional to the distance hx from the center of the solid-state imaging device 1 of the photoelectric conversion unit 11,
δx ≒ hx · tz / lz / n
Satisfied. Here, tz is the thickness of the second interlayer insulating film 21, n is the refractive index of the second interlayer insulating film 21, and lz is the exit of the imaging optical system in which the solid-state imaging device 1 and the solid-state imaging device 1 are disposed. The distance between the pupils.

  Further, since the second optical waveguide 42 is formed in substantially the same shape in each pixel in the xy plane and has a large opening on the light incident side, a part of the lower end of the optical waveguide 42 is the first interlayer. An insulating film 20 is also formed. In other words, as described in FIG. 2B, a part of the lower end portion of the second optical waveguide 42 enters the first interlayer insulating film 20.

  In FIG. 2A, the opening center of the second optical waveguide 42 is decentered in the center direction of the solid-state imaging device 1 with respect to the central axis (the line indicated by A in the figure) of the effective light receiving region of the photoelectric conversion unit 11; In addition, since the opening on the light incident side of the second optical waveguide 42 is large, it is possible to efficiently receive light incident obliquely, and the shading characteristics of the solid-state imaging device 1 can be improved.

  2C is a cross-sectional view of the pixel at a position c shown in the schematic plan view of the CMOS solid-state imaging device of FIG.

  A first optical waveguide 41 is formed in the first interlayer insulating film 20 between the first electrode 12 and the second electrode 30. The first optical waveguide 41 is formed so as to be substantially symmetrical with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11.

  On the other hand, a second optical waveguide 42 is formed in the second interlayer insulating film 21 between the second electrode 30 and the third electrode 31. The central axis (line indicated by B in the figure) of the opening on the light incident side of the second optical waveguide 42 is relative to the central axis (line indicated by A in the figure) of the effective light receiving region of the photoelectric conversion unit 11. It is decentered in the center direction of the solid-state imaging device 1. The amount of eccentricity with respect to the photoelectric conversion unit 11 at the center of the opening of the second optical waveguide 42 is substantially proportional to the distance of the photoelectric conversion unit 11 from the center of the solid-state imaging device 1.

  Further, since the optical waveguide 42 is formed in substantially the same shape in each pixel in the xy plane and has a large opening on the light incident side, a part of the optical waveguide 42 is also formed on the first interlayer insulating film 20. Is formed. In other words, as described with reference to FIGS. 2A and 2B, a part of the lower end portion of the second optical waveguide 42 enters the first interlayer insulating film 20.

  In FIG. 2C, the opening center of the second optical waveguide 42 is decentered in the center direction of the solid-state imaging device 1 with respect to the central axis (the line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11. In addition, since the opening on the light incident side of the second optical waveguide 42 is large, it is possible to efficiently receive light incident obliquely, and the shading characteristics of the solid-state imaging device 1 can be improved.

  3 and 4 are diagrams for explaining a manufacturing process of the CMOS type solid-state imaging device 1 of the present embodiment. In the figure, a cross-sectional structure of one pixel near the center of the solid-state imaging device 1 is shown.

  First, the silicon substrate 10 is thermally oxidized to form a silicon oxide film SiO (not shown) on the surface of the silicon substrate. Further, in order to form a photoelectric conversion region in the silicon substrate 10, a photoresist 50 is applied, exposed through a photomask having a predetermined pattern, and further developed (FIG. 3A). In the case of a positive type photoresist, the region 50a irradiated with light by the development process, that is, the region corresponding to the photoelectric conversion region is dissolved, and a part 10a of the silicon oxide film SiO is exposed. Further, the photoelectric conversion unit 11 is formed by implanting ions into the silicon substrate 10.

  When the photoelectric conversion unit 11 is formed in the silicon substrate 10, a first electrode 12 for transferring charges generated in the photoelectric conversion unit 11 is formed on the surface of the silicon substrate 10.

  First, a photoresist 51 is applied to the surface of the silicon substrate 10, covered with a photomask (not shown), and exposed. The photomask is configured such that a region corresponding to the first electrode 12 covering a part of the photoelectric conversion unit 11 transmits light, and the other regions block light. Further, by developing the photoresist 51, the region 51a irradiated with light, that is, the region of the photoresist 51 corresponding to the first electrode 12 is dissolved, and a part of the silicon oxide film SiO is exposed (FIG. 3 (b)). Further, a polysilicon film 12a is formed, and the photoresist 51 is peeled off to form the first electrode 12 (FIG. 3C).

When the first electrode 12 is formed, a photoresist 52 is applied and covered with a photomask (not shown) in order to form the etching stopper film 40 on a part of the first electrode 12 and the photoelectric conversion unit 11. Then, exposure and development are performed (FIG. 3D). Thereafter, when the etching stopper film 40 is formed of the silicon nitride film SiN, the first interlayer insulating film 20 for forming the second electrode 30 is formed and planarization is performed (FIG. 3E). The first interlayer insulating film 20 is formed of a silicon oxide film SiO ₂ having a refractive index of about 1.46.

  Next, in order to form the first optical waveguide 41 in the first interlayer insulating film 20, a photoresist 53 is applied on the flattened interlayer insulating film 20, covered with a photomask (not shown), and exposed and developed. (FIG. 3 (f)). Furthermore, a hole 20a for forming the first optical waveguide 41 is formed in the first interlayer insulating film 20 by performing a dry etching process using the photoresist 53 as a mask. At this time, since the etching stopper film 40 is formed between the first interlayer insulating film 20 and the photoelectric conversion unit 11, the photoelectric conversion unit 11 itself is not etched (FIG. 3G).

Next, a silicon nitride film (SiN) 41a is formed by a plasma CVD method in the hole 20a formed in the first interlayer insulating film 20, and the first optical waveguide 41 is formed. The silicon nitride film 41a formed by the plasma CVD method has a stress of 1.0 × 10 ⁹ (dyne / cm ² ) or less and a high refractive index of 2.02. Therefore, it is possible to reduce the warp of the silicon substrate 10 and widen the total reflection condition in the first optical waveguide 41.

  After the silicon nitride film (SiN) 41a is formed, a photoresist 54 is applied to perform a planarization process (FIG. 3H). Further, planarization is performed by performing dry etching (FIG. 3I).

  When the first optical waveguide 41 is formed, the second electrode 30 is formed. First, a photoresist is applied, covered with a photomask corresponding to the electrode pattern, exposed, and then developed. Furthermore, aluminum Al is vapor-deposited with a CVD apparatus or the like, etching is performed, and the photoresist is peeled off to form the second electrode 30 (FIG. 3J).

Further, the second interlayer insulating film 21 for forming the third electrode 31 is formed of the silicon oxide film SiO ₂ to form the third electrode 31 (FIG. 4 (k)). The method for forming the third electrode 31 is the same as the method for forming the second electrode 30.

Next, in order to form the second optical waveguide 42 in the second interlayer insulating film 21, a photoresist 55 is applied on the third electrode 31 and the second interlayer insulating film 21, and a photomask (not shown) is used. Cover and expose and develop (FIG. 4L). Thus, a hole 55a for forming the second optical waveguide 42 is formed in the second interlayer insulating film 21.
Further, by performing a dry etching process using the photoresist 55 as a mask, a hole 21 a for forming the second optical waveguide 42 is formed in the second interlayer insulating film 21. The hole 21a for forming the second optical waveguide 42 has a large opening, and has an inclined shape by controlling the gas flow rate during etching. Further, a part of the first interlayer insulating film 20 is also etched until it reaches the first optical waveguide 41 composed of the silicon nitride film SiN (FIG. 4M).

  When the hole 21a for forming the second optical waveguide 42 is formed, a silicon nitride film (SiN) 42a is formed by a plasma CVD method, and the second optical waveguide 42 is formed. Since the second optical waveguide 42 is formed of the silicon nitride film 42a formed by the plasma CVD method, an optical waveguide having a low stress and a high refractive index is completed. Therefore, it is possible to reduce the warp of the silicon substrate 10 and widen the total reflection condition in the second optical waveguide 42. Further, after a silicon nitride film (SiN) 42b is formed, a planarization process by CMP or the like is performed (FIG. 4 (n)).

  When the second optical waveguide 42 is formed, the color filter 61 is formed after the planarization layer 60 for forming the color filter 61 is formed. Further, the microlens 63 is formed after the planarization layer 62 for forming the microlens 63 is formed. The microlens is formed by a known registry flow method (FIG. 4 (o)).

(Second Embodiment)
FIG. 5 to FIG. 8 are diagrams showing a CMOS type solid-state imaging device according to the second embodiment of the present invention, showing an application form to a solid-state imaging device having a small pixel size. FIG. 5 is a schematic plan view of the CMOS solid-state image sensor, FIG. 6 is a cross-sectional view of the CMOS solid-state image sensor, and FIGS. 7 and 8 are explanatory diagrams of the manufacturing process of the CMOS solid-state image sensor.

  A solid-state image sensor used for a digital camera or the like is composed of several million pixels. FIG. 5 is a plan view schematically showing the solid-state image sensor 1 with 8 × 6 pixels. In FIG. 5, 11 is a photoelectric conversion unit, 42 is an opening of an optical waveguide, and 63 is a microlens. In the figure, the photoelectric conversion units 11 are arranged at uniform intervals in the xy plane. On the other hand, the opening of the microlens 63 and the optical waveguide 42 is eccentric from the photoelectric conversion unit 11 by an amount proportional to the distance from the center of the solid-state imaging device 1. In addition, the size α of the opening of the optical waveguide 42 is configured to become smaller as the distance from the center of the solid-state imaging device 1 increases.

  With reference to FIG. 6, the cross-sectional structure of the CMOS type solid-state imaging device 1 of the present embodiment will be described.

  FIG. 6A is a cross-sectional view of a pixel at a position a (substantially central position of the solid-state image sensor 1) shown in the schematic plan view of the CMOS solid-state image sensor in FIG. In the figure, the same members as those in the first embodiment are denoted by the same reference numerals.

  A polysilicon electrode 12 that is a first electrode (first electrode layer) for transferring charges generated in the photoelectric conversion unit 11 is provided, and for selectively outputting the transferred charges to the outside. The second electrode (second electrode layer) 30 and the third electrode (third electrode layer) 31 are disposed.

  A first optical waveguide 41 is formed in the first interlayer insulating film 20 between the first electrode 12 and the second electrode 30. The first optical waveguide 41 is formed so as to be substantially symmetrical with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11. Here, the effective light receiving region refers to a region that is not covered with the polysilicon electrode 12 in the light receiving region of the photoelectric conversion unit 11.

  On the other hand, a second optical waveguide 42 is formed in the second interlayer insulating film 21 between the second electrode 30 and the third electrode 31. The central axis of the opening on the light incident side of the second optical waveguide 42 is also formed so as to be substantially symmetric with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11. . Here, in the second optical waveguide 42, since the size αxa of the opening on the light incident side is large, a part of the optical waveguide 42 is also formed in the first interlayer insulating film 20. In other words, a part of the lower end portion of the second optical waveguide 42 enters the first interlayer insulating film 20.

  Since the opening on the light incident side of the second optical waveguide 42 is large, a light beam having a wide field angle from a lens having a small F value can be captured without being lost, and the proportionality of the amount of received light with respect to the F value of the lens of the solid-state imaging device 1 Can be improved.

  FIG. 6B is a cross-sectional view of the pixel at position b shown in the schematic plan view of the CMOS solid-state imaging device of FIG.

  A first optical waveguide 41 is formed in the first interlayer insulating film 20 between the first electrode 12 and the second electrode 30. The first optical waveguide 41 is formed so as to be substantially symmetrical with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11.

  On the other hand, a second optical waveguide 42 is formed in the second interlayer insulating film 21 between the second electrode 30 and the third electrode 31. The central axis (line indicated by B in the figure) of the opening on the light incident side of the second optical waveguide 42 is relative to the central axis (line indicated by A in the figure) of the effective light receiving region of the photoelectric conversion unit 11. It is decentered in the center direction of the solid-state imaging device 1.

  In the case of a solid-state imaging device having a small pixel size, the opening of the second optical waveguide 42 cannot be greatly decentered due to the restriction of the minimum line width of the electrode, and thus the pixel is formed in a pixel located around the screen of the CMOS type solid-state imaging device 1. The opening size αxb of the second optical waveguide 42 is set to a value smaller than the opening size αxa of the second optical waveguide 42 formed in the pixel located at the center of the screen of the solid-state imaging device 1. . In addition, the second optical waveguide 42 has an asymmetric shape in which a part of the wall surface in the outer peripheral direction of the solid-state imaging device 1 is substantially vertical (substantially parallel to the z axis in the drawing).

  As a result, the opening of the second optical waveguide 42 can be widely provided in the center direction of the screen of the solid-state imaging device 1, light incident from an oblique direction can be efficiently received, and shading of the solid-state imaging device 1 can be performed. Characteristics can be improved.

  FIG. 6C is a cross-sectional view of the pixel at the position c shown in the schematic plan view of the CMOS solid-state imaging device of FIG.

  A first optical waveguide 41 is formed in the first interlayer insulating film 20 between the first electrode 12 and the second electrode 30. The first optical waveguide 41 is formed so as to be substantially symmetrical with respect to the central axis (line indicated by A in the drawing) of the effective light receiving region of the photoelectric conversion unit 11.

  On the other hand, a second optical waveguide 42 is formed in the second interlayer insulating film 21 between the second electrode 30 and the third electrode 31. The central axis (line indicated by B in the figure) of the opening on the light incident side of the second optical waveguide 42 is relative to the central axis (line indicated by A in the figure) of the effective light receiving region of the photoelectric conversion unit 11. It is decentered in the center direction of the solid-state imaging device 1.

  In the case of a solid-state imaging device with a small pixel size, the opening of the second optical waveguide 42 cannot be greatly decentered due to the restriction of the minimum line width of the electrode. The aperture size αxc of the optical waveguide 42 is set to a value smaller than the aperture size αxb of the second optical waveguide 42 formed in the pixel located at the position b of the solid-state imaging device 1. In addition, the second optical waveguide 42 has an asymmetric shape in which the wall surface in the outer peripheral direction of the solid-state imaging device 1 is substantially vertical (substantially parallel to the z-axis in the figure).

  As a result, the opening of the second optical waveguide 42 can be provided more widely in the center direction of the screen of the solid-state imaging device 1, and light incident from an oblique direction can be efficiently received. Shading characteristics can be improved.

  7 and 8 are explanatory diagrams of a manufacturing process of the CMOS type solid-state imaging device 1 of the present embodiment. In the figure, a cross-sectional structure of one pixel near the periphery of the solid-state imaging device 1 is shown.

  First, the silicon substrate 10 is thermally oxidized to form a silicon oxide film SiO (not shown) on the surface of the silicon substrate. Further, in order to form a photoelectric conversion region in the silicon substrate 10, a photoresist 50 is applied, exposed through a photomask having a predetermined pattern, and further developed (FIG. 7A). In the case of a positive type photoresist, the region 50a irradiated with light by the development process, that is, the region corresponding to the photoelectric conversion region is dissolved, and a part 10a of the silicon oxide film SiO is exposed. Further, the photoelectric conversion unit 11 is formed by implanting ions into the silicon substrate 10.

  When the photoelectric conversion unit 11 is formed in the silicon substrate 10, a first electrode 12 for transferring charges generated in the photoelectric conversion unit 11 is formed on the surface of the silicon substrate 10.

  First, a photoresist 51 is applied to the surface of the silicon substrate 10 and covered with a photomask (not shown) for exposure. The photomask is configured such that a region corresponding to the first electrode 12 covering a part of the photoelectric conversion unit 11 transmits light, and the other regions block light. Further, by developing the photoresist 51, the region 51a irradiated with light, that is, the region corresponding to the first electrode 12 is dissolved, and a part of the silicon oxide film SiO is exposed (FIG. 7B). ). Further, a polysilicon film 12a is formed, and the first electrode 12 is formed by removing the photoresist 51 (FIG. 7C).

When the first electrode 12 is formed, a photoresist 52 is applied and covered with a photomask (not shown) in order to form the etching stopper film 40 on a part of the first electrode 12 and the photoelectric conversion unit 11. Then, exposure and development are performed (FIG. 7D). After that, when the etching stopper film 40 is formed by the silicon nitride film SiN, the first interlayer insulating film 20 for forming the second electrode 30 is formed and planarization is performed (FIG. 7E). The first interlayer insulating film 20 is formed of a silicon oxide film SiO ₂ having a refractive index of about 1.46.

  Next, in order to form the first optical waveguide 41 in the first interlayer insulating film 20, a photoresist 53 is applied on the flattened interlayer insulating film 20, covered with a photomask (not shown), and exposed and developed. (FIG. 7 (f)). Furthermore, a hole 20a for forming the first optical waveguide 41 is formed in the first interlayer insulating film 20 by performing a dry etching process using the photoresist 53 as a mask. At this time, since the etching stopper film 40 is formed between the first interlayer insulating film 20 and the photoelectric conversion unit 11, the photoelectric conversion unit 11 itself is not etched (FIG. 7G).

Next, a silicon nitride film (SiN) 41a is formed by a plasma CVD method in the hole 20a formed in the first interlayer insulating film 20, and the first optical waveguide 41 is formed. The silicon nitride film 41a formed by the plasma CVD method has a stress of 1.0 × 10 ⁹ (dyne / cm ² ) or less and a high refractive index of 2.02. Therefore, it is possible to reduce the warp of the silicon substrate 10 and widen the total reflection condition in the first optical waveguide 41.

  After the silicon nitride film (SiN) 41a is formed, a photoresist 54 is applied to perform a flattening process (FIG. 7H). Further, planarization is performed by dry etching (FIG. 7 (i)).

  When the first optical waveguide 41 is formed, the second electrode 30 is formed. First, a photoresist is applied, covered with a photomask corresponding to the electrode pattern, exposed, and then developed. Furthermore, aluminum Al is vapor-deposited with a CVD apparatus or the like, etching is performed, and the photoresist is peeled off to form the second electrode 30 (FIG. 7J).

  Next, in order to form the second optical waveguide 42 in the second interlayer insulating film 21, a photoresist 55 is applied on the second interlayer insulating film 21, covered with a photomask (not shown), and exposed and developed. (FIG. 7 (k)). Thus, a hole 55a for forming the second optical waveguide 42 is formed in the second interlayer insulating film 21.

  Further, by performing a dry etching process using the photoresist 55 as a mask, a hole 21 a for forming the second optical waveguide 42 is formed in the second interlayer insulating film 21. The hole 21a for forming the optical waveguide has a large opening, and has an inclined shape by controlling the gas flow rate during etching. Further, a part of the first interlayer insulating film 20 is also etched until it reaches the first optical waveguide 41 composed of the silicon nitride film SiN (FIG. 7L).

  Similarly, create a hole in the vertical wall. A photoresist 56 is applied on the second interlayer insulating film 21, covered with a photomask (not shown), and exposed and developed. (FIG. 8 (m)).

  Further, by performing a dry etching process using the photoresist 56 as a mask, a vertical wall hole 21 b for forming the second optical waveguide 42 is formed in the second interlayer insulating film 21. The hole 21b is etched until it reaches the first optical waveguide 41 made of the silicon nitride film SiN (FIG. 8 (n)).

  When the hole 21b for forming the second optical waveguide 42 is formed, a silicon nitride film (SiN) 42a is formed by a high-density plasma CVD method to form the second optical waveguide 42 (FIG. 8). (O)). Since the second optical waveguide 42 is formed of the silicon nitride film 42a by the high density plasma CVD method, an optical waveguide having a low stress but a slightly low refractive index is completed. The refractive index of the silicon nitride film 42a by the high density plasma CVD method is about 1.9. Therefore, the warp of the silicon substrate 10 is reduced, but the total reflection conditions in the second optical waveguide 42 are reduced. However, since the wall surface of the second optical waveguide 42 on the outer peripheral side of the solid-state imaging device 1 is formed substantially vertically, the incident angle of the light incident obliquely on the wall surface increases, resulting in the total reflection condition being Configured to clear.

  After the silicon nitride film (SiN) 42a is formed, a photoresist 57 for planarization is applied (FIG. 8 (p)).

  Further, planarization is performed by dry etching (FIG. 8 (q)).

  Further, a third electrode 31 is formed (FIG. 8 (r)). The method for forming the third electrode 31 is the same as the method for forming the second electrode 30.

  When the third electrode 31 is formed, a passivation film 43 for protecting the electrode and the photoelectric conversion unit is formed (FIG. 8 (s)).

  When the passivation film 43 is formed, the color filter 61 is formed after the planarization layer 60 for forming the color filter 61 is formed. Further, the microlens 63 is formed after the planarization layer 62 for forming the microlens 63 is formed (FIG. 8 (t)).

  In the present embodiment, the example in which the second optical waveguide 42 is formed by the high-density plasma CVD method is shown, but the film may be formed by the plasma CVD method depending on the aspect ratio of the optical waveguide.

  As described above, according to the above-described embodiment, the solid-state imaging device including the photoelectric conversion unit that converts incident light into electric charges and the plurality of electrodes that output the electric charges generated in the photoelectric conversion units. The first optical waveguide formed in the interlayer insulating film formed between the first and second electrodes and the second optical waveguide formed in the interlayer insulating film formed between the second and third electrodes. And the second optical waveguide is also formed on a part of the interlayer insulating film formed between the first and second electrodes, so that the light of the second optical waveguide is formed. It is possible to widen the aperture on the side where the light enters, so that light having a wide angle of view can be taken in, and the F-number proportionality of the solid-state imaging device can be improved.

  In the solid-state imaging device having a plurality of photoelectric conversion units that convert incident light into electric charges and a plurality of electrodes for outputting electric charges generated in the photoelectric conversion units, the first and second electrodes A first optical waveguide formed on the interlayer insulating film formed between the first optical waveguide for guiding incident light to the photoelectric conversion unit, and an interlayer insulating film formed between the second and third electrodes. A second optical waveguide guided to one optical waveguide, the first optical waveguide is formed at the same position with respect to each photoelectric conversion unit, and the second optical waveguide is formed with respect to each photoelectric conversion unit It is formed at a position that is eccentric in the center direction of the solid-state image sensor, and the amount of the eccentricity is obliquely proportional to the distance from the center of the solid-state image sensor of the photoelectric conversion unit, so that the peripheral pixels of the solid-state image sensor are also inclined. It is possible to capture light incident on the It is possible to improve the shading characteristics.

  Furthermore, a plurality of photoelectric conversion units for converting incident light into electric charges, a plurality of electrodes for outputting charges generated in the photoelectric conversion units, and a plurality of optical waveguides for guiding incident light to the photoelectric conversion units In the solid-state image pickup device, at least one of the plurality of optical waveguides is made of a transparent material having a refractive index larger than 2.0, so that the total reflection condition is satisfied even for light having a large incident angle. Utilization efficiency can be improved.

  Furthermore, it has a plurality of photoelectric conversion units that convert incident light into electric charges, an optical waveguide that guides incident light to the photoelectric conversion units, and a plurality of electrodes that output electric charges generated in the photoelectric conversion units. In the solid-state imaging device, the size of the light incident side opening of the optical waveguide is reduced as the distance from the center of the solid-state imaging device is reduced, so that the light can be efficiently captured even in the peripheral pixels of the solid-state imaging device. To improve the shading characteristics.

1 is a schematic plan view of a CMOS type solid-state imaging device of a first embodiment. It is a schematic sectional side view of the CMOS type solid-state image sensor of 1st Embodiment. It is a schematic sectional side view of the CMOS type solid-state image sensor of 1st Embodiment. It is a schematic sectional side view of the CMOS type solid-state image sensor of 1st Embodiment. It is a figure for demonstrating the manufacturing process of the CMOS type solid-state image sensor of 1st Embodiment. It is a figure for demonstrating the manufacturing process of the CMOS type solid-state image sensor of 1st Embodiment. It is a schematic plan view of the CMOS type solid-state image sensor of the second embodiment. It is a schematic sectional side view of the CMOS type solid-state image sensor of 2nd Embodiment. It is a figure for demonstrating the manufacturing process of the CMOS type solid-state image sensor of 2nd Embodiment. It is a figure for demonstrating the manufacturing process of the CMOS type solid-state image sensor of 2nd Embodiment. It is a schematic sectional side view of the conventional solid-state image sensor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 CMOS type solid-state image sensor 10 Silicon substrate 11 Photoelectric conversion part 12, 30, 31 Electrode 20, 21 Interlayer insulating film 41 1st optical waveguide 42 2nd optical waveguide 60, 62 Planarization layer 61 Color filter 63 Micro lens

Claims (7)

In a solid-state imaging device having a plurality of pixels,
Each of the plurality of pixels is
A microlens that collects light,
A photoelectric conversion unit that photoelectrically converts light collected by the microlens;
First, second, and third electrode layers that are formed between the microlens and the photoelectric conversion unit and are arranged in order from the side close to the photoelectric conversion unit toward the side close to the microlens,
A first optical waveguide formed in a first interlayer insulating film between the first electrode layer and the second electrode layer;
A second optical waveguide formed in a second interlayer insulating film between the second electrode layer and the third electrode layer,
A part of the second optical waveguide is formed so as to enter the first interlayer insulating film.   In each pixel of the plurality of pixels, the second optical waveguide is disposed at a position decentered in the center direction of the screen of the solid-state imaging device with respect to the photoelectric conversion unit. The solid-state image sensor according to claim 1, wherein the solid-state image sensor is substantially proportional to a distance from a center of the screen of the solid-state image sensor of the conversion unit.   3. The solid-state imaging device according to claim 2, wherein the relative position of the first optical waveguide with respect to the photoelectric conversion unit is the same in each pixel of the plurality of pixels.   2. The solid-state imaging device according to claim 1, wherein at least one of the first and second optical waveguides is made of a material having a refractive index larger than 2.0.   In each pixel of the plurality of pixels, the size of the opening on the light incident side of the second optical waveguide is set to be smaller as the pixel is farther from the center of the screen of the solid-state imaging device. The solid-state imaging device according to claim 1.   In each pixel of the plurality of pixels, the wall surface of the second optical waveguide that is farther from the center of the screen of the solid-state image sensor is the farther from the center of the screen of the solid-state image sensor, The solid-state imaging device according to claim 5, wherein the solid-state imaging device approaches a plane perpendicular to the second interlayer insulating layer. A method of manufacturing a solid-state imaging device,
A photoelectric conversion part forming step of forming a photoelectric conversion part for photoelectrically converting incident light on the silicon substrate;
A first electrode layer forming step of forming a first electrode layer on the silicon substrate;
A first interlayer insulating film forming step of forming a first interlayer insulating film on the first electrode layer;
A first optical waveguide forming step of forming a first optical waveguide in the first interlayer insulating film;
A second electrode layer forming step of forming a second electrode layer on the first interlayer insulating film;
A second interlayer insulating film forming step of forming a second interlayer insulating film on the second electrode layer;
A second optical waveguide forming step of forming a second optical waveguide in the second interlayer insulating film so that a part of the second optical waveguide enters the first interlayer insulating film;
A method for manufacturing a solid-state imaging device, comprising:

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