JP2006260619A - Device and method for correcting error, and digital data recording/reproducing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a device and a method for correcting errors, capable of improving data reliability by setting error correcting capability according to data quality of page data without changing the data sequence of page data during recording in a recording medium, and to provide a digital data recording/reproducing device using the same. <P>SOLUTION: The device for correcting errors is provided with a data input output section 11, an encoding section 12, an error correction section 13, a control section 14, and a buffer memory 15. The data input output section 11 divides data sent from an external device 4 during recording into a plurality of areas set by the control section 14 and stores the divided data, and the encoding section 12 executes encoding by using error correction capability different for each area set by the control section 14. During reproduction, error correction is carried out by the error correction section 13 according to the set value of the error correction capability of each area. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a digital data recording system, and more particularly to an error correction apparatus and error correction method for reducing data loss during reproduction of data recorded in a holographic memory, and digital data including the apparatus The present invention relates to a recording / reproducing apparatus.

  In recent years, with an increase in moving image data and backup target data, there is an increasing demand for systems that can realize a large capacity and a high transfer rate. One answer to this demand is a holographic memory system that enables high-density optical recording.

  The holographic memory system causes interference fringes by causing information light having information and reference light to interfere with each other, and records the interference light on a recording medium such as a photorefractive crystal. This photorefractive crystal is a substance that can react differently depending on the amplitude and phase of interference fringes. By changing the incident angle, amplitude, and phase of the reference light, a large amount of data can be recorded in the same position by overlapping two-dimensional pages as a unit.

  Further, by irradiating only a reference light to a predetermined position of the medium during reproduction, the page data corresponding to the incident angle and phase of the reference light can be read through a photographing element such as a CCD.

  Here, lasers and lenses are used in the holographic memory system, but due to the influence of the laser's Gaussian distribution characteristics and lens aberrations, the peripheral area (especially the four corners) rather than the central area of the page data that can be read by the image sensor during playback. ) Is much more distorted and part of the page data may be lost.

  One conventional technique for solving this problem is to change the arrangement of page data before recording on a recording medium (see, for example, Patent Document 1).

  The prior art will be briefly described with reference to FIG. FIG. 10 is a block diagram of a conventional holographic memory system. In FIG. 10, 101 is an encoding / decoding circuit for encoding data to be recorded and decoding reproduced data, 102 is an input changing circuit for changing the arrangement of encoded page data, and 103 is a recording medium. Recording / reproducing circuit for recording data or reading data recorded on the recording medium, 104 an output changing circuit for changing the arrangement of the read data, 105 for a recording medium, and 106 for an encoding / decoding circuit An external device 101 inputs and outputs data. The input change circuit 102 includes an input dividing unit 111, an input peripheral rearrangement unit 112, and an input merging unit 113. The output changing circuit 104 includes an output dividing unit 114, an output peripheral rearrangement unit 115, and an output merging unit 116.

  At the time of recording, the encoding / decoding circuit 101 receives input data from the external device 106, encodes it to generate rectangular page data, and outputs this to the input change circuit 102. Here, the rectangular page data is an array of m × n (m and n are natural numbers) pixels, and each pixel has a binary value for representing the luminance of the pixel. The input dividing unit 111 divides the input rectangular page data shown in FIG. 11A into a central area and a peripheral area as shown in FIG. 11B. The input peripheral rearrangement unit 112 rearranges the peripheral area based on a predetermined change pattern, and forms the rearrangement peripheral area as shown in FIG. Here, the change pattern is assumed to be circular. The input merging unit 113 merges the central area and the rearranged peripheral area to generate changed page data.

  Although a detailed description of the recording / reproducing circuit 103 is omitted here, information light is generated from the page data generated by the input change circuit 102 using a spatial light modulator, and a recording medium using reference light. 105.

  On the other hand, during reproduction, the recording medium 105 is irradiated with reference light, and page data is read using a photographing element such as a CCD. Here, as this page data, circular page data generated by the input change circuit 102 is read.

The output dividing unit 114 divides the reproduced circular page data into a central area and a peripheral modulation area as shown in FIG. The output peripheral rearrangement unit 115 rearranges the peripheral modulation areas to form the rearrangement peripheral modulation areas as shown in FIG. The output merging unit 116 merges the central modulation area with the rearranged peripheral modulation area and reproduces rectangular modulation page data as shown in FIG. The rectangular modulation page data is output to the encoding / decoding circuit 101, corrected if there is an error, and output data is output to the external device 106.
JP 2003-76256 A

  However, in the conventional configuration, since the arrangement of the changed page data is complicated, such as a circle, processing such as address generation for determining an arrangement pattern is complicated. In addition, a means for performing layout conversion is required, which leads to an increase in the circuit scale of the entire system.

  The present invention solves the above-mentioned conventional problems, and without changing the page data arrangement, the page data is divided into regions, error correction capability is set according to the data quality, and data reliability is improved. An object of the present invention is to provide an error correction apparatus and an error correction method.

  Another object of the present invention is to provide a digital data recording / reproducing apparatus including the error correction apparatus.

  In order to solve the above-described conventional problems, the error correction apparatus of the present invention encodes input data from an external device and records the data on a recording medium via a recording / reproducing apparatus, or data recorded on the recording medium Page data to be recorded on and reproduced from the input data or the output data or the recording medium in the error correction device that generates the output data subjected to the error correction processing and outputs the output data to the external device. A memory for storing data, a data input / output unit for inputting and outputting the input data and the output data between the external device and the memory, and a first error correction code for the input data stored in the memory An encoding unit, and the input data and the first error correction code from the page data reproduced from the recording medium and stored in the memory An error correction unit that performs read and first error correction processing to generate the output data; a control unit that controls the data input / output unit, the encoding unit, and the error correction unit; A data storage area of the memory is associated with the page data, and a memory map divided into at least two or more areas is generated, and a first error correction capability is determined for each of the divided areas, A data input / output unit stores the input data input from the external device in a location defined by the memory map in the memory, and the encoding unit is one area of the divided area of the memory A predetermined number of the input data is read out, the first error correction code is generated in accordance with the first error correction capability, and is stored in the memory. .

  Further, in the error correction apparatus, the control unit determines a second error correction capability, and the encoding unit receives a predetermined number of the input data or each of the input data from each of at least two of the regions of the memory. A first error correction code is read, a second error correction code is generated according to the second error correction capability for the read input data or the first error correction code, and the second error correction is performed. The code is stored in the memory.

  Further, in the error correction device, the encoding unit reads the data other than the second error correction code and the second error correction code from the memory, and stores the second error correction stored in the memory. The code storage address and the data storage address other than the second error correction code are exchanged and stored in the memory.

  Further, in the error correction device, the error correction unit reads the page data stored in the memory, performs the first error correction process using the first error correction code, and performs the first error correction. If there is an error as a result of the correction process and the error can be corrected, the error of the page data stored in the memory is updated to a correct value.

  Further, in the error correction device, the error correction unit reads the page data stored in the memory, performs the second error correction processing using the second error correction code, and performs the second error correction. If there is an error as a result of the correction process and the error can be corrected, the error of the page data stored in the memory is updated to a correct value.

Further, in the error correction device, the storage address of the second error correction code and the storage address of the data other than the second error correction code are exchanged before performing the second error correction processing. It is characterized by returning to the storage address.
Further, in the error correction device, the data input / output unit reads the page data after the first error correction process or the second error correction process stored in the memory, and the first error correction code The page data excluding the second error correction code is output to the external device in a predetermined order.

  Further, in the error correction apparatus, the recording medium is a holographic memory.

  Furthermore, in the error correction method of the present invention, input data from an external device is encoded and recorded on a recording medium via a recording / reproducing apparatus, or data recorded on the recording medium is reproduced via a recording / reproducing apparatus. In the error correction method for generating output data by performing error correction processing and outputting the output data to the external device, storing the input data or the output data or page data to be recorded on and reproduced from the recording medium in a memory; A data input / output step for inputting / outputting the input data and the output data between the external device and the memory; and an encoding step for generating a first error correction code for the input data stored in the memory; The input data and the first error from the page data reproduced from the recording medium and stored in the memory An error correction step for reading a positive code and performing a first error correction process, and a control step for controlling the data input / output step, the encoding step, and the error correction step, the control step comprising: Associating a data storage area with the page data, generating a memory map divided into at least two or more areas, determining a first error correction capability for each of the divided areas, the data input / output step includes The input data input from the external device is stored in a location defined by the memory map in the memory, and the encoding step includes a predetermined number of areas from one of the divided areas of the memory. Read the input data, generate the first error correction code according to the first error correction capability, It is obtained by, characterized in that pay.

  Further, in the error correction method, the control step determines a second error correction capability, and the encoding step includes a predetermined number of the input data or each of the input data from each of the at least two regions of the memory. A first error correction code is read, a second error correction code is generated according to the second error correction capability for the read input data or the first error correction code, and the second error correction is performed. The code is stored in the memory.

  Further, in the error correction method, the encoding step reads the second error correction code and data other than the second error correction code from the memory, and stores the second error correction stored in the memory. The code storage address and the data storage address other than the second error correction code are exchanged and stored in the memory.

  Further, in the error correction method, in the error correction step, the page data stored in the memory is read, the first error correction process is performed using the first error correction code, and the first error is corrected. If there is an error as a result of the correction process and the error can be corrected, the error of the page data stored in the memory is updated to a correct value.

  Furthermore, in the error correction method, the error correction step reads the page data stored in the memory, performs the second error correction process using the second error correction code, and performs the second error correction. If there is an error as a result of the correction process and the error can be corrected, the error of the page data stored in the memory is updated to a correct value.

  Further, in the error correction method, the storage address of the second error correction code and the storage address of the data other than the second error correction code are exchanged before performing the second error correction processing. It is characterized by returning to the storage address.

  Further, in the error correction method, the data input / output step reads the page data after the first error correction processing or the second error correction processing stored in the memory, and the first error correction code The page data excluding the second error correction code is output to the external device in a predetermined order.

  Further, in the error correction method, the recording medium is a holographic memory.

  Furthermore, in the data recording / reproducing apparatus of the present invention, the recording medium on which data is recorded by interference fringes, the recording medium is irradiated with light to form the interference fringes, the data is recorded, and the recording medium is irradiated with light. A recording / reproducing unit that reproduces data recorded on the recording medium from the interference fringe information obtained from the information, and input data to be recorded on the recording medium from an external device, and error correction coding is performed on the input data. Error correction unit that outputs page data corresponding to the interference fringes to the recording / reproducing unit, performs error correction of the page data read from the recording medium by the recording / reproducing unit, and outputs the page data as output data to the external device The error correction unit includes a memory for storing the input data, the output data, or page data to be recorded and reproduced on the recording medium, and the external device. A data input / output unit for inputting / outputting the input data and the output data between the input data and the memory, an encoding unit for generating a first error correction code for the input data stored in the memory, and the recording medium An error correction unit that reads the input data and the first error correction code from the page data reproduced from and stored in the memory, performs a first error correction process, and generates the output data; and the data input / output And a control unit that controls the error correction unit. The control unit associates the data storage area of the memory with the page data and divides the data storage area into at least two areas. A memory map is generated and a first error correction capability is determined for each of the divided areas, and the data input / output unit receives the input data input from the external device. Storing in a location defined by the memory map in the memory, the encoding unit reads a predetermined number of the input data from one of the divided areas of the memory, and the first error According to the correction capability, the first error correction code is generated and stored in the memory.

  Further, in the digital data recording / reproducing apparatus, the recording medium is a holographic memory.

  According to the error correction device, the error correction method, and the digital data recording / reproducing device of the present invention, the page data is divided into regions without changing the arrangement of the page data, and the error correction capability is set according to the data quality. Data reliability can be improved.

  Hereinafter, embodiments of an error correction apparatus of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a diagram showing the configuration of a digital data recording / reproducing apparatus and its peripheral devices in a first embodiment of the present invention.

  In FIG. 1, the digital data recording / reproducing apparatus records data input from an external device 4 on a recording medium 2 or outputs data recorded on the recording medium 2 to the external device 4. The error correction apparatus 1 adds an error correction code to the data input from the external device 4 and outputs the data to the recording / reproducing circuit 3. The data corrected by the recording / reproducing circuit 3 from the recording medium 2 is subjected to error correction. This is output to the external device 4. In the first embodiment, a digital data recording / reproducing apparatus constituting a holographic memory system in which the recording medium 2 is a holographic memory will be specifically described. The digital data recording / reproducing apparatus shown in FIG. 1 generates information light by passing an error correction apparatus 1 that performs error correction coding and error correction processing, and page data output from the error correction apparatus 1 through a spatial light modulator. The page light is recorded on the recording medium 2 by causing interference light on the recording medium 2 (holographic memory) to interfere with what is referred to as reference light different from the information light, and making only the reference light. The recording / reproducing circuit 3 reproduces page data by irradiating a predetermined position of the recording medium 2.

  Here, the error correction apparatus 1 stores the data input / output to / from the external device 4 and the recording / reproducing circuit 3 temporarily, and stores the data input from the external device 4 in the buffer memory 15. The data input / output unit 11 that reads out the data recorded in the buffer memory 15 and outputs the data to the external device 4, and generates an error correction code for the data recorded in the buffer memory 15 and performs error correction coding Control of data transmission / reception between the encoding unit 12 that performs the error correction, the error correction unit 13 that performs error correction processing on the data recorded in the buffer memory 15, and the external device 4 and the recording / reproducing circuit 3. It comprises a control unit 14 that controls the entire error correction apparatus 1.

  First, a process for recording page data on the recording medium 2 will be specifically described with reference to a flowchart shown in FIG.

  In step 1, based on the control signal output from the external device 4 to the control unit 14, how the control unit 14 stores the data transferred from the external device 4 in the buffer memory 15 is recorded. Settings are made such as how to divide the area of the page data output to the reproduction circuit 3 and how to correct the error correction capability when encoding for each area. This control signal includes a command indicating the start of recording and the number of transfer data. In the first embodiment, it is assumed that the external device 4 transmits 123 Kbytes of data to the error correction apparatus 1.

  FIG. 3A shows the data arrangement of page data that the error correction apparatus 1 performs error correction coding on 123 Kbytes data sent from the external device 4 and finally outputs to the recording / reproducing circuit 3. As shown, it is composed of an array of 1024 bits × 1024 bits. The recording / reproducing circuit 3 performs a process such as spatial light modulation on the page data and starts a recording operation on the recording medium 2. At this time, depending on the performance of the lens or laser used by the recording / reproducing circuit 3, distortion occurs in the peripheral area of the page data, particularly in the four corners, so that the quality of the data is divided in the page data.

  Therefore, first, the control unit 14 performs area division as shown in FIG. 3B according to the quality of the data in the data arrangement of the page data shown in FIG. For example, an “A” area composed of 768 bits × 768 bits located at the center of the page data is defined as an area with good data quality. Next, four “B” areas composed of 768 bits × 128 bits adjacent to the four sides of the “A” area are defined as areas where the data quality is an average level. Finally, the four “C” areas composed of 128 bits × 128 bits located at the four corners of the page data are defined as areas with poor data quality.

  Next, the control unit 14 sets the error correction capability in each divided area. Here, a GF (2 ^ 8) Reed-Solomon code is used as the error correction code of the first embodiment. In this method, 8-bit data is defined as 1 byte, and data is corrected in byte units. In the first embodiment, the error correction capability of the “A” area is considered in consideration of the fact that the data quality is good, and a 128-byte block of data is set as one code word, and errors up to 1 byte are corrected for one code word. A single error correction is possible. Similarly, since the error correction capability of the “B” area is such that the data quality is an average level, a double error correction that can correct an error of up to 2 bytes for one code word with a 128-byte block of data as one code word. And Finally, the error correction capability of the “C” area is a quadruple error correction that can correct up to 4 bytes of error for one codeword by making a block of 128 bytes of data one codeword due to poor data quality. .

  Furthermore, the control unit 14 sets how to store data output from the external device 4 later in the buffer memory 15 (that is, what kind of memory map is used). FIG. 4 is a diagram showing the configuration of the memory map. A method of configuring this memory map will be described.

  The page data output from the error correction apparatus 1 to the recording / reproducing circuit 3 requires 1024 bits × 1024 bits, that is, 128 Kbyte space, as shown in FIG. Therefore, as shown in FIG. 4, the memory space required for the buffer memory 15 is a 128 Kbyte space from the address 00000h (“h” indicates hexadecimal notation) to the address 1FFFFh in byte addresses. Here, since the data sent from the external device 4 is 123 Kbytes, the remaining 5 Kbytes are a space in which the error correction code generated by the error correction apparatus 1 can be stored. In the memory map shown in FIG. 4, the length in the vertical direction is 128 bytes from byte address 00000h to address 0007Fh.

  First, the “A” area shown in FIG. 3B requires a memory space of 768 bits × 768 bits, that is, 72 Kbytes, and the 72 Kbyte space from the byte addresses 00000h to 11FFFh of the buffer memory 15 shown in FIG. use. Here, since the error correction code is also included in the “A” area shown in FIG. 3B, this memory space also includes the error correction code. In step 1, since the code length of one codeword in the “A” area is set to 128 bytes and single error correction is set, two bytes of error correction code per codeword are required. Since there are 576 code words having a code length of 128 bytes in the “A” area of the 72 Kbyte memory space, the error correction code data is 1152 (= 2 × 576) bytes in total. The data sent from the external device 4 can be stored in the space from this byte address 00000h to 11FFFh by 72576 bytes obtained by subtracting this 1152 bytes from 72 Kbytes.

  Here, regarding 576 code words existing in the “A” area, 128 bytes from byte addresses 00000h to 0007Fh are set as one code word, and 128 bytes from next byte addresses 0,080h to 000FFh are set as one code word, Similarly, a code word is formed every 128 bytes from the byte address 0000h. FIG. 5 (a) is a diagram showing the structure of the code word in the “A” area. The data part is 126 bytes from the head of the code word, and the data sent from the external device 4 is stored here. An error correction code is stored in the remaining 2 bytes. Error correction is performed on each code word. Hereinafter, this is referred to as C1 error correction, this code word is referred to as a C1 code word, and an error correction code is referred to as a C1 error correction code. That is, with respect to the memory map shown in FIG. 4, the vertical direction is exactly one C1 code word.

  As described above, in FIG. 4, in the memory space from byte addresses 0000h to 11FFFh, the data sent from the external device 4 is stored in the hatched area, and the C1 error correction code is stored in the remaining white area. .

  Next, the “B” area shown in FIG. 3B requires four planes of 768 bits × 128 bits, that is, a memory space of 48 Kbytes, and the buffer memory 15 shown in FIG. 4 has a byte address from 12000h to 1DFFFh. A 48K byte space is used. Here, since the C1 error correction code is also included in the “B” area shown in FIG. 3B, this memory space also includes the C1 error correction code. In step 1, since the code length of one codeword in the “B” area is set to 128 bytes and double error correction is set, 4 bytes are required for the C1 error correction code per codeword. Since there are 384 C1 codewords with a code length of 128 bytes in the “B” area where 48 Kbytes exist, the total C1 error correction code is 1536 (4 × 384) bytes. The data sent from the external device 4 can be stored in the space from this byte address 12000h to 1DFFFh by 47616 bytes obtained by subtracting 1536 bytes from 48K bytes.

  Here, for 384 C1 code words existing in the “B” area, 128 bytes from the address 12000h to 1207Fh are set as one code word, and 128 bytes from the next byte address 12080h to 120FFh are set as one code word. Similarly, a code word is constructed every 128 bytes from the byte address 12000h. FIG. 5B is a diagram showing the configuration of the C1 code word in the “B” area. The data portion is 124 bytes from the head of the code word, and the data sent from the external device 4 is stored here. The C1 error correction code is stored in the remaining 4 bytes.

  As described above, in FIG. 4, in the memory space from the byte addresses 12000h to 1DFFFh, the data sent from the external device 4 is stored in the hatched area, and the C1 error correction code is stored in the remaining white area. .

  Finally, the “C” area shown in FIG. 3B requires four 128-bit × 128-bit memory areas, that is, 8 Kbytes of memory space. The buffer memory 15 shown in FIG. 4 has an address from 1E000h to 1FFFFh. 8K byte space is used. Here, since the C1 error correction code is also included in the “C” area shown in FIG. 3B, this memory space also includes the C1 error correction code. In step 1, since the code length of one codeword in the “C” area is set to 128 bytes and quad error correction is set, 8 bytes of error correction code per codeword are required. Therefore, the data part per code word is 120 bytes obtained by subtracting 8 bytes from 128 bytes. Here, as apparent from the above description and FIG. 4, among the 123 Kbytes of data sent from the external device 4, 120192 bytes have already been stored in the “A” area and the “B” area, and the remaining 5760. The byte is stored in the “C” area. As described above, since the data per code word is 120 bytes, there are 48 (5760 ÷ 120) C1 code words in the “C” area. Similar to the “A” area and the “B” area, the C1 code word is configured in units of 128 bytes from the byte address 1E000h. FIG. 5 (c) is a diagram showing the configuration of the C1 code word in the “C” area. The data portion is 120 bytes from the head of the code word, and the data sent from the external device 4 is stored here. The C1 error correction code is stored in the remaining 8 bytes.

  As described above, in FIG. 4, in the memory space from byte addresses 1E000h to 1F7FFh, the data sent from the external device 4 is stored in the hatched area, and the C1 error correction code is stored in the remaining white area. .

  Here, in the memory map of FIG. 4, the memory space of the black area from byte address 1F800h to 1FFFFh will be described. As shown in FIG. 4, a C1 codeword is formed in each area, and encoding and error correction processing are performed based on the error correction capability set in each area. Therefore, there is a possibility that the error cannot be corrected. Therefore, a predetermined number of pieces of encoded data are extracted from each region, a code word is newly constructed, and double encoding is performed. Hereinafter, this is referred to as C2 error correction, this code word is referred to as a C2 code word, and the error correction code is referred to as a C2 error correction code. That is, for the memory map shown in FIG. 4, the horizontal direction is one C2 code word. The C1 error correction codeword region generated in each region is also encoded in the C2 error correction direction.

  Regarding the error correction capability of this C2 error correction, as shown in FIG. 5 (d), an 8-bit error correction capable of correcting an error of up to 8 bytes for one code word, with a code length of 1024 bytes as one code word And Therefore, since 16 bytes of C2 error correction code are required per codeword, the C2 error correction code is stored in the memory space of the black area from byte address 1F800h to 1FFFFh in the memory map of FIG.

  In step 1, the control unit 14 determines the above settings (area division method, error correction capability in each area, memory map configuration of the buffer memory 15, etc.). Based on these settings, the control unit 14 controls other blocks constituting the error correction apparatus 1, and each block performs various processes in steps described later. When these settings are completed, the control unit 14 requests the external device 4 to start data transfer.

  In step 2, the data input / output unit 11 inputs data from the external device 4 and stores the data in the buffer memory 15. Here, the storage position in the buffer memory 15 is as described above. Since the memory map configuration as shown in FIG. 4 is already set by the control unit 14 in step 1 as described above, the control unit 14 controls the data input / output unit 11. Instruct the memory map and store the data accordingly. In the first embodiment, it is assumed that data transmitted from the external device 4 is stored in ascending order of addresses in the memory map of FIG. When the storage is completed, the data input / output unit 11 notifies the control unit 14 of the end.

  In step 3, the data stored in the buffer memory 15 is encoded in units of C1 code words. The control unit 14 outputs an instruction to start encoding for C1 error correction to the encoding unit 12 and simultaneously outputs the configuration of the memory map of the buffer memory 15 and the setting of error correction capability in each region. The encoding unit 12 reads the C1 code word from the buffer memory 15, performs encoding, and stores the generated C1 error correction code at a predetermined position in the buffer memory 15. This process is repeated for the number of C1 code words. In the first embodiment, it is assumed that data is read from the buffer memory 15 in ascending order of the byte address of the head data of the C1 code word. This will be specifically described below.

  First, the encoding unit 12 starts processing from the C1 code word in the “A” area in the memory map shown in FIG. Of the first C1 code word composed of 128 bytes from byte address 00000h to address 0007Fh, 126 bytes of the data part (byte address 00000h to address 0007Dh) are read in units of 1 byte in order from byte address 00000h. The conversion unit 12 inputs sequentially. Since the encoding unit 12 has previously input the setting value of the error correction capability of the “A” area from the control unit 14, the encoding unit 12 starts encoding according to the setting. When the encoding unit 12 inputs all 126 bytes of data, the generation of the C1 error correction code is completed. The encoding unit 12 stores the generated 2-byte C1 error correction code at the byte addresses 0007Eh to 0007Fh of the buffer memory 15, and ends the encoding process for the first C1 codeword.

  Next, the process proceeds to the processing of the second C1 code word composed of 128 bytes from byte address 0080h to 000FFh. The data portion (byte address 0080h to 000FDh) 126 bytes of this second C1 code word is read in 1-byte units in order from byte address 0 080h, and the C1 error correction code 2 is read in the same manner as the first C1 code word. The encoding unit 12 generates a byte, stores the byte address from address 000FEh to address 000FFh in the buffer memory 15, and shifts to processing of the third C1 code word.

  Similarly, when the encoding of all 576 C1 code words constituting the “A” area is completed, the encoding of the C1 code word constituting the “B” area is started. Like the “A” area, since the setting value of the error correction capability of the “B” area is input from the control unit 14 in advance, encoding is started according to the setting. The data section of the first C1 code word (byte address 12000h to 1207Bh) consisting of 128 bytes from byte address 12000h to 1207Fh is read out in byte units in order from byte address 12000h, and the encoding unit 12 sequentially input. When the encoding unit 12 inputs all 124 bytes of data, the generation of the C1 error correction code is completed. The encoding unit 12 stores the generated 4-byte C1 error correction code from the byte address 1207Ch to 1207Fh of the buffer memory 15, ends the processing of the first C1 codeword, and finishes the second C1 codeword. Move on to processing. Thereafter, all 384 C1 codewords constituting the “B” region are encoded as in the “A” region.

  Similarly, the C1 code word constituting the “C” area is similarly encoded according to the setting value of the error correction capability of the “C” area set in advance by the control unit 14. Here, the area from the byte address 1F800h to 1FFFFh in the “C” area is an area in which the C2 error correction code is stored, and no data exists because encoding for C2 error correction is not performed at this point. . That is, encoding for C1 error correction is not performed for this area. Therefore, 48 C1 code words from byte addresses 1E000h to 1F7FFh excluding the storage area of the C2 error correction code are encoded. The first C1 codeword data part (byte address 1E000h to 1E077h) consisting of 128 bytes from byte address 1E000h to 1E07Fh is read out in units of 1 byte from byte address 1E000h, and encoded. 12 sequentially input. When the encoding unit 12 inputs all 120 bytes of data, the generation of the C1 error correction code is completed. The encoding unit 12 stores the generated 8-byte C1 error correction code from the byte addresses 1E078h to 1E07Fh of the buffer memory 15, finishes the processing of the first C1 codeword, and finishes the second C1 codeword. Move on to processing. Hereinafter, all 48 C1 code words constituting the “C” region are encoded. At this point, the area from the byte address 00000h to 1F7FFh in the memory map shown in FIG. 4 is filled with the data sent from the external device 4 and the C1 error correction code. Thereafter, the encoding unit 12 notifies the control unit 14 of the end.

  In step 4, the data stored in the buffer memory 15 is encoded in units of C2 codewords. The control unit 14 outputs an instruction to start encoding for C2 error correction to the encoding unit 12 and simultaneously outputs the setting of the C2 error correction capability. In the memory map shown in FIG. 4, the encoding unit 12 reads out the C2 code word from the buffer memory 15 in the direction of C2 error correction, performs encoding, and generates the generated C2 error correction code at a predetermined position in the buffer memory 15. To store. This process is repeated for the number of C2 code words. In the first embodiment, it is assumed that data is read from the buffer memory 15 in ascending order of the byte address of the head data of the C2 code word. This will be specifically described below.

  In the memory map shown in FIG. 4, the encoding unit 12 first converts the data portion 1008 bytes of the first C2 codeword 1024 bytes starting from the byte address 00000h into the C2 error correction direction in order from the byte address 00000h. Are read in units of 1 byte, and the encoding unit 12 sequentially inputs them. Since the encoding unit 12 has previously input the setting value of the C2 error correction capability from the control unit 14, the encoding unit 12 starts encoding according to the setting. When the encoding unit 12 inputs all 1008 bytes of data, the generation of the C2 error correction code is completed. The encoding unit 12 stores the generated 16-byte C2 error correction code in order from the byte address 1F800h of the buffer memory 15 in the C2 error correction direction, and ends the encoding process for the first C2 codeword.

  Next, the data part of the second C2 code word starting at byte address 00001h is read in units of 1 byte in the C2 error correction direction from the byte address 00001h, and the encoding part 12 inputs the data sequentially. Go. When the encoding unit 12 inputs all 1008 bytes of data, the generation of the C2 error correction code is completed. The encoding unit 12 stores the generated 16-byte C2 error correction code in order from the byte address 1F801h of the buffer memory 15 in the C2 error correction direction, and ends the encoding process for the second C2 codeword.

  Similarly, all 128 C2 codewords are encoded. At this time, the entire 128 Kbyte memory space from the byte address 00000h to 1FFFFh in the memory map shown in FIG. 4 is filled with the data sent from the external device 4, the C1 error correction code, and the C2 error correction code. Will be. Thereafter, the encoding unit 12 notifies the control unit 14 of the end.

  In step 5, the control unit 14 notifies the recording / reproducing circuit 3 that all the data constituting the page data has been collected in the buffer memory 15, and at the same time outputs the configuration information of the memory map of the buffer memory 15. In response to this notification, the recording / reproducing circuit 3 reads page data from the buffer memory 15.

  The recording / reproducing circuit 3 reads data from the buffer memory 15 based on the memory map shown in FIG. 4, and forms a data array of page data shown in FIG. FIG. 6 is a diagram showing the data storage order for each area in the page data shown in FIG. In the first embodiment, data is read in ascending order of data addresses constituting the “A” area of the memory map of FIG. 4 and arranged in units of bits in the order indicated by (1) of FIG. Next, reading is performed in order from the data with the smallest address of the data constituting the “B” area of the memory map in FIG. 4, and arranged in bit units in the order indicated by (2), (3), (4), and (5) in FIG. To do. Finally, the data constituting the “C” area of the memory map are read in order from the data with the smallest address, and are arranged in bit units in the order indicated by (6), (7), (8), and (9) in FIG.

  After the above page data configuration is completed, information light is generated using a spatial light modulator or the like included in the recording / reproducing circuit 3 and recorded on the recording medium 2 using reference light.

  In the first embodiment, in the memory map of FIG. 4, the C2 error correction code is stored in the “C” area where the data quality may be deteriorated. There may be many. In this case, the C2 error correction code has an incorrect value. Therefore, when the C2 error correction code is performed, there is a possibility that erroneous correction is caused. This error correction does not correct the code word to the original value but corrects it to a completely different code word and concludes that there is no error in this code word. If this happens, the data in the area with good data quality will be corrected to an incorrect value. Therefore, step 4_2 may be provided between step 4 and step 5, and countermeasure processing for this may be performed.

  In Step 4_2, the C2 error correction code generated in Step 4 and stored in the “C” area of the memory map in FIG. 4 is exchanged with the data in the “A” area or “B” area by the encoding unit 12. Process. Various patterns can be considered for the data to be exchanged with, but in the first embodiment, a method as shown in FIG. 7 is used, which is the “A” area with good data quality and the easiest address generation. .

  FIG. 7A is a memory map immediately after the C2 error correction code is generated in step 4. The shaded area from byte address 00000h to 1F7FFh in FIG. 7A corresponds to the data portion of the C2 code word, and the black area from byte address 1F 800h to 1FFFFh is an area in which the C2 error correction code is stored. It is. FIG. 7B shows the configuration of the C2 code word. For a code length of 1024 bytes, the data part is the front part 1008 bytes and the rear part 16 bytes is the C2 error correction code. As shown in FIG. 7C, the C2 error correction code arranged in the “C” area is exchanged with the data at the byte addresses 00000h to 007FFh in the “A” area. FIG. 7D is a diagram showing the configuration of the C2 code word after the arrangement exchange.

  Here, as described in the operation of step 3, the C2 error correction code storage area at the byte addresses 1F800h to 1FFFFh is not encoded for C1 error correction. On the other hand, the byte addresses 00000h to 1F7FFh are double-encoded: C1 error correction encoding and C2 error correction encoding. In other words, by placing data that is not further reinforced in the “C” area where the data quality is poor, the reliability of the data is lowered. Therefore, it is possible to improve the reliability of data during reproduction by moving a C2 error correction code which is not double-encoded to a region having a good data quality and recording it on the recording medium 2. Can do. When the above operations are completed, an end notification is sent to the control unit 14.

  Through the above steps, the data recording operation for one page is completed. Actually, since a plurality of page data is recorded on the recording medium 2, these steps are repeated or operated by pipeline processing.

  Next, a process for reproducing data from the recording medium 2 will be specifically described with reference to a flowchart shown in FIG.

  First, when a reproduction instruction is output from the external device 4 to the control unit 14, the control unit 14 instructs the recording / reproduction circuit 3 to reproduce page data from the recording medium 2. As a result, the recording / reproducing circuit 3 irradiates the recording medium 2 with the reference light, reads the diffracted light with a photographing element such as a CCD, and obtains page data as shown in FIG.

  In step 11, the control unit 14 notifies the recording / reproducing circuit 3 of the area division pattern as shown in FIG. 3B set at the time of recording in advance, and the recording / reproducing circuit 3 displays the page data reproduced from the recording medium 2. The data is stored in the buffer memory 15 according to the area division pattern. In the first embodiment, the recording / reproducing circuit 3 extracts data in bit units in the order of page data (1) shown in FIG. 6, and in byte units in ascending order of byte addresses in the “A” area of the memory map of FIG. Store. Next, data is extracted in the order of (2), (3), (4), and (5) of the page data shown in FIG. 6, and stored in ascending order of byte addresses in the “B” area of the memory map of FIG. Finally, data is extracted in the order of (6), (7), (8), (9) of the page data shown in FIG. 6, and stored in ascending order of byte addresses in the “C” area of the memory map of FIG.

  When all the 128 Kbyte data constituting the page data has been stored in the buffer memory 15, the recording / reproducing circuit 3 notifies the control unit 14 of the end.

  In step 12, error correction is performed on the data stored in the buffer memory 15 in units of C1 code words. The control unit 14 outputs an instruction to start C1 error correction to the error correction unit 13 and simultaneously outputs the memory map configuration of the buffer memory 15 and the setting of error correction capability in each region. This set value is the value set in step 1 at the time of recording.

  The error correction unit 13 first starts processing from the C1 code word in the “A” area shown in the memory map of FIG. The first C1 code word composed of 128 bytes from byte address 00000h to address 0007Fh is read in byte units sequentially from byte address 00000h, and error correction unit 13 inputs them sequentially. Since the error correction unit 13 has previously input the setting value of the error correction capability in the “A” area from the control unit 14, the error correction starts according to the setting. The error correction unit 13 can determine whether or not there is an error by inputting all 128 bytes of data, and if it is determined that there is an error and can be corrected, the first C1 code stored in the buffer memory 15 Update the incorrect value of the word to the correct value. If it cannot be corrected, it cannot be determined where the error exists, so that it is left to C2 error correction to be processed in a later step. This completes the encoding process for the first C1 codeword.

  Next, the process proceeds to the processing of the second C1 code word composed of 128 bytes from the byte address 0080h to the address 000FFh, and error correction is performed. Similarly, when the processing for all the 576 C1 code words constituting the “A” area is completed, the process proceeds to the processing of the C1 code word constituting the “B” area.

  First, processing is performed on the first C1 code word composed of 128 bytes from address 12000h of address “B” to address 1207Fh. Here, since the setting value of the error correction capability in the “B” area is notified in advance from the control unit 14, the error correction unit 13 performs processing accordingly. The subsequent operation is the same as the processing for the C1 code word in the “A” area.

  When the process for the “B” area is completed, the process finally proceeds to the process for the “C” area. This is the same as the processing in the “A” area and the “B” area, but the C1 code word in the “C” area has only 48 code words from the byte addresses 1E000h to 1F7FFh. This is because the C2 code word is stored after the byte address 1F 800h, and this area is not encoded for C1 error correction. When the C1 error correction for the 48 C1 code words is completed, the processing of all the C1 code words stored in the memory map shown in FIG. 4 from the byte address 00000h to the address 1F7FFh is completed. The error correction unit 13 notifies the control unit 14 of the end, and proceeds to the next step.

  In step 13, error correction is performed on the data stored in the buffer memory 15 in units of C2 codewords. The control unit 14 outputs an instruction to start C2 error correction to the error correction unit 13 and at the same time outputs a memory map configuration of the buffer memory 15 and an error correction capability setting in each region. This set value is a value adopted at the time of recording.

  Here, when the C2 error correction code generated in the “C” area in step 4 by the encoding unit 12 at the time of recording is exchanged with data in another area in step 4_2, the error correction unit 13 After returning to the arrangement, C2 error correction is started. For example, suppose that the C2 error correction code generated by the encoding unit 12 in step 4 at the time of recording is stored in the black area (byte address 1F800h to 1FFFFh) in FIG. 7A, and in FIG. Thus, when the data is exchanged with the data at the byte addresses 00000h to 007FFh, the error correction unit 13 returns to the original arrangement shown in FIG. Thereafter, C2 error correction described below is started.

  First, in the memory map shown in FIG. 4, the error correction unit 13 reads out 1024 bytes of the first C2 code word starting from the byte address 00000h in the C2 error correction direction in units of 1 byte from the byte address 00000h. The error correction unit 13 inputs sequentially. Since the error correction unit 13 has previously input the setting value of the C2 error correction capability from the control unit 14, it starts error correction according to the setting. When the error correction unit 13 inputs all 1024 bytes of data, the presence or absence of an error can be determined. If it is determined that there is an error and correction is possible, the first C2 code stored in the buffer memory 15 is determined. Update the incorrect value of the word to the correct value. If it cannot be corrected, it cannot be determined where the error exists, and thus the first C2 code word remains in error.

  Next, the second C2 code word starting at the byte address 00001h is read in byte units in the C2 error correction direction in order from the byte address 00001h, and the error correction code unit 23 inputs them in order. When the error correction unit 13 inputs all 1024 bytes of data, the presence or absence of an error can be determined. If there is an error and correction is possible in the same manner as the first C2 codeword, the error is stored in the buffer memory 15. The incorrect value of the second C2 code word is updated to the correct value. Thereafter, error correction of all 128 C2 codewords is similarly performed, and the error correction unit 13 notifies the control unit 14 of the end.

  However, when one or more C2 codewords that cannot be corrected exist among the 128 C2 codewords, the error correction unit 13 notifies the control unit 14 of the result, and the control unit 14 records the recording / reproducing circuit 3. To the page data in which the uncorrectable C2 code word exists is requested to be reproduced from the recording medium 2 again. Alternatively, the process returns to step 12, and C1 error correction is performed again. Performing C1 error correction and C2 error correction alternately a plurality of times in this way is called repetitive correction. As a result, the number of code words that cannot be corrected gradually decreases, and there is a possibility that all C1 code words and C2 code words can be corrected to correct values.

  The repeated correction will be briefly described with reference to FIG. FIG. 9 is a diagram showing a memory map, where one square is one byte. In the C1 code word, one vertical column in FIG. 9A is one code word, and there are a total of eight (first column, second column, third column,..., Eighth column). As for the C2 code word, one horizontal line in FIG. 9A is one code word, and there are a total of 8 C lines (A line, B line, C line,..., H line). Both the C1 code word and the C2 code word are single error correction capable of correcting up to 1 byte out of the code length of 8 bytes.

  It is assumed that there is an error in the data at the position painted black in FIG. First, by the C1 error correction in step 12, the data error in the shaded area shown in FIG. 9B can be corrected correctly. That is, the C1 code words from the 4th column to the 8th column can be corrected, and the 1st column to the 3rd column cannot be corrected because there was a 2-byte error in the C1 code word. ) Error in black part remains. Next, by the C2 error correction in step 13, the data error in the shaded area shown in FIG. 9C can be corrected correctly. In other words, the B and C lines were uncorrectable because there was a 2-byte error in the C2 codeword, and the other C2 codewords had no error or were a 1-byte error. It can be corrected to the correct value. Eventually, the black part of FIG. 9C remains in error.

  Next, returning to step 12, by performing C1 error correction side by side, the data error in the shaded area shown in FIG. 9 (d) can be corrected correctly. In other words, the C1 code word in the first column and the third column can be corrected, and the second column cannot be corrected because there was an error of 2 bytes in the C1 code word, and eventually the black portion in FIG. Errors remain. Next, by the C2 error correction in step 13, the data error in the hatched portion shown in FIG. 9E can be corrected correctly. As a result, all C1 code words and C2 code words can be corrected to correct values.

  Therefore, when there is a C2 code word that cannot be corrected by the C2 error correction in Step 13, a plurality of C1 error corrections in Step 12 and C2 error corrections in Step 13 are performed instead of outputting the reproduction request to the recording / reproducing circuit 3 again. By performing the repeated correction performed once, there is a high possibility that the original correct value can be corrected, and the reliability of the data can be improved.

  As described above, the data to be output to the external device 4 is ready in the buffer memory 15, and the process proceeds to Step 14.

  In step 14, the data input / output unit 11 outputs the data stored in the buffer memory 15 to the external device 4. The control unit 14 instructs the data input / output unit 11 to read data to be output from the buffer memory 15 to the external device 4, and the external device 4 receives the data from the data input / output unit 11. Here, the data along the memory map shown in FIG. 4 is stored in the buffer memory 15, but the area other than the shaded area is a C1 error correction code or a C2 error correction code. Since these error correction codes are added for use in error correction during reproduction, they are not output to the external device 4. Therefore, in the first embodiment, the data input / output unit 11 reads out 123 Kbytes of data stored in the hatched portion of the memory map in FIG. 4 from the buffer memory 15 in ascending order of address and outputs the data to the external device 4. When all the data are output, an end notification is sent to the control unit 14.

  With the above steps, the data reproduction operation for one page is completed. Actually, since a plurality of page data are reproduced from the recording medium 2, these steps are repeated or operated by pipeline processing.

  As described above, in the first embodiment, the error correction capability is set according to the data quality in the page data without changing the data arrangement of the page data when recording on the recording medium 2, and the reliability of the data is set. It is possible to provide an error correction apparatus 1 and a method for improving the error.

  In the first embodiment, the recording medium 2 is described as a holographic memory and the digital data recording system is described as a holographic memory system. However, the recording medium 2 has a data quality that differs depending on the recording position of the recording medium 2, such as a tape. Can also be applied.

  Further, the number of transfer data input / output by the external device 4, the data arrangement when recording on the recording medium 2, the area division method depending on the quality of the page data, the configuration of the code word when encoding in each area, The setting values and setting methods used in the description of the first embodiment, such as error correction capability, have been described using specific numerical values, but are not limited thereto.

  Further, the correspondence between the data input / output to / from the external device 4 and the data input / output to / from the recording / reproducing circuit 3 and the storage position of the buffer memory 15 may be different from that described in the first embodiment. It must match at the time of playback.

  Further, the order of C1 encoding and C2 encoding performed by the encoding unit 12 during recording and C1 error correction and C2 error correction performed by the error correcting unit 13 during reproduction may be opposite to those described in the first embodiment. Good.

  Furthermore, in the first embodiment, the C2 error correction code generated by the encoding unit 12 in step 4_2 at the time of recording is exchanged with data in a region with good data quality. However, the arrangement exchange pattern is not limited to this.

  Further, in the first embodiment, C1 encoding and C2 encoding are performed during recording, and C1 error correction and C2 error correction are performed during reproduction. However, C2 encoding and C2 error correction may be omitted. That is, in the flowchart shown in FIG. 2 at the time of recording, if the C1 encoding performed by the encoding unit 12 in step 3 is completed, the process proceeds to step 5 without performing steps 4 and 4_2, and FIG. In the flowchart, if the C1 error correction process performed by the error correction unit 13 in step 12 is completed, the process may move to step 14 without performing step 13. In this case, dummy data may be stored in the C2 error correction code storage area from byte addresses 1F800h to 1FFFFh in the memory map shown in FIG. 4, or additional data is input from the external device 4 and byte address 1E000h. The C1 codeword may be configured in the same manner as the area from the address to 1F7FF, and the C1 encoding in step 3 and the C1 error correction process in step 12 may be performed. Alternatively, instead of data, information required by the error correction apparatus 1 or the external device 4 during recording or reproduction may be stored. Further, the correspondence between the data storage order and read order of the page data shown in FIG. 6 and the data read order and storage order in the memory map shown in FIG. 4 is the same as the case where the C2 error correction code is stored. It's okay.

  Furthermore, in the first embodiment, the data input from the external device 4 is directly error-correction-encoded and recorded on the recording medium 2, and the data read from the recording medium 2 is error-corrected as it is before the external device 4. However, the data subjected to the code modulation using a 1-4 code or a 3-16 code proposed as a code suitable for holographic memory recording is recorded on the recording medium. 2 may be recorded. In this case, for example, the coding unit 12 performs the coding modulation before performing the error correction coding, performs C1 coding or C2 coding, records the data on the recording medium 2, and reads out from the recording medium 2. The coded modulation may be decoded after C1 error correction or C2 error correction is performed on the received data, or the page data output from the error correction device 1 is subjected to the coded modulation by the recording / reproducing circuit 3. The page data that is recorded on the recording medium 2 later and the data read from the recording medium 2 is decoded and encoded by the recording / reproducing circuit 3 may be input to the error correction apparatus 1. However, in this case, since the number of data to be recorded on the recording medium 2 increases with the coding efficiency of the coding modulation, the data actually written on the recording medium 2 is created when the memory map is created in Step 1. It is necessary to determine the size of the map in consideration of the number.

  The error correction apparatus, error correction method, and digital data recording / reproducing apparatus according to the present invention can improve the reliability of data and are useful as a holographic memory system recording / reproducing apparatus or the like.

1 is a configuration diagram of a digital data recording / reproducing apparatus and peripheral devices according to Embodiment 1 of the present invention. The flowchart which showed the flow of the process at the time of the recording in Example 1 of this invention. The figure which showed the structure of the page data in Example 1 of this invention, and the area division | segmentation method The figure which showed the memory map of the buffer memory in Example 1 of this invention The figure which showed the structure of C1 code word in Example 1 of this invention, and C2 code word The figure which showed the data storage order for every area | region of the page data in Example 1 of this invention The figure which showed the arrangement | positioning exchange method of the C2 error correction code in Example 1 of this invention The flowchart which showed the flow of the process at the time of reproduction | regeneration in Example 1 of this invention The figure shown about the repetition correction in Example 1 of this invention Configuration diagram of a conventional holographic memory system Diagram showing page data conversion method during recording in a conventional holographic memory system Diagram showing page data conversion method during playback in a conventional holographic memory system

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Error correction apparatus 2 Recording medium 3 Recording / reproducing circuit 4 External apparatus 11 Data input / output part 12 Encoding part 13 Error correction part 14 Control part 15 Buffer memory 101 Encoding / decoding circuit 102 Input change circuit 103 Recording / reproducing circuit 104 Output change Circuit 105 Recording medium 106 External device 111 Input division unit 112 Input peripheral rearrangement unit 113 Input merging unit 114 Output division unit 115 Output peripheral rearrangement unit 116 Output merging unit

Claims (18)

Output data obtained by encoding input data from an external device and recording the data on a recording medium via a recording / reproducing device, or reproducing the data recorded on the recording medium via the recording / reproducing device and performing error correction processing In the error correction device that generates and outputs to the external device,
A memory for storing the input data or the output data or page data to be recorded and reproduced on the recording medium;
A data input / output unit for inputting / outputting the input data and the output data between the external device and the memory;
An encoding unit for generating a first error correction code for the input data stored in the memory;
An error correction unit that reads the input data and the first error correction code from the page data reproduced from the recording medium and stored in the memory, and performs the first error correction process to generate the output data;
A controller that controls the data input / output unit, the encoding unit, and the error correction unit;
The control unit associates a data storage area of the memory with the page data, generates a memory map divided into at least two areas, and determines a first error correction capability for each of the divided areas And
The data input / output unit stores the input data input from the external device in a location defined by the memory map in the memory,
The encoding unit reads a predetermined number of the input data from one of the divided areas of the memory, generates the first error correction code according to the first error correction capability, and generates the first error correction code. Store in the
An error correction apparatus characterized by the above. The controller determines a second error correction capability;
The encoding unit reads a predetermined number of the input data or the first error correction code from each of at least two areas of the area of the memory, and reads the input data or the first error read out. 2. The error correction apparatus according to claim 1, wherein a second error correction code is generated for the correction code in accordance with the second error correction capability, and the second error correction code is stored in the memory. The encoding unit reads data other than the second error correction code and the second error correction code from the memory, and a storage address of the second error correction code stored in the memory; 2. The error correction apparatus according to claim 1, wherein storage addresses of data other than the second error correction code are exchanged and stored in the memory. The error correction unit reads the page data stored in the memory, performs the first error correction process using the first error correction code, and an error as a result of the first error correction process 2. The error correction apparatus according to claim 1, wherein if there exists and correction is possible, the error of the page data stored in the memory is updated to a correct value. The error correction unit reads the page data stored in the memory, performs the second error correction process using the second error correction code, and an error as a result of the second error correction process is 4. The error correction apparatus according to claim 1, wherein the error correction apparatus updates the error of the page data stored in the memory to a correct value if it exists and can be corrected. Returning the storage address of the second error correction code and the storage address of data other than the second error correction code to the storage address before the exchange before performing the second error correction processing. The error correction apparatus according to claim 5, wherein The data input / output unit reads the page data after the first error correction process or the second error correction process stored in the memory, and the first error correction code and the second error The error correction apparatus according to claim 1, wherein the page data excluding the correction code is output to the external device in a predetermined order. The recording medium is a holographic memory;
The error correction apparatus according to claim 1. Input data from an external device is encoded and recorded on a recording medium via a recording / reproducing device, or data recorded on the recording medium is reproduced via a recording / reproducing device and output by error correction processing. In an error correction method for generating data and outputting it to the external device,
Storing the input data or the output data or page data to be recorded / reproduced on the recording medium in a memory;
A data input / output step for inputting / outputting the input data and the output data between the external device and the memory;
An encoding step for generating a first error correction code for the input data stored in the memory;
An error correction step of reading the input data and the first error correction code from the page data reproduced from the recording medium and stored in the memory, and performing a first error correction process;
The data input / output step, the encoding step, and a control step for controlling the error correction step,
The control step associates a data storage area of the memory with the page data, generates a memory map divided into at least two areas, and determines a first error correction capability for each of the divided areas And
The data input / output step stores the input data input from the external device in a location defined by the memory map in the memory;
The encoding step reads a predetermined number of the input data from one of the divided areas of the memory, generates the first error correction code according to the first error correction capability, and Store in the
An error correction method characterized by the above. Said control step determines a second error correction capability;
The encoding step reads a predetermined number of the input data or the first error correction code from each of at least two or more of the areas of the memory, and reads the read input data or the first error. 10. The error correction method according to claim 9, wherein a second error correction code is generated according to the second error correction capability for the correction code, and the second error correction code is stored in the memory. The encoding step reads the second error correction code and data other than the second error correction code from the memory, and the storage address of the second error correction code stored in the memory; The error correction method according to claim 9, wherein storage addresses of data other than the second error correction code are exchanged and stored in the memory. The error correction step reads the page data stored in the memory, performs the first error correction process using the first error correction code, and an error as a result of the first error correction process 10. The error correction method according to claim 9, wherein if there exists and correction is possible, the error of the page data stored in the memory is updated to a correct value. The error correction step reads the page data stored in the memory, performs the second error correction process using the second error correction code, and an error as a result of the second error correction process 12. The error correction method according to claim 9 or 11, wherein, if it exists and can be corrected, the error of the page data stored in the memory is updated to a correct value. Returning the storage address of the second error correction code and the storage address of data other than the second error correction code to the storage address before the exchange before performing the second error correction processing. The error correction method according to claim 13. The data input / output step reads the page data after the first error correction process or the second error correction process stored in the memory, and the first error correction code and the second error The error correction method according to claim 9, wherein the page data excluding the correction code is output to the external device in a predetermined order. The recording medium is a holographic memory;
The error correction method according to claim 9. A recording medium on which data is recorded by interference fringes;
Recording to record data by irradiating the recording medium with light to form the interference fringes and reproducing data recorded on the recording medium from information on the interference fringes obtained by irradiating the recording medium with light A playback unit;
Receives input data to be recorded on the recording medium from an external device, performs error correction coding on the input data, and outputs page data corresponding to the interference fringes to the recording / reproducing unit, and the recording / reproducing unit performs the recording medium An error correction unit that performs error correction of the page data read out from and outputs as output data to the external device,
The error correction unit is
A memory for storing the input data or the output data or page data to be recorded and reproduced on the recording medium;
A data input / output unit for inputting / outputting the input data and the output data between the external device and the memory;
An encoding unit for generating a first error correction code for the input data stored in the memory;
An error correction unit that reads the input data and the first error correction code from the page data reproduced from the recording medium and stored in the memory, and performs the first error correction process to generate the output data;
A controller that controls the data input / output unit, the encoding unit, and the error correction unit;
The control unit associates a data storage area of the memory with the page data, generates a memory map divided into at least two areas, and determines a first error correction capability for each of the divided areas And
The data input / output unit stores the input data input from the external device in a location defined by the memory map in the memory,
The encoding unit reads a predetermined number of the input data from one of the divided areas of the memory, generates the first error correction code according to the first error correction capability, and generates the first error correction code. Store in the
A digital data recording / reproducing apparatus. The recording medium is a holographic memory;
18. A digital data recording / reproducing apparatus according to claim 17, wherein:

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