JP2006254157A - Variable gain amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable gain amplifier capable of obtaining a fixed gain characteristic even for a large signal input. <P>SOLUTION: In the variable gain amplifier which has a transistor M1 whose gate is an input terminal Vi+ and whose source is grounded and a transistor M3 whose gate and drain are connected and which operates an output load of the transistor M1, and changes gain by controlling drain currents I<SB>i</SB>and I<SB>j</SB>of the transistor M1 and the transistor M3, an impedance element, for example, a resistive element RL1 is connected to the transistor M3 in parallel. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a variable gain amplifier suitable for use in a semiconductor integrated circuit or a high frequency integrated circuit. More specifically, the present invention relates to a variable gain amplifier that uses a MOS transistor suitable for high integration and does not cause gain distortion even for a large input signal while linearly changing a decibel display gain with respect to a gain control signal. .

  In recent years, development of system-on-chip LSIs has been promoted for downsizing and cost reduction of wireless terminals such as mobile phones and portable information terminals. One method for realizing both the miniaturization and cost reduction of wireless terminals is to configure the wireless analog circuit with a monolithic IC. In this case, in consideration of miniaturization and cost reduction, it is generally preferable to use a CMOS transistor more suitable for high integration rather than a bipolar transistor as an element constituting the IC.

  One of functional circuits used in a wireless analog circuit of a wireless terminal is a variable gain amplifier. The variable gain amplifier mainly adjusts the signal level so that the input level of the AD converter becomes constant at the final stage of the analog circuit in the receiver. In addition, it is desirable from the viewpoint of ease of control and the like that it is possible to perform so-called linear-in-dB gain control in which the decibel display gain changes linearly with respect to the gain control signal.

  However, although it is easy to realize an exponential amplifier having a linear-in-dB characteristic with a bipolar, it is necessary to devise in order to realize it with a CMOS. For example, a technique for realizing linear-in-dB characteristics using the square law of a MOS transistor is known.

FIG. 4 shows a configuration of a general variable gain amplifier using a differential circuit in which a MOS diode structure transistor for output load is connected to a MOS transistor capable of controlling current. The differential pair transistor M1 includes transistors M1 and M2 constituting a differential pair, transistors M3 and M4 constituting a MOS diode structure, current supply transistors M5 and M6, and two variable current sources 11 and 12. , M2 are provided with input terminals Vi + and Vi-, respectively, and drain terminals are provided with output terminals Vo- and Vo +, respectively. The differential pair transistors M1 and M2 and the transistors M3 and M4 are source-coupled, and the drain terminals of the transistors M3 and M4 are connected to the drain terminals of the differential pair transistors M1 and M2, respectively. The first variable current source 11 is connected to the source terminals of the differential pair transistors M1 and M2 connected as described above, and the second terminals are connected to the source terminals of the transistors M3 and M4 connected in the same manner. The variable current source 12 is connected. Transistors M5 and M6 are connected between the power supply terminal Vdd and the drain terminals of the differential pair transistors M1 and M2. The transistors M5 and M6 have gate terminals connected to each other and a terminal to which an appropriate voltage Vb is applied, and ideally have an infinite impedance. The output impedance of the circuit at this time is determined by the impedances of the transistors M3 and M4.
PC. Huang, LY. Chiou, CK. Wang, “A 3.3-V Wideband Exponential Control Variable-Gain-Amplifier”, IEEE International Symposium on Circuits and Systems 1, 1998, p285-288

  By the way, in the amplifier having the conventional structure described above, when the input signal is increased, the gate-source voltage Vgs becomes smaller than the threshold voltage Vth in a part of the period of the input signal of the transistors M3 and M4. <Vth, and there is a place where it is turned off. For this reason, the output impedance of the circuit is remarkably increased, and significant gain distortion occurs as shown in FIG. This tends to occur when the vicinity of the maximum gain is set within the variable range. For this reason, a variable gain amplifier that can obtain a constant gain characteristic even when a large signal is input is desired.

  The present invention has been made in view of such a situation, and an object of the present invention is to provide a variable gain amplifier capable of obtaining a constant gain characteristic even for a large signal input.

  A variable gain amplifier according to the present invention includes a first source-grounded transistor having a gate as an input terminal, and a second transistor having a gate and a drain connected and operating as an output load of the first transistor. In the variable gain amplifier that changes the gain by controlling the drain currents of the first transistor and the second transistor, an impedance element is connected in parallel to the second transistor.

  Here, the impedance element means an element that generates an impedance with respect to a DC voltage, and can be constituted by, for example, a resistance element or a capacitance element.

  According to the variable gain amplifier of the present invention, since the impedance element such as the resistance element or the capacitance element is connected in parallel with the second transistor serving as the output load, the second transistor has the period of the input signal. Even if it is turned off in a certain part, the output impedance does not exceed a certain value. As a result, a large gain distortion does not occur in the output characteristics, and a stable gain can be obtained even for a large input signal.

Next, the variable gain amplifier of the present invention will be described with reference to the drawings. A variable gain amplifier according to the present invention includes a source-grounded transistor M1 (corresponding to a first transistor) having a gate as an input terminal Vi +, a gate and a drain, as shown in FIG. And a transistor M3 (corresponding to a second transistor) operating as an output load of the transistor M1, and controlling the drain currents I _i and I _j of the transistor M1 and the transistor M3 to change the gain In the variable gain amplifier, an impedance element, for example, a resistance element RL1 is connected in parallel with the transistor M3. That is, the present invention is characterized in that a transistor M3 capable of current control is connected to a transistor M1 capable of current control, and an impedance element is connected in parallel with the transistor M3.

  The example shown in FIG. 1 shows an example of a differential amplifier similar to the circuit shown in FIG. 4, and the first transistor is composed of a differential pair of transistors M1 and M2, and has a gate and a drain. The second transistor connected to is composed of transistors M3 and M4. Input terminals Vi + and Vi- are provided at the gate terminals of the transistors M1 and M2 constituting the differential pair, output terminals Vo- and Vo + are provided at the drain terminals, respectively, and the transistor M5 is provided between the power terminals Vdd and Vdd. , M6 are connected. The sources of the transistors M1 and M2 are combined and connected to the ground GND via the first variable current source 11, so that the drain currents of the transistors M1 and M2 can be controlled. The transistors M5 and M6 have gate terminals connected to each other and a terminal to which an appropriate voltage Vb is applied, and ideally have an infinite impedance.

  Transistors M3 and M4, which are the second transistors, are connected to the drains of the transistors M1 and M2, respectively, with the gate and drain connected to form a MOS diode structure. The sources of the transistors M3 and M4 are combined and connected to the ground GND via the second variable current source 12, so that the currents of the transistors M3 and M4 can be controlled. In the present invention, impedance elements are connected in parallel with the transistors M3 and M4, and in the example shown in FIG. 1, resistance elements RL1 and RL2 are connected.

  When the impedances of the transistors M5 and M6 are ideally infinite, the output impedance of this circuit is determined by the transistors M3 and M4 and the resistance elements RL1 and RL2, and the first and second variable current sources. By controlling the currents 11 and 12, the gain can be changed.

  That is, at this time, the gain gain is expressed by the following equation (1).

Here, gm _{input The} is a transconductance of the transistors M1, M2 of the differential pair, gm _load is the transconductance of the transistors M3, M4, μCox the value depending on the process, W / L is the gate length and gate width Is the ratio. I _i is a current flowing through the first variable current source 11, I _j is a current flowing through the second variable current source 12, and I _i + I _j = 2I _bias = constant. I _bias is a DC bias current. At this time,
I _i = I _bias + I _control
I _j = I _bias −I _control
The gain is controlled by changing the control current I _control . Further, when x = I _control / I _bias is established, Equation (1) becomes Equation (2) below, and an exponential amplifier having a linear-in-dB characteristic can be realized.

Here, K is Equation (3).

  FIG. 3 shows the variable gain range when K = 1. With respect to the ideal characteristics, a linear gain change of −7 dB (minimum gain; Min Gain) to +7 dB (maximum gain; Max Gain) is obtained at the time of ± 1 dB error, and the variable range x is − 0.2 ≦ x ≦ 0.6.

  In this circuit, since the resistance elements RL1 and RL2 are constant RL1 = RL2 = constant, even if the transistors M3 and M4 are turned off in a part of the cycle of the input signal when a large signal is inputted, The impedance does not exceed a certain value. Therefore, in the circuit shown in FIG. 1, as shown in FIG. 2 in which the output characteristics of the gain with respect to the input, even when the input is increased, there is almost no gain fluctuation, and the gain distortion is greatly improved.

  As described above, according to the present invention, in a variable gain amplifier, even when a large signal is input, a significant increase in output impedance of a transistor having a MOS diode structure serving as an output load can be prevented. Therefore, an amplifier having a stable gain without distortion can be obtained, and high performance can be achieved while reducing the size and cost of a wireless terminal such as a mobile phone or a portable information terminal.

  In the above example, the resistance element is used as the impedance element. However, even if the impedance of the second transistor becomes infinite by the input signal, it may be any element that operates as an impedance of a certain value. An element or the like can also be used. In this case, a capacitor (capacitance element) may be connected instead of the above-described resistance elements RL1 and RL2. In the above example, the differential amplifier is an example. However, the present invention is applied to a variable gain amplifier in which a transistor having a MOS diode structure capable of current control is connected to the first transistor capable of current control. For example, the present invention can also be applied to an amplifier having a single-end structure or a structure in which the second transistor is connected in series with the first transistor.

It is a circuit diagram which shows the structure of one Embodiment of the variable gain amplifier by this invention. FIG. 2 is a diagram showing input / output characteristics when the gain is set to a maximum gain in the variable gain amplifier shown in FIG. 1. It is a figure which shows the gain variable range of the gain variable amplifier shown by FIG. It is a circuit diagram which shows an example of the conventional variable gain amplifier. It is a figure which shows the input / output characteristic when it sets to the maximum gain with the conventional gain variable amplifier.

Explanation of symbols

11 First variable current source 12 Second variable current source

Claims (3)

  A source-grounded first transistor having a gate as an input terminal; and a second transistor connected to the gate and drain and operating as an output load of the first transistor. 2. A variable gain amplifier, wherein an impedance element is connected in parallel to the second transistor, wherein the gain is changed by controlling a drain current of the second transistor.   2. The variable gain amplifier according to claim 1, wherein the impedance element is a resistance element.   2. The variable gain amplifier according to claim 1, wherein the impedance element is formed of a capacitive element.

Images