JP2001144552A - Burst mode optical reception system and method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a burst mode optical reception system that has reduced waveform distortion and enhances reception capability with respect to an extinction ratio. SOLUTION: The burst mode optical reception system that receives a burst mode optical signal and converts it into an electric signal, is provided with an amplifier 3 that has a feedback variable resistor 101, receives a current signal resulting from photoelectric conversion by a light receiving element and amplifies linearly the current signal, with a nonlinear element 102 that allows the amplifier to act nonlinear amplification and with a feedback resistor control section 14 that allows the amplifier to act nonlinear amplification, monitors input signal strength on the basis of a level of an output signal of the amplifier and controls the feedback variable resistor corresponding to the monitored input signal strength to allow the amplifier to act linear amplification.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a burst mode optical receiving system. In particular, the present invention relates to a burst mode optical receiving system and method capable of expanding an input dynamic range by changing a gain according to an input signal strength and capable of coping with a signal having a low extinction ratio.

[0002]

2. Description of the Related Art In recent years, PON (Passive Opt) has been developed.
A method referred to as an "ical Network" system has been devised. In this PON system, one optical fiber laid from the station side is branched to a plurality of subscribers by a coupler to reduce the cost to implement an optical subscriber transmission system. Realize point connection.

Further, in this PON system, a signal from a subscriber to a station is transmitted by a TDMA (Time Division).
n Multiple Access). For this reason, the station-side receiver must receive a burst mode optical signal in which the signal strength changes suddenly for each subscriber. That is, it must be able to receive a wide range of signal strengths from weak signals to large signals.

Meanwhile, a transimpedance type preamplifier circuit disclosed in Japanese Patent Application Laid-Open No. 9-8563 is provided at an input stage of a general optical receiver of a station side receiver. FIG. 9 is a diagram showing a transimpedance type preamplifier circuit of a burst mode optical receiving system as a premise of the present invention. Note that the same components are denoted by the same reference numerals and numbers throughout the drawings and will be described.

As shown in FIG. 1, an amplifier 3 is provided between an input terminal 2 and an output terminal 15 in a transimpedance type preamplifier circuit of a burst mode optical receiving system. The light receiving element 1 is connected to the input terminal 2, and the light receiving element 1 converts an optical signal into a current signal by optical-electrical conversion.

[0006] The transimpedance type preamplifier circuit converts a current signal of the light receiving element 1 into a voltage signal and amplifies it. A high-gain feedback resistor 4 is connected in parallel with the amplifier 3,
The high-gain feedback resistor 4 is used to amplify a weak signal with a high gain.

Further, a large input protection diode 47 is connected to the amplifier 3 in parallel.
Reference numeral 7 is used to prevent the circuit from saturating beyond the output dynamic range of the preamplifier when the signal is large. The light-current converted signal by the light receiving element 1 is converted into a voltage signal by the high-gain feedback resistor 4 of the preamplifier and amplified.

FIG. 10 is a diagram showing operation waveforms of the preamplifier of FIG. As shown in the figure, when the input signal is small, the signal is linearly amplified by the high transimpedance gain by the high-gain feedback resistor 4, and the minimum light receiving sensitivity is increased. When the input signal is large, the large input protection diode 47 conducts to clamp the output voltage, thereby preventing saturation of the preamplifier and increasing the maximum light receiving level.

[0009]

However, in the above transimpedance preamplifier, when the input is large, the non-linear logarithmic amplifier characteristic is obtained by the large input protection diode 47, so that the waveform distortion becomes large and the signal duty (DUTY) ratio is reduced. There is a problem of deterioration.

FIG. 11 shows that a DC (direct current) is applied to an optical signal at the time of a large input.
It is a figure showing an example with a bias light. As shown in the figure, when there is a DC (direct current component) bias light in the optical signal at the time of large input, that is, when a signal having a bad extinction ratio is received,
The “0” level of the signal decreases, and the effective signal amplitude decreases. As the extinction ratio worsens, the “0” level approaches the “1” level, and finally the signal disappears.

As described above, the conventional large input protection circuit has a problem that the waveform distortion is large and the receiving ability with respect to the extinction ratio is low. Therefore, in view of the above problems, the present invention can expand the input dynamic range by changing the gain according to the input signal strength, and can cope with a signal having a poor extinction ratio within the dynamic range. An object of the present invention is to provide a burst mode optical receiving system and method having a transimpedance type preamplifier circuit.

[0012]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a burst mode optical receiving system for receiving a burst mode optical signal and converting the signal into an electric signal. An amplifier for inputting and linearly amplifying a current signal converted from light to electricity, a non-linear element for causing the amplifier to perform non-linear amplification, and a level of an output signal of the amplifier for causing the amplifier to perform non-linear amplification And a feedback resistance control unit that controls the feedback variable resistor according to the monitored input signal strength to cause the amplifier to perform linear amplification. A mode optical receiving system is provided. By this means, the input dynamic range can be expanded by changing the gain according to the input signal strength, and a transimpedance type that can cope with a signal with a poor extinction ratio by linearly amplifying within the dynamic range A preamplifier circuit can be formed.

Preferably, the feedback resistance control unit operates linearly in a small signal level range by increasing the feedback variable resistance when monitoring the input signal strength based on the level of the output signal of the amplifier, In the range exceeding the small signal level, nonlinear amplification is performed by the nonlinear element to compress the dynamic range of the signal. By this means, when monitoring the input signal strength based on the level of the output signal of the amplifier, it is possible to simultaneously perform linear amplification of the signal of the small signal level.

Preferably, the feedback resistance control section monitors an input signal strength based on a level of the output signal based on a level of a leading bit “1” of the output signal. By this means, in the period of the first bit "1" of the signal, the amplifier operates in the non-linear amplification operation mode, detects the input signal strength, selects an appropriate feedback resistance value, switches the transimpedance gain of the preamplifier circuit, and Thus, a high-speed response to the reception of a burst signal whose signal strength changes suddenly becomes possible.

Preferably, the feedback resistance control section disconnects a nonlinear element from the amplifier in accordance with an input signal strength based on a level of an output signal of the amplifier based on a DC transfer characteristic of the amplifier. The size is determined to ensure a linear amplification operation. By this means, switching from the non-linear amplification operation mode to the linear amplification operation mode becomes easy.

[0016] Preferably, the feedback resistance control unit, based on a DC transfer characteristic of the amplifier, corresponds to an input signal strength based on a level of an output signal of the amplifier while a nonlinear element is connected in parallel to the amplifier. The magnitude of the feedback variable resistor is determined to ensure a linear amplification operation. By this means, there is no need to disconnect the nonlinear element during the switching time from the nonlinear amplification operation mode to the linear amplification operation mode.

Preferably, the feedback variable resistor includes a high-gain feedback resistor of the amplifier, a medium-gain feedback resistor connectable to the amplifier, and a low-gain feedback resistor connectable to the amplifier. The feedback resistance control unit identifies low, medium, and large signal levels by the first bit “1” of the output signal of the amplifier, outputs a rising signal at the time of identification, and outputs a falling signal by the next bit “0”. Two comparators for outputting, a first two D-flip-flops each holding a rising signal of the comparator, a second two D-flip-flops each holding a falling signal of the comparator, 2 D-flip-flops, and at least one falling edge of the comparator forms a gain switching timing. The medium-gain feedback resistor and the low-gain feedback resistor are connected to an OR circuit that disconnects the non-linear element from the amplifier and the first D-flip-flop, respectively, at the gain switching timing of the OR circuit. And three third D-flip-flops that hold the output of the first D-flip-flop so as to be connected.

By this means, high-, medium-, and low-gain linear amplification can be performed according to the input signal strength based on the small, medium, and large levels of the output signal of the amplifier. Preferably, the feedback variable resistor is a high-gain feedback resistor included in the amplifier, a plurality of gain feedback resistors connectable to the amplifier, and the feedback resistance control unit includes a first bit “ A plurality of signal levels from small to large are identified by "1", a rising signal is output at the time of identification, and a plurality of comparators that output a falling signal by the next bit "0", and hold the rising signal of the comparator, respectively. A first plurality of D-flip-flops; a second plurality of D-flip-flops each holding a falling signal of the comparator;
And an OR circuit for forming a gain switching timing at the falling edge of at least one of the comparators and disconnecting the non-linear element from the amplifier, and a D-flip-flop connected to the first D-flip-flop, respectively. And a third plurality of D-flip-flops that hold the output of the first D-flip-flop so that the plurality of gain feedback resistors are connected to the amplifier at a gain switching timing of the OR circuit. Become.

By employing this means, the dynamic range of the output signal is further compressed by employing a multi-stage configuration, and the required dynamic range of the circuit blocks of the next and subsequent stages can be reduced. For this reason, the circuit design of the subsequent stages can be facilitated. With this circuit configuration, even if the number of stages of gain switching is increased, the time required for switching can be switched by only the first bit, as in the case of three stages.

Preferably, the non-linear element is an element utilizing a square characteristic of a MOS transistor, and more preferably, a bias voltage is applied to a gate of the MOS transistor to form a square characteristic. By this means, it becomes possible to monitor the output signal of the amplifier in the non-linear amplification operation mode.

Preferably, the non-linear element is an element utilizing the logarithmic characteristic of a bipolar transistor, and more preferably, the non-linear element is an element utilizing non-linearity of a diode. By this means, the MOS transistor is an example of the non-linear element, and is not limited to this, and the application range of the non-linear element is widened.

Further, according to the present invention, in a burst mode optical receiving method for receiving a burst mode optical signal and converting the signal into an electric signal, an optical signal is received by a light receiving element via a feedback variable resistor.
A step of inputting the converted electric signal and amplifying it linearly, a step of performing non-linear amplification, and monitoring the input signal strength based on the level of the output signal which is non-linearly amplified, and monitoring the monitored input signal strength Controlling the magnitude of the feedback variable resistor to perform linear amplification in accordance with the method (1).

By this means, the input dynamic range can be expanded by varying the gain according to the input signal strength, and the signal can be reduced to a signal having a poor extinction ratio by linearly amplifying the dynamic range within the dynamic range, similarly to the above-mentioned invention. It is possible to form a transimpedance type preamplifier circuit that can cope with the above.

[0024]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of a burst mode optical receiving system according to the present invention.

As shown in this figure, in the trans-impedance type preamplifier circuit of the burst mode optical receiving system, the variable gain resistor 101 in the linear operation mode is connected in parallel to the high gain feedback resistor 4 as compared with FIG. A non-linear element 102 in the non-linear operation mode is provided in place of the large input protection diode 47, and the feedback resistance selection circuit 14 is further provided.

The feedback resistor selection circuit 14 controls the operation of the variable gain resistor 101 in the linear operation mode and the operation of the nonlinear element 102 in the non-linear operation mode. With the transimpedance preamplifier circuit of the present invention, a wide input dynamic range is realized by switching a feedback resistor according to an input signal strength and varying a gain in order to cope with a burst signal.

Further, by performing linear amplification within the input dynamic range, a preamplifier circuit which can cope with an input signal having a small waveform distortion and a low extinction ratio is realized. The gain variable resistor 101 in the linear operation mode includes a feedback resistor selection switch 7 and a medium gain feedback resistor 5 connected in series, and a feedback resistor selection switch 8 and a low gain feedback resistor 6 connected in series. , Switch 7 and feedback resistor 5 for medium gain, and switch 8 and feedback resistor 6 for low gain are connected in parallel to feedback resistor 4 for high gain.

The variable gain resistor 10 in the linear operation mode
1 makes the transimpedance gain of the preamplifier circuit variable. Further, the nonlinear element 102 in the nonlinear operation mode is provided with a switch 10 and a nonlinear element 9 connected in series, and the nonlinear element selection switch 10 and the nonlinear element 9 are connected in parallel to the high-gain feedback resistor 4.

In the non-linear operation mode, the non-linear element 102 non-linearly amplifies the signal, thereby enabling the compression of the signal dynamic range. The feedback resistor selection circuit 14 includes the amplifier 3
, And monitor this output, and
Opening and closing of the switches 7, 8, and 10 are controlled via the switches 2 and 13, respectively.

The feedback resistor selection circuit 14 makes it possible to select an appropriate feedback resistor according to the input signal strength.
The operation of the preamplifier circuit includes two operation states: a non-linear amplification operation mode for detecting input signal strength, and a linear amplification operation mode for normal signal amplification.

In the period of the first bit "1" of the signal, the circuit operates in the non-linear amplification operation mode, detects an input signal strength, selects an appropriate feedback resistance value, and switches the transimpedance gain of the preamplifier circuit. It is possible to cope with the reception of a burst signal in which the signal strength changes suddenly for each subscriber.
When the gain switching is completed, the mode is switched from the non-linear amplification operation mode to the linear amplification operation mode, and normal signal amplification is performed.

The input signal strength is detected by performing nonlinear amplification using the square characteristic or logarithmic characteristic of the nonlinear element 9, thereby compressing the dynamic range of the signal and expanding the detectable range. By performing non-linear amplification in this way, it is possible to detect the input signal strength from a small signal to a large signal using only the first bit, so that high-speed gain switching is possible.

In FIG. 1, when the feedback resistance selection switch 7, the feedback resistance selection switch 8, and the nonlinear element selection switch 10 are open, the transimpedance gain of the preamplifier circuit is defined by -A.R4 / A + 1. . Here, -A is the amplification degree of the amplifier 3, and R4 is the resistance value of the high-gain feedback resistor 4. Also,
Under the condition of A >> 1, the above transimpedance gain can be approximated by -R4.

FIG. 2 is a diagram for explaining a detailed example of the configuration of FIG. As shown in FIG.
01, the feedback resistance selection switch 7 and the feedback resistance selection switch 8 are MOS (Metal Oxide Semi)
and switches 16 and 17. In the non-linear operation mode, the non-linear element 9 of the non-linear element 102 and the non-linear element selection switch 10 are constituted by MOS transistors 18.

Further, in the nonlinear operation mode, the nonlinear element 1
02 has a drain connected to the gate terminal 39 of the MOS transistor 18 and a source M connected to the ground (GND).
An OS switch 36 and a MOS switch 37 whose source is connected to the gate terminal 39 of the MOS transistor 18 and whose drain is connected to the bias voltage 38 are provided.
The gate of the OS switch 36 is connected to the line 13, and the gate of the MOS switch 37 is connected to the line 13 via the inverter 60.

The MOS switch 37 applies an appropriate bias voltage 18 to the gate 39 of the MOS transistor 18,
The preamplifier circuit is provided with a non-linear DC (direct current) transfer characteristic described later by utilizing the square characteristic of the OS transistor 18. MOS switch 36 sets MOS transistor 18 to O
The gate terminal 39 is dropped to the GND level to perform FF.

The feedback resistor selection circuit 14 is provided with comparators 19 and 20, which compare the output of the amplifier 3 with the medium output detection reference voltage 21 and the large signal detection reference voltage 22, respectively. D (delay) -flip-flops (FF) 25 and 26 are connected to the outputs of the comparators 19 and 20, respectively, and the D-flip-flops 25 and 26 hold the rising edges of the outputs of the comparators 19 and 20, respectively.

Further, the comparators 19 and 20 have D-
The flip-flops 29 and 30 are respectively connected, and D-
The flip-flops 29 and 30 are comparators 19 and 20
Hold the falling edge of the output. An OR circuit 33 is connected to the outputs of the D-flip-flops 29 and 30,
The OR circuit 33 generates a gain switching timing, and
3, the gate of the MOS switch 36 and the inverter 6
0 to the gate of the MOS switch 37.

The outputs of the D-flip-flops 25 and 26 are connected to D-flip-flops 34 and 35, respectively, and the outputs of the D-flip-flops 34 and 35 are connected to the MOS of the variable gain resistor 101 in the linear operation mode. The gates of the switches 16 and 17 are connected respectively. The D-flip-flops 34 and 35 generate feedback resistance control signals at the timing of gain switching of the OR circuit 33, and
Respectively.

With such a configuration, the preamplifier circuit of the present invention has two modes: a non-linear amplification operation mode for detecting input / output intensity, and a linear amplification operation mode for performing normal signal amplification after gain switching is completed. It is formed. FIG. 3 is a diagram showing DC transfer characteristics of the preamplifier circuit of FIG. The DC-DC transfer characteristics between the input and output of the preamplifier circuit are represented by characteristic curves 40, 41, 4 as shown in FIG.
The characteristics are as shown in FIGS.

The input signal is non-linearly amplified by the characteristic curve 40 to realize an input dynamic range. Characteristic curve 4
Signals 1, 42, and 43 linearly amplify the signal with high, medium, and low gains according to the input signal strength. Next, the operation of the feedback resistor selection circuit 14 for obtaining the non-linear amplification operation mode will be described.

In the non-linear amplification operation mode, the preamplifier circuit performs linear amplification by the high-gain feedback resistor 4 for a small signal level so as to have a DC transfer characteristic as shown by a characteristic curve 40 in FIG. , The middle signal level and the large signal level, the square characteristic of the MOS transistor 18;
That is, nonlinear amplification using nonlinear characteristics is performed.
Here, the feedback resistance selection circuit 14 receives the output voltage of the amplifier 3 of the preamplifier circuit, detects the signal strength of the output of the amplifier 3 in three stages, generates a feedback resistance control signal, and
1 and 12 are output.

In order to detect the input / output intensity in three stages,
In the comparators 19 and 20, the output voltage of the amplifier 3 and
The medium output detection reference voltage 21 and the large signal detection reference voltage 22 are respectively compared to detect the signal strength. If the output voltage of the amplifier 3 does not reach the middle output detection reference voltage 21, the signal is determined to be a small signal level, and the comparators 19 and 20 output Low and Low signals to the lines 27 and 28, respectively.

A signal whose output voltage exceeds the medium output detection reference voltage 21 but does not exceed the large signal detection reference voltage 22 is determined to be a medium signal level, and the comparators 19 and 20 determine the line 27 level. H on 28
It outputs a high signal and a low signal, respectively. Further, a signal in which the output voltage of the amplifier 3 exceeds the large signal detection reference voltage 22 is determined to be a large signal level, and the comparators 19 and 20 connect the lines 27 and 28 to High and
output the respective high signals.

The rising signals of the comparators 19 and 20 are held by D flip-flops 25 and 26, respectively. At the same time, the falling edges of the comparators 19 and 20 are held by the D-flip-flops 29 and 30 using the inverted output terminals of the comparators 19 and 20.

These falling signals are subjected to OR logic processing by an OR circuit 33, and this processed signal is output to a line 13, and this processed signal is used to make use of the MOS switches 16, 1
7 to control the middle gain feedback resistor 5 and the low gain feedback resistor 6
Is switched, and the processing is performed so as to switch from the non-linear amplification operation mode to the linear amplification operation mode.

In the D flip-flops 34 and 35, O
Using the rise of the output signal from the R circuit 33 to the line 13, the signal from the Q terminal of the D-flip-flops 25 and 26 to the lines 27 and 28 is latched, and the feedback resistance control signal is output to the lines 11 and 12. You. The operation of the entire preamplifier circuit based on the operation of the feedback resistance selection circuit 14 will be described below with reference to a time chart.

However, each D-flip-flop 25, 2
An RST signal is applied to RST (reset) terminals of 6, 29, 30, 34, and 35, and initialization is performed so that the Q terminal is in a low state. At this time, the MOS switches 16 and 17 for switching the feedback resistance are turned off, and a proper bias voltage Vbias 38 is applied to the gate terminal 39 of the MOS transistor 18, so that the MOS transistor 18 operates as a non-linear element.

For this reason, the preamplifier circuit stands by in a non-linear amplification operation for detecting the input signal strength as an initial state. FIG. 4 is a time chart for explaining the operation of the preamplifier circuit when a small signal level signal is input. As shown in the figure, when a signal of a small signal level is input, the feedback resistance selection circuit 14 does not operate and performs signal amplification in the non-linear amplification operation mode.

In this case, since the level of the input signal is small, amplification is performed within the linear amplification range of the DC transfer characteristic shown by the characteristic curve 40 in FIG. FIG. 5 is a time chart for explaining the operation of the preamplifier circuit when a signal of the middle signal level is input. As shown in the figure, when a signal of the middle signal level is input, the output voltage of the amplifier 3 (preamplifier circuit) exceeds the middle output detection reference voltage 21 at the first bit "1" of the signal. The output of 19 becomes a High signal, and the output from the Q terminal of the D-flip-flop 25 to the line 27 becomes a High signal.

Further, since the output voltage of the amplifier 3 does not exceed the large signal detection reference voltage 22, the signals from the Q terminals of the D-flip-flops 26, 30, and 35 remain in the Low state. Becomes The D-flip-flops 25 and 26 indicating the detection result of the input signal strength keep their output states at High and Low states and the input output strength at the medium signal level.

Next, when the second bit “0” arrives, the output of the comparator 19 returns to the low state again, and the signal at the Q terminal of the D-flip-flop 29 is processed to rise. Output rises. At the timing of this signal, the D-flip-flops 34 and 35 latch the data signal output to the lines 27 and 28, and
Only the switch 16 is turned on.

Simultaneously, the potential of the gate terminal 39 of the MOS transistor 18 is lowered to the GND level by the output signal from the OR circuit 33 to the line 13, and the MOS transistor 18 is turned off to switch from the non-linear amplification operation mode to the linear amplification operation mode. As a result, the gain variable resistor 101 in the linear operation mode becomes a combined resistor of the high-gain feedback resistor 4 and the middle-gain feedback resistor 5, and the transimpedance gain is as follows: -AＡR4 ・ R5 / ( (R4 + R5)｝ / (A + 1) The input signal of the amplifier 3 is linearly amplified by one step.
Here, R5 is the resistance value of the feedback resistor 5 for medium gain. Further, under the condition of A >> 1, the above transimpedance gain can be approximated by-{R4 · R5 / (R4 + R5)}.

FIG. 6 is a time chart for explaining the operation of the preamplifier circuit when a large signal level signal is input. As shown in the figure, when a signal of a large signal level is input, the output voltage of the amplifier 3 (transimpedance preamplifier circuit) is changed to the medium output detection reference voltage 21 and the large signal at the leading bit “1” of the signal. Exceeds the detection reference voltage 22.

For this reason, the outputs of the comparators 19 and 20 become High signal and High signal, respectively, and the outputs from the Q terminals of the D-flip-flops 25 and 26 to the line 27 become High signal and High signal, respectively. Next, when the second bit “0” arrives, the output of the comparator 20 goes low again, and the Q terminal of the D-flip-flop 30 rises.

The D-flip-flops 25 and 26 latch the data signals output to the lines 27 and 28 at the timing when the OR logic processing of the rising signals of the D-flip-flops 29 and 30 is performed, and the MOS switches 16 and 17 Are turned on. At the same time, the potential of the gate terminal 39 of the MOS transistor 18 is dropped to the GND level by the output signal from the OR circuit 33 to the line 13, and the MOS transistor 18 is turned off to switch from the nonlinear amplification operation mode to the linear amplification operation mode.

Thus, in the linear operation mode, the variable gain resistor 101 includes the high-gain feedback resistor 4 and the medium-gain feedback resistor 5.
And a trans-impedance gain as a combined resistance of the three resistors of the low-gain feedback resistor 6 as follows: -A ｛ΔR4 ・ R5 ・ R6 / (R4 ・ R5 + R5 ・ R6
+ R6 · R4)｝ / (A + 1) The input signal of the amplifier 3 is linearly amplified by two steps.
Here, R6 is the resistance value of the low-gain feedback resistor 6. Further, under the condition of A >> 1, the above transimpedance gain becomes:-｛R4 · R5 · R6 / (R4 · R5 + R5 · R6 + R
6 · R4)｝. As described above, the present preamplifier circuit performs nonlinear amplification using the square characteristic of the MOS transistor when switching the gain, thereby using only the information of the first one bit to input signal strength from a small signal to a large signal. Can be searched, so that high-speed gain switching can be realized.

In the above description, the non-linear element 9 is
Although the S transistor 18 is used, it can be realized by using the logarithmic characteristic of a bipolar transistor. Also,
The non-linearity of the diode may be used. FIG. 7 is a diagram showing a modification of the DC transfer characteristic of FIG. As shown in this figure, as compared with FIG. 3, the output voltage of the preamplifier circuit corresponding to each input signal level falls within the range of linear amplification as shown by characteristic curves 44, 45 and 46, respectively. The voltage value of the medium output detection reference voltage 21, the voltage value of the large signal detection reference voltage 22, the resistance value of the feedback resistor 5 for medium gain, and the resistance value of the feedback resistor 6 for low gain are selected.

Therefore, the nonlinear element selection switch 10 of FIG. 1 is not required to switch between the nonlinear amplification operation mode and the linear amplification operation mode. Therefore, the MOS switches 36 and 37 in FIG. 2 become unnecessary. Therefore, only an appropriate bias voltage Vbias needs to be applied to the gate voltage of the MOS transistor 18.

FIG. 8 is a diagram showing a modification of FIG. As shown in the figure, as compared with FIG. 2, the switching element 102 for nonlinear operation and the feedback resistor selection circuit 14 have a configuration in which the gain is switched from three stages to N stages. Specifically, the resistors 50-1 to 50-5 are connected to the variable gain resistor 101 in the linear operation mode.
0-N, MOS switches 51-1 to 51-N are provided.
2-1 to 52-N, N-stage D-flip-flop 53-
1-53-N, 54-1 to 54-N, 55-1 to 55-
N is provided.

As described above, by adopting the N-stage configuration, the dynamic range of the output signal is further compressed, and the necessary dynamic range of the circuit blocks of the next and subsequent stages can be reduced. For this reason, the circuit design of the subsequent stages can be facilitated. With this circuit configuration, even if the number of stages of gain switching is increased, the time required for switching can be switched by only the first bit, as in the case of three stages.

[0062]

As described above, according to the present invention,
Since the transimpedance gain is switched in accordance with the input signal strength and linear amplification is performed for all input levels, an output having a good duty ratio without waveform distortion can be obtained. Since linear amplification is performed at all input levels, reception is possible even when a large signal and a signal having a poor extinction ratio are input.

By detecting the input signal strength by non-linear amplification, the input signal strength can be detected during the first one bit period, and a high-speed gain switching operation can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a burst mode optical receiving system according to the present invention.

FIG. 2 is a diagram illustrating a detailed example of the configuration of FIG. 1;

FIG. 3 is a diagram illustrating a DC transfer characteristic of the preamplifier circuit of FIG. 2;

FIG. 4 is a time chart for explaining an operation of a preamplifier circuit when a signal of a small signal level is input;

FIG. 5 is a time chart for explaining an operation of the preamplifier circuit when a signal of a medium signal level is input;

FIG. 6 is a time chart for explaining the operation of the preamplifier circuit when a large signal level signal is input;

FIG. 7 is a diagram illustrating a modification of the DC transfer characteristic of FIG. 3.

FIG. 8 is a diagram showing a modification of FIG. 2;

FIG. 9 is a diagram showing a transimpedance type preamplifier circuit of a burst mode optical receiving system which is a premise of the present invention.

FIG. 10 is a diagram showing operation waveforms of the preamplifier of FIG.

FIG. 11 is a diagram illustrating an example in which an optical signal has DC (direct current) bias light at the time of large input.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Light receiving element 2 ... Input terminal 3 ... Amplifier 4 ... High gain feedback resistor 5 ... Medium gain feedback resistor 6 ... Low gain feedback resistor 7 ... Feedback resistor selection switch 8 ... Feedback resistor selection switch 9 ... Nonlinear element 10 ... Non-linear element selection switches 11, 12, 13, 23, 24, 27, 28 ... Line 14 ... Feedback resistance selection circuit 15 ... Output terminals 16, 17, 36, 37, 51-1 to 51-N ... MOS
Switch 18 MOS transistor 19, 20, 52-1 to 52-N Comparator 21 Medium output detection reference voltage 22 Large signal detection reference voltage 25, 26, 29, 30, 34, 35, 53-1 to 53
-N, 54-1 to 54-N, 55-1 to 55-N ... D-
Flip-flops 50-1 to 50-N Resistor 33 OR circuit 38 Vbias 39 Gate terminal of MOS transistor 18 41, 42, 43, 45, 46, 47 Characteristic curve 60 Inverter 101 Linear operation mode Variable gain resistor 102: Non-linear element for non-linear dynamic mode operation

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (reference) H03G 5/16 H03G 5/16 D 5K002 H04B 10/00 H04B 9/00 B 10/28 Y 10/26 10/14 10 / 04 10/06 F-term (reference) 5J030 AC02 AC04 AC08 AC11 AC19 5J090 AA01 AA56 CA21 CA32 CA56 CA65 DN02 FA17 FA18 HA02 HA10 HA19 HA25 HA26 HA38 HA39 HA44 HN07 KA17 KA33 KA36 MA11 MN01 NN11 TA02 TA06 5J091CA56 FA17 FA18 HA02 HA10 HA19 HA25 HA26 HA38 HA39 HA44 KA17 KA33 KA36 MA11 TA02 TA06 5J092 AA01 AA56 CA21 CA32 CA56 CA65 FA17 FA18 HA02 HA10 HA19 HA25 HA26 HA38 HA39 HA44 KA17 KA33 KA36 MA11 TA02 TA06 UL01 5J100 LA01 5 CA01 DA05

Claims (12)

[Claims] 1. A burst mode optical receiving system for receiving a burst mode optical signal and converting the signal into an electric signal, comprising an amplifier having a feedback variable resistor and inputting and linearly amplifying a current signal optically / electrically converted by a light receiving element. And a non-linear element for causing the amplifier to perform non-linear amplification, and monitoring the level of the output signal of the amplifier by causing the amplifier to perform non-linear amplification, and corresponding to the level of the monitored output signal. A burst mode optical receiving system, comprising: a feedback resistance control unit that controls a feedback variable resistor to cause the amplifier to perform linear amplification. 2. The feedback resistance control section operates linearly in a small signal level range by increasing the feedback variable resistance when monitoring an input signal strength based on a level of an output signal of the amplifier, 2. The burst mode optical receiving system according to claim 1, wherein in a range exceeding a small signal level, nonlinear amplification is performed by the nonlinear element to compress a dynamic range of the signal. 3. The apparatus according to claim 1, wherein the feedback resistance controller monitors an input signal strength based on a level of the output signal based on a level of a first bit “1” of the output signal. 2. The burst mode optical receiving system according to 1. 4. The feedback resistance control section separates a non-linear element from the amplifier according to an input signal strength based on a level of an output signal of the amplifier according to a DC transfer characteristic of the amplifier. The burst mode optical receiving system according to claim 1, wherein the burst mode is determined to secure a linear amplification operation. 5. The feedback resistance control section according to an input signal strength based on a level of an output signal of the amplifier by a DC transfer characteristic of the amplifier while a nonlinear element is connected in parallel to the amplifier. 2. The method according to claim 1, wherein the magnitude of the feedback variable resistor is determined to secure a linear amplification operation.
2. The burst mode optical receiving system according to 1. 6. The feedback variable resistor comprises a high-gain feedback resistor of the amplifier, a medium-gain feedback resistor connectable to the amplifier, and a low-gain feedback resistor connectable to the amplifier. The feedback resistance control unit identifies low, medium, and large signal levels by the first bit “1” of the output signal of the amplifier, outputs a rising signal at the time of identification, and outputs a falling signal by the next bit “0”. Two D-flip-flops each holding a rising signal of the comparator, a second two D-flip-flops each holding a falling signal of the comparator, and the second D-flip-flops, respectively,
An OR circuit that forms a gain switching timing at at least one falling edge of the comparator and disconnects the non-linear element from the amplifier; and an OR circuit connected to the first D-flip-flop,
The third two D-type flip-flops holding the output of the first D-flip-flop so that the middle-gain feedback resistor and the low-gain feedback resistor are connected to the amplifier at the gain switching timing of the OR circuit. 2. The burst mode optical receiving system according to claim 1, comprising a flip-flop. 7. The feedback variable resistor, a high-gain feedback resistor included in the amplifier, a plurality of gain feedback resistors connectable to the amplifier, and the feedback-resistance control unit includes: a head of an output signal of the amplifier. A plurality of comparators each of which identifies a plurality of signal levels from small to large with bit “1”, outputs a rising signal at the time of identification, and outputs a falling signal with the next bit “0”; A first plurality of D-flip-flops for holding, a second plurality of D-flip-flops for respectively holding a falling signal of the comparator, and a plurality of D-flip-flops respectively connected to the second D-flip-flop;
An OR circuit that forms a gain switching timing at at least one falling edge of the comparator and disconnects the non-linear element from the amplifier; and an OR circuit connected to the first D-flip-flop,
A third plurality of Ds holding the output of the first D-flip-flop so that the plurality of gain feedback resistors are connected to the amplifier at the timing of gain switching of the OR circuit.
The burst mode optical receiving system according to claim 1, comprising a flip-flop. 8. The burst mode optical receiving system according to claim 1, wherein said nonlinear element is an element utilizing a square characteristic of a MOS transistor. 9. The burst mode optical receiving system according to claim 8, wherein a bias voltage is applied to a gate of said MOS transistor to form a square characteristic. 10. The burst mode optical receiving system according to claim 1, wherein said nonlinear element is an element utilizing a logarithmic characteristic of a bipolar transistor. 11. The burst mode optical receiving system according to claim 1, wherein the nonlinear element is an element that utilizes a nonlinearity of a diode. 12. A burst mode optical receiving method for receiving a burst mode optical signal and converting the signal into an electric signal, comprising the steps of: linearly amplifying a current signal optically / electrically converted by a light receiving element via a feedback variable resistor; Performing a non-linear amplification, monitoring the input signal strength based on the level of the output signal that is non-linearly amplified, and controlling the magnitude of the feedback variable resistor in accordance with the monitored input signal strength to perform linear amplification. And a step of amplifying the burst mode light.