JP2006253295A - Organic ferroelectric memory and its fabrication process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an organic ferroelectric memory in which facilitation of fabrication process and enhancement of the degree of freedom in design can be achieved, and to provide its fabrication process. <P>SOLUTION: The process for fabricating an organic ferroelectric memory comprises (a) a step for fabricating a thin film transistor 110 having a thin film semiconductor layer 114, a gate insulation layer 116 and a gate electrode 118, (b) a step for forming a first insulation layer 120 above the thin film transistor 110, (c) a step for forming a first contact layer 126 and a second contact layer 128 connecting the thin film semiconductor layer 114 electrically with the first insulation layer 120, (d) a step for forming a wiring layer 180 being connected electrically with the first contact layer 126, (e) a step for forming a ferroelectric capacitor 130 being connected electrically with the second contact layer 128 and having a lower electrode 132, an organic ferroelectric layer 134 and an upper electrode 136, and (f) a step for forming a second insulation layer 140 above the ferroelectric capacitor 130. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an organic ferroelectric memory and a method for manufacturing the same.

As a ferroelectric memory, a structure of a ferroelectric capacitor including an inorganic ferroelectric layer such as a PZT system or an SBT system is well known. The inorganic ferroelectric layer needs to be annealed at a high temperature of 600 ° C. or higher when it is formed. For this reason, the substrate for forming the ferroelectric capacitor is limited to one having heat resistance, and it is impossible to use a glass substrate or a flexible substrate as the substrate. Furthermore, since the inorganic ferroelectric layer contains heavy metals such as Pb and Bi, it is harmful to the environment and its handling is complicated.
Japanese Patent Application Laid-Open No. 5-89661

  One of the objects of the present invention is to provide an organic ferroelectric memory and a method of manufacturing the same that can facilitate the manufacturing process and improve design flexibility.

(1) A method for manufacturing an organic ferroelectric memory according to the present invention includes:
An organic ferroelectric memory manufacturing method comprising:
(A) forming a thin film transistor having a thin film semiconductor layer, a gate insulating layer, and a gate electrode;
(B) forming a first insulating layer above the thin film transistor;
(C) a first contact layer electrically connected to the thin film semiconductor layer to the first insulating layer, and a second contact layer electrically connected to the thin film semiconductor layer to the first insulating layer. Forming,
(D) forming a wiring layer electrically connected to the first contact layer;
(E) forming a ferroelectric capacitor electrically connected to the second contact layer and having a lower electrode, an organic ferroelectric layer and an upper electrode;
(F) forming a second insulating layer above the ferroelectric capacitor;
including. According to the present invention, since a ferroelectric capacitor including an organic ferroelectric layer is formed, a low temperature process of, for example, 150 ° C. or less is possible. Therefore, the restriction on the heat resistance of the substrate is relaxed, and the degree of freedom of selection of the substrate is improved. In addition, since the organic ferroelectric material can be processed at low energy by a liquid phase process, the manufacturing process can be facilitated. Furthermore, there is no problem of environmental load due to heavy metals, it can be easily disposed of and it is easy to handle.
(2) In this method of manufacturing an organic ferroelectric memory,
In the step (a), the thin film transistor may be formed by applying a liquid silicon material or by a droplet discharge method. According to this, by using a liquid silicon material, an expensive laser annealing process can be omitted. In addition, since the pattern can be directly formed by using the droplet discharge method, the manufacturing process can be facilitated.
(3) In this method of manufacturing an organic ferroelectric memory,
In the step (e), the organic ferroelectric layer may be formed in a predetermined pattern by a droplet discharge method. Thereby, since a pattern can be directly formed, the manufacturing process can be facilitated.
(4) In this method of manufacturing an organic ferroelectric memory,
In the step (e), the organic ferroelectric layer is formed by ashing the organic ferroelectric layer using the upper electrode having the predetermined pattern as a mask by forming the upper electrode to have a predetermined pattern. The layer may be patterned. According to this, by using the upper electrode as a mask, it is not necessary to form a mask for patterning the organic ferroelectric layer, and the manufacturing process can be facilitated.
(5) In this method of manufacturing an organic ferroelectric memory,
In the step (e), at least one of the lower electrode and the upper electrode may be formed of a conductive organic material. According to this, since the conductive organic material is more flexible than a normal metal, the hysteresis characteristics of the ferroelectric capacitor are improved.
(6) In this method of manufacturing an organic ferroelectric memory,
In the step (e), at least one of the lower electrode and the upper electrode may be formed in a predetermined pattern by a droplet discharge method. Thereby, since a pattern can be directly formed, the manufacturing process can be facilitated.
(7) In the method of manufacturing the organic ferroelectric memory,
In the step (e), at least one of the lower electrode and the upper electrode may be formed by vapor deposition or plating. According to this, it can be formed with relatively low power, and damage to the underlying layer can be reduced.
(8) In this method of manufacturing an organic ferroelectric memory,
The deposition temperature of the second insulating layer in the step (f) may be lower than the deposition temperature of the first insulating layer in the step (b). According to this, damage due to heat of the ferroelectric capacitor can be reduced.
(9) In this method of manufacturing an organic ferroelectric memory,
Performing at least the step (a) on the first substrate, forming a transfer layer including the thin film transistor above the first substrate,
The method may further include transferring the transferred layer to the second substrate by at least one transfer step. According to this, both the conditions required for the manufacturing process (process resistance and the like) and the conditions required for the finished product (flexibility and the like) can be satisfied, and the degree of freedom in selecting the substrate can be improved.
(10) In this method of manufacturing an organic ferroelectric memory,
The second substrate may be a flexible substrate.
(11) In this method of manufacturing an organic ferroelectric memory,
The organic ferroelectric layer is an organic material selected from a poly (vinylidene fluoride-trifluoroethylene) copolymer, polyvinylidene fluoride, (vinylidene fluoride / trifluoroethylene) co-oligomer, vinylidene fluoride oligomer, and odd-number nylon. It may be made of a ferroelectric material.
(12) In this method of manufacturing an organic ferroelectric memory,
After the step (d), further comprising forming an intermediate insulating layer above the wiring layer;
In the step (e), the ferroelectric capacitor may be formed above the intermediate insulating layer. According to this, the ferroelectric capacitor can be formed in a later process than the wiring layer. It is possible to minimize the damage that the ferroelectric layer receives from the wiring process, and it is not necessary to adopt a process that considers the ferroelectric layer, so that the most appropriate process can be used as the wiring. .
(13) An organic ferroelectric memory according to the present invention comprises:
A storage capacitor type organic ferroelectric memory,
A thin film transistor;
A first insulating layer formed above the thin film transistor;
A first contact layer penetrating the first insulating layer;
A second contact layer penetrating the first insulating layer;
A wiring layer electrically connected to the thin film transistor through the first contact layer;
A ferroelectric capacitor electrically connected to the thin film transistor through the second contact layer and having a lower electrode, an organic ferroelectric layer and an upper electrode;
A second insulating layer formed above the ferroelectric capacitor;
including. According to the present invention, since a ferroelectric capacitor including an organic ferroelectric layer is formed, a low temperature process of, for example, 150 ° C. or less is possible. Therefore, the restriction on the heat resistance of the substrate is relaxed, and the degree of freedom of selection of the substrate is improved. In addition, since the organic ferroelectric material can be processed with low energy, the manufacturing process can be facilitated. Furthermore, there is no problem of environmental load due to heavy metals, it can be easily disposed of and it is easy to handle.
(14) In this organic ferroelectric memory,
At least one of the lower electrode and the upper electrode may be made of a conductive organic material. According to this, since the conductive organic material is more flexible than a normal metal, the hysteresis characteristics of the ferroelectric capacitor are improved.
(15) In this organic ferroelectric memory,
It may be formed above the flexible substrate.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  1 to 15 are diagrams showing a method of manufacturing an organic ferroelectric memory according to the present embodiment. FIGS. 16 and 17 are diagrams showing an organic ferroelectric memory and a circuit thereof according to the present embodiment, respectively. It is.

(Manufacturing method of organic ferroelectric memory)
In the present embodiment, a storage capacitor type (for example, a so-called one-transistor one-capacitor type) organic ferroelectric memory is manufactured.

  (1) As shown in FIG. 1, a first substrate 100 is prepared. In the example shown in this embodiment mode, the first substrate 100 is a transfer substrate and is a substrate used only in a manufacturing process. A transferred layer 170 including at least the thin film transistor 110 is formed on the first substrate 100 by a process described later. The transferred layer 170 on the first substrate 100 is finally transferred to the second substrate 200 (see FIG. 14). By applying the transfer technique, it is possible to satisfy both conditions required for the manufacturing process (such as process resistance) and conditions required for the finished product (such as flexibility).

  The material of the first substrate 100 is not limited as long as it has resistance (heat resistance) to the manufacturing process of the organic ferroelectric memory. For example, the first substrate 100 may have a strain point equal to or higher than the maximum temperature of the manufacturing process (for example, about 400 ° C. to 600 ° C.). Further, the first substrate 100 may have light transmittance. The first substrate 100 is a glass substrate (for example, quartz glass, Corning 7059, Nippon Electric Glass OA-2), a semiconductor substrate (for example, a silicon substrate), a metal substrate, or a resin substrate if it has heat resistance. Also good.

  If necessary, the separation layer 102 is formed on the substrate 100. The separation layer 102 is for facilitating peeling of the first substrate 100 in a transfer process described later. The separation layer 102 may be one that loses the binding force due to light absorption, or may be one that loses the binding force due to other physical / chemical action. The separation layer 102 may be an adhesive layer that loses adhesive force by heat or light. Examples of the material of the separation layer 102 include semiconductors such as amorphous silicon, ferroelectrics, various oxide ceramics, organic materials, low melting point metals, and UV curable adhesive materials.

An insulating layer (for example, a SiO ₂ layer) 104 may be formed on the first substrate 100 (the separation layer 102 in FIG. 1). The insulating layer 104 can be formed by a plasma CVD method using, for example, TEOS (Tetra Ethyl Ortho Silicate (Si (OC ₂ H ₅ ) ₄ )), which is an organic silicon material, as a raw material. The insulating layer 104 has functions such as protection of the thin film transistor 110, light shielding, insulation, and migration prevention. Alternatively, the thin film transistor 110 may be formed directly over the first substrate 100 (or the separation layer 102) without forming the insulating layer 104.

  (2) As shown in FIGS. 2 to 6, the thin film transistor 110 is formed. The thin film transistor 110 can be formed by a low temperature poly-silicon (LTPS) process. For example, a glass substrate can be used as the first substrate 100 by setting the process temperature to about 600 ° C. or lower (for example, about 400 ° C. or lower). Further, the thin film transistor 110 may be formed by applying a liquid silicon material or by a liquid discharge method.

  First, as illustrated in FIG. 2, the thin film semiconductor layer 112 is formed over the insulating layer 104. For example, an amorphous silicon layer is formed by a CVD method, and after dehydrogenation annealing is performed as necessary, the amorphous silicon layer is polycrystallized by laser annealing with an excimer laser or the like. Thus, a polysilicon layer is formed as the thin film semiconductor layer 112. Thereafter, as shown in FIG. 3, patterning is performed by dry etching, for example, to form a thin film semiconductor layer (polysilicon layer) 114 having a predetermined pattern.

Next, as shown in FIG. 4, a gate insulating layer (eg, SiO ₂ layer) 116 is formed on at least the thin film semiconductor layer 114. The gate insulating layer 116 can be formed by, for example, a TEOS-CVD method. Thereafter, as shown in FIG. 5, a gate electrode 118 (for example, Al, MoW alloy, Cr electrode, etc.) is formed by patterning, and a predetermined impurity is doped into the thin film semiconductor layer 114 using the gate electrode 118 as a mask to activate the impurity. Annealing for. Thus, as shown in FIG. 6, impurity regions (source and drain regions) 114a and 114b are formed in the thin film semiconductor layer 114. Note that the gate insulating layer includes at least a portion overlapping with the gate electrode, for example, a portion overlapping with the gate electrode and a portion around the portion. The same applies to the following description.

  As shown in FIG. 6, the thin film transistor 110 includes a thin film semiconductor layer 114, a gate insulating layer 116, and a gate electrode 118. The structure of the thin film transistor 110 is not limited to the above-described top gate type (coplanar type), and may be, for example, a bottom gate type in which the gate electrode 118 is disposed on the first substrate 100 side. The thin film transistor 110 is not limited to the low-temperature polysilicon thin film transistor described above, and other forms may be applied.

  (3) As shown in FIG. 7, the first insulating layer 120 is formed on the thin film transistor 110.

  The first insulating layer 120 can be formed at about 300 ° C. by TEOS-CVD, for example. The first insulating layer 120 can be formed by a method usually used in a process for forming a low-temperature polysilicon thin film transistor. The first insulating layer 120 is formed so as to cover the thin film transistor 110. Thereafter, first and second contact holes 122 and 124 are formed in the first insulating layer 120. The first contact hole 122 is a through hole for connecting the thin film transistor 110 and a later-described wiring layer 180 (see FIG. 8) to each other. The second contact hole 124 is a through hole for connecting the thin film transistor 110 and a later-described ferroelectric capacitor 130 (see FIG. 10) to each other. One impurity region 114b of the thin film semiconductor layer 114 is exposed from the first contact hole 122, and the other impurity region 114a of the thin film semiconductor layer 114 is exposed from the second contact hole 124. The first and second contact holes 122 and 124 can be formed by, for example, a dry etching method.

  (4) As shown in FIGS. 8 to 10, the first and second contact layers 126 and 128, the wiring layer 180, and the ferroelectric capacitor 130 are formed.

  (4-1) The first contact layer 126 is formed so as to fill the first contact hole 122, and the second contact layer 128 is formed so as to fill the second contact hole 124.

  For example, as shown in FIG. 8, the first contact layer 126 may be formed only inside the first contact hole 122, or not only inside the first contact hole 122 but also the first insulating layer. It may be formed so as to reach the upper surface of 120. The first contact layer 126 includes a thin barrier layer (eg, Ti layer, TiN layer, etc.) formed on the interface with the insulating material, and a conductive layer (eg, W layer, Al layer) formed inside the barrier layer. Etc.). However, the barrier layer is not essential. The first contact layer 126 can be formed by appropriately using a CMP method, an etching method, or the like after being formed over the entire surface of the first insulating layer 120 including the inside of the first contact hole 122. . These contents can also be applied to the second contact layer 128.

  The material of the first contact layer 126 is not limited as long as it has conductivity. For example, the first contact layer 126 may be formed of the same material as a wiring layer 180 described later. Further, the first contact layer 126 may be formed (for example, integrally) by the same method as a wiring layer 180 described later.

  Similarly to the above, the material of the second contact layer 128 is not limited as long as it has conductivity. For example, the second contact layer 128 is made of the same material as the lower electrode 132 (or the upper electrode 136) of the ferroelectric capacitor 130 described later. It may be formed. Further, the second contact layer 128 may be formed (for example, integrally) by the same method as the lower electrode 132 described later.

  (4-2) As shown in FIG. 8, the wiring layer 180 is formed on the region including the first contact layer 126. The wiring layer 180 can be formed from a metal material such as aluminum. For example, the wiring layer 180 having a predetermined pattern is formed by forming a material to be the wiring layer 180 on the entire surface by sputtering or CVD, and then etching. The wiring layer 180 is electrically connected to the thin film transistor 110 through the first contact layer 126.

  (4-3) As shown in FIG. 9, first, the lower electrode 132 is formed in the ferroelectric capacitor 130. For example, the lower electrode 132 is formed on the region including the second contact layer 128. The lower electrode 132 and the wiring layer 180 can be formed on the first insulating layer 120. That is, the ferroelectric capacitor 130 and the wiring layer 180 can be formed in the same level layer.

  The lower electrode 132 can be formed by a droplet discharge method in which ink 184 is discharged from a droplet discharge portion (for example, a printer head) 182. The ink 184 may be a dispersion liquid (for example, metal ink) containing conductive fine particles. Examples of the conductive fine particles include metal fine particles such as gold, silver, copper, palladium, nickel, tantalum, and aluminum, fine particles of an oxide conductor, and other fine particles such as a superconductor. The fine particles are not particularly limited in size, and are particles that can be discharged together with the dispersion. The conductive fine particles may be coated with a coating material such as organic matter in order to suppress the reaction. The dispersion may be difficult to dry and re-dissolvable. The conductive fine particles may be uniformly dispersed in the dispersion. If necessary, a treatment for volatilizing the dispersion and a treatment (heating) for bonding (for example, sintering) the conductive fine particles to each other are performed. Further, the discharge liquid may be a solution in which a conductive organic material is dissolved.

  If the lower electrode 132 is a conductive organic material, the conductive organic material is more flexible than a normal metal. Therefore, when used as the base of the organic ferroelectric layer 134, the hysteresis characteristics of the ferroelectric capacitor 130 are good. become. Examples of the conductive organic material include polyethylene dioxane thiophene (PEDOT) and polyaniline which are conductive polymers.

  As the droplet discharge method, an inkjet method, a gel jet (registered trademark) method, or a dispenser method can be applied. For example, according to the ink jet method, by applying a technique that has been put to practical use for an ink jet printer, ink can be provided at high speed and without waste. By applying the droplet discharge method, it is possible to directly form the lower electrode 132 having a predetermined pattern without using expensive and time-consuming photolithography technique and etching technique.

  Alternatively, the lower electrode 132 may be formed by sputtering or vapor deposition. In that case, patterning can be performed by combining a photolithography technique and an etching technique as necessary. Further, the lower electrode 132 may be formed by a plating method (for example, an electroplating method or an electroless plating method). In the case of the plating method, by forming the resist opening region in a predetermined pattern in advance, the lower electrode 132 having the predetermined pattern can be directly formed, and the etching process can be omitted.

  (4-4) Next, as shown in FIG. 10, the organic ferroelectric layer 134 is formed on the lower electrode 132. Examples of the organic ferroelectric material of the organic ferroelectric layer 134 include poly (vinylidene fluoride-trifluoroethylene) (P (VDF-TrFE)) copolymer, polyvinylidene fluoride (PVDF), (vinylidene fluoride / (Trifluoroethylene) co-oligomer, vinylidene fluoride oligomer, odd-number nylon and the like. For example, a poly (vinylidene fluoride-trifluoroethylene) copolymer having a VDF: TrFE ratio of 75:25 is dissolved in a solvent (for example, a ketone-based solvent) to obtain a predetermined solution, and then on the region including the lower electrode 132. And annealed at about 140 ° C. to 150 ° C. for crystallization. In the case of an organic ferroelectric material, annealing can be performed at an extremely low temperature as compared with an inorganic ferroelectric material. Therefore, there is a high degree of freedom in selecting a substrate to be used in the manufacturing process. Further, since the wiring layer 180 is not damaged by heat, the wiring layer 180 can be formed in a pre-process before the ferroelectric capacitor 130, and the manufacturing flexibility is high. Further, the manufacturing process can be facilitated by low energy treatment. Furthermore, since the orientation of the organic ferroelectric material does not depend much on the base (lower electrode 132), the degree of freedom in selecting the material of the lower electrode 132 can be improved. In addition, since the organic ferroelectric material does not contain heavy metal, there is no problem of environmental load, and handling that can be easily disposed of is easy.

  Examples of the method for forming the organic ferroelectric layer 134 include a vacuum deposition method, a spin coating method, an LB (Langmuir-Blodgett) method, the above-described droplet discharge method, and an LSMCD (Liquid Source Misted Chemical Deposition) method. According to the droplet discharge method, the organic ferroelectric layer 134 having a predetermined pattern can be directly formed. Similarly, in the case of the LSMCD method, a predetermined pattern can be directly formed by combining selective growth techniques. In the case of other methods, the organic ferroelectric layer 134 may be patterned by etching as necessary.

  (4-5) Next, as shown in FIG. 10, the upper electrode 136 is formed on the organic ferroelectric layer 134. As the formation method of the upper electrode 136, the contents of the formation method of the lower electrode 132 described above can be applied. In the case of the upper electrode 136, it is preferable to form the film with low power so that the organic ferroelectric layer 134 as a base is not damaged. That is, if the upper electrode 136 is formed by a vapor deposition method, a plating method, or a droplet discharge method, it is effective because damage to the organic ferroelectric layer 134 due to high energy particles in a sputtering method during film formation can be reduced. is there.

  The formation process of the ferroelectric capacitor 130 may be performed after the wiring layer 180 is formed or may be performed before the wiring layer 180 is formed. According to the present embodiment, since the ferroelectric capacitor 130 can be manufactured by a low-temperature process, the wiring layer 180 is not damaged by heat, and the manufacturing flexibility can be improved.

  Thus, the ferroelectric capacitor 130 including the lower electrode 132, the organic ferroelectric layer 134, and the upper electrode 136 can be formed. The ferroelectric capacitor 130 is electrically connected to the thin film transistor 110 through the second contact layer 128. The thin film transistor 110 functions as a selection transistor that selects on / off of charge accumulation in the ferroelectric capacitor 130.

  (5) As shown in FIG. 11, the second insulating layer 140 is formed on the ferroelectric capacitor 130. The second insulating layer 140 may be an interlayer insulating layer for further forming a device thereon, or may be an uppermost passivation layer. The second insulating layer 140 is formed so as to cover the ferroelectric capacitor 130. The deposition temperature of the second insulating layer 140 may be lower than the deposition temperature of the first insulating layer 120 described above. In particular, if the film formation temperature of the second insulating layer 140 is lower than, for example, the film formation temperature of the organic ferroelectric layer 134, damage due to heat of the ferroelectric capacitor 130 can be reduced. The second insulating layer 140 may be formed by, for example, tetramethylsilane (TMS) at room temperature by a CVD method. Alternatively, as the second insulating layer 140, polymethyl methacrylate (PMMA) or a photocurable resin (for example, a UV curable resin) may be formed. Any of them can be formed at a temperature lower than the film forming temperature of the organic ferroelectric layer 134 (for example, about 150 ° C. or less). In addition to the above-described CVD method, the second insulating layer 140 can be formed by, for example, a dispersion liquid or a resin material containing silica fine particles by a spin coating method, a droplet discharge method, an LSMCD method, or the like.

  Not only the formation process of the second insulating layer 140 but also the formation process of the ferroelectric capacitor 130 and the subsequent annealing process at a temperature higher than the film formation temperature of the organic ferroelectric layer 134 (specifically, the temperature at the time of crystallization). It is preferable not to perform the treatment. By doing so, damage to the ferroelectric capacitor 130 due to heat can be reduced.

  (6) When the transfer technique is applied, as shown in FIGS. 12 to 14, the transferred layer 170 is formed on the second substrate 200 as a finished product by a transfer process at least once (two times in the figure). Transcript.

  For example, as shown in FIG. 12, the transferred layer 170 on the first substrate 100 (separation layer 102) is transferred to another substrate (for example, a glass substrate) 150. In that case, the substrate 150 and the transferred layer 170 may be bonded by an adhesive layer (not shown) (for example, a photocurable adhesive layer). After that, as shown in FIGS. 13 and 14, the bonding force of the separation layer 102 is lost or reduced, and the first substrate 100 and the separation layer 102 are peeled sequentially or simultaneously. The method for eliminating or reducing the bonding strength of the separation layer 102 is as described above. Finally, a part of the transferred layer 170 (for example, the insulating layer 104) is exposed, and the transferred layer 170 is transferred to the second substrate 200. The coupling means between the transfer layer 170 and the second substrate 200 is not limited, and the method described above can be applied.

  Thus, the transfer layer 170 (including the thin film transistor 110 and the ferroelectric capacitor 130) can be formed on the second substrate 200. The second substrate 200 may be made of a material that has lower heat resistance (for example, a lower strain point) than the first substrate 100. The second substrate 200 may be a flexible substrate such as a polyimide resin, or may be a glass substrate having lower heat resistance than the first substrate 100. Alternatively, the second substrate 200 may be one in which an electro-optical element such as a liquid crystal element or an EL element, or other electronic components are mounted or incorporated. Also in this case, if the electro-optical element or the electronic component of the second substrate 200 has low heat resistance, it is effective to perform the above-described transfer process.

  Note that, unlike the above, the transferred layer 170 may be directly transferred from the first substrate 100 to the second substrate 200 by one transfer. In that case, the ferroelectric capacitor 130 and the thin film transistor 110 are arranged in this order from the second substrate 200 side.

(Structure of organic ferroelectric memory)
In this way, an organic ferroelectric memory 1000 can be formed as shown in FIG. The organic ferroelectric memory 1000 includes a thin film transistor 110, a first insulating layer 120, first and second contact layers 126 and 128, a wiring layer 180, a ferroelectric capacitor 130, and a second insulation. Layer 140. Referring to the circuit diagram of FIG. 16, the word line (WL) is electrically connected to the gate electrode 118 of the thin film transistor 110, the bit line (BL) is electrically connected to the wiring layer 180, and the plate line (PL) is connected. It is electrically connected to the upper electrode 136 of the ferroelectric capacitor 130. The organic ferroelectric memory 1000 may be formed on a second substrate (for example, a flexible substrate) 200.

  The organic ferroelectric memory according to the present embodiment includes contents that can be derived from the manufacturing method described above.

(First modification)
FIG. 17 is a diagram showing a first modification of the present embodiment, and is a diagram for explaining an organic ferroelectric memory and a manufacturing method thereof.

  In this modification, the ferroelectric capacitor 230 is formed above the wiring layer 180. That is, after forming the wiring layer 180, the intermediate insulating layer 190 is formed on the wiring layer 180, and the ferroelectric capacitor 230 (the lower electrode 232, the organic ferroelectric layer 234, and the upper electrode 236 are formed on the intermediate insulating layer 190. Including). In that case, the thin film transistor 110 and the ferroelectric capacitor 230 can be electrically connected by the second contact layer 228 that continuously passes through the first insulating layer 120 and the intermediate insulating layer 190. The contents of the first insulating layer 120 can be applied to the formation method and material of the intermediate insulating layer 190. The formation of the second insulating layer 140 on the ferroelectric capacitor 230 is as already described.

  According to this modification, since the ferroelectric capacitor 230 including the organic ferroelectric layer 234 is formed, a low temperature process of, for example, 150 ° C. or less is possible, and the ferroelectric layer 230 is formed after the necessary elements such as the wiring layer 180 are formed. Even if the dielectric capacitor 230 is formed, the elements such as the wiring layer 180 are not damaged by heat. In addition, since the formation process of the thin film transistor 110 and other conductive parts (such as the wiring layer 180) and the formation process of the ferroelectric capacitor 230 can be performed separately, one of the processes is restricted by the other. In this way, the manufacturing flexibility can be improved.

(Second modification)
FIG. 18 is a diagram showing a second modification of the present embodiment, and is a circuit diagram of an organic ferroelectric memory. In the above description, an example of a one-transistor one-capacitor type has been described. However, the present invention is not limited to this, and can be applied to a so-called two-transistor two-capacitor type organic ferroelectric memory. According to this memory structure, in addition to the effects described above, there is a feature that the operation margin is high and it is strong against characteristic variations caused by manufacturing processes and the like. Alternatively, the contents of the present invention may be applied to another storage capacity type other than the above-described 1T1C type and 2T2C type.

(Third Modification)
19 to 22 are views showing a third modification of the present embodiment, and are diagrams showing a method of manufacturing an organic ferroelectric memory. In this modification, the patterning method of the ferroelectric capacitor 230 is different from that described above.

  First, as shown in FIG. 19, a lower electrode 132a, an organic ferroelectric layer 134a, and an upper electrode 136a are sequentially stacked in a region including a predetermined pattern and its periphery. Thereafter, as shown in FIG. 20, the upper electrode 136 is formed by patterning. For example, patterning can be performed by wet etching. Alternatively, the upper electrode 136 having a predetermined pattern may be directly formed on the organic ferroelectric layer 134a by a droplet discharge method.

  Thereafter, as shown in FIG. 20, the organic ferroelectric layer 134a is ashed using the upper electrode 136 having a predetermined pattern as a mask. That is, a region exposed from the mask (upper electrode 136) in the organic ferroelectric layer 134a is volatilized and removed by a reactive gas (for example, plasma oxygen gas). In this way, as shown in FIG. 21, the organic ferroelectric layer 134 can be formed in the same pattern as the upper electrode 136.

  Alternatively, by patterning the upper electrode 136 by dry etching, the organic ferroelectric layer 134 may be simultaneously patterned by the same action as ashing.

  As shown in FIG. 22, the ferroelectric capacitor 130 can be formed by patterning the lower electrode 132 by a predetermined method.

  According to this modification, by using the upper electrode 136 as a mask, it is not necessary to form a mask for patterning the organic ferroelectric layer 134, and the manufacturing process can be facilitated.

(Other variations)
Although an example in which the transfer technique is applied has been described in the above manufacturing method, the thin film transistor 110, the ferroelectric capacitor 130, and the like may be directly formed on a substrate (second substrate 200) as a finished product. In that case, it is preferable that the substrate to be used has heat resistance to the formation process of the thin film transistor 110 and the ferroelectric capacitor 130.

  The present invention is not limited to the above-described embodiments, and various modifications can be made. For example, the present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations that have the same functions, methods, and results, or configurations that have the same purposes and results). In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that achieves the same effect as the configuration described in the embodiment or a configuration that can achieve the same object. Further, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. It is a figure which shows the manufacturing method of the organic ferroelectric memory which concerns on embodiment of this invention. 1 is a diagram showing an organic ferroelectric memory according to an embodiment of the present invention. 1 is a circuit diagram of an organic ferroelectric memory according to an embodiment of the present invention. It is a figure which shows the modification of embodiment of this invention. It is a figure which shows the modification of embodiment of this invention. It is a figure which shows the modification of embodiment of this invention. It is a figure which shows the modification of embodiment of this invention. It is a figure which shows the modification of embodiment of this invention. It is a figure which shows the modification of embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... 1st board | substrate 102 ... Separation layer 104 ... Insulating layer 110 ... Thin film transistor 114 ... Thin film semiconductor layer 120 ... 1st insulating layer 122 ... 1st contact hole 124 ... 2nd contact hole 126 ... 1st contact layer 128 ... second contact layer 130 ... ferroelectric capacitor 132 ... lower electrode 134 ... organic ferroelectric layer 136 ... upper electrode 150 ... second insulating layer 170 ... transfer layer 180 ... wiring layer 190 ... intermediate insulating layer 200 ... second substrate 228 ... second contact layer 230 ... ferroelectric capacitor 234 ... organic ferroelectric layer 236 ... upper electrode

Claims (15)

An organic ferroelectric memory manufacturing method comprising:
(A) forming a thin film transistor having a thin film semiconductor layer, a gate insulating layer, and a gate electrode;
(B) forming a first insulating layer above the thin film transistor;
(C) a first contact layer electrically connected to the thin film semiconductor layer to the first insulating layer, and a second contact layer electrically connected to the thin film semiconductor layer to the first insulating layer. Forming,
(D) forming a wiring layer electrically connected to the first contact layer;
(E) forming a ferroelectric capacitor electrically connected to the second contact layer and having a lower electrode, an organic ferroelectric layer and an upper electrode;
(F) forming a second insulating layer above the ferroelectric capacitor;
A method for manufacturing an organic ferroelectric memory, comprising: In the manufacturing method of the organic ferroelectric memory of Claim 1,
In the step (a), the thin film transistor is formed by applying a liquid silicon material or by a droplet discharge method. In the manufacturing method of the organic ferroelectric memory of Claim 1 or Claim 2,
A method of manufacturing an organic ferroelectric memory, wherein in the step (e), the organic ferroelectric layer is formed in a predetermined pattern by a droplet discharge method. In the manufacturing method of the organic ferroelectric memory of Claim 1 or Claim 2,
In the step (e), the organic ferroelectric layer is formed by ashing the organic ferroelectric layer using the upper electrode having the predetermined pattern as a mask by forming the upper electrode to have a predetermined pattern. A method of manufacturing an organic ferroelectric memory, wherein a layer is patterned. In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-4,
An organic ferroelectric memory, wherein at least one of the lower electrode and the upper electrode is formed of a conductive organic material in the step (e). In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-5,
A method of manufacturing an organic ferroelectric memory, wherein in the step (e), at least one of the lower electrode and the upper electrode is formed in a predetermined pattern by a droplet discharge method. In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-5,
In the step (e), at least one of the lower electrode and the upper electrode is formed by a vapor deposition method or a plating method. In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-7,
The method for manufacturing an organic ferroelectric memory, wherein a film forming temperature of the second insulating layer in the step (f) is lower than a film forming temperature of the first insulating layer in the step (b). In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-8,
Performing at least the step (a) on the first substrate, forming a transfer layer including the thin film transistor above the first substrate,
A method of manufacturing an organic ferroelectric memory, further comprising transferring the transferred layer to a second substrate by at least one transfer step. In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-9,
The method of manufacturing an organic ferroelectric memory, wherein the second substrate is a flexible substrate. In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-10,
The organic ferroelectric layer is an organic material selected from poly (vinylidene fluoride / trifluoroethylene) copolymer, polyvinylidene fluoride, (vinylidene fluoride / trifluoroethylene) co-oligomer, vinylidene fluoride oligomer, and odd-number nylon. A method for manufacturing an organic ferroelectric memory comprising a ferroelectric material. In the manufacturing method of the organic ferroelectric memory in any one of Claims 1-11,
After the step (d), further comprising forming an intermediate insulating layer above the wiring layer;
In the step (e), the ferroelectric capacitor is formed above the intermediate insulating layer in the step (e). A storage capacitor type organic ferroelectric memory,
A thin film transistor;
A first insulating layer formed above the thin film transistor;
A first contact layer penetrating the first insulating layer;
A second contact layer penetrating the first insulating layer;
A wiring layer electrically connected to the thin film transistor through the first contact layer;
A ferroelectric capacitor electrically connected to the thin film transistor through the second contact layer and having a lower electrode, an organic ferroelectric layer and an upper electrode;
A second insulating layer formed above the ferroelectric capacitor;
Including an organic ferroelectric memory. The organic ferroelectric memory according to claim 13, wherein
An organic ferroelectric memory in which at least one of the lower electrode and the upper electrode is made of a conductive organic material. The organic ferroelectric memory according to claim 13 or 14,
An organic ferroelectric memory formed above a flexible substrate.

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