JP2006252422A - Failure diagnostic method and device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a failure diagnostic method and device capable of outputting a highly reliable diagnostic result surely. <P>SOLUTION: The failure diagnostic device 1 of a system, which is composed of a plurality of sub-systems 21 and in which at least some of the sub-systems 21 are related in terms of the operation and the respective sub-systems 21 are constituted so as to output prescribed failure signals, is provided with: a case example database 11 storing the combination case examples of failure signals outputted in the past from at least some of the sub-systems 21; and an arithmetic unit 10 for selecting a candidate with the high probability of being pertinent from the combination case examples of the failure signals stored in the case example data base 11 in the case that the failure signals are outputted from at least some of the sub-systems 21 and outputting the diagnosed result corresponding to it. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a failure diagnosis method and apparatus for a system composed of a plurality of subsystems.

  For example, in Patent Document 1, a failure signal combination pattern according to a preset diagnosis item and a diagnosis result corresponding thereto are stored in a database, and a failure signal actually output from a subsystem (that is, a device) is stored. A method is disclosed in which the combination pattern is compared with the contents of the database and a diagnosis result corresponding to the matching combination pattern is output.

Further, Patent Document 1 discloses a method of creating a database of the results of actual subsystem recovery work based on diagnosis results as a recovery history and determining the priority order of diagnosis result candidates.
JP 2002-189612 A

  However, in the conventional failure diagnosis method, when a failure signal combination pattern that does not conform to a failure signal combination pattern in accordance with a preset diagnosis item is actually output, even the diagnosis result may not be output. It was.

  In the first place, since the above-mentioned Patent Document 1 is not intended for failure diagnosis of a plurality of subsystems that are unilaterally or mutually related in operation, it is impossible to grasp the relationship of failure signals between subsystems. . That is, for example, although a certain subsystem is normal, a failure signal may be simultaneously output from both subsystems due to a failure of another related subsystem. More specifically, even if the device A is normal, if the A device operates by power supply from another device called the B power source, the A device stops operating due to the failure of the B power source. A failure signal may be output.

  Furthermore, in more complicated systems, even in the same failure state, the same combination of failure signals is not always output, and a failure signal is accidentally output or output from a certain subsystem. There may be no.

  When such a problem occurs in a complex system that involves a large number of subsystems, it is necessary to sequentially examine the subsystems to which the fault signal is output. The recovery time will be enormous.

  The present invention has been made in view of such circumstances, and based on failure signals from a plurality of subsystems related in operation, a candidate with a high probability is selected from a combination pattern of past failure signals. An object of the present invention is to provide a failure diagnosis method and apparatus capable of outputting a diagnosis result with high reliability without outputting a diagnosis result by outputting a corresponding diagnosis result.

The failure diagnosis method according to the present invention includes a plurality of subsystems, and at least some of the plurality of subsystems are related in operation, and each subsystem outputs a predetermined failure signal. A fault diagnosis method for a system comprising: storing a combination example of fault signals output in the past from at least some of the plurality of subsystems in a case database; and at least some of the plurality of subsystems. When a failure signal is output from the candidate, a candidate having a high probability of corresponding is selected from the combination examples of the failure signal stored in the case database, and a diagnosis result corresponding to the candidate is output.

  The failure diagnosis apparatus according to the present invention is composed of a plurality of subsystems, and at least some of the plurality of subsystems are related in operation, and each subsystem is configured to output a predetermined failure signal. And a case database for storing a combination of failure signals output in the past from at least some of the plurality of subsystems, and at least some of the plurality of subsystems. When a failure signal is output from, a computing device that selects a candidate with a high probability from a combination example of the failure signal stored in the case database and outputs a diagnosis result corresponding thereto is provided. .

  The present invention selects a candidate having a high probability from a combination pattern of past failure signals based on failure signals from a plurality of subsystems related in operation, and outputs a diagnosis result according to the selected result. Is not output, and a highly reliable diagnosis result can be output.

  In the present invention, it is also possible to select candidates from the past failure signal combination patterns in descending order of the corresponding probabilities and output the diagnosis results corresponding thereto (that is, candidate lists in the corresponding establishment order, etc.).

  The failure diagnosis method and apparatus according to the present invention will be specifically described below with reference to the accompanying drawings.

FIG. 1 is a diagram showing an example of an application form of a failure diagnosis apparatus according to an embodiment of the present invention. In FIG. 1, reference numeral 2 denotes an aircraft as a system composed of a plurality of subsystems, and each subsystem has a BIT (Built In Test) output function as a failure signal. BIT output from each subsystem is an open-air digital data link system (ACARS: Aircraft Communication, Addressing and Reporting System, commonly known as “Akers”)
) Etc., and is transmitted in real time (online transmission) to the fault diagnosis apparatus 1A arranged on the ground. Also, the BIT can be delivered to the failure diagnosis apparatus offline via a recording medium such as a magneto-optical disk or a flash memory, instead of the above-described online transmission.

The failure diagnosis apparatus 1A is connected to the case database 1B. The case database 1B stores a combination of BITs output from the subsystem in the past and information indicating the failure location at that time in the form of a fault code (for example, see FIG. 3).

With the above configuration, when receiving a BIT from the aircraft 2 in service, the failure diagnosis device 1A refers to the contents of the case database 1B (past failure cases), specifically as described later. List and output the candidate locations in descending order of establishment. In FIG. 1, the failure diagnosis apparatus 1 </ b> A is shown to list and display failure location candidates on the screen 1 </ b> C included therein as diagnosis results. The candidates do not need to be listed and can be configured to display only the most likely candidates.

The mechanic 3 on the ground confirms and verifies (failure search) the diagnosis results (including past cases) displayed on the screen, and performs restoration work on the corresponding subsystem. Facts found by the restoration (for example, information on the subsystem that has actually failed) are registered in the case database 1B by the maintenance staff 3 as new failure cases.

The aircraft 2 can also be equipped with an OMS (Onboard Maintenance Computer), and once the BIT output from each subsystem is stored in the OMS, the fault diagnosis device 1A placed on the ground It is also possible to pass to. In this case, all the functions of the failure diagnosis apparatus 1A and the case database 1B can be mounted on the aircraft 2.

FIG. 2 is a block diagram showing a configuration of a failure diagnosis apparatus 1 according to another embodiment of the present invention. In this embodiment, the failure diagnosis apparatus 1 includes a case database 11. Yes. In addition, the failure diagnosis apparatus 1 includes an arithmetic device 10, an output device 12, and an input device 13.

The arithmetic unit 10 is a system that includes sub-systems 21, 21,...
Each subsystem 21 outputs a BIT from the BIT output device 21A included therein to the arithmetic device 10.

The output device 12 includes a display device for displaying the above-described diagnosis results, a printing device for printing the same, and the input device 13 is used for maintenance personnel 3 (see FIG. 1) to input a failure case. Various input devices such as a keyboard, an input device portion of a touch panel display device, and another computer communicatively connected to the arithmetic device 10 are included.

As shown in FIG. 3, the case database 11 includes a failure code (“No.” in FIG. 3) input from the input device 13 in association with “output BIT” and “failure location at that time”. Record). In the present embodiment, for the purpose of simplifying the explanation, “output BIT” is “ADC (Air Data Computer)”, “FCC (Flight Control Computer)”, “FADEC (Full-Authority Digital Engine Control). ) ”And“ power supply ”failure signal items, and“ ADC ”further includes“ external ”and“ internal ”failure signal items. On the other hand, the “failure location at that time” includes each failure location item of “sensor”, “ADC”, “FCC”, “FADEC”, and “power supply”. Also here
It shows that 18 case data are stored.

Here, consider a case where a combination pattern of BIT as shown in FIG. 4 is output from the subsystems 21, 21,. In FIG. 4, the combination pattern of the BIT is shown in the same form as the failure code. Here, the four BITs of both “external” and “internal” “ADC”, “FADEC”, and “power supply” are shown. Is output.

  In the case of the above-described prior art, even if it is assumed that the case database 11 as shown in FIG. 3 is provided, there is no case that completely matches this combination pattern in the case database 11, and even the diagnosis result is output. Not.

(First embodiment)
In the first embodiment, the arithmetic unit 10 includes a failure diagnosis logic 10A using Bayes' theorem as one of conditional probability methods. It is also possible to use other conditional establishment methods. The failure diagnosis logic 10A using Bayes' theorem is as follows.

There are n independent events H1, H2,..., Hn, and at least one event must occur. If E is an arbitrary event, the following relationship holds.

Here, P (*) represents the probability of occurrence of event *, and P (A | B) represents the probability of occurrence of event A under the condition that event B has occurred, that is, the conditional probability.

In this Bayes' theorem, P (E | Hi) means the probability that the event E will occur under the cause Hi, and is also called “prior probability”. On the other hand, P (Hk | E) is also called “posterior probability” because it means that the event E has occurred and it means the probability based on the cause Hk. Moreover, since P (Hk) is given a priori, it is also called “a priori probability”. Bayes' theorem gives a formula that calculates posterior probabilities from prior probabilities and a priori probabilities.

Here, it is assumed that the output BIT is event E, and the failure location at that time is the cause Hk. The a priori probability P (Hk) can be calculated from the contents of the case database 11 of FIG. 3 as follows. However, H1, H2, H3, H4,
And H5 are the sensor, ADC, FCC, FADEC, and power supply, respectively.

H1: Sensor → P (H1) = 5/18 ≒ 0.278
H2: ADC → P (H2) = 3/18 ≒ 0.167
H3: FCC → P (H3) = 2/18 ≒ 0.111
H4: FADEC → P (H4) = 4/18 ≒ 0.222
H5: Power supply → P (H5) = 4/18 ≒ 0.222
1.000 total

If the conventional concept of failure diagnosis based on case examples is applied as it is, a method of applying Bayes' theorem for each output BIT combination pattern can be easily considered. However, it cannot handle combinations of unknown BIT outputs. In addition, since there are many BITs, the number of combinations is enormous, and the BIT output due to the failure of other subsystems is not necessarily output due to accidental factors even if the same failure occurs. It is common for BITs that are similar but partly different to be output. for that reason,
First, we apply Bayes' theorem for each BIT output and combine the results.

  First, consider the case where the output BIT is “ADC-internal”. From the contents of the case database 11 in FIG. 3, P (E1) = 8 / 18≈0.444. The prior probability P (E | Hi) can be calculated as follows from FIG.

H1: Sensor → P (E1 | H1) = 5/5 ≒ 1.000
H2: ADC → P (E1 | H2) = 0/3 ≒ 0.000
H3: FCC → P (E1 | H3) = 0/2 ≒ 0.000
H4: FADEC → P (E1 | H4) = 1/4 ≒ 0.250
H5: Power supply → P (E1 | H5) = 2/4 ≒ 0.500

Here, Bayes' theorem is well known, Toshihiko Ono “Knowledge Information System”, Aichi Publishing,
It is possible for a person skilled in the art to easily calculate from publications such as 1997. Therefore, it is clear that the same calculation can be performed when the output BIT is “ADC-external”, “FCC”, “FADEC”, and “power supply”, respectively, and description thereof will be omitted.

Then, the calculation result is advanced according to Bayes' theorem by substituting the calculation result in the case of each BIT into Expression (1), and the probability based on the presence or absence of each BIT output can be calculated.

  Next, these probabilities are combined. As shown in FIG. 4, when the output BIT is “ADC-external”, “ADC-internal”, “FADEC”, and “power supply”, for example, they can be combined by the following simple method. .

H1: Sensor → P (H1 | E1, E2, ┐E3, E4, E5)
≒ {P (H1 | E1), P (H1 | E2), P (H1 | ┐E3), P (H1 | E4), P (H1 | E5)} average value ≒ 0.264
H2: ADC → P (H2 | E1, E2, ┐E3, E4, E5)
≒ {P (H2 | E1), P (H2 | E2), P (H2 | ┐E3), P (H2 | E4), P (H2 | E5)} average value ≒ 0.103
H3: FCC → P (H3 | E1, E2, ┐E3, E4, E5)
≒ {Average value of P (H3 | E1), P (H3 | E2), P (H3 | ┐E3), P (H3 | E4), P (H3 | E5)} ≒ 0.000
H4: FADEC → P (H4 | E1, E2, ┐E3, E4, E5)
≒ {P (H4 | E1), P (H4 | E2), P (H4 | ┐E3), P (H4 | E4), P (H4 | E5)} average value ≒ 0.302
H5: Power supply → P (H5 | E1, E2, ┐E3, E4, E5)
≒ {P (H5 | E1), P (H5 | E2), P (H5 | ┐E3), P (H5 | E4), P (H5 | E5)} average value ≒ 0.331
1.000 total

In other words, in this case, “power supply”, “FADEC”, “sensor”, “ADC”, and “FCC” can be listed in descending order of possibility as failure locations. The enumeration contents are output as a diagnosis result.

In addition, as shown in the flowchart of FIG. 5, the a priori probability P (Hk), the posterior probability P (Hk | E1), and P (Hk | ┐E1) Diagnosis accuracy can be improved by performing recalculation (update) prior to diagnosis.

(Second Embodiment)
The second embodiment has the same configuration as that of the first embodiment shown in FIG. 2, but the failure diagnosis logic of the arithmetic unit 10 is different. Since other configurations and operations are the same as those of the first embodiment, the same parts are denoted by the same reference numerals and the description thereof is omitted.

In the second embodiment, the arithmetic device 10 includes a failure diagnosis logic 10B using a neural network. The fault diagnosis logic 10B using this neural network is as follows.

As shown in FIG. 6A, the input layer of the neural network corresponds to the output BIT, and the output layer corresponds to the failure location. This is merely an example, and for example, the hidden layer (also referred to as an intermediate layer) need not be a single layer. In general, the numbers of input layers and output layers do not match.

  The contents of the case database 11 of FIG. 3 are stored in this neural network. If there is a case where the failure location is different even though the output BIT is the same (No. 8 and No. 17 in Fig. 3), the neural network does not converge, so the number of loops is limited, or When the difference in error from the previous loop is small, it is necessary to devise such as getting out of the loop.

  When the data of FIG. 4 is input to the neural network storing the contents of the case database 11 of FIG. 3, an output as shown in FIG. 6B is obtained.

In a normal method of using a neural network, a value exceeding a certain threshold is output as 1 and a value not exceeding 0 is output and used. For example, in the example of FIG. 4, it is assumed that “power source” is 1 and the others are 0. However, in the present embodiment, the output values are used as they are, and listed as “power supply”, “FADEC”, “sensor”, “ADC”, and “FCC” in descending order of possibility as failure locations.

  Further, as shown in the flowchart of FIG. 7, each time a new case is accumulated, the diagnostic accuracy can be improved by performing recalculation (correction) of the connection weight between layers before the next diagnosis. .

  In the above embodiment, the example in which the conditional probability (Bayes's theorem) or neural network technique is applied to the fault diagnosis logic has been described. However, both of these techniques are used for parallel processing or a predetermined condition. It is also possible to assemble fault diagnosis logic so as to process it automatically.

  As described above, according to the failure diagnosis method and apparatus according to the present invention, based on failure signals from a plurality of operationally related subsystems, a candidate with a high probability of occurrence is selected from past failure signal combination patterns. The invention of the present application has an excellent effect that, by outputting a diagnosis result corresponding thereto, the diagnosis result is not output and a highly reliable diagnosis result can be output.

It is a figure which shows an example of the application form of the failure diagnosis apparatus which concerns on embodiment of this invention. It is a block diagram which shows the structure of the failure diagnosis apparatus concerning another embodiment of this invention. It is a figure which shows an example of the content of the case database utilized in FIG. 1 or FIG. It is a figure which shows an example of the combination pattern of BIT. 3 is a flowchart showing an embodiment in which Bayes' theorem is applied to the failure diagnosis logic of the arithmetic device shown in FIG. 2. (A) And (b) is a figure which shows another embodiment which applied the neural network to the failure diagnosis logic of the arithmetic unit shown in FIG. It is a flowchart which shows the process of the failure diagnosis logic of embodiment of FIG.

Explanation of symbols

1, 1A fault diagnosis device
1B, 11 Case database
1C display screen
2 System (Aircraft)
10 Arithmetic unit
10A Fault diagnosis logic (Bayes's theorem)
10B Fault diagnosis logic (neural network)
12 Output device
13 Input device
21 Subsystem
21A BIT output device

Claims (4)

A system fault diagnosis method comprising a plurality of subsystems, wherein at least some of the plurality of subsystems are related in operation, and each subsystem outputs a predetermined fault signal. ,
Storing in the case database a combination case of fault signals output in the past from at least some of the plurality of subsystems;
When a failure signal is output from at least some of the plurality of subsystems, a candidate with a high probability is selected from a combination example of the failure signal stored in the case database, and a diagnosis result corresponding to the selected candidate is output. A failure diagnosis method characterized by:   When a failure signal is output from at least some of the plurality of subsystems, a candidate is selected in descending order of the corresponding probability from the combination examples of the failure signal stored in the case database, and a diagnosis result corresponding thereto is selected. The fault diagnosis method according to claim 1, wherein the fault diagnosis method is output. A system fault diagnosis apparatus comprising a plurality of subsystems, wherein at least some of the plurality of subsystems are related in operation, and each subsystem is configured to output a predetermined fault signal. ,
A case database storing combination cases of failure signals output in the past from at least some of the plurality of subsystems;
When a failure signal is output from at least some of the plurality of subsystems, a candidate with a high probability is selected from a combination example of the failure signal stored in the case database, and a diagnosis result corresponding to the selected candidate is output. A failure diagnosis apparatus comprising: an arithmetic unit that performs the operation.   When the failure signal is output from at least some of the plurality of subsystems, the arithmetic device selects candidates from the combination of failure signals stored in the case database in descending order of the corresponding probability, 4. The failure diagnosis apparatus according to claim 3, wherein a corresponding diagnosis result is output.

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