JP2006244274A - Method for designing lsi - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent even connection mistakes beforehand and to check the right or wrong of connection between function blocks in a design method for connecting a plurality of function blocks to construct an LSI. <P>SOLUTION: Connection destinations of signal lines of each function block and information of input-output directions are described, the connection destinations of the signal lines are bundled as a connection unit for each connection function, a library 25 registered with a connection group name given to the connection destinations is prepared and further, common group definition library 31 is prepared in which a rule of connection for a connection group to be used to generate the library 25 and a rule of the input-output directions are described. A connection 21 between function blocks for system design 20 is performed by using the library 25 to automatically generate an RTL 22. In addition, the common group definition library 31 is used to perform the right or wrong check of the function and the right or wrong check 41 of an input-output direction of a signal line in a connection result. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for designing a large scale integrated circuit (LSI) configured by connecting a plurality of functional blocks including IP (Intellectual Property), and in particular, to determine functional and electrical correctness in connecting functional blocks. It relates to technology that makes it possible.

  As LSIs become larger in scale, a design method for configuring an LSI by connecting a plurality of functional blocks such as IP and circuit modules that have already been proven is becoming common. These functional blocks are usually connected by a structure description in RTL.

  The connection of each functional block in the RTL is likely to cause a connection error unless the function of the function block and the LSI specifications are well known, and the number of connections increases as the LSI becomes larger. This also increases the design period.

  Therefore, for example, in Patent Document 1, a plurality of functional blocks that realize standard individual LSI functions are registered in individual libraries, and all the functional blocks registered in the library are connected as “circuit” A method of designing in advance as “data” is disclosed.

  When developing a new LSI, a function block to be used is selected from the library, data of unused function blocks is deleted from the connected “circuit data”, and unconnected termination data is inserted instead.

As a result, standard circuit groups such as CPU-centered circuit groups and peripheral module groups can be designed simply by selecting desired functional blocks from a library prepared in advance, and connected to them. Since it is not necessary to design connection data to be connected, there is no connection error, and the LSI development period is shortened.
JP-A-7-263564

  However, according to the technique of Patent Document 1 described above, all of the plurality of functional blocks included in the “circuit data” must be connected in advance. This can be applied to an LSI having a specific standard function, but is difficult to apply when designing a completely new LSI.

  Further, as described above, with the increase in scale of LSI, connection between a plurality of functional blocks tends to cause a connection error unless the user knows the function of the block and the function of the LSI. Furthermore, it is difficult to check whether or not the connection between the blocks has been made correctly, especially in the new design, and there is no effective means at present.

  According to the present invention, in a design method for configuring an LSI by connecting a plurality of functional blocks including IP, it is possible to prevent a connection error and to check whether the connection between the functional blocks is correctly performed. An object of the present invention is to provide an LSI design method that can be used.

  In the present invention, as a library for automating the connection between the functional blocks, the signal line connection destination and input / output direction information of each functional block are described, and the signal line connection destination is connected to the connection unit for each connection function. And prepare a library that is registered by giving a connection group name to them.

  In addition, the connection group name in each functional block, the connection rule for the connection of that connection group, and the rule for the input / output direction of the connection between each functional block are used as information, and the same connection group name is used for any LSI design. A common group definition library that can be used is prepared, and the library is generated using the library.

  The connection between the functional blocks is generated by RTL using the above-described library, and the function of the signal line in the connection result and the correctness of the input / output direction can be verified using the common group definition library.

  That is, the LSI design method of the present invention is an LSI design method in which an LSI is configured by connecting a plurality of functional blocks including IP using a library that describes functional block information. It includes information on the connection destinations of the signal lines of the blocks and the input / output direction of the signal lines, and has a function of automatically generating connection between the functional blocks according to the information on the connection destinations of the signal lines of the functional blocks.

  According to the above configuration, for all functional blocks including various IPs, the connection destinations of the signal lines and the input / output directions of the signal lines are registered in the library, and most of the connections between the functional blocks are based on the library information. Therefore, the possibility of connection mistakes between functional blocks is reduced, and the LSI design period is shortened.

  In the present invention, the library information includes a function block signal line connection destination bundled as a connection unit for each connection function and defined as a connection group, and connection between function blocks is automatically performed according to the connection group. It has the function to generate.

  According to the above configuration, the signal lines are bundled for each connection function and can be handled in units of connection groups, so that the amount of information describing the connection between function blocks can be reduced, The processing efficiency is improved and the possibility of connection mistakes is further reduced.

  In the present invention, there is provided a common group definition library in which a signal line connecting between functional blocks, a connection rule common to the connection group, and a rule of an input / output direction of the signal line are described, and the library is the common group definition library Is generated from

  According to the above configuration, the library used for the connection between the functional blocks is generated from the common group definition library describing the connection rules common to a certain range of LSI design and the input / output direction rules of the signal lines. The library used for connection can be generated correctly and efficiently.

  In the present invention, the connection between the functional blocks is described by RTL.

  The present invention has a function of verifying the correctness / incorrectness of the connection between the generated functional blocks and the input / output direction of the signal lines using the information of the common group definition library.

  According to the above configuration, since the connection result is checked against the common group definition library describing the connection rule and the input / output direction rule of the signal line, the connection mistake between the functional blocks is eliminated, and the LSI design period Is shortened.

  According to the present invention, a connection between functional blocks is correctly performed by using a registered library, and a connection mistake can be prevented in advance. In addition, by providing connection rules in the common group definition library, the library used for connection can be generated without errors and used for checking whether the design has been performed correctly. The effect of shortening is obtained.

  Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an LSI as an example of a design object in each of the following embodiments. In FIG. 1, a CPU core 10, a memory 11, a peripheral function block 12, and an IO port 13 in an LSI chip are coupled by a bus 14.

  FIG. 2 is a flowchart of the LSI design method according to the first embodiment of the present invention. Here, two types of libraries, (a) a connection destination library and (b) a group library, will be described as libraries used for connection between functional blocks including IP.

  First, the function is determined for a desired LSI or a large-scale circuit block in which a plurality of functional blocks are assembled in the system design in step 20. Next, in step 21, connection is made using the respective libraries (a) or (b). The connected data is output as RTL at step 22.

  In the case of (a) using the connection destination library 23, the connection destination library 23 describes the data and addresses of the CPU core 10 and the connection destination of the control signal line (in this example, the bus 14). Similar information is prepared in the connection destination library 23 for the other functional blocks. By registering all functional blocks including various IPs in the connection destination library, it is possible to automatically connect the functional blocks.

  In the case of (b) using the group library 25, the connection destinations of the signal lines are described in the same manner as the connection destination library 23, and when data and address signals can be grouped by function, these are used as connection groups. Bundle. As a result, the method of use is the same as (a), but there is an advantage that the amount of information can be smaller than when using the connection destination library.

  In the present embodiment, the input / output direction of the signal line can be described in the library in order to check an incorrect connection. For example, in the connection destination library of the CPU core 10, all signal lines connected to the bus 14 and all signal lines connected from the bus 14 are described, but further description of the input / output directions of all the signal lines. Add The same applies to the group library.

  FIG. 3 is a flowchart of an LSI design method according to the second embodiment of the present invention. Here, in order to create the group library 25, a common group definition library 31 that defines connection group connection rules is used. That is, the group library 25 is created in step 32 with reference to the common group definition library 31.

  The common group definition library 31 has information on the function of the signal line in each functional block. For example, connection rules for data, addresses, control signals, and the like between the CPU core 10 and the bus 14 are described, and signal lines connected to the CPU core 10 are connected to the bus 14 using this common group definition library. Will only be connected.

  Thereby, even if the LSI is newly designed, if the same common group definition library 31 is used, the signal line connected to the CPU core 10 is always connected to the bus defined by the common group definition library 31. In the group library 25, information by function corresponding to the rules described in the common group definition library 31 is registered.

  In this way, a common group definition library that can use the same connection group name in any LSI design is prepared, and the signal connected by having the connection group name in each functional block and the connection rule of the connection group as information. You can check the correctness of the function of the line.

  FIG. 4 is a flowchart of the LSI design method according to the third embodiment of the present invention. Here, for the RTL connected in step 22 of the second embodiment, correctness / incorrectness regarding the connection is performed using the signal line function information described in the common group definition library 31 in step 41.

  The common group definition library 31 describes signal line connection rules. For example, the address of the CPU core 10 must be connected to the address of the bus 14, but this may be connected to other signal lines. It is an error to be connected to the address of a functional block other than the bus 14.

  The common group definition library 31 describes the rules of the input / output directions of the signal lines. For example, write data that is an output signal line from the CPU core 10 must be an input signal line on the bus 14. If this is handled as an output signal line in the bus 14, it is an error.

  As described above, by using the common group definition library 31, it is possible to check the connection rules and input / output directions of signal lines, and to automatically check the functions of connection and signal lines. If there is an error as a result of the check, the connection must be reconfirmed. If it is correct, the checked RTL is output in step 42 and can be used for subsequent design.

  Since the LSI design method of the present invention has a technique for automating the connection between functional blocks, it can be applied as a measure for shortening the LSI development period. In addition, the connection destination library, group library, and common group definition library in the present invention can be reused.

  The LSI design method of the present invention is correctly performed by using a library in which the connection between functional blocks is registered, and a connection mistake can be prevented in advance. In addition, by providing the common group definition library with connection rules, the library used for connection can be generated without error, and can be used to check whether the design has been performed correctly, making LSI design easier and reducing the design period. It has the effect of being shortened and is useful as a design method for a large scale integrated circuit (LSI) configured by connecting a plurality of functional blocks including IP (Intellectual Property).

1 is a block diagram showing a configuration of an LSI that is a design target example in each embodiment of the present invention. The flowchart of the LSI design method in 1st embodiment of this invention. The flowchart of the LSI design method in 2nd embodiment of this invention. The flowchart of the LSI design method in 3rd embodiment of this invention.

Explanation of symbols

10 CPU Core 11 Memory 12 Peripheral Function Block 13 IO Port 14 Bus 20 System Design 21 Connection 22 Connected RTL
23 Connection destination library 24 RTL of functional block
25 Group Library 31 Common Group Definition Library 32 Create Group Library 41 Check RTL 42 Checked RTL

Claims (6)

  An LSI design method for configuring a large-scale integrated circuit (LSI) by connecting a plurality of functional blocks including IP (Intellectual Property) using a library that describes information on the functional blocks, wherein the library information Includes information on signal line connection destinations and signal line input / output directions of the functional blocks, and has a function of automatically generating connection between the functional blocks in accordance with information on signal line connection destinations of the functional blocks. LSI design method characterized by the above.   The library information includes the connection destination of the signal line of the functional block bundled as a connection unit for each connection function and defined as a connection group, and automatically generates a connection between the functional blocks according to the connection group The LSI design method according to claim 1, wherein the LSI design method has the function of:   A common group definition library that describes signal lines connecting between the functional blocks, connection rules common to the connection groups, and input / output direction rules of the signal lines, and the library is generated from the common group definition library 3. The LSI design method according to claim 2, wherein:   2. The LSI design method according to claim 1, wherein the connection between the functional blocks is described by RTL.   4. The LSI design method according to claim 3, further comprising a function for verifying whether the generated connection between the functional blocks and the input / output direction of the signal line are correct or incorrect using information in the common group definition library.   A computer program for executing the LSI design method according to claim 1.

Images