JP2006234400A - Inspection method for comparator circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inspection method for a comparator circuit capable of enhancing inspection efficiency, by increasing the number of semiconductor devices that can be inspected within a prescribed time interval. <P>SOLUTION: The first voltage V1 (V1<Vth) is impressed as an input signal, to confirm that an output signal from a comparator has been brought to a high level (step 101), the second voltage V2 (V2>Vth) is impressed as an input signal to confirm that the output signal from the comparator is brought to a low level (step 102), the input signal is swept within a range from the first voltage V1 to the second voltage V2, to confirm that the output signal from the comparator is varied from the high level to the low level (step 103). The inspection is finished as a non-defective, when a "pass" is determined in all the steps of the step 101, the step 102 and the step 103, the inspection is finished as a defective, when a "failure" is determined in any of the steps. An inspection time is shortened to enhance the efficiency, because of being determined as the "failure", when there is absence of the voltage level of the input signal found in the first half of the inspection. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an inspection procedure for a semiconductor device incorporating a comparator circuit or a hysteresis comparator circuit, and more particularly to an inspection method for a comparator circuit.

  At present, the number of transistors integrated in a semiconductor device is dramatically increasing, and in particular, various semiconductor devices such as a system LSI, a memory, and an analog LSI have an increased circuit scale. A semiconductor inspection apparatus is used for shipping inspection, defect analysis, and the like of such a large-scale, complicated and high-speed semiconductor device. In addition, a comparator circuit and a hysteresis comparator circuit are often used as the basic configuration circuit of the semiconductor device described above.

  An example of an inverting comparison circuit using a comparator is shown in FIG. The input voltage: Vin is connected to the inverting input terminal (−), and the reference voltage: Vref is connected to the non-inverting input terminal (+). The reference voltage as a threshold value: the input voltage: Vin is compared with Vref, whether it is high or low. When “Vin <Vref”, the output signal (Vout) is at a high level, and when “Vin> Vth”, the output signal is A low level is output to (Vout).

  The operation point of the comparator 1 can guarantee the operation by measuring the voltage level of the input signal whose output signal changes from the high level to the low level.

  FIG. 10 shows an inverting comparator circuit as an example of the hysteresis comparator circuit. When the input voltage Vin is “Vin <first threshold voltage: Vth1”, a high level is output, and when “Vin> second threshold voltage: Vth2”, a low level is output. In the range of “Vth1 <Vin <Vth2” where the input voltage continuously changes, the previous output state is maintained. That is, when the immediately preceding output is high level “Vin <Vth1”, the high level is output, and when the immediately preceding output is low level “Vin> Vth2”, the low level is output.

  Assuming that the output high level voltage is “VOH” and the output low level voltage is “VOL”, the first threshold voltage: Vth1 is (Expression 1)

第２の閾値電圧：Ｖｔｈ２は（数２）

Second threshold voltage: Vth2 is (Expression 2)

ヒステリシス電圧幅：（Ｖｔｈ２−Ｖｔｈ１）は（数３）

Hysteresis voltage width: (Vth2−Vth1) is (Expression 3)

で表される。

It is represented by

  Similar to the comparator circuit, the hysteresis comparator circuit operates at the first threshold voltage Vth1 at which the output changes from the low level to the high level and the second threshold voltage Vth2 at which the output changes from the high level to the low level. Operation can be guaranteed by measuring.

  Here, a case where the voltage level of the input signal is measured when the comparator circuit is inspected in the inspection process of the conventional semiconductor inspection apparatus will be described in detail below. The input voltage of the analog input signal: Vin is swept from V1 to V2 in the range of “V1 <Vth <V2”, and the input voltage: Vin at which the output signal changes from the high level to the low level is obtained. That is, the voltage: dVn shown in (Expression 4) obtained by dividing the section from the start voltage: V1 to the end voltage: V2 into n equal parts.

ずつ増加させて印加する。

Apply in increments.

  Required voltage: Vj (Expression 5)

と表すとすると、まず、入力電圧：Ｖｉｎに「Ｖｉｎ＝Ｖ１＋ｄＶｎ」を印加して、出力信号を測定してローレベルとみなせたら入力電圧：Ｖｉｎの掃引を中止して、この入力電圧：Ｖｉｎを入力閾値電圧とする。この入力閾値電圧があらかじめ設定しておいた区間内に属していれば「パス」と判定し、属していなければ「フェイル」と判定する。もし、出力信号を測定してローレベルとみなせなかったら次の入力電圧：Ｖｉｎに「Ｖｉｎ＝Ｖ１＋２×ｄＶｎ」を印加して出力信号を測定する。

First, when “Vin = V1 + dVn” is applied to the input voltage: Vin and the output signal is measured and regarded as a low level, the sweep of the input voltage: Vin is stopped, and this input voltage: Vin is set to Input threshold voltage. If this input threshold voltage belongs to a preset section, it is determined as “pass”, and if it does not belong, it is determined as “fail”. If the output signal is measured and cannot be regarded as a low level, “Vin = V1 + 2 × dVn” is applied to the next input voltage: Vin and the output signal is measured.

  Hereinafter, if the output signal can be regarded as a low level, the sweep of the input voltage: Vin is stopped, and if the input threshold voltage at this time belongs within the preset section, it is determined as “pass” and belongs If not, it is determined as “fail”. If the output signal cannot be regarded as a low level, the same operation is repeated at most n times until the input voltage: Vin becomes “Vin = V1 + n × dVn = V2”. If the input signal: Vin is “Vin = V2” and the output signal cannot be regarded as low level, it is determined as “fail”.

  Here, “pass” corresponds to an inspection result that satisfies the specifications as designed for the corresponding inspection item, and “fail” corresponds to an inspection result that does not satisfy the specifications as designed. Note that when all the inspection items are determined to be “pass” after the inspection is completed, the semiconductor device to be measured is regarded as a non-defective product, but if the result of the inspection item is determined to be “fail”, then Therefore, the inspection operation is forcibly interrupted when it becomes “fail”, the semiconductor device to be measured is determined to be defective, and the inspection is terminated.

  When the hysteresis comparator circuit is inspected, in order to measure the first threshold voltage: Vth1, the analog input signal input voltage: Vin is swept from V2 to V1 in the range of “V1 <Vth1 <V2”. Thus, the input voltage Vin at which the output signal changes from the low level to the high level is obtained. That is, the voltage dVn shown in (Equation 6) obtained by dividing the input voltage: Vin into n equal sections from the start voltage V2 to the end voltage V1.

ずつ減少させて印加する。求める電圧Ｖｊを（数７）

Decrease each and apply. The required voltage Vj is (Expression 7)

と表すとすると、まず、入力電圧Ｖｉｎに「Ｖｉｎ＝Ｖ２−ｄＶｎ」を印加して、出力信号を測定してハイレベルとみなせたら入力電圧：Ｖｉｎの掃引を中止して、この入力電圧：Ｖｉｎを第１の閾値電圧とする。この第１の閾値電圧があらかじめ設定しておいた区間内に属していれば「パス」と判定して、この入力電圧：Ｖｉｎを第１の閾値電圧とする。属していなければ「フェイル」と判定する。もし出力信号を測定してハイレベルとみなせなかったら次に入力電圧：Ｖｉｎに「Ｖｉｎ＝Ｖ２−２×ｄＶｎ」を印加して出力信号を測定する。

First, “Vin = V2−dVn” is applied to the input voltage Vin, and when the output signal is measured and regarded as a high level, the sweep of the input voltage: Vin is stopped, and this input voltage: Vin Is the first threshold voltage. If the first threshold voltage belongs to a preset section, it is determined as “pass”, and this input voltage: Vin is set as the first threshold voltage. If it does not belong, it is determined as “fail”. If the output signal is measured and cannot be regarded as a high level, then the output signal is measured by applying “Vin = V2-2 × dVn” to the input voltage: Vin.

  Hereinafter, if the output signal can be regarded as a high level, the sweep of the input voltage: Vin is stopped, and if the threshold voltage at this time belongs within the preset section, it is determined as “pass” and must belong. Is determined to be “fail”. If the output signal cannot be regarded as a high level, the same operation is repeated at most n times until the input voltage: Vin becomes “Vin = V2−n × dVn = V1”. If the output signal cannot be regarded as a high level even when “Vin = V1” is input, it is determined as “fail”.

  The method for measuring the second threshold voltage is the same as the method for measuring the first threshold voltage. In order to measure the second threshold voltage: Vth2, the input voltage: Vin is swept from V2 to V3 in a range of “V2 <Vth2 <V3”, and the output voltage changes from the high level to the low level: Find Vin. That is, the voltage dVn shown in (Equation 8) obtained by dividing the input voltage: Vin into n equal sections from the start voltage V2 to the end voltage V3.

ずつ増加させて印加する。求める電圧Ｖｊを（数９）

Apply in increments. The required voltage Vj is (Equation 9)

と表すとすると、まず、入力電圧：Ｖｉｎに「Ｖｉｎ＝Ｖ２＋ｄＶｎ」を印加して、出力信号を測定してローレベルとみなせたら入力電圧：Ｖｉｎの掃引を中止して、この入力電圧：Ｖｉｎを第２の閾値電圧とする。この第２の閾値電圧があらかじめ設定しておいた区間内に属していれば「パス」と判定して、この入力電圧：Ｖｉｎを第２の閾値電圧とする。属していなければ「フェイル」と判定する。もし出力信号を測定してローレベルとみなせなかったら次に入力電圧：Ｖｉｎに「Ｖｉｎ＝Ｖ２＋２×ｄＶｎ」を印加して出力信号を測定する。

First, “Vin = V2 + dVn” is applied to the input voltage: Vin, and when the output signal is measured and regarded as a low level, the sweep of the input voltage: Vin is stopped, and this input voltage: Vin is set. The second threshold voltage is assumed. If the second threshold voltage belongs to a preset section, it is determined as “pass”, and this input voltage: Vin is set as the second threshold voltage. If it does not belong, it is determined as “fail”. If the output signal is measured and cannot be regarded as a low level, then “Vin = V2 + 2 × dVn” is applied to the input voltage: Vin and the output signal is measured.

  Hereinafter, if the output signal can be regarded as a high level, the sweep of the input voltage: Vin is stopped, and if the threshold voltage at this time belongs within the preset section, it is determined as “pass” and must belong. Is determined to be “fail”. If the output signal cannot be regarded as a low level, the same operation is repeated at most n times until the input voltage: Vin becomes “Vin = V2 + n × dVn = V3”. If the output voltage cannot be regarded as a low level even when “Vin = V3” is input, it is determined as “fail”.

  In addition, although the background art mentioned above is a technique which the inventor of the present application has performed in common sense, as a result of investigation of prior art document information, the corresponding technical document cannot be found and is not described.

  However, if it is a circuit inspection method using the above-described conventional comparator, the procedure of applying the voltage n times to the maximum input voltage: Vin and measuring the output signal (Vout) n times is repeated. Inspection time increases. Further, if the output signal does not change from the low level to the high level even if the measurement is repeated n times, it is determined that the characteristic is defective, and the time required for the inspection is wasted. Further, when the circuit level variation of the input signal voltage level of the comparator circuit is large, it is necessary to widen the input voltage section (V2-V1) to be swept, and when the guaranteed voltage accuracy of the voltage level of the input signal is required, the input voltage section Since it is necessary to test by dividing (V2-V1) into smaller sections, the inspection time further increases.

  Further, if the conventional hysteresis comparator circuit inspection method is used, the input voltage is applied n times to the maximum input voltage: Vin for each of the first threshold voltage and the second threshold voltage, and the output signal (Vout) is output n times. The procedure of measuring is repeated, and the inspection time increases. Further, if the output signal does not change from the low level to the high level even if the measurement is repeated n times, it is determined that the characteristic is defective, and the time required for the inspection is wasted. Further, when the circuit variation of the voltage level of the input signal of the comparator is large, it is necessary to widen the input voltage section (V2-V1) to be swept, and when the measurement accuracy of the voltage level of the input signal is further required, the input voltage section (V2- Since it is necessary to perform inspection by dividing V1) into smaller sections, the inspection time further increases. As described above, a problem similar to the inspection of the comparator circuit occurs when the inspection of the hysteresis comparator circuit is performed.

  Recently, as the circuit scale of a single-chip semiconductor device increases, the number of inspection items of the semiconductor device increases and the inspection time becomes longer, which causes an increase in manufacturing cost and a decrease in production efficiency. Yes. If it takes a long time to measure a defective product, the number of semiconductor devices that can be inspected within a certain period of time decreases, resulting in a decrease in production efficiency. Therefore, a method that improves the efficiency of inspection by reducing the frequency of determining defective products in the second half of the inspection and performing in advance items that can predict the inspection results in advance of inspection items that take as much time as possible. It is rare.

  The present invention is directed to solving the problems of the prior art, and provides a method for inspecting a comparator circuit that can improve the efficiency of inspection by increasing the number of semiconductor devices that can be inspected within a predetermined time. The purpose is to provide.

  In order to achieve the above object, an inspection method for a comparator circuit according to claim 1 according to the present invention is such that an input signal satisfying “Vin <Vth” by comparing an input voltage: Vin with a threshold voltage: Vth. In the inspection method of the comparator circuit that outputs a high level when the input signal is “Vin> Vth” and outputs a low level when the input signal is “Vin> Vth”, a first voltage V1 that satisfies “V1 <Vth” is applied as the input signal First step for confirming that the output signal of the comparator is at a high level, and confirming that the output voltage of the comparator is at a low level by applying a second voltage V2 that satisfies “V2> Vth” as an input signal. And an input signal in which the output signal of the comparator changes from the high level to the low level by sweeping the input signal in the range of the first voltage: V1 to the second voltage: V2. And a third step of measuring the voltage level, and, instead of the third step, the input signal is swept in the range of the second voltage: V2 to the first voltage: V1, as described in claim 2. And a fourth step of measuring the voltage level of the input signal in which the output signal of the comparator changes from the low level to the high level.

  The comparator circuit inspection method according to claim 3 compares the input voltage: Vin and the threshold voltage: Vth, and outputs a high level when the input signal is “Vin <Vth”. In the inspection method of the comparator circuit that outputs a low level when the input signal is “Vth”, the output voltage of the comparator becomes low level by applying the second voltage V2 that satisfies “V2> Vth” as the input signal. A first step of confirming, a second step of confirming that the output signal of the comparator is at a high level by applying a first voltage V1 that satisfies “V1 <Vth” as an input signal, and the input signal A third step of measuring the voltage level of the input signal in which the output signal of the comparator changes from the high level to the low level by sweeping in the range of the first voltage: V1 to the second voltage: V2. Further, as described in claim 4, instead of the third step, the input signal is swept in the range of the second voltage: V2 to the first voltage: V1, and the output signal of the comparator is changed from the low level. And a fourth step of measuring the voltage level of the input signal that changes to a high level.

  The comparator circuit inspection method according to claim 5 compares the input voltage: Vin with the first threshold voltage: Vth1 and the second threshold voltage: Vth2, and when the input signal is “Vin <Vth1”. In an inspection method for a comparator circuit that outputs a high level and outputs a low level when the input signal is “Vin> Vth2” and has a hysteresis voltage width “Vth2−Vth1” of the input operation, “V1 <Vth1” The first step of applying the first voltage: V1 and confirming that the output signal of the comparator becomes high level, and the second voltage: V2 of “Vth1 <V2 <Vth2” as the input signal Then, a second step for confirming that the output signal of the comparator becomes high level, and a third voltage V3 that satisfies “V3> Vth2” as an input signal: V3 And a third step of confirming that the output signal of the comparator becomes low level, and a fourth step of confirming that the output signal of the comparator becomes low level by applying the second voltage V2 again as the input signal. The fifth step of further applying the first voltage: V1 as an input signal to confirm that the output signal of the comparator becomes high level, and the input signal from the second voltage: V2 to the third voltage: V3. And a sixth step of measuring the voltage level of the input signal in which the output signal of the comparator changes from the high level to the low level by sweeping in the range of, and the input signal in the range of the second voltage: V2 to the first voltage: V1. And a seventh step of measuring the voltage level of the input signal in which the output signal of the comparator changes from a low level to a high level by sweeping.

  The comparator circuit inspection method according to claim 6 is the case where the input voltage: Vin, the first threshold voltage: Vth1, and the second threshold voltage: Vth2 are compared, and the input signal is “Vin <Vth1”. In an inspection method for a comparator circuit that outputs a high level and outputs a low level when the input signal satisfies “Vin> Vth2” and has a hysteresis voltage width “Vth2−Vth1” of the input operation, “V3> Vth2” The first step of confirming that the output signal of the comparator becomes low level by applying the third voltage: V3, and the second voltage: V2 satisfying “Vth1 <V2 <Vth2” as the input signal Then, the second step of confirming that the output signal of the comparator becomes low level, and the first voltage V1 that satisfies “V1 <Vth1” as the input signal: V1 And a third step of confirming that the output signal of the comparator becomes high level, and a fourth step of confirming that the output signal of the comparator becomes high level by applying the second voltage V2 again as the input signal. And a fifth step of applying a third voltage: V3 as an input signal to confirm that the output signal of the comparator is at a low level, and changing the input signal from the second voltage: V2 to the first voltage: V1. And a sixth step of measuring the voltage level of the input signal in which the output signal of the comparator changes from the low level to the high level by sweeping in the range of, and the input signal in the range of the second voltage: V2 to the third voltage: V3. And a seventh step of measuring the voltage level of the input signal in which the output signal of the comparator changes from a high level to a low level by sweeping.

  According to the method, by confirming that the high level and the low level of the output signal are output in advance, and further by sweeping the input signal that requires inspection time in a certain voltage range to obtain the threshold voltage, In addition, by confirming that the high level and low level of the output signal are output in advance, the input signal that requires the inspection time is swept to obtain the first threshold voltage and the second threshold voltage. Even when a high-level or low-level output is not performed due to a malfunction of the comparator circuit, it can be determined as defective by a test performed before a threshold voltage sweep test that requires a test time, and the time required for the test can be shortened.

  According to the present invention, since it is confirmed that a high level and a low level are output to the output signal in advance, the test for sweeping the input voltage that requires the test time to obtain the threshold value is performed. In the case of “fail” in the inspection, the possibility that the output signal executed in the first half becomes “fail” by the inspection that becomes high level or low level becomes high, and the latter half that requires inspection time. The possibility of detecting “fail” in the threshold test is reduced. Therefore, it is possible to increase the number of semiconductor devices that can be inspected within a certain time and to improve inspection efficiency.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a flowchart showing a comparator circuit inspection method according to the first embodiment of the present invention. As shown in FIG. 1, the comparator circuit inspection method compares the input voltage with a threshold voltage: Vth and measures the voltage level of the input signal having the level change of the output signal to determine pass / fail. Further, in the following drawings, the same step numbers are given to the constituent elements having the same operational effects.

  Now, it is confirmed that the output voltage of the comparator becomes high level by applying the first voltage V1 that satisfies “V1 <Vth” as the input signal (step 101), and the first voltage that satisfies “V2> Vth” as the input signal. 2 voltage: V2 is applied and it is confirmed that the output signal of the comparator becomes a low level (step 102), and the input signal is swept in the range of the first voltage: V1 to the second voltage: V2 to output the comparator output signal. (Step 103) is confirmed to be changed from a high level to a low level.

  First, the process performed in step 101 will be described. As shown in the circuit diagram of FIG. 2A, a reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and the first voltage that satisfies “V1 <Vref” is connected to the inverting input terminal (−). : Apply V1 and measure the output signal (Vout) of the output terminal. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as high level when “+2.5 V <Vout <+5 V”, and “pass” is determined, and when “Vout <+2.5 V”, the high level Since it cannot be regarded as an output, it is determined as “fail”.

  Next, the process performed at step 102 will be described. As shown in the circuit diagram of FIG. 2B, a reference voltage: Vref serving as a threshold is connected to the non-inverting input terminal (+), and the second voltage satisfying “V2> Vref” is connected to the inverting input terminal (−). : Apply V2 and measure the output signal (Vout) at the output terminal. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as a low level when “+0 V <Vout <+2.5 V”, and “pass” is determined, and when “Vout> +2.5 V”, the low level Since it cannot be regarded as an output, it is determined as “fail”.

  In addition, the process performed in step 103 will be described. As shown in the circuit diagram of FIG. 2C, the reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and the voltage Vj shown in (Equation 10) is connected to the inverting input terminal (−).

となる入力電圧の範囲内の電圧をｊ＝１，２，…ｎまで順次印加して、出力端子の出力信号（Ｖｏｕｔ）を測定する。コンパレータ１の電源電圧を＋５Ｖとすると、「＋０Ｖ＜Ｖｏｕｔ＜＋２．５Ｖ」のとき出力信号をローレベルとみなして「パス」と判定し、「Ｖｏｕｔ＞＋２．５Ｖ」のときはローレベルの出力とみなせないので「フェイル」と判定する。

... Are sequentially applied until j = 1, 2,..., And the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is + 5V, the output signal is regarded as low level when “+ 0V <Vout <+ 2.5V”, and “pass” is determined, and when “Vout> + 2.5V”, the low level output Since it cannot be regarded as “fail”, it is determined as “fail”.

  When all of Step 101, Step 102, and Step 103 in the first embodiment are determined to be “pass”, the inspection of the comparator circuit is finished and determined to be a non-defective product, and thereafter, the circuit inspection other than the comparator is continued. Or, the inspection is finished. If it is determined as “Fail” in any step, it is determined as defective and the inspection is terminated.

  FIG. 3 is a flowchart showing a comparator circuit inspection method according to the second embodiment of the present invention. As shown in FIG. 3, the comparator circuit inspection method applies a first voltage V1 that satisfies “V1 <Vth” as an input signal and confirms that the output signal of the comparator becomes high level (step 101). By applying a second voltage: V2 that satisfies “V2> Vth” as an input signal and confirming that the output signal of the comparator becomes a low level (step 102), the input signal is changed from the second voltage: V2 to the first voltage: Sweeping in the range of V1 confirms that the output signal of the comparator changes from low level to high level (step 104).

  Here, the contents of the steps performed in step 101 and step 102 are the same as those in step 101 and step 102 described in the first embodiment.

  The process performed at step 104 will be described. As shown in the circuit diagram of FIG. 2C, the reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and the voltage Vj shown in (Expression 11) is connected to the inverting input terminal (−).

となる入力電圧の範囲内の電圧をｊ＝１，２，…ｎまで順次印加して、出力端子の出力信号（Ｖｏｕｔ）を測定する。コンパレータの電源電圧を＋５Ｖとすると、「＋２．５Ｖ＜Ｖｏｕｔ＜＋５Ｖ」のとき出力信号をハイレベルとみなして「パス」と判定し、「Ｖｏｕｔ＜＋２．５Ｖ」のときはハイレベルの出力とみなせないので「フェイル」と判定する。

... Are sequentially applied until j = 1, 2,..., And the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator is + 5V, the output signal is regarded as high level when “+ 2.5V <Vout <+ 5V”, and “pass” is determined, and when “Vout <+ 2.5V”, high level output is determined. Since it cannot be considered, it is determined as “fail”.

  When all of Step 101, Step 102, and Step 104 in the second embodiment are determined to be “pass”, the inspection of the comparator circuit is finished and determined to be a non-defective product, and then the circuit inspection other than the comparator is continued. Or, the inspection is finished. If it is determined as “Fail” in any step, it is determined as defective and the inspection is terminated.

  FIG. 4 is a flowchart showing a comparator circuit inspection method according to the third embodiment of the present invention. As shown in FIG. 4, the comparator circuit inspection method applies a second voltage: V2 that satisfies “V2> Vth” as an input signal, and confirms that the output signal of the comparator is at a low level (step 102). A first voltage V1 that satisfies “V1 <Vth” is applied as an input signal to confirm that the output signal of the comparator becomes high level (step 101), and the input signal is changed from the first voltage V1 to the second voltage: Sweeping within the range of V2 confirms that the output signal of the comparator changes from high level to low level (step 103).

  Note that the content of the process performed in each step in the present third embodiment is the same as each step described in the first embodiment.

  When all of Step 101, Step 102, and Step 103 in the third embodiment are determined to be “pass”, the inspection of the comparator circuit is finished to determine that it is a non-defective product, and thereafter the circuit inspection other than the comparator is continued. Or, the inspection is finished. If it is determined as “Fail” in any step, it is determined as defective and the inspection is terminated.

  FIG. 5 is a flowchart showing a method for inspecting a comparator circuit according to the fourth embodiment of the present invention. As shown in FIG. 6, the comparator circuit inspection method applies a second voltage V2 that satisfies “V2> Vth” as an input signal and confirms that the output signal of the comparator is at a low level (step 102). The first voltage V1 that satisfies “V1 <Vth” is applied as an input signal to confirm that the output signal of the comparator becomes high level (step 101), and the input signal is changed from the second voltage V2 to the first voltage: Sweeping in the range of V1 confirms that the output signal of the comparator changes from low level to high level (step 104).

  Note that the contents of the steps performed in step 101 and step 102 in the fourth embodiment are the same as those in steps 101 and 102 in the description of the first embodiment, and the contents of the steps performed in step 104 are as follows. This is the same as step 104 in the description of the second embodiment.

  When all of Step 101, Step 102, and Step 104 in the fourth embodiment are determined to be “pass”, the inspection of the comparator circuit is finished and determined to be a non-defective product, and thereafter, the circuit inspection other than the comparator is continued. Or, the inspection is finished. If it is determined as “Fail” in any step, it is determined as defective and the inspection is terminated.

  FIG. 6 is a flowchart showing a method for inspecting the hysteresis comparator circuit according to the fifth embodiment of the present invention. As shown in FIG. 6, the hysteresis comparator circuit inspection method applies the first voltage V1 as “V1 <Vth1” as an input signal and confirms that the output signal of the comparator becomes high level (step 105). Then, it is confirmed that the output voltage of the comparator becomes high level by applying the second voltage V2 that satisfies “Vth1 <V2 <Vth2” as the input signal (step 106), and “V3> Vth2” as the input signal. The third voltage: V3 is applied and it is confirmed that the output signal of the comparator becomes low level (step 107), and the second voltage: V2 is applied as the input signal again and the output signal of the comparator becomes low level. (Step 108), the first voltage: V1 is applied as an input signal, and the output signal of the comparator becomes high level. To verify that (step 109).

  Thereafter, the input signal is swept in the range of the second voltage: V2 to the third voltage: V3 to confirm that the output signal of the comparator changes from the high level to the low level (step 110). Sweeping in the range of 2 voltage: V2 to 1st voltage: V1 confirms that the output signal of the comparator changes from low level to high level (step 111).

  The process performed at step 105 will be described. As shown in the circuit diagram of FIG. 7A, the reference voltage: Vref is connected to the non-inverting input terminal (+), and the first voltage V1 that satisfies “V1 <Vth1” is applied to the inverting input terminal (−). Then, the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as high level when “+2.5 V <Vout <+5 V”, and “pass” is determined, and when “Vout <+2.5 V”, the output is high level. Since it cannot be regarded as “fail”, it is determined as “fail”.

  The process performed at step 106 will be described. As shown in the circuit diagram of FIG. 7B, a reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and the second inverting input terminal (−) is “Vth1 <V2 <Vth2”. Voltage: V2 is applied, and the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as high level when “+2.5 V <Vout <+5 V”, and “pass” is determined, and when “Vout <+2.5 V”, the output is high level. Since it cannot be regarded as “fail”, it is determined as “fail”.

  The process performed in step 107 will be described. As shown in the circuit diagram of FIG. 7C, a reference voltage: Vref serving as a threshold is connected to the non-inverting input terminal (+), and a third voltage satisfying “V3> Vth2” is connected to the inverting input terminal (−). V3 is applied and the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as low level when “Vout <+2.5 V”, and “pass” is determined, and when “+2.5 V <Vout <+5 V”, the output is low level. Since it cannot be regarded as “fail”, it is determined as “fail”.

  The process performed at step 108 will be described. As shown in the circuit diagram of FIG. 7D, a reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and the second inverting input terminal (−) is “Vth1 <V2 <Vth2”. Voltage: V2 is applied, and the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as low level when “Vout <+2.5 V”, and “pass” is determined, and when “+2.5 V <Vout <+5 V”, the output is low level. Since it cannot be regarded as “fail”, it is determined as “fail”.

  The process performed at step 109 will be described. As shown in the circuit diagram of FIG. 7E, a reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and a first voltage satisfying “V1 <Vth1” is connected to the inverting input terminal (−). V1 is applied and the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as high level when “+2.5 V <Vout <+5 V”, and “pass” is determined, and when “Vout <+2.5 V”, the output is high level. Since it cannot be regarded as “fail”, it is determined as “fail”.

  The process performed at step 110 will be described. As shown in the circuit diagram of FIG. 7F, the reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and the voltage Vj shown in (Equation 12) is connected to the inverting input terminal (−).

となる入力電圧の範囲内の電圧をｊ＝１，２，…ｎまで順次印加して、出力端子の出力信号（Ｖｏｕｔ）を測定する。コンパレータ１の電源電圧を＋５Ｖとすると、「＋０Ｖ＜Ｖｏｕｔ＜＋２．５Ｖ」のとき出力信号をローレベルとみなして「パス」と判定し、「Ｖｏｕｔ＞＋２．５Ｖ」のときはローレベルの出力とみなせないので「フェイル」と判定する。

... Are sequentially applied until j = 1, 2,..., And the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is + 5V, the output signal is regarded as low level when “+ 0V <Vout <+ 2.5V”, and “pass” is determined, and when “Vout> + 2.5V”, the low level output Since it cannot be regarded as “fail”, it is determined as “fail”.

  The process performed at step 111 will be described. As shown in the circuit diagram of FIG. 7G, the reference voltage Vref serving as a threshold is connected to the non-inverting input terminal (+), and the voltage Vj shown in (Equation 13) is connected to the inverting input terminal (−). '

となる入力電圧の範囲内の電圧をｊ＝１，２，…ｎまで順次印加して、出力端子の出力信号（Ｖｏｕｔ）を測定する。コンパレータ１の電源電圧を＋５Ｖとすると、「＋２．５Ｖ＜Ｖｏｕｔ＜＋５Ｖ」のとき出力信号をハイレベルとみなして「パス」と判定し、「Ｖｏｕｔ＜＋２．５Ｖ」のときはハイレベルの出力とみなせないので「フェイル」と判定する。

... Are sequentially applied until j = 1, 2,..., And the output signal (Vout) at the output terminal is measured. Assuming that the power supply voltage of the comparator 1 is +5 V, the output signal is regarded as high level when “+2.5 V <Vout <+5 V”, and “pass” is determined, and when “Vout <+2.5 V”, high level output Since it cannot be regarded as “fail”, it is determined as “fail”.

  When all of Step 105, Step 106, Step 107, Step 108, Step 109, Step 110, and Step 111 in the fifth embodiment are determined to be “pass”, the inspection of the hysteresis comparator circuit is finished and it is determined as a non-defective product. Thereafter, the circuit inspection other than the comparator is continued or the inspection is terminated. If it is determined as “Fail” in any step, it is determined as defective and the inspection is terminated.

  FIG. 8 is a flowchart showing a method for inspecting the hysteresis comparator circuit according to the sixth embodiment of the present invention. As shown in FIG. 8, in the hysteresis comparator circuit inspection method, it is confirmed that the output voltage of the comparator becomes low level by applying the third voltage V3 that satisfies “V3> Vth2” as the input signal (step 107). Then, it is confirmed that the output signal of the comparator becomes low level by applying the second voltage V2 that satisfies “Vth1 <V2 <Vth2” as the input signal (step 108), and “V1 <Vth1” as the input signal. First voltage: V1 is applied to confirm that the output signal of the comparator becomes high level (step 105), and the second voltage: V2 is applied as the input signal again, and the output signal of the comparator becomes high level. (Step 106), the third voltage: V3 is applied as an input signal, and the output signal of the comparator becomes low level. To verify that (step 107).

  Thereafter, the input signal is swept in the range of the second voltage: V2 to the first voltage: V1 to confirm that the output signal of the comparator changes from the low level to the high level (step 111). Sweeping is performed in the range of 2 voltage: V2 to 3rd voltage: V3 to confirm that the output signal of the comparator changes from high level to low level (step 110).

  The contents of the steps performed in Step 105, Step 106, Step 107, Step 108, Step 110, and Step 111 in the sixth embodiment are the same as those in Step 105, Step 106, and Step in the description of Embodiment 5 described above. 107, step 108, step 110, and step 111 are the same.

  When it is determined as “pass” in all of Step 105, Step 106, Step 107, Step 108, Step 110, and Step 111 in the sixth embodiment, the inspection of the hysteresis comparator circuit is finished and determined as a non-defective product. Subsequently, a circuit inspection other than the comparator is performed, or the inspection is terminated. If it is determined as “Fail” in any step, it is determined as defective and the inspection is terminated.

  It should be noted that the present invention is not limited to the above-described embodiments, and several modifications can be made within the scope of the gist of the present invention. For example, the present invention can be similarly implemented in a non-inverting comparison circuit instead of the inverting comparison circuit described above.

  The inspection method for the comparator circuit according to the present invention performs the inspection for obtaining the threshold value by sweeping the input voltage that requires the inspection time after confirming that the high level and the low level are output to the output signal in advance. Even if the comparator circuit has a defect and the test results in a “fail” test, the possibility that the output signal executed in the first half will be “failed” by the test that becomes high level or low level is increased, and the test time is reduced. Semiconductor device with built-in comparator circuit or hysteresis comparator circuit that can reduce the possibility of detecting "fail" in the required second half threshold test, increase the number of semiconductor devices that can be inspected within a certain period of time, and improve inspection efficiency It is useful for the inspection method according to the inspection procedure.

The flowchart which showed the inspection method of the comparator circuit in Embodiment 1 of this invention In the first embodiment, (a) is the process of step 101, (b) is the process of step 102, (c) is a circuit diagram for explaining the processes of step 103 and step 104. The flowchart which showed the inspection method of the comparator circuit in Embodiment 2 of this invention The flowchart which showed the inspection method of the comparator circuit in Embodiment 3 of this invention The flowchart which showed the inspection method of the comparator circuit in Embodiment 4 of this invention The flowchart which showed the inspection method of the comparator circuit in Embodiment 5 of this invention In the sixth embodiment, (a) is the process of step 105, (b) is the process of step 106, (c) is the process of step 107, (d) is the process of step 108, and (e) is the process of step 109. (F) is the process of step 110, (g) is a circuit diagram for explaining the process of step 111 The flowchart which showed the inspection method of the comparator circuit in Embodiment 6 of this invention Circuit diagram showing an example of an inverting comparison circuit using a comparator Circuit diagram showing an example of an inverting comparator circuit as a hysteresis comparator circuit

Explanation of symbols

1 Comparator

Claims (6)

Comparator circuit that compares input voltage: Vin and threshold voltage: Vth and outputs a high level when the input signal is “Vin <Vth” and outputs a low level when the input signal is “Vin> Vth” In the inspection method of
A first step of applying a first voltage V1 that satisfies “V1 <Vth” as the input signal and confirming that the output signal of the comparator is at a high level;
A second step of applying a second voltage V2 that satisfies “V2> Vth” as the input signal and confirming that the output signal of the comparator is at a low level;
The input signal is swept in the range of the first voltage: V1 to the second voltage: V2, and a voltage level of the input signal at which the output signal of the comparator changes from a high level to a low level is measured. And a comparator circuit inspection method.   Instead of the third step, the input signal is swept in the range of the second voltage: V2 to the first voltage: V1, and the output signal of the comparator changes from a low level to a high level. The comparator circuit inspection method according to claim 1, further comprising a fourth step of measuring a voltage level. Comparator circuit that compares input voltage: Vin and threshold voltage: Vth and outputs a high level when the input signal is “Vin <Vth” and outputs a low level when the input signal is “Vin> Vth” In the inspection method of
A first step of applying a second voltage V2 that satisfies “V2> Vth” as the input signal and confirming that the output signal of the comparator is at a low level;
A second step of applying the first voltage V1 that satisfies “V1 <Vth” as the input signal and confirming that the output signal of the comparator is at a high level;
A third step of measuring the voltage level of the input signal at which the output signal of the comparator changes from a high level to a low level by sweeping the input signal in the range of the first voltage: V1 to the second voltage: V2. A method for inspecting a comparator circuit, comprising:   Instead of the third step, the input signal is swept in the range of the second voltage: V2 to the first voltage: V1, and the output signal of the comparator changes from a low level to a high level. 4. The comparator circuit inspection method according to claim 3, further comprising a fourth step of measuring a voltage level. The input voltage: Vin is compared with the first threshold voltage: Vth1 and the second threshold voltage: Vth2, and when the input signal is “Vin <Vth1”, a high level is output and the input signal is “Vin> Vth2”. In the inspection method of the comparator circuit that outputs a low level at the time of and has a hysteresis voltage width “Vth2−Vth1” of the input operation,
A first step of applying a first voltage V1 that satisfies “V1 <Vth1” as the input signal and confirming that the output signal of the comparator is at a high level;
A second step of applying a second voltage V2 that satisfies “Vth1 <V2 <Vth2” as the input signal and confirming that the output signal of the comparator is at a high level;
A third step of applying a third voltage V3 that satisfies “V3> Vth2” as the input signal and confirming that the output signal of the comparator is at a low level;
A fourth step of reapplying the second voltage: V2 as the input signal and confirming that the output signal of the comparator is at a low level;
A fifth step of applying the first voltage: V1 as the input signal and confirming that the output signal of the comparator is at a high level;
A sixth step of measuring the voltage level of the input signal at which the output signal of the comparator changes from a high level to a low level by sweeping the input signal in the range of the second voltage: V2 to the third voltage: V3. When,
A seventh step of measuring the voltage level of the input signal at which the output signal of the comparator changes from a low level to a high level by sweeping the input signal in the range of the second voltage: V2 to the first voltage: V1. A method for inspecting a comparator circuit, comprising: The input voltage: Vin is compared with the first threshold voltage: Vth1 and the second threshold voltage: Vth2, and when the input signal is “Vin <Vth1”, a high level is output and the input signal is “Vin> Vth2”. In the inspection method of the comparator circuit that outputs a low level at the time of and has a hysteresis voltage width “Vth2−Vth1” of the input operation,
Applying a third voltage V3 that satisfies “V3> Vth2” as the input signal and confirming that the output signal of the comparator is at a low level;
A second step of applying a second voltage V2 that satisfies “Vth1 <V2 <Vth2” as the input signal and confirming that the output signal of the comparator is at a low level;
A third step of applying the first voltage V1 that satisfies “V1 <Vth1” as the input signal and confirming that the output signal of the comparator is at a high level;
A fourth step of reapplying the second voltage: V2 as the input signal and confirming that the output signal of the comparator is at a high level;
A fifth step of further applying the third voltage: V3 as the input signal to confirm that the output signal of the comparator is at a low level;
A sixth step of measuring the voltage level of the input signal in which the output signal of the comparator changes from the low level to the high level by sweeping the input signal in the range of the second voltage: V2 to the first voltage: V1; ,
A seventh step of measuring the voltage level of the input signal in which the output signal of the comparator changes from a high level to a low level by sweeping the input signal in the range of the second voltage: V2 to the third voltage: V3; A method for inspecting a comparator circuit, comprising:

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