JP2006229017A - Manufacturing method of thick-film electronic component - Google Patents

Manufacturing method of thick-film electronic component Download PDF

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JP2006229017A
JP2006229017A JP2005041793A JP2005041793A JP2006229017A JP 2006229017 A JP2006229017 A JP 2006229017A JP 2005041793 A JP2005041793 A JP 2005041793A JP 2005041793 A JP2005041793 A JP 2005041793A JP 2006229017 A JP2006229017 A JP 2006229017A
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conductor
film
mask
conductor layer
layer
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Takashi Ishikawa
貴士 石川
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Toko Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a thick-film electronic component for reducing a man day greatly by the decrease in the number of times of curing treatment of an insulating film, dispensing with an adhesive layer other than a conductive material and forming a reliable insulating film, while enabling high thick film conductor formation of a high aspect ratio which cannot be formed by a printing method. <P>SOLUTION: A conductive base film is formed on an insulating substrate. A first mask is formed in the surface of the conductive base film by using a predetermined pattern. The first conductive layer of the same thickness as a mask is formed in the surface of the conductive base film which is not covered with the mask. The second mask is formed in a part of the first conductive layer and the surface of the first mask. The second conductive layer is formed on the first conductive layer in which the second mask is not formed. The first and second masks are removed, the exposed portion of the conductive base film is removed, and the insulating substrate surface and the surface of the first conductive layer are covered with an insulating film so that a second conductive pattern may be formed on the insulating film. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、厚膜インダクタ等の導体パターンを多層に形成する厚膜電子部品の製造方法に係るもので、特に多層の導体の層間接続のための導体層の形成方法に関するものである。   The present invention relates to a method for manufacturing a thick film electronic component in which a conductor pattern such as a thick film inductor is formed in multiple layers, and more particularly to a method for forming a conductor layer for interlayer connection of multilayer conductors.

シリコン、ガラス、アルミナといった絶縁基板に導体(Cu、Au、Ni、Al、Ag、Al−Si、Al−Cu等)を印刷工法やめっき工法を用いて厚幕の微細導体パターンとして形成し、絶縁膜を介して他の導体パターン層と接続するインダクタ等の電子部品が利用されている。微細な導体パターンを得て小型で精度の高い電子部品を得ることを主眼としており、インダクタや多層配線基板等がこれらの方法を用いて製造されている。印刷工法やめっき工法を用いて微細パターンを形成する場合に、層間絶縁膜にポリイミド系またはその他の有機絶縁材料(ポリベンズオキサゾール、ベンゾシクロブテン等)の材料を使用したとき、次のような問題を発生する。   Conductor (Cu, Au, Ni, Al, Ag, Al-Si, Al-Cu, etc.) is formed on an insulating substrate such as silicon, glass, and alumina as a fine conductor pattern with thick curtains using a printing method or plating method. An electronic component such as an inductor connected to another conductor pattern layer through a film is used. The main objective is to obtain a small and highly accurate electronic component by obtaining a fine conductor pattern, and inductors, multilayer wiring boards, and the like are manufactured using these methods. When forming a fine pattern using the printing method or plating method, the following problems occur when polyimide or other organic insulating materials (polybenzoxazole, benzocyclobutene, etc.) are used for the interlayer insulating film Is generated.

印刷工法の問題は次のようなものである。第1に、印刷工法では厚膜の導体形成に限界がある。また、絶縁層としてポリイミドあるいは上記のような有機絶縁材料を使用すると、感光性で厚膜としたときの形状やドライエッチングで開口を形成したときの形状が悪くなり、膜厚に制限があるといった問題である。   The problems of the printing method are as follows. First, the printing method has limitations in forming thick film conductors. In addition, when polyimide or an organic insulating material as described above is used as the insulating layer, the shape when it is made photosensitive and thick or when the opening is formed by dry etching is deteriorated, and the film thickness is limited. It is a problem.

めっき工法には以下のような問題がある。ポリイミドまたはその他の有機絶縁材料とめっきをするための下地電極との密着性を上げるために、通常接着層として別の金属(Cr、Ti、TiW、Ta/TaNなど)を必要とする。そのため、導体層に別の金属を含むことになるので、導体抵抗が増加する要因となる。また、ポリイミドその他の上記の有機絶縁材料において、感光性、非感光性があるがいずれにおいても厚膜にした時の微細パターンの形成は困難である。一般的にポリイミド系の材料の硬化には時間を要するので、電極間の埋め込み工程、厚膜形成工程を繰り返す工法では生産性の低下は免れない。
特開平5−343262号公報 特開2000−323656号公報 特開2003−249408号公報
The plating method has the following problems. In order to increase the adhesion between the polyimide or other organic insulating material and the base electrode for plating, another metal (Cr, Ti, TiW, Ta / TaN, etc.) is usually required as an adhesive layer. Therefore, since another metal is contained in the conductor layer, the conductor resistance increases. In addition, polyimide and other organic insulating materials described above are photosensitive and non-photosensitive, but it is difficult to form a fine pattern when they are thickened. In general, since it takes time to cure a polyimide-based material, productivity reduction is unavoidable in a method of repeating the embedding process between the electrodes and the thick film forming process.
JP-A-5-343262 JP 2000-323656 A Japanese Patent Laid-Open No. 2003-249408

本発明は、印刷工法では形成できない、アスペクト比の高い導体形成を可能にするとともに、ポリイミド系およびその他の有機絶縁材料(ポリベンズオキサゾール、ベンゾシクロブテン等)のパターン形成方法に影響されないで信頼性の高い絶縁膜を形成するものである。さらに、導体材料以外の接着層を不要とし、絶縁膜の硬化処理回数を減らして工数を大幅に低減する厚膜電子部品の製造方法を提供するものである。   The present invention makes it possible to form a conductor with a high aspect ratio, which cannot be formed by a printing method, and is reliable without being affected by the pattern formation method of polyimide and other organic insulating materials (polybenzoxazole, benzocyclobutene, etc.). An insulating film having a high thickness is formed. Furthermore, the present invention provides a method of manufacturing a thick film electronic component that eliminates the need for an adhesive layer other than a conductor material, reduces the number of times of curing the insulating film, and greatly reduces the number of steps.

本発明は、層間接続用の導体層の形成方法を改良することによって、上記の課題を提供するものである。すなわち、絶縁基板上に導体パターンを形成し、絶縁層に形成された開口を介して接続される導体パターンをその絶縁膜上に形成する厚膜電子部品の製造方法において、絶縁基板上に下地導体膜を形成し、その下地導体膜の表面に所定のパターンで第1のマスクを形成し、そのマスクで覆われない下地導体層の表面にマスクと同じ厚さの第1の導体層を形成し、第1の導体層の一部と第1のマスクの表面に第2のマスクを形成し、第2のマスクの形成されない導体第1の導体層上に第2の導体層を形成し、第1および第2のマスクを除去し、下地導体膜の露出部分を除去し、絶縁基板表面と第1の導体層の表面を絶縁膜で覆い、第2の導体パターンを絶縁膜上に形成することに特徴を有するものである。   This invention provides said subject by improving the formation method of the conductor layer for interlayer connection. That is, in a method for manufacturing a thick film electronic component in which a conductor pattern is formed on an insulating substrate and a conductor pattern connected through an opening formed in the insulating layer is formed on the insulating film, the underlying conductor is formed on the insulating substrate. A film is formed, a first mask is formed in a predetermined pattern on the surface of the underlying conductor film, and a first conductor layer having the same thickness as the mask is formed on the surface of the underlying conductor layer not covered with the mask. Forming a second mask on a portion of the first conductor layer and the surface of the first mask, forming a second conductor layer on the conductor first conductor layer on which the second mask is not formed, Remove the first and second masks, remove the exposed portion of the underlying conductor film, cover the surface of the insulating substrate and the surface of the first conductor layer with an insulating film, and form the second conductor pattern on the insulating film. It has the characteristics.

本発明の効果は以下のとおりである。
1層目のめっきパターンを形成後にレジストを除去しないで2層目のレジストを塗布してパターンを形成するので、2層目までのめっきが可能となり、段違いや特殊構造のめっきによる導体形成も可能となる。
1層目のめっき形成後そのまま2層目のめっき形成が可能になるので、密着性を上げるための中間の金属膜が不要となり、導体抵抗を上げることなくコンタクト用のビアを形成できる。
2層目にレジストやドライフィルムレジストを使用することで2層目のめっきの厚みの制御が容易となり、数μmから100μm程度までの導体形成が可能となる。
2層目までの導体形成を行った後に絶縁膜を形成するので、ポリイミドなどの有機絶縁材料の硬化処理回数を減らすことができる。
The effects of the present invention are as follows.
Since the pattern is formed by applying the second layer resist without removing the resist after forming the first layer plating pattern, plating up to the second layer is possible, and conductors can be formed by plating with different levels or special structures. It becomes.
Since the second layer can be formed as it is after the first layer is formed, an intermediate metal film for improving adhesion is not necessary, and a contact via can be formed without increasing the conductor resistance.
By using a resist or dry film resist for the second layer, the thickness of the second layer can be easily controlled, and a conductor can be formed from several μm to about 100 μm.
Since the insulating film is formed after the conductor formation up to the second layer is performed, the number of times of curing the organic insulating material such as polyimide can be reduced.

本発明の主要な工程を整理すると以下のようになる。
下地導体層の形成
第1のマスク(レジスト)の形成
第1の導体層のめっき(厚膜形成)
第2のマスク(レジスト)の形成
第2の導体層のめっき(厚膜形成)
マスク(レジスト)の除去
絶縁膜の形成
The main steps of the present invention are summarized as follows.
Formation of underlying conductor layer Formation of first mask (resist) Plating of first conductor layer (thick film formation)
Formation of second mask (resist) Plating of second conductor layer (thick film formation)
Mask (resist) removal Insulation film formation

本発明の実施例を説明する前に、対比のために、従来の一般的な工法を図5と図6を用いて示す。絶縁基板11の表面にスパッタ等の方法によってCu/Tiなどによる下地導体12を形成する(図5A)。下地導体の表面にレジストを塗布し、導体パターンに応じてレジストの一部を除去して第1のマスク13を形成する(図5B)。電解めっきによって下地導体層の表面に第1の導体層14を形成する(図5C).続いてレジストを除去し(図5D),露出した下地電極をエッチングして除去する(図5E).これによって、第1の導体パターンが完成する。   Before describing the embodiment of the present invention, a conventional general construction method will be described with reference to FIGS. 5 and 6 for comparison. A base conductor 12 made of Cu / Ti or the like is formed on the surface of the insulating substrate 11 by a method such as sputtering (FIG. 5A). A resist is applied to the surface of the underlying conductor, and a part of the resist is removed according to the conductor pattern to form a first mask 13 (FIG. 5B). The first conductor layer 14 is formed on the surface of the underlying conductor layer by electrolytic plating (FIG. 5C). Subsequently, the resist is removed (FIG. 5D), and the exposed underlying electrode is etched away (FIG. 5E). Thus, the first conductor pattern is completed.

次に、絶縁層を形成するが、絶縁基板11と第1の導体層14を覆うポリイミド等の有機絶縁膜15を塗布する(図5F)。 有機絶縁膜15を研磨またはエッチングによって第1の導体層14の表面が露出させる(図5G)。これによって第1層目の導体パターンと絶縁膜が形成された事になる。   Next, an insulating layer is formed, and an organic insulating film 15 such as polyimide is applied to cover the insulating substrate 11 and the first conductor layer 14 (FIG. 5F). The surface of the first conductor layer 14 is exposed by polishing or etching the organic insulating film 15 (FIG. 5G). As a result, the first-layer conductor pattern and the insulating film are formed.

次に第2層目の形成になるが、全体に第2の絶縁層16を形成し、接続用の第2の導体パターンを形成する部分のみ開口を形成する(図6H)。その表面全体にCu/Ti等の下地電極層17を形成する(図6I)。これは、ポリイミド等の有機絶縁膜とめっき導体との密着性を改善するための中間層となるものである。その表面に、導体層を形成する部分を除いてレジストパターン18を形成し(図6J)、電解めっきによって第2の導体パターン19を形成する(図6K)。さらにレジストパターンを除去し(図6L)、下地電極層を除去して第2の導体層が完成する(図6M)。この表面に同様な工程を繰り返せば多層の導体パターンが形成できる。   Next, the second layer is formed. The second insulating layer 16 is formed over the entire surface, and an opening is formed only in a portion where the second conductive pattern for connection is formed (FIG. 6H). A base electrode layer 17 such as Cu / Ti is formed on the entire surface (FIG. 6I). This is an intermediate layer for improving the adhesion between the organic insulating film such as polyimide and the plated conductor. A resist pattern 18 is formed on the surface, excluding a portion where a conductor layer is to be formed (FIG. 6J), and a second conductor pattern 19 is formed by electrolytic plating (FIG. 6K). Further, the resist pattern is removed (FIG. 6L), and the base electrode layer is removed to complete the second conductor layer (FIG. 6M). By repeating the same process on this surface, a multilayer conductor pattern can be formed.

次に本発明の実施例を図1にしたがって説明する。図5Cに示した工程までは従来と同じで、第1層の導体層を形成するためのマスク13と電解めっきによって形成された第1の導体層14が形成された絶縁基板の表面に、第2のマスク21を形成する(図1A).この第2のマスク21は、第2の導体層を形成する部分のみに開口が形成されている。この状態で電解めっきを行うとマスクのない第1の導体層の表面に導体がめっきされてその部分のみが厚くなる(図1B)。ここで第1のレジスト膜(マスク)と第2のレジスト膜(マスク)とを同時に除去して導体層のみを残す(図1C).次に下地電極膜をエッチングして除去する(図1D)。その表面全体をポリイミド等の絶縁膜で覆い(図1E),研磨あるいはエッチングで第2の導体層の表面と絶縁膜の表面を一致させる(図1G)。これによって、絶縁膜で覆われた導体パターンと絶縁層上の導体パターンと接続するための導体が形成されたことになる。   Next, an embodiment of the present invention will be described with reference to FIG. The process up to the step shown in FIG. 5C is the same as the prior art. On the surface of the insulating substrate on which the mask 13 for forming the first conductor layer and the first conductor layer 14 formed by electrolytic plating are formed, The second mask 21 is formed (FIG. 1A). The second mask 21 has an opening only in a portion where the second conductor layer is formed. When electrolytic plating is performed in this state, a conductor is plated on the surface of the first conductor layer without a mask, and only that portion becomes thick (FIG. 1B). Here, the first resist film (mask) and the second resist film (mask) are simultaneously removed to leave only the conductor layer (FIG. 1C). Next, the base electrode film is etched away (FIG. 1D). . The entire surface is covered with an insulating film such as polyimide (FIG. 1E), and the surface of the second conductor layer is matched with the surface of the insulating film by polishing or etching (FIG. 1G). As a result, a conductor for connecting the conductor pattern covered with the insulating film and the conductor pattern on the insulating layer is formed.

なお、本発明は上記の例に限られるものではなく、図2のように、2層目の導体層の形成にレジストやドライフィルムを適宜選択することのよって、数μmから100μm程度まで任意に選択することができる。また、図3に示したように、2層目のレジストパターンの形成時に1層目のレジストパターンを形成して、2層目の導体形成時に1層目の導体パターンの一部を形成することもできる。さらに、図4に示したように1層目に形成した導体の壁面にもめっきによって導体を形成することもできる。   The present invention is not limited to the above example. As shown in FIG. 2, by appropriately selecting a resist or a dry film for forming the second conductor layer, it is arbitrarily selected from several μm to about 100 μm. You can choose. Further, as shown in FIG. 3, the first resist pattern is formed when the second resist pattern is formed, and a part of the first conductor pattern is formed when the second conductor is formed. You can also. Furthermore, as shown in FIG. 4, the conductor can also be formed on the wall surface of the conductor formed in the first layer by plating.

本発明は、インダクタ等の受動素子の製造だけでなく、多層基板等の回路基板にも利用でき、また複合電子部品の製造にも応用できる。   The present invention can be used not only for the production of passive elements such as inductors, but also for circuit boards such as multilayer boards, and also for the production of composite electronic components.

本発明の実施例を示す正面断面図Front sectional view showing an embodiment of the present invention 本発明の他の実施例を示す正面断面図Front sectional view showing another embodiment of the present invention 本発明の他の実施例を示す正面断面図Front sectional view showing another embodiment of the present invention 本発明の他の実施例を示す正面断面図Front sectional view showing another embodiment of the present invention 従来の厚膜電子部品の製造方法を示す正面断面図Front sectional view showing a method of manufacturing a conventional thick film electronic component 従来の厚膜電子部品の製造方法を示す正面断面図Front sectional view showing a method of manufacturing a conventional thick film electronic component

符号の説明Explanation of symbols

11:絶縁基板
12:下地導体層
13:第1のマスク
14:第1の導体層
18、21:第2のマスク
19:第2の導体層
16、22:絶縁膜
11: Insulating substrate
12: Underlying conductor layer
13: First mask
14: First conductor layer
18, 21: Second mask
19: Second conductor layer
16, 22: Insulating film

Claims (5)

絶縁基板上に導体パターンを形成し、絶縁層に形成された開口を介して接続される導体パターンをその絶縁膜上に形成する厚膜電子部品の製造方法において、
絶縁基板上に下地導体膜を形成し、その下地導体膜の表面に所定のパターンで第1のマスクを形成し、そのマスクで覆われない下地導体層の表面にマスクと同じ厚さの第1の導体層を形成し、
第1の導体層の一部と第1のマスクの表面に第2のマスクを形成し、第2のマスクの形成されない導体第1の導体層上に第2の導体層を形成し、
第1および第2のマスクを除去し、下地導体膜の露出部分を除去し、
絶縁基板表面と第1の導体層の表面を絶縁膜で覆い、第2の導体パターンを絶縁膜上に形成することを特徴とする厚膜電子部品の製造方法。
In a method for manufacturing a thick film electronic component, a conductive pattern is formed on an insulating substrate, and a conductive pattern connected through an opening formed in the insulating layer is formed on the insulating film.
A base conductor film is formed on an insulating substrate, a first mask is formed in a predetermined pattern on the surface of the base conductor film, and a first mask having the same thickness as the mask is formed on the surface of the base conductor layer not covered with the mask. Forming a conductor layer of
Forming a second mask on a portion of the first conductor layer and the surface of the first mask, forming a second conductor layer on the conductor first conductor layer on which the second mask is not formed,
Remove the first and second masks, remove the exposed portion of the underlying conductor film,
A method of manufacturing a thick film electronic component, wherein the surface of the insulating substrate and the surface of the first conductor layer are covered with an insulating film, and the second conductor pattern is formed on the insulating film.
絶縁基板上に導体パターンを形成し、絶縁層に形成された開口を介して接続される導体パターンをその絶縁膜上に形成する厚膜電子部品の製造方法において、
絶縁基板上に下地導体膜を形成し、その下地導体膜の表面に所定のパターンで第1のレジストを形成し、そのレジストで覆われない下地導体層の表面にレジストと同じ厚さの第1の導体層を形成し、
第1の導体層の一部と第1のレジストの表面に第2のレジストを形成し、第2のレジストの形成されない導体第1の導体層上に第2の導体層を形成し、
第1および第2のレジストを除去し、下地導体膜の露出部分を除去し、
絶縁基板表面と第1の導体層の表面を絶縁膜で覆い、第2の導体パターンを絶縁膜上に形成することを特徴とする厚膜電子部品の製造方法。
In a method for manufacturing a thick film electronic component, a conductive pattern is formed on an insulating substrate, and a conductive pattern connected through an opening formed in the insulating layer is formed on the insulating film.
A base conductor film is formed on an insulating substrate, a first resist is formed in a predetermined pattern on the surface of the base conductor film, and a first conductor having the same thickness as the resist is formed on the surface of the base conductor layer not covered with the resist. Forming a conductor layer of
Forming a second resist on a portion of the first conductor layer and the surface of the first resist, forming a second conductor layer on the conductor first conductor layer on which the second resist is not formed;
Remove the first and second resist, remove the exposed portion of the underlying conductor film,
A method of manufacturing a thick film electronic component, wherein the surface of the insulating substrate and the surface of the first conductor layer are covered with an insulating film, and the second conductor pattern is formed on the insulating film.
第1の導体層と第2の導体層を電解めっきによって形成する請求項1記載の厚膜電子部品の製造方法。   The method for manufacturing a thick film electronic component according to claim 1, wherein the first conductor layer and the second conductor layer are formed by electrolytic plating. 絶縁基板上に導体パターンを形成し、絶縁層に形成された開口を介して表面に引き出す厚膜電子部品の製造方法において、
絶縁基板上に下地導体膜を形成し、その下地導体膜の表面に所定のパターンで第1のマスクを形成し、そのマスクで覆われない下地導体層の表面にマスクと同じ厚さの第1の導体層を形成し、
第1の導体層の一部と第1のマスクの表面に第2のマスクを形成し、第2のマスクの形成されない導体第1の導体層上に第2の導体層を形成し、
第1および第2のマスクを除去し、下地導体膜の露出部分を除去し、
絶縁基板表面と第1の導体層の表面を絶縁膜で覆うことを特徴とする厚膜電子部品の製造方法。
In a method for manufacturing a thick film electronic component by forming a conductor pattern on an insulating substrate and drawing it to the surface through an opening formed in the insulating layer,
A base conductor film is formed on an insulating substrate, a first mask is formed in a predetermined pattern on the surface of the base conductor film, and a first mask having the same thickness as the mask is formed on the surface of the base conductor layer not covered with the mask. Forming a conductor layer of
Forming a second mask on a portion of the first conductor layer and the surface of the first mask, forming a second conductor layer on the conductor first conductor layer on which the second mask is not formed,
Remove the first and second masks, remove the exposed portion of the underlying conductor film,
A method for manufacturing a thick film electronic component, wherein the insulating substrate surface and the surface of the first conductor layer are covered with an insulating film.
絶縁基板上に導体パターンを形成し、絶縁層に形成された開口を介して表面に引き出す厚膜電子部品の製造方法において、
絶縁基板上に下地導体膜を形成し、その下地導体膜の表面に所定のパターンで第1のレジストを形成し、そのレジストで覆われない下地導体層の表面にレジストと同じ厚さの第1の導体層を形成し、
第1の導体層の一部と第1のレジストの表面に第2のレジストを形成し、第2のレジストの形成されない導体第1の導体層上に第2の導体層を形成し、
第1および第2のレジストを除去し、下地導体膜の露出部分を除去し、
絶縁基板表面と第1の導体層の表面を絶縁膜で覆うことを特徴とする厚膜電子部品の製造方法。
In a method for manufacturing a thick film electronic component by forming a conductor pattern on an insulating substrate and drawing it to the surface through an opening formed in the insulating layer,
A base conductor film is formed on an insulating substrate, a first resist is formed in a predetermined pattern on the surface of the base conductor film, and a first conductor having the same thickness as the resist is formed on the surface of the base conductor layer not covered with the resist. Forming a conductor layer of
Forming a second resist on a portion of the first conductor layer and the surface of the first resist, forming a second conductor layer on the conductor first conductor layer on which the second resist is not formed;
Remove the first and second resist, remove the exposed portion of the underlying conductor film,
A method for manufacturing a thick film electronic component, wherein the insulating substrate surface and the surface of the first conductor layer are covered with an insulating film.
JP2005041793A 2005-02-18 2005-02-18 Manufacturing method of thick-film electronic component Pending JP2006229017A (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0469992A (en) * 1990-07-11 1992-03-05 Hitachi Ltd Manufacture of circuit board
JP2004063740A (en) * 2002-07-29 2004-02-26 Tdk Corp Method of forming patterned thin film

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0469992A (en) * 1990-07-11 1992-03-05 Hitachi Ltd Manufacture of circuit board
JP2004063740A (en) * 2002-07-29 2004-02-26 Tdk Corp Method of forming patterned thin film

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