JP2006222402A - Gallium nitride system compound semiconductor and method for manufacturing the same - Google Patents

Gallium nitride system compound semiconductor and method for manufacturing the same Download PDF

Info

Publication number
JP2006222402A
JP2006222402A JP2005036945A JP2005036945A JP2006222402A JP 2006222402 A JP2006222402 A JP 2006222402A JP 2005036945 A JP2005036945 A JP 2005036945A JP 2005036945 A JP2005036945 A JP 2005036945A JP 2006222402 A JP2006222402 A JP 2006222402A
Authority
JP
Japan
Prior art keywords
substrate
sic
layer
gallium nitride
gan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005036945A
Other languages
Japanese (ja)
Inventor
Shunichi Suzuki
俊一 鈴木
Yoshihisa Abe
芳久 阿部
Jun Komiyama
純 小宮山
Hideo Nakanishi
秀夫 中西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Coorstek KK
Original Assignee
Toshiba Ceramics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Ceramics Co Ltd filed Critical Toshiba Ceramics Co Ltd
Priority to JP2005036945A priority Critical patent/JP2006222402A/en
Publication of JP2006222402A publication Critical patent/JP2006222402A/en
Pending legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a gallium nitride system compound semiconductor which has a large diameter and can utilize a conventional silicon process, and to provide a method for manufacturing the same. <P>SOLUTION: The gallium nitride system compound with excellent properties as a semiconductor material is formed on a comparatively inexpensive Si substrate. The conventional silicon process can be utilized by forming on the Si substrate. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

ＧａＮに代表される窒化ガリウム系化合物半導体は、広いバンドギャップを有し、紫外光などの短波長発光素子だけでなく、高出力高効率および高周波電子素子などの次世代電子素子としての応用が期待される材料である。特にＳｉ基板上に形成された窒化ガリウム系化合物半導体薄膜は、現在のＳｉ半導体工程の装置および技術を活用できる可能性があり、産業技術の開発コストにおける優位性からも、実用化が求められる材料である。   Gallium nitride compound semiconductors represented by GaN have a wide band gap and are expected to be applied not only to short-wavelength light emitting devices such as ultraviolet light but also to next-generation electronic devices such as high-power, high-efficiency and high-frequency electronic devices. Is the material to be used. In particular, gallium nitride-based compound semiconductor thin films formed on Si substrates may be able to utilize current Si semiconductor process equipment and technology, and materials that need to be put into practical use because of their superiority in industrial technology development costs. It is.

窒化ガリウム系化合物半導体は、融点が高く窒素の平衡蒸気圧がきわめて高いため、融液からのバルク結晶成長は容易でなく、単結晶作製はＧａＮ基板結晶が存在しないことから異種基板上へのヘテロエピタキシャル成長がおこなわれている。
基板としては、主に熱膨張係数の近いサファイア基板が用いられる。また、比較的格子常数の近いＳｉＣ基板や、ＳｉおよびＧａＡｓ基板なども検討されている。
サファイア基板上への窒化ガリウム系化合物半導体のヘテロエピタキシャル成長は、ＡｌＮなどの低温緩衝層を介しておこなわれる。 Gallium nitride compound semiconductors have a high melting point and an extremely high equilibrium vapor pressure of nitrogen, so bulk crystal growth from the melt is not easy, and single crystal production is heterogeneous on heterogeneous substrates because there is no GaN substrate crystal. Epitaxial growth is performed.
As the substrate, a sapphire substrate having a close thermal expansion coefficient is mainly used. Further, SiC substrates having relatively close lattice constants, Si and GaAs substrates, and the like have been studied.
Heteroepitaxial growth of a gallium nitride compound semiconductor on a sapphire substrate is performed via a low-temperature buffer layer such as AlN.

ＳｉＣ基板上への窒化ガリウム系化合物半導体のヘテロエピタキシャル成長は、直接またはＡｌＮなどの緩衝層を介しておこなわれる。
Ｓｉ基板上への窒化ガリウム系化合物半導体のヘテロエピタキシャル成長は、ＳｉとＧａが反応してしまうこともあり、β−ＳｉＣまたはＡｌＮなどの緩衝層を介しておこなわれる。ここで、β−ＳｉＣはＳｉ基板表面を炭化しただけの薄膜炭化層である。
ＡｌＮ緩衝層の場合、薄膜一層のみではさらに窒化ガリウム系化合物半導体を成長した際にＳｉ基板との熱膨張差により大きな反りおよびクラックが発生するため、ＡｌＮ/ＧａＮを繰り返し形成した多層緩衝層として最終的なＧａＮ成長層を成長させている。
Ｓｉ基板上へ窒化ガリウム系化合物半導体をヘテロエピタキシャル成長させる場合、結晶系の違いから、ＧａＮのような六方晶系に対して立方晶系のＳｉ基板では面方位（１１１）が用いられる。
III族窒化物半導体 赤崎勇編著 培風館 特開2001-177190 サンケン電気（株）広報 2001.11 Heteroepitaxial growth of the gallium nitride compound semiconductor on the SiC substrate is performed directly or through a buffer layer such as AlN.
Heteroepitaxial growth of a gallium nitride-based compound semiconductor on a Si substrate is sometimes performed via a buffer layer such as β-SiC or AlN because Si and Ga may react. Here, β-SiC is a thin film carbonized layer obtained by carbonizing the surface of the Si substrate.
In the case of an AlN buffer layer, when a gallium nitride compound semiconductor is further grown with only a single thin film, large warpage and cracks occur due to the difference in thermal expansion from the Si substrate. A typical GaN growth layer is grown.
In the case of heteroepitaxial growth of a gallium nitride compound semiconductor on a Si substrate, the plane orientation (111) is used in a cubic Si substrate with respect to a hexagonal system such as GaN because of the difference in crystal system.
Group III Nitride Semiconductor Isao Akasaki JP2001-177190 Sanken Electric Co., Ltd. PR 2001.11

一般にＳｉ基板上にＳｉＣ単結晶を成長させる場合、Ｓｉ基板面方位と同じ面方位の３Ｃ−ＳｉＣがエピタキシャル成長されるが、面方位（１１０）のＳｉ基板を用いた場合、異なる面方位（１１１）の３Ｃ−ＳｉＣ単結晶を成長したとの報告がある。
T.Nishiguchi,Y.Mukai,S.Ohshima,S.Nishino,phys.stat.sol.(c)Vol.0(2003),2585 In general, when a SiC single crystal is grown on a Si substrate, 3C-SiC having the same plane orientation as that of the Si substrate is epitaxially grown. However, when a Si substrate having a plane orientation (110) is used, a different plane orientation (111). 3C-SiC single crystal has been reported.
T.Nishiguchi, Y.Mukai, S.Ohshima, S.Nishino, phys.stat.sol. (C) Vol.0 (2003), 2585

窒化ガリウム系化合物半導体は、その優れた物性より現在主流であるＳｉ半導体によるデバイスの物性限界を凌駕するものとして期待されている。ところが、その結晶を得るためのヘテロエピタキシャル成長において、サファイア基板やＳｉＣ基板などを用いるため、非常に高額なものになっている。また、Ｓｉ基板上へのヘテロエピタキシャル成長も試みられているが、それぞれ以下の問題により良好な結晶が得られていない。   Gallium nitride-based compound semiconductors are expected to surpass the physical property limits of Si semiconductor devices, which are currently mainstream, due to their excellent physical properties. However, in the heteroepitaxial growth for obtaining the crystal, a sapphire substrate, a SiC substrate, or the like is used, so that it is very expensive. Further, heteroepitaxial growth on a Si substrate has been attempted, but good crystals have not been obtained due to the following problems.

中間層としてＳｉ基板表面の炭化によるβ−ＳｉＣ層を用いる場合、炭化によって得られるＳｉＣ層は数１０nmと非常に薄いため、窒化ガリウム系化合物結晶と基板のＳｉとの格子不整合緩和の効果は得られるが、熱膨張差を緩和するにいたらず、窒化ガリウム系化合物の結晶層が必要な厚み(２μm程度)に達する前にクラックが発生してしまう。   When a β-SiC layer obtained by carbonization of the Si substrate surface is used as the intermediate layer, the SiC layer obtained by carbonization is very thin, as a few tens of nm. Therefore, the effect of relaxation of lattice mismatch between the gallium nitride compound crystal and the Si of the substrate is Although it is obtained, cracks are generated before the crystal layer of the gallium nitride compound reaches the required thickness (about 2 μm) without relieving the thermal expansion difference.

中間層としてＡｌＮ/ＧａＮの多層緩衝層を用いる場合は、デバイスとして必要な窒化ガリウム系化合物結晶層が得られたとの報告があるが、必要な結晶層とほぼ同等もしくはそれ以上の多層緩衝層が必要であり、あまり効率的とは言えない(２．４μmの多層緩衝層を介して１μm厚のＧａＮクラックフリー層を成長)。   When an AlN / GaN multilayer buffer layer is used as an intermediate layer, it has been reported that a gallium nitride compound crystal layer necessary for a device has been obtained, but a multilayer buffer layer almost equal to or more than the required crystal layer is reported. Required and not very efficient (growth 1 μm thick GaN crack-free layer through a 2.4 μm multilayer buffer layer).

上記の要求および問題点に対して、ＳｉＣ結晶成長による緩衝層の厚み増加を提案しているが（整理番号：ＴＳＡ４２０５Ｐ）、使用するＳｉ基板の面方位を（１１１）に限定していた。
面方位（１１１）のＳｉ基板を用いた際の問題点としては、中間層としてＳｉＣ層を成長した場合、面方位（１１１）に成長するが反りが大きく、Ｓｉ基板厚さが薄くなるに従って必要膜厚の成長が困難になる。例えば、Ｓｉ基板厚さ４００μmに対してＳｉＣ中間層厚さ２μm以上でクラックが発生した。 In response to the above requirements and problems, an increase in the thickness of the buffer layer by SiC crystal growth has been proposed (reference number: TSA4205P), but the plane orientation of the Si substrate used has been limited to (111).
The problem when using a Si substrate with a plane orientation (111) is that when a SiC layer is grown as an intermediate layer, it grows in the plane orientation (111), but the warpage is large, and it is necessary as the thickness of the Si substrate decreases. It becomes difficult to grow the film thickness. For example, cracks occurred when the SiC intermediate layer thickness was 2 μm or more with respect to the Si substrate thickness of 400 μm.

本発明では、大口径かつこれまでのシリコンプロセスを流用可能な窒化ガリウム系化合物半導体および製造方法を提案する。
半導体材料として優れた特性を持つ窒化ガリウム系化合物を比較的安価なＳｉ基板上に形成することを特徴とする。Ｓｉ基板上へ形成することにより、これまでのシリコンプロセスを活用することが可能となる。 The present invention proposes a gallium nitride-based compound semiconductor and a manufacturing method that can be used for large-diameter silicon processes.
A gallium nitride compound having excellent characteristics as a semiconductor material is formed on a relatively inexpensive Si substrate. By forming on the Si substrate, it is possible to utilize the conventional silicon process.

Ｓｉ(Dia.)とＧａＮ(Wrz.)の結晶型の違いを考慮し、基板Ｓｉ面方位を（１１１）に限定していたが、Ｓｉ（１１０）上にＳｉＣ（１１１）成長することから〔非特許文献３〕、基板Ｓｉ面方位（１１０）でもＳｉＣ（１１１）中間層を形成することにより窒化ガリウム系化合物半導体を製造可能とする。
なお、同一面方位となるＳｉ（１１１）上のＳｉＣ（１１１）成長における問題点であった反りに対しては、Ｓｉ（１１０）上のＳｉＣ（１１１）成長では面方位の違いから格子不整合の異方性が大きくなることにより反りの発生による応力集中が緩和、ＳｉＣ中間層膜厚を増加することが可能となる（例えば、反りによりお椀型になるか舟形になるかの違い）。同じＳｉ基板厚さにおいて、中間層のβ−ＳｉＣ層厚みの最大値がＳｉ（１１１）基板を使用した場合の２倍以上成長可能である。 Considering the difference in crystal type between Si (Dia.) And GaN (Wrz.), The Si surface orientation of the substrate was limited to (111), but SiC (111) grows on Si (110) [ Non-Patent Document 3], it is possible to manufacture a gallium nitride-based compound semiconductor by forming a SiC (111) intermediate layer even in the substrate Si plane orientation (110).
In addition, with respect to the warp which was a problem in the growth of SiC (111) on Si (111) having the same plane orientation, the lattice mismatch was caused in the SiC (111) growth on Si (110) due to the difference in the plane orientation. By increasing the anisotropy, stress concentration due to warpage can be relaxed, and the film thickness of the SiC intermediate layer can be increased (for example, a difference between a bowl shape or a boat shape due to warpage). With the same Si substrate thickness, the maximum value of the β-SiC layer thickness of the intermediate layer can be grown more than twice that when the Si (111) substrate is used.

■格子不整合比較■
SiC(111)/Si(111)・・[1-11]Si//[1-11]SiC方向=24.7%，[11-2]Si//[11-2]SiC方向=13.1%
SiC(111)/Si(110) ・・[1-11]Si//[1-11]SiC方向=24.7%，[00-1]Si//[11-2]SiC方向=1.9% ■ Lattice mismatch comparison ■
SiC (111) / Si (111) ・ ・ [1-11] Si // [1-11] SiC direction = 24.7%, [11-2] Si // [11-2] SiC direction = 13.1%
SiC (111) / Si (110) ・ ・ [1-11] Si // [1-11] SiC direction = 24.7%, [00-1] Si // [11-2] SiC direction = 1.9%

Ｓｉ基板上に窒化ガリウム系化合物ヘテロエピタキシャル成長するための中間層として、既成のＳｉ表面炭化によるβ−ＳｉＣ層だけでなく所定の膜厚までβ−ＳｉＣヘテロエピタキシャル成長することを特徴とする。Ｓｉ基板の表面炭化によるβ−ＳｉＣ層は、Ｃ元素の拡散および界面反応の限度により表層１０nm程度しか形成されず、窒化ガリウム系化合物を形成した際のクラック抑制効果が得られない。   As an intermediate layer for heteroepitaxial growth of a gallium nitride compound on a Si substrate, β-SiC heteroepitaxial growth to a predetermined film thickness is performed as well as a β-SiC layer formed by carbonization of an existing Si surface. The β-SiC layer formed by carbonization of the surface of the Si substrate is formed only on the surface layer of about 10 nm due to the diffusion of C element and the interface reaction, and the effect of suppressing cracks when a gallium nitride compound is formed cannot be obtained.

Ｓｉ表面炭化によるＳｉＣ層だけでなく０．０２μm以上の膜厚までＳｉＣヘテロエピタキシャル成長することで、格子不整合緩和の効果に加えてＳｉＣの高剛性により熱膨張差の応力を緩和して、その後、窒化ガリウム系化合物の必要膜厚までクラックを発生させずに成長することを可能にする。
窒化ガリウム系化合物の膜厚増加に伴い、中間層のＳｉＣ膜厚が厚いほどＳｉ基板との応力緩和の効果が発揮されると考えられるが、厚くなりすぎた場合、ＳｉＣ層とＳｉ基板との熱膨張差による大きな反りが発生し、プロセスが困難となる。この点において、面方位（１１０）のＳｉ基板を使用することは優位である。 SiC heteroepitaxial growth to a thickness of 0.02 μm or more as well as the SiC layer by Si surface carbonization reduces stress of thermal expansion difference due to high rigidity of SiC in addition to the effect of lattice mismatch relaxation, It is possible to grow up to the required film thickness of the gallium nitride compound without generating cracks.
As the film thickness of the gallium nitride compound increases, the thicker the SiC film of the intermediate layer is, the more effective the stress relaxation with the Si substrate is. However, if the film becomes too thick, Large warpage due to thermal expansion difference occurs, making the process difficult. In this respect, it is advantageous to use a Si substrate having a plane orientation (110).

中間層のβ−ＳｉＣ層に直接窒化ガリウム系化合物を成長させることも可能であるが、表面の余剰ＳｉとＧａが反応してしまい正常なエピタキシャル成長が継続できない場合が生じるため、あらかじめＳｉＣ層表面をＡｌＮ薄膜で覆ってから窒化ガリウム系化合物を成長させることが好ましい。   Although it is possible to grow a gallium nitride compound directly on the β-SiC layer of the intermediate layer, it may occur that normal epitaxial growth cannot be continued due to the reaction of excess Si and Ga on the surface. It is preferable to grow the gallium nitride compound after covering with the AlN thin film.

本発明によれば、Ｓｉ基板上にクラックを発生させることなく窒化ガリウム系化合物を形成することができ、Ｓｉ基板を利用することにより、サファイア基板やＳｉＣ基板と比べて安価で大口径の窒化ガリウム系化合物半導体基板を実現できる。また、Ｓｉ基板上へ形成されることで現在のＳｉ半導体工程の装置および技術を活用できる可能性があり、産業技術の開発コストにおける優位性も得られる。   According to the present invention, a gallium nitride compound can be formed on a Si substrate without generating cracks. By using the Si substrate, the gallium nitride has a large diameter and is cheaper than a sapphire substrate or a SiC substrate. A compound semiconductor substrate can be realized. Moreover, by forming on a Si substrate, there is a possibility that the current Si semiconductor process equipment and technology can be utilized, and an advantage in the development cost of industrial technology can be obtained.

実施例１：
1)厚さ３８１μm、φ３inchの結晶面方位（１１０）のＳｉ基板を使用。まず、表面をケミカルエッチングしたＳｉ基板を基板ホルダーにのせ、反応管内の成長領域にセットする。ガス導入管からキャリアガスとして水素（Ｈ2 ）を供給しながら、Ｓｉ基板を１１００℃に昇温して基板表面クリーニングをおこなった。
2)その後、プロパン原料ガスを流した雰囲気において温度１１００℃の熱処理を施すことでＳｉ基板表面を炭化し、まず１０nm程度のβ−ＳｉＣ単結晶層を形成した。
3)引き続き原料ガスとしてモノシランとプロパンを導入し、温度１２００℃の気相成長によりβ−ＳｉＣ層の膜厚を３μmに形成した。β−ＳｉＣ単結晶層の総膜厚は、原料濃度、温度および時間により調整可能である。
4)最後に形成されたβ−ＳｉＣヘテロエピタキシャル成長層の上にＧａＮの成膜を実施した。ＧａＮ成膜は、ＳｉＣ層形成後、ＳｉＣ原料ガスを停止し雰囲気を清浄化した後、基板温度を成長温度１０５０℃に調整、アンモニアとトリメチルガリウムを導入して ＭＯＶＰＥ法によりおこなった。成長膜厚は３．５μmであった。得られたGaN結晶を評価した結果、X線回折による半値幅および欠陥密度はサファイア基板上に成長した場合と同等以上であった。また、基板の反りが５０μm程度存在したが、クラック発生は無かった。 Example 1:
1) A Si substrate with a crystal plane orientation (110) of 381 μm thickness and φ3 inch is used. First, a Si substrate whose surface is chemically etched is placed on a substrate holder and set in a growth region in a reaction tube. The substrate surface was cleaned by raising the temperature of the Si substrate to 1100 ° C. while supplying hydrogen (H 2 ) as a carrier gas from the gas introduction tube.
2) Thereafter, the Si substrate surface was carbonized by performing a heat treatment at a temperature of 1100 ° C. in an atmosphere in which a propane source gas was passed, and first a β-SiC single crystal layer of about 10 nm was formed.
3) Monosilane and propane were subsequently introduced as source gases, and the β-SiC layer was formed to a thickness of 3 μm by vapor phase growth at a temperature of 1200 ° C. The total film thickness of the β-SiC single crystal layer can be adjusted by the raw material concentration, temperature and time.
4) A GaN film was formed on the last formed β-SiC heteroepitaxial growth layer. After forming the SiC layer, the GaN film was formed by stopping the SiC source gas and cleaning the atmosphere, then adjusting the substrate temperature to a growth temperature of 1050 ° C., introducing ammonia and trimethylgallium, and performing the MOVPE method. The grown film thickness was 3.5 μm. As a result of evaluating the obtained GaN crystal, the full width at half maximum and the defect density by X-ray diffraction were equal to or higher than those when grown on a sapphire substrate. Further, although the substrate warp was about 50 μm, no crack was generated.

実施例２：
1)厚さ３８１μm、φ３inchの結晶面方位（１１０）のＳｉ基板を使用。まず、表面をケミカルエッチングしたＳｉ基板を基板ホルダーにのせ、反応管内の成長領域にセットする。ガス導入管からキャリアガスとして水素（Ｈ2 ）を供給しながら、Ｓｉ基板を１１００℃に昇温して基板表面クリーニングをおこなった。
2)その後、炉内温度を１０００℃以下まで下げ、８３０℃にて原料ガスとしてモノメチルシランを導入し０．５μmのβ−ＳｉＣ結晶層を形成した。
3)形成されたβ−ＳｉＣヘテロエピタキシャル成長層の上にＧａＮの成膜を実施した。
ＧａＮ成膜は、ＳｉＣ層形成後、ＳｉＣ原料ガスを停止し雰囲気を清浄化した後、基板温度を成長温度１０５０℃に調整、アンモニアとトリメチルガリウムを導入してＭＯＶＰＥ法によりおこなった。成長膜厚は１．５μmであった。得られたGaN結晶を評価した結果、X線回折による半値幅および欠陥密度はサファイア基板上に成長した場合と同等以上であった。また、クラック発生は無かった。 Example 2:
1) A Si substrate with a crystal plane orientation (110) of 381 μm thickness and φ3 inch is used. First, a Si substrate whose surface is chemically etched is placed on a substrate holder and set in a growth region in a reaction tube. The substrate surface was cleaned by raising the temperature of the Si substrate to 1100 ° C. while supplying hydrogen (H 2 ) as a carrier gas from the gas introduction tube.
2) Thereafter, the furnace temperature was lowered to 1000 ° C. or lower, and monomethylsilane was introduced as a source gas at 830 ° C. to form a 0.5 μm β-SiC crystal layer.
3) A GaN film was formed on the formed β-SiC heteroepitaxial growth layer.
After forming the SiC layer, the GaN film was formed by stopping the SiC source gas and cleaning the atmosphere, then adjusting the substrate temperature to a growth temperature of 1050 ° C., introducing ammonia and trimethylgallium, and performing the MOVPE method. The grown film thickness was 1.5 μm. As a result of evaluating the obtained GaN crystal, the full width at half maximum and the defect density by X-ray diffraction were equal to or higher than those when grown on a sapphire substrate. Moreover, there was no crack generation.

実施例３：
・実施例１の3),4)の間にＡｌＮ薄膜層を成長した。
β−ＳｉＣ層を形成後、ＳｉＣ原料ガスを停止し雰囲気を清浄化してから基板温度をＡｌＮ成長温度の６００℃に調整した。その後、トリメチルアルミとアンモニアを導入してＡｌＮ薄膜を３０nm程度形成した。
・ＡｌＮ薄膜層を形成後、実施例１と同様にＧａＮ層を形成した。成長膜厚は３．６μmであった。得られたGaN結晶を評価した結果、X線回折による半値幅および欠陥密度はサファイア基板上に成長した場合と同等以上であった。また、基板の反りが４８μm程度存在したが、クラック発生は無かった。 Example 3:
-An AlN thin film layer was grown between 3) and 4) of Example 1.
After forming the β-SiC layer, the SiC source gas was stopped and the atmosphere was cleaned, and then the substrate temperature was adjusted to the AlN growth temperature of 600 ° C. Thereafter, trimethylaluminum and ammonia were introduced to form an AlN thin film of about 30 nm.
After forming the AlN thin film layer, a GaN layer was formed in the same manner as in Example 1. The grown film thickness was 3.6 μm. As a result of evaluating the obtained GaN crystal, the full width at half maximum and the defect density by X-ray diffraction were equal to or higher than those when grown on a sapphire substrate. Further, although the substrate warp was about 48 μm, no crack was generated.

比較例１：
・実施例１の3)β−ＳｉＣ結晶成長を実施せずにＳｉ基板表面の炭化によるＳｉＣ層のみで、その他は同様の条件にてＧａＮ成膜をおこなった。
・得られたＧａＮ基板は、外周部より多数のクラックが発生しており、クラックフリーでのＧａＮ結晶層の形成は約０．７μm以下までであった。 Comparative Example 1:
Example 3 3) GaN film formation was performed under the same conditions except that only the SiC layer formed by carbonization of the Si substrate surface was used without performing β-SiC crystal growth.
In the obtained GaN substrate, a large number of cracks occurred from the outer peripheral portion, and the formation of the crack-free GaN crystal layer was up to about 0.7 μm or less.

比較例２：
・中間層として比較例１の炭化によるＳｉＣ層(１０nm)に加えてＡｌＮ薄膜層(３０nm)の二層形成した場合も同様の結果であった。 Comparative Example 2:
The same result was obtained when two layers of an AlN thin film layer (30 nm) were formed as the intermediate layer in addition to the SiC layer (10 nm) formed by carbonization in Comparative Example 1.

比較例３：
・中間層としてＡｌＮ薄膜層のみとした場合、クラックフリーでのＧａＮ結晶層の形成は約０．３μm以下までであった。 Comparative Example 3:
When only the AlN thin film layer was used as the intermediate layer, the formation of the crack-free GaN crystal layer was up to about 0.3 μm or less.

比較例４：
・厚さ３８１μm、φ３inchの結晶面方位（１１１）のＳｉ基板を使用。実施例１の3)β−ＳｉＣ結晶成長においてＳｉＣ層を２μm形成した。
・得られたＳｉＣ（１１１）／Ｓｉ（１１１）基板はお椀型に大きな反りが発生し、ＳｉＣとＳｉ基板の熱膨張差によるマイクロクラックが発生した。 Comparative Example 4:
-Use a Si substrate with a crystal plane orientation (111) of 381 μm thickness and φ3 inch. 3 μm of Example 1 In the β-SiC crystal growth, 2 μm of the SiC layer was formed.
-The obtained SiC (111) / Si (111) substrate was warped in a bowl shape, and microcracks were generated due to the difference in thermal expansion between the SiC and the Si substrate.

比較例４：
・厚さ３８１μm、φ３inchの結晶面方位（１１１）のＳｉ基板を使用。実施例１の3)β−ＳｉＣ結晶成長においてＳｉＣ層を１μm形成し、その他は同様の条件にてＧａＮ成膜をおこなった。
・得られたＧａＮ基板は、ＳｉＣ中間層による応力緩和しきれず、ＧａＮとＳｉ基板の熱膨張差によるマイクロクラックが発生していた。 Comparative Example 4:
-Use a Si substrate with a crystal plane orientation (111) of 381 μm thickness and φ3 inch. In Example 1, 3) β-SiC crystal growth, a 1 μm SiC layer was formed, and GaN film formation was performed under the same conditions.
The obtained GaN substrate was not able to relax the stress due to the SiC intermediate layer, and microcracks were generated due to the difference in thermal expansion between the GaN and Si substrates.

実施例の概略図である。It is the schematic of an Example.

Claims (4)

Sｉ（１１０）基板上にβ−ＳｉＣ薄膜の一層のみ、または、β−ＳｉＣ薄膜およびＡｌＮ薄膜の二層の中間層を用いることを特徴とする窒化ガリウム化合物半導体。   A gallium nitride compound semiconductor characterized by using only one layer of a β-SiC thin film or two intermediate layers of a β-SiC thin film and an AlN thin film on a Si (110) substrate. 中間層のβ−ＳｉＣの面方位（１１１）であることを特徴とする。   The β-SiC plane orientation of the intermediate layer is (111). 中間層は、０．０２〜５μmのβ−ＳｉＣ層のみ、または、０．０２〜５μmのβ−ＳｉＣ層および０．０１〜０．１μmのＡｌＮ薄膜の二層を用いることを特徴とする。   The intermediate layer is characterized by using only a 0.02 to 5 μm β-SiC layer, or two layers of a 0.02 to 5 μm β-SiC layer and a 0.01 to 0.1 μm AlN thin film. 窒化ガリウム系化合物とは、GaNだけでなくAlGaNやGaInNなどの混晶を含む。   The gallium nitride compound includes not only GaN but also mixed crystals such as AlGaN and GaInN.
JP2005036945A 2005-02-14 2005-02-14 Gallium nitride system compound semiconductor and method for manufacturing the same Pending JP2006222402A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005036945A JP2006222402A (en) 2005-02-14 2005-02-14 Gallium nitride system compound semiconductor and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005036945A JP2006222402A (en) 2005-02-14 2005-02-14 Gallium nitride system compound semiconductor and method for manufacturing the same

Publications (1)

Publication Number Publication Date
JP2006222402A true JP2006222402A (en) 2006-08-24

Family

ID=36984470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005036945A Pending JP2006222402A (en) 2005-02-14 2005-02-14 Gallium nitride system compound semiconductor and method for manufacturing the same

Country Status (1)

Country Link
JP (1) JP2006222402A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2182547A2 (en) 2008-11-04 2010-05-05 Canon Kabushiki Kaisha Forming method of gallium nitride system compound semiconductor layer, transfer method of the same, and substrate structure with the same bonded thereto
JP2012094905A (en) * 2007-03-09 2012-05-17 Cree Inc Thick nitride semiconductor structure with interlayer structure, and method of fabricating thick nitride semiconductor structure
JP2012151401A (en) * 2011-01-21 2012-08-09 Sumco Corp Semiconductor substrate and method for manufacturing the same
WO2023132191A1 (en) * 2022-01-05 2023-07-13 信越半導体株式会社 Nitride semiconductor substrate and method for producing same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04223330A (en) * 1990-12-25 1992-08-13 Univ Nagoya Method of growing compound semiconductor single crystal on a single crystal silicon substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04223330A (en) * 1990-12-25 1992-08-13 Univ Nagoya Method of growing compound semiconductor single crystal on a single crystal silicon substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012094905A (en) * 2007-03-09 2012-05-17 Cree Inc Thick nitride semiconductor structure with interlayer structure, and method of fabricating thick nitride semiconductor structure
US9054017B2 (en) 2007-03-09 2015-06-09 Cree, Inc. Thick nitride semiconductor structures with interlayer structures and methods of fabricating thick nitride semiconductor structures
EP2182547A2 (en) 2008-11-04 2010-05-05 Canon Kabushiki Kaisha Forming method of gallium nitride system compound semiconductor layer, transfer method of the same, and substrate structure with the same bonded thereto
US8053335B2 (en) 2008-11-04 2011-11-08 Canon Kk Forming method of gallium nitride system compound semiconductor layer, transfer method of the same, and substrate structure with the same bonded thereto
JP2012151401A (en) * 2011-01-21 2012-08-09 Sumco Corp Semiconductor substrate and method for manufacturing the same
WO2023132191A1 (en) * 2022-01-05 2023-07-13 信越半導体株式会社 Nitride semiconductor substrate and method for producing same

Similar Documents

Publication Publication Date Title
JP4335187B2 (en) Nitride semiconductor device manufacturing method
JP4672753B2 (en) GaN-based nitride semiconductor free-standing substrate manufacturing method
JP2007273946A (en) Nitride semiconductor single crystal film
JP2007106665A (en) Gallium nitride device substrate containing lattice parameter altering element
US20110003420A1 (en) Fabrication method of gallium nitride-based compound semiconductor
JP2004319711A (en) Porous substrate for epitaxial growth and its manufacturing method, and method of manufacturing group iii nitride semiconductor substrate
JPWO2011093481A1 (en) Nitride-based compound semiconductor substrate manufacturing method and nitride-based compound semiconductor free-standing substrate
JP4907476B2 (en) Nitride semiconductor single crystal
JP2006232639A (en) Gas phase growth method of nitride-based semiconductor, nitride-based semiconductor epitaxial substrate, self-standing substrate, and semiconductor device
JP2006237582A (en) Method of growing crystalline gallium nitride-based compound and semiconductor device including gallium nitride-based compound
JP2011051849A (en) Nitride semiconductor self-supporting substrate and method for manufacturing the same
JP2015078093A (en) 3C-SiC EPITAXIAL LAYER MANUFACTURING METHOD, 3C-SiC EPITAXIAL SUBSTRATE, AND SEMICONDUCTOR DEVICE
JP2009067658A (en) Nitride semiconductor ground substrate, nitride semiconductor-stacked substrate, nitride semiconductor self-standing substrate and method for producing nitride semiconductor ground substrate
JP2006222402A (en) Gallium nitride system compound semiconductor and method for manufacturing the same
JP2006062931A (en) Sapphire substrate and its heat treatment method, and method of crystal growth
JP5733258B2 (en) Manufacturing method of nitride semiconductor epitaxial wafer
JP5814131B2 (en) Structure and manufacturing method of semiconductor substrate
JP2006253617A (en) SiC SEMICONDUCTOR AND ITS MANUFACTURING METHOD
JP4960621B2 (en) Nitride semiconductor growth substrate and manufacturing method thereof
JP4481118B2 (en) Method for producing highly crystalline aluminum nitride laminated substrate
JP2004006568A (en) Manufacture of 3-5 group compound semiconductor
JP2007227803A (en) Gas phase growth method of nitride group semiconductor, nitride group semiconductor expitaxial substrate using the same, self-standing substrate, and semiconductor device
JP2009084136A (en) Method for manufacturing semiconductor device
JP2008184360A (en) Nitride semiconductor single crystal
WO2024057698A1 (en) Single crystal silicon substrate equipped with nitride semiconductor layer, and method for manufacturing single crystal silicon substrate equipped with nitride semiconductor layer

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20070711

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070907

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100203

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100210

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20100610