JP2006216922A - Horizontal bipolar transistor and semiconductor device having the same, as well as manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve unavailability of a gain in a horizontal bipolar transistor due to damages latent near its epitaxial layer surface for a horizontal bipolar transistor and a semiconductor device having the same, as well as to provide a manufacturing method therefor. <P>SOLUTION: In a horizontal bipolar transistor, containing thermally diffused impurities provided on the upper part of a base region, contains a semiconductor layer, and has a collector diffusion layer and an emitter diffusion layer juxtaposed, and a semiconductor device that has such a transistor, the semiconductor layer is laid down to further implant impurities, and then, subjected to heat treatment, to make a collector diffusion layer and an emitter diffusion layer. The semiconductor layer is made into a silicon-germanium layer, and especially the silicon-germanium layer is utilized to form a silicon-germanium heterojunction bipolar transistor, formed along with a horizontal-type bipolar transistor for the semiconductor device. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a lateral bipolar transistor, a semiconductor device having the same, and a manufacturing method thereof.

  With the recent reduction in size and weight of electronic devices, BiCMOS semiconductor devices in which bipolar transistors and CMOS transistors are mixedly mounted on the same semiconductor substrate and the advantages of both transistors are effectively used have come to be used. .

  In such a BiCMOS semiconductor device, a bipolar transistor and a CMOS transistor can be manufactured on a semiconductor substrate in substantially the same process, and a collector region and an emitter region are arranged in parallel above the base region. The lateral bipolar transistor is used. In addition, a lateral bipolar transistor and a silicon germanium heterojunction bipolar transistor are mixedly mounted on the same semiconductor substrate.

  FIG. 7 shows a cross-sectional view of a silicon germanium heterojunction bipolar transistor 100 in the case where a conventional PMOS transistor, NMOS transistor, and lateral bipolar transistor are formed on the same substrate.

  A collector region 124 made of SIC (Selection Implantation Collector) formed in an N-type buried layer 112 formed inside the P-type semiconductor substrate 102 and an N-type epitaxial layer 113 formed on the surface of the P-type semiconductor substrate 102, germanium A base region 120 made of an epitaxial layer (silicon germanium layer) including an emitter region 125 in which impurities are diffused from polycrystalline silicon into a base region (silicon germanium layer) is formed. Also, a collector extraction layer 117, a base region 120, an emitter region 125, emitter electrode 126, metal silicide 127, oxide film 114, oxide film 115, oxide film 129, P-type element isolation layer 118, oxide film 123, silicon nitride film 128, interlayer film 130, and tungsten plug 131 are formed. .

  In order to improve the frequency characteristics of the silicon germanium heterojunction bipolar transistor 100, the N-type epitaxial layer 113 formed on the P-type semiconductor substrate 102 is preferably as thin as possible.

  FIG. 8 is a cross-sectional view of a lateral bipolar transistor 101 in the case where a conventional PMOS transistor, NMOS transistor, and silicon germanium heterojunction bipolar transistor are formed on the same substrate.

  An insulating film disposed on the surface of the P-type semiconductor substrate 102 to be an extraction part of the emitter region 109 and the collector region 108 is opened, and a P-type semiconductor film containing germanium is epitaxially grown and formed by etching using a resist pattern. An emitter electrode 107 and a collector electrode 106 are provided.

By performing heat treatment after this electrode formation, the emitter diffusion layer 122 and the collector diffusion layer 121 of the lateral bipolar transistor are formed in a self-aligned manner by impurity diffusion from the P-type semiconductor film containing germanium. Here, the N-type epitaxial layer 104 and the N ⁺ buried layer 103 form a base region 105, and further, an oxide film 114, an oxide film 115, an oxide film 123, an oxide film 129, a base extraction layer 116, and a P-type element isolation layer 118. A silicon nitride film 128, a metal silicide 127, an interlayer film 130, and a tungsten plug 131 are formed.

By forming the emitter diffusion layer 122 and the collector diffusion layer 121 by thermal diffusion in this manner, the emitter diffusion layer 122 and the collector diffusion layer 121 can be formed very shallowly, so that the frequency characteristics of the silicon germanium heterojunction bipolar transistor 100 are improved. Therefore, even if the thickness of the N-type epitaxial layer 104 is reduced, the distance between the N ⁺ -type buried layer 103, the emitter diffusion layer 122, and the collector diffusion layer 121 can be sufficiently increased, and a silicon germanium heterojunction bipolar transistor can be obtained. It has been possible to prevent the breakdown voltage from being lowered while improving the frequency characteristics (see, for example, Patent Document 1).
JP 2004-111575 A

  However, in the conventional lateral bipolar transistor described above, the junction between the emitter and collector and the base tends to be close to the surface of the epitaxial layer, and due to damage such as lattice defects existing near the surface, There is a problem that leakage current is generated between the emitter and the base and between the collector and the base, and as shown in the Gummel plot of FIG.

  In this case, it may be possible to solve the problem by deepening the junction of the emitter electrode and the collector electrode to some extent by increasing the temperature of the heat treatment after the step of forming the emitter electrode and the collector electrode or increasing the time. With this high temperature or prolonged heat treatment, impurities in the base layer in the silicon germanium heterojunction bipolar transistor formed on the same substrate also diffuse to increase the base width, and the frequency of the silicon germanium heterojunction bipolar transistor There was a possibility of deteriorating the characteristics.

  Therefore, in the present invention, even when the junction between the emitter and collector of the lateral bipolar transistor and the base is close to the surface of the epitaxial layer, a sufficient gain as the lateral bipolar transistor is obtained, and further, the lateral bipolar transistor is formed on the same semiconductor substrate. Even when a bipolar transistor and a silicon germanium heterojunction bipolar transistor are formed at the same time, the frequency characteristics of the silicon germanium heterojunction bipolar transistor are not deteriorated, and at the same time, between the emitter and base of the lateral bipolar transistor and between the collector and base. It is an object of the present invention to provide a lateral bipolar transistor that generates less leakage current, a structure of a semiconductor device having the same, and a method of manufacturing the same.

  In the lateral bipolar transistor of the present invention, in the lateral bipolar transistor in which the impurity in the semiconductor layer containing the impurity provided above the base region is thermally diffused to arrange the collector diffusion layer and the emitter diffusion layer in parallel, the semiconductor layer is A collector diffusion layer and an emitter diffusion layer were provided by performing a heat treatment after further ion-implanting an impurity having the same conductivity type as the impurity by traversing. Furthermore, the semiconductor layer is also characterized by being a silicon germanium layer.

  In the semiconductor device of the present invention, a lateral bipolar transistor in which a collector diffusion layer and an emitter diffusion layer are juxtaposed by thermally diffusing impurities in a semiconductor layer containing impurities provided above the base region, and a silicon germanium heterojunction In a semiconductor device in which a bipolar transistor is formed on the same semiconductor substrate, a collector diffusion layer and an emitter diffusion layer are formed by performing heat treatment after ion implantation of an impurity having the same conductivity type as the impurity across the semiconductor layer. And provided. Furthermore, the semiconductor layer is a silicon germanium layer. In particular, the semiconductor layer is formed of a silicon germanium layer provided for forming a base region of a silicon germanium heterojunction bipolar transistor, and impurity ion implantation is performed on the base region. It is also characterized by being performed simultaneously with ion implantation.

  In the method for manufacturing a lateral bipolar transistor of the present invention, in the method for manufacturing a lateral bipolar transistor, the collector diffusion layer and the emitter diffusion layer are formed by thermally diffusing impurities in a semiconductor layer containing impurities provided above the base region. An impurity having the same conductivity type as the impurity is further ion-implanted across the semiconductor layer, and then a collector diffusion layer and an emitter diffusion layer are formed by performing heat treatment.

  In the method for manufacturing a semiconductor device of the present invention, a lateral bipolar transistor that forms a collector diffusion layer and an emitter diffusion layer by thermally diffusing impurities in a semiconductor layer containing an impurity provided on an upper portion of a base region, and a silicon germanium heterojunction In a manufacturing method of a semiconductor device in which a bipolar transistor is formed on the same semiconductor substrate, a collector diffusion layer is formed by further ion-implanting an impurity having the same conductivity type as the impurity across the semiconductor layer and then performing a heat treatment And an emitter diffusion layer.

  According to the first aspect of the present invention, in the lateral bipolar transistor in which the impurity of the semiconductor layer containing the impurity provided above the base region is thermally diffused to arrange the collector diffusion layer and the emitter diffusion layer in parallel, By providing a collector diffusion layer and an emitter diffusion layer by performing a heat treatment after further ion-implanting an impurity having the same conductivity type as the above-mentioned impurities, a lattice defect on the surface without performing a high-temperature or long-time heat treatment Thus, it is possible to provide a lateral bipolar transistor in which the base junction can be formed deeply to the extent that it is not affected by such damage, and a sufficient gain can be obtained.

  According to a second aspect of the present invention, in the lateral bipolar transistor according to the first aspect, the semiconductor layer is a silicon germanium layer, thereby suppressing deep implantation of impurities implanted by ion implantation into the silicon germanium layer. It is possible to provide a lateral bipolar transistor that can be formed into a shallow junction, suppress leakage current between the emitter and the base and between the collector and the base while maintaining the withstand voltage, and can obtain a sufficient gain.

  According to the third aspect of the present invention, there is provided a lateral bipolar transistor in which a collector diffusion layer and an emitter diffusion layer are juxtaposed by thermally diffusing impurities in a semiconductor layer containing impurities provided above the base region, and a silicon germanium hetero In a semiconductor device in which a junction bipolar transistor is formed on the same semiconductor substrate, a collector diffusion layer and an emitter diffusion are formed by performing heat treatment after further ion implantation of an impurity having the same conductivity type as the impurity across the semiconductor layer. By providing a layer, the lateral bipolar can deepen the base junction to the extent that it is not affected by damage such as lattice defects on the surface without performing high-temperature or long-time heat treatment, and sufficient gain can be obtained. A semiconductor device provided with a transistor can be provided.

  According to the fourth aspect of the present invention, in the semiconductor device according to the third aspect, by using a silicon germanium layer as the semiconductor layer, it is possible to suppress deep implantation of impurities implanted by ion implantation through the silicon germanium layer. It is possible to provide a semiconductor device provided with a lateral bipolar transistor that can obtain a sufficient gain by suppressing leakage current between the emitter and the base and between the collector and the base while maintaining a breakdown voltage. .

  According to a fifth aspect of the present invention, in the semiconductor device according to the third aspect, the semiconductor layer is formed of a silicon germanium layer provided to form a base region of a silicon germanium heterojunction bipolar transistor, and impurity ion implantation is performed at the base. By simultaneously performing ion implantation into the region, impurities can be added to the lateral bipolar transistor as the resistance of the base region of the silicon germanium heterojunction bipolar transistor is reduced, and the silicon germanium layer It is possible to form a shallow junction by suppressing the deep implantation of impurities implanted by ion implantation, and to suppress the leakage current between the emitter and the base and between the collector and the base while maintaining the withstand voltage, thereby improving the gain. Can get enough horizontal bipo Possible to provide a semiconductor device having a transistor.

  According to a sixth aspect of the present invention, in the method for manufacturing a lateral bipolar transistor in which the impurity in the semiconductor layer containing the impurity provided above the base region is thermally diffused to form the collector diffusion layer and the emitter diffusion layer, As in the invention of claim 1, a collector diffusion layer and an emitter diffusion layer are formed by ion implantation of an impurity having the same conductivity type as that of the impurity, followed by a heat treatment. Alternatively, it is possible to provide a lateral bipolar transistor in which a base junction can be formed deeply without being affected by damage such as lattice defects on the surface without performing heat treatment for a long time, and a sufficient gain can be obtained. .

  According to a seventh aspect of the present invention, there is provided a lateral bipolar transistor for forming a collector diffusion layer and an emitter diffusion layer by thermally diffusing impurities in a semiconductor layer containing impurities provided above the base region, and a silicon germanium heterojunction bipolar transistor. In the method of manufacturing a semiconductor device, a collector diffusion layer and an emitter are formed by further ion-implanting an impurity having the same conductivity type as the impurity by traversing the semiconductor layer and then performing a heat treatment. By forming the diffusion layer, the base junction portion can be formed deeply to the extent that it is not affected by damage such as lattice defects on the surface without performing high-temperature or long-time heat treatment, as in the third aspect of the invention. , A semiconductor device provided with a lateral bipolar transistor capable of obtaining a sufficient gain It can be possible to provide.

  A lateral bipolar transistor according to the present invention and a semiconductor device having the lateral bipolar transistor are formed by using a collector diffusion layer and an emitter diffusion layer of the lateral bipolar transistor, and heating impurities in the semiconductor layer containing impurities provided above the base region. In particular, an impurity having the same conductivity type as that of the impurity in the semiconductor layer is further ion-implanted into the semiconductor layer provided above the base region, and then thermally diffused to obtain a collector. A diffusion layer and an emitter diffusion layer are formed.

  In this way, additional diffusion of impurities by ion implantation and thermal diffusion of impurities can deepen the base junction to the extent that it is not affected by damage such as lattice defects on the surface without performing high-temperature or long-time heat treatment. The gain of the lateral bipolar transistor can be sufficiently increased.

  In addition, by selecting a combination of semiconductor layers that suppress the diffusion of impurities as the semiconductor layer, it is possible to suppress the deep implantation of impurities when ion implantation is performed. Leakage current between the collector and the base can be suppressed.

  As a combination of such a semiconductor layer and impurities, it is desirable to employ a combination of a silicon germanium layer and boron (B). In addition, when using silicon germanium carbon instead of silicon germanium, the same operation and effect can be expected.

  In particular, when a silicon germanium layer (hereinafter referred to as “SiGe layer”) is used, silicon germanium used for forming a base region of a silicon germanium heterojunction bipolar transistor (hereinafter referred to as “SiGeHBT”) formed simultaneously with the lateral bipolar transistor. A SiGe layer used for a lateral bipolar transistor and a SiGe layer used for SiGeHBT can be formed at the same time.

  The impurity contained in the SiGe layer, which is a semiconductor layer provided above the base region of the lateral bipolar transistor, and the impurity implanted across the SiGe layer after the formation of the SiGe layer may be of the same type. However, they may be of different types as long as they have the same conductivity type.

  In this way, additional impurities are ion-implanted into the SiGe layer to increase the concentration, and then the impurities are diffused by a subsequent heat treatment, thereby forming a junction that avoids potential damage areas such as lattice defects. However, the junction can be formed at a shallower position than when the diffusion region is formed by direct ion implantation. In particular, by using the SiGe layer, the diffusion coefficient of impurities is small, so that the diffusion depth can be precisely controlled.

  Accordingly, the leakage current between the emitter and the base and between the collector and the base can be suppressed while minimizing the decrease in breakdown voltage, so that a sufficient gain as a bipolar transistor can be obtained. And good characteristics as shown in the Gummel plot of FIG. 1 are obtained.

  Furthermore, since the collector diffusion layer and the emitter diffusion layer of the lateral bipolar transistor can be formed shallowly, the thickness of the epitaxial layer on which the collector diffusion layer and the emitter diffusion layer are formed can be reduced, and the frequency characteristics of SiGeHBT. Can be improved.

Hereinafter, the present embodiment will be specifically described with reference to the drawings. As shown in FIG. 2, in the lateral bipolar transistor 1 according to the present embodiment, a base region 5 including an N ⁺ buried layer 3 and an N-type epitaxial layer 4 is formed on a P-type semiconductor substrate 2. A collector layer 6 made of a SiGe layer containing a P-type impurity and an emitter layer 7 are stacked on the upper portion of the collector layer 6 with a space left and right, and then a P-type impurity contained in each collector layer 6 and emitter layer 7. Is diffused into the N-type epitaxial layer 4 in the base region 5 to form a collector diffusion layer 21 and an emitter diffusion layer 22, and impurities are ion-implanted through the SiGe layer to form a collector region 8 and an emitter region 9. Has been.

  As shown in FIG. 2, the lateral bipolar transistor 1 includes the same oxide film 14, oxide film 15, oxide film 23, oxide film 29, base extraction layer 16, and P-type element isolation layer 18 as shown in the background art. Further, a silicon nitride film 28, a metal silicide 27, an interlayer film 30, and a tungsten plug 31 are further formed.

  A method for manufacturing the lateral bipolar transistor 1 will be described with reference to FIGS. In the following description, a manufacturing method in the case where the lateral bipolar transistor 1 and the SiGeHBT 10 having the same configuration as the SiGeHBT 100 shown in the background art are simultaneously manufactured on the same semiconductor substrate will be described.

  In each of FIGS. 3 to 5 below, (a) shows each step of the manufacturing method of the lateral bipolar transistor 1 formed on the same semiconductor substrate, and (b) shows the SiGeHBT 10 formed on the same semiconductor substrate. Each process of a manufacturing method is shown. In addition, about the component demonstrated in the previous process, the same code | symbol is attached | subjected and description is abbreviate | omitted. Here, for convenience of explanation, the lateral bipolar transistor 1 has PNP characteristics, and the SiGeHBT 10 has NPN characteristics.

  First, as a pretreatment, the surface of the P-type semiconductor substrate 2 is subjected to sacrificial oxidation, and then the oxide film is removed using a chemical solution such as hydrofluoric acid, and then thermally oxidized to form an oxide film on the surface of the P-type semiconductor substrate 2. (Not shown).

  Next, the oxide film on the surface of the P-type semiconductor substrate 2 is removed by dry etching using a resist pattern to form an opening in a region for forming the lateral bipolar transistor 1 and the SiGeHBT 10 (not shown). ).

The process shown in FIG. 3 will be described. First, N ⁺ buried layers 3 and 12 are formed inside the P-type semiconductor substrate 2 by vapor diffusion of antimony (Sb), and then the surface oxide film is removed using a chemical solution such as hydrofluoric acid. The N type epitaxial layers 4 and 13 are formed by the epitaxial method. The N ⁺ buried layer 3 and the N type epitaxial layer 4 constitute the base region 5 of the lateral bipolar transistor 1.

  Next, an oxide film 14 is partially formed on the surfaces of the N-type epitaxial layers 4 and 13 by a LOCOS (LOCal Oxidation of Silicon) method, and then thermal oxidation is performed in order to remove damage caused when the oxide film 14 is formed. As a result, an oxide film 15 is formed.

Next, a base extraction layer 16 and a collector extraction layer 17 are respectively formed on the N ⁺ buried layers 3 and 12 by ion implantation using a resist pattern, and then P-type element isolation is performed by ion implantation using a resist pattern. Layer 18 is formed.

  Next, the process shown in FIG. 4 will be described. First, an oxide film is formed by a low pressure CVD (Chemical Vapor Deposition) method, heat treatment is performed in a nitrogen atmosphere, and then N-type is performed by dry etching using a resist pattern and wet etching using a chemical solution such as hydrofluoric acid. An opening is formed in the oxide film 15 so that the surface of the epitaxial layers 4 and 13 is not damaged, and the N-type epitaxial layers 4 and 13 are exposed.

  Next, silicon germanium (SiGe) containing boron (B) which is a P-type impurity is laminated on the surfaces of the N-type epitaxial layers 4 and 13 and the surface of the oxide film 15 by an epitaxial method to form a SiGe layer. At this time, monocrystalline silicon germanium is laminated on the surfaces of the N-type epitaxial layers 4 and 13, and polycrystalline silicon germanium is laminated on the surface of the oxide film 15. This is the SiGe layer stacking process.

  Next, the silicon germanium layer is formed into a predetermined shape by dry etching using a resist pattern. That is, the collector layer 6 and the emitter layer 7 are formed in the lateral bipolar transistor 1, and the base region 20 is formed in the SiGeHBT 10.

  Next, the process shown in FIG. 5 will be described. First, an oxide film 23 is formed by a low pressure CVD method, heat treatment is performed in a nitrogen atmosphere, and then an opening is formed above the base region 20 of the SiGeHBT 10 by dry etching using a resist pattern.

Next, phosphorus ions (P ⁺ ) are implanted by ion implantation using a resist pattern to form a collector region 24 made of an N-type SIC (Selective Implanted Collector) inside the N-type epitaxial layer 13.

  Next, a polycrystalline silicon film and an oxide film are sequentially formed by a low pressure CVD method, and arsenic (As) is implanted by ion implantation using a resist pattern to form an emitter region 25 above the base region 20; Further, an emitter electrode 26 is formed, and a polycrystalline silicon film is formed into a predetermined shape by dry etching using a resist pattern.

  Next, openings are formed in the graft base portion of the SiGeHBT 10 and the upper portions of the emitter layer 7 and the collector layer 6 of the lateral bipolar transistor 1 by dry etching using a resist pattern.

Next, boron ions (BF ₂ ⁺ ) are implanted by ion implantation using a resist pattern in order to perform ion implantation of impurities across the SiGe layer, which is the main part of the present invention. This is an ion implantation process.

  This ion implantation lowers the resistance of the SiGeHBT graft base and increases the boron (B) concentration in the collector layer 6 and emitter layer 7 of the lateral bipolar transistor 1.

  Thereafter, heat treatment is performed to activate arsenic (As) ion-implanted into the emitter electrode. By this treatment, boron is diffused from the collector layer 6 and the emitter layer 7 of the lateral bipolar transistor, and a collector diffusion layer 21 and an emitter diffusion layer 22 are formed. This is the diffusion layer forming step. In this way, the collector region 6 is formed by the collector layer 6 and the collector diffusion layer 21, and the emitter region 9 is formed by the emitter layer 7 and the emitter diffusion layer 22.

  In this way, by increasing the boron (B) concentration by ion implantation before forming the emitter diffusion layer 22 and the collector diffusion layer 21 of the lateral bipolar transistor 1, the junction can be latticed only by heat treatment for the subsequent SiGeHBT 10. It can be separated by 10 nm or more from the surface of the N type epitaxial layer 4 where damage such as defects is latent.

  This makes it possible to reduce the leakage current between the collector and the base and between the emitter and the base of the lateral bipolar transistor without impairing the characteristics of the simultaneously formed SiGeHBT 10. Note that the depth of this junction can also be controlled by controlling the amount of boron (B) ion implantation additionally performed.

As the distance between the junction and the N ⁺ buried layer decreases, the amount of decrease in breakdown voltage increases, so the junction depth is preferably within 100 nm. That is, the junction depth is desirably in the range of 10 nm to 100 nm.

  Moreover, in order to improve the high-frequency characteristics of SiGeHBT 10, it is necessary to lower the temperature of the heat treatment. By increasing the boron (B) concentration in advance as described above, it is possible to control the junction depth required even in the low-temperature heat treatment. Can be possible.

  For example, when the arsenic ion implantation of the emitter electrode of the SiGeHBT 10 is made of in-situ phosphorus-doped polysilicon, the temperature of the heat treatment can be reduced from about 1000 ° C. to about 900 ° C., whereby the base layer It is possible to secure a narrow base width by suppressing the diffusion of the boron profile. Therefore, the high frequency characteristics of the SiGeHBT 10 can be improved.

  After the collector diffusion layer 21 and the emitter diffusion layer 22 are formed as described above, a predetermined portion of the oxide film 23 is opened by dry etching using a resist pattern, and a metal film such as cobalt (Co) or titanium (Ti) is formed. A metal silicide layer 27 is formed by forming a film and then performing a heat treatment in a nitrogen atmosphere by sputtering titanium nitride (TiN).

  Next, the unreacted metal film formed on the surface of the oxide film 23 is removed by using a chemical solution such as ammonia hydrogen peroxide, and heat treatment is performed in a nitrogen atmosphere to reduce the resistance of the metal silicide layer 27.

Next, the process shown in FIG. 6 will be described. First, after forming a silicon nitride (Si ₃ N ₄ ) film 28 using a low pressure CVD method, an oxide film 29 is formed using a low pressure CVD method.

  Next, an interlayer film 30 is formed on the surface of the P-type semiconductor substrate 2, and a tungsten plug 31 is provided at a predetermined location, and each tungsten plug 31 is then subjected to a predetermined wiring.

  By the manufacturing method described above, a semiconductor device in which the lateral bipolar transistor 1 and the SiGeHBT 10 are simultaneously formed on the same semiconductor substrate can be manufactured.

4 is a Gummel plot of a lateral bipolar transistor according to the present invention. 1 is a schematic cross-sectional view of a lateral bipolar transistor according to the present invention. It is explanatory drawing which shows the manufacturing method of the semiconductor device containing a horizontal type | mold lateral bipolar transistor and a silicon germanium heterojunction bipolar transistor. It is explanatory drawing which shows the manufacturing method of the semiconductor device containing a horizontal type | mold lateral bipolar transistor and a silicon germanium heterojunction bipolar transistor. It is explanatory drawing which shows the manufacturing method of the semiconductor device containing a horizontal type | mold lateral bipolar transistor and a silicon germanium heterojunction bipolar transistor. It is explanatory drawing which shows the manufacturing method of the semiconductor device containing a horizontal type | mold lateral bipolar transistor and a silicon germanium heterojunction bipolar transistor. It is a cross-sectional schematic diagram which shows the heterojunction bipolar transistor shown in background art. It is a cross-sectional schematic diagram which shows the conventional horizontal type bipolar transistor shown in background art. It is a Gummel plot of a conventional lateral bipolar transistor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Lateral bipolar transistor 2 P type semiconductor substrate 3,12 N ⁺ buried layer 4,13 N type epitaxial layer 5 Base region 6 Collector layer 7 Emitter layer 8 Collector region 9 Emitter region 10 Silicon germanium heterojunction bipolar transistor 14, 15 Oxide film 16 Base extraction layer 17 Collector extraction layer 18 P-type element isolation layer 20 Base region 21 Collector diffusion layer 22 Emitter diffusion layer 23 Oxide film 24 Collector region 25 Emitter region 26 Emitter electrode 27 Metal silicide 28 Silicon nitride (Si ₃ N ₄ ) film 29 Oxide film 30 Interlayer film 31 Tungsten plug

Claims (7)

  In a lateral bipolar transistor in which a collector diffusion layer and an emitter diffusion layer are juxtaposed by thermally diffusing the impurity in a semiconductor layer containing an impurity provided above the base region, the impurity A lateral bipolar transistor characterized in that the collector diffusion layer and the emitter diffusion layer are provided by performing heat treatment after further ion-implanting impurities of the same conductivity type.   2. The lateral bipolar transistor according to claim 1, wherein the semiconductor layer is a silicon germanium layer.   A lateral bipolar transistor in which a collector diffusion layer and an emitter diffusion layer are juxtaposed by thermally diffusing the impurity in a semiconductor layer containing an impurity provided above the base region and a silicon germanium heterojunction bipolar transistor are the same. In a semiconductor device formed on a semiconductor substrate, the collector diffusion layer and the emitter diffusion layer are provided by performing heat treatment after ion implantation of an impurity having the same conductivity type as the impurity across the semiconductor layer. A semiconductor device characterized by the above.   4. The semiconductor device according to claim 3, wherein the semiconductor layer is a silicon germanium layer.   The semiconductor layer is a silicon germanium layer provided to form a base region of the silicon germanium heterojunction bipolar transistor, and the impurity ion implantation is performed simultaneously with the ion implantation into the base region. The semiconductor device according to claim 3.   In a method for manufacturing a lateral bipolar transistor in which a collector diffusion layer and an emitter diffusion layer are formed by thermally diffusing the impurity in a semiconductor layer containing an impurity provided on an upper part of a base region, A method of manufacturing a lateral bipolar transistor, wherein the collector diffusion layer and the emitter diffusion layer are formed by further ion-implanting impurities having the same conductivity type and then performing a heat treatment.   A lateral bipolar transistor that forms a collector diffusion layer and an emitter diffusion layer by thermally diffusing the impurity in the semiconductor layer containing the impurity provided on the base region and a silicon germanium heterojunction bipolar transistor on the same semiconductor substrate In the method of manufacturing a semiconductor device, the collector diffusion layer and the emitter diffusion layer are formed by further ion-implanting an impurity having the same conductivity type as the impurity across the semiconductor layer, and then performing a heat treatment. A method for manufacturing a semiconductor device, comprising: forming a semiconductor device.

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