JP2006216661A - Method of manufacturing semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor wafer which has a comparatively simple laminate structure and a sufficient tension strain, and in which few strain Si layers of a crystal defect are formed. <P>SOLUTION: The method of manufacturing the semiconductor wafer includes (a) a step of sequentially forming an SiGe mixed crystal layer 12 and a first Si layer 13 on the front surface of a silicon wafer 11, (b) a step of forming an SiO<SB>2</SB>layer 16 to one or both of the front layer of the first Si layer or the front layer of a supporting wafer 14, (c) a step of forming a laminate 17 by superposing the silicon wafer and the supporting wafer through an SiO<SB>2</SB>layer, (d) a step of performing the thin film of the silicon wafer of the laminate as a second Si layer 18, (e) a step of pouring ion of hydrogen or noble gas so that the peak of the ion concentration may be located in a predetermined region, (f) a step of performing the first heat treating of the laminate, and (g) a step of performing second heat treating continued to the first heat treating to alleviate an SiGe mixed crystal layer and diffusing Ge partly in the first Si layer and the second Si layer. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor wafer in which a strained Si layer having a two-dimensional tensile strain in its surface is formed.

In order to improve the performance of a semiconductor device using a silicon single crystal, it has been reported that it is effective to increase the mobility of electrons or holes in the silicon single crystal. Specifically, by using a strained Si layer in which two-dimensional tensile strain is incorporated in the silicon layer that is a region where electrons or holes flow, carrier mobility is improved. Possible C-MOS devices are being studied. A semiconductor wafer having a strained Si layer is formed by forming a relaxed SiGe layer having a lattice constant larger than that of Si on the Si wafer by using an epitaxial growth method and epitaxially growing a thin Si layer on the relaxed SiGe layer. Is made. Since the SiGe layer formed on the Si wafer has a Ge concentration of up to 30%, crystal defects such as misfit dislocations are generated due to the difference in lattice constant between the Si substrate and the SiGe layer. There has been a problem of adversely affecting the strained Si layer to be formed. The crystal defect density produced by the conventional manufacturing method was about 1 × 10 ⁵ to 1 × 10 ⁷ / cm ² . In order to solve this problem, a method using a buffer layer in which the Ge composition ratio of SiGe is increased at a constant gentle slope, a method using a buffer layer in which the Ge composition ratio is changed stepwise, and a Ge composition ratio exceeding There have been proposed a method using a buffer layer changed into a lattice shape, a method using a buffer layer in which the Ge composition ratio is changed with a constant inclination using a Si off-cut wafer, and the like.

As a method of manufacturing a semiconductor wafer having a strained Si layer while suppressing such crystal defects, an epitaxial growth method is provided by preparing a substrate in which a Si oxide layer and a first Si layer are sequentially provided on a Si support plate. Due to the above, dislocation conversion in which the lattice constant in an unstrained state on the first Si layer has a lattice constant different from the lattice constant of unstrained Si and the SiGe layer having the same composition as the SiGe layer to be grown next. A step of forming a layer (Ge layer), a step of forming a SiGe layer on the dislocation conversion layer by an epitaxial growth method, a step of lattice relaxation of the SiGe layer by a heat treatment, and a step of forming an SiGe layer on the SiGe layer by an epitaxial growth method. A method of manufacturing a semiconductor device has been proposed which includes a step of forming a strained second Si layer (see, for example, Patent Document 1). According to this Patent Document 1, by using a dislocation conversion layer such as a Ge layer, the interface between the first Si layer and the dislocation conversion layer is locally parallel to the interface by heat treatment at 800 ° C. for 1 hour, for example. When the SiGe layer is lattice-relaxed by this heat treatment, threading dislocations generated in the first Si layer are converted to slip dislocations at the interface due to the local strain, so that threading dislocations reach the SiGe layer. There is nothing. Therefore, it is described that a semiconductor device having an SOI substrate having a high-quality strained Si layer and having a thin SiGe layer as a base is obtained. A crystal substrate; an insulating crystal thin film formed on the crystal substrate; a first crystal thin film having a lattice matching with the insulating crystal thin film formed on the insulating crystal thin film; Disclosed is a semiconductor device comprising a second crystal thin film having a thickness equal to or less than a critical film thickness that is formed on a first crystal thin film and causes lattice relaxation having a lattice constant different from that of the first crystal thin film. (For example, refer to Patent Document 2). According to this patent document 2, by using calcium fluoride or γ-alumina as the insulating crystal thin film material, it is possible to sufficiently introduce strain into the semiconductor crystal thin film formed thereon with a film thickness of 100 nm or less. It is stated that it can be done.
The techniques of Patent Documents 1 and 2 both form a strained Si layer by epitaxially growing a Si layer on a SiGe layer having a lattice constant larger than that of Si, and a SiGe layer using a sufficiently lattice-relaxed SiGe layer. Two problems were solved: generating strain in the layer and preventing dislocations from propagating during growth of the strained Si layer by preventing dislocations in the SiGe layer.
JP-A-9-180999 (Claim 2, paragraphs [0020] to [0021], [0031]) JP 11-233440 A (Claim 2, paragraph [0006])

However, in the manufacturing method disclosed in Patent Document 1, when the heat treatment temperature for lattice relaxation is performed at 800 ° C., the slip dislocation necessary for sufficiently relaxing the SiGe layer does not occur at the interface, so that the lattice relaxation occurs. However, there is a drawback that sufficient distortion does not occur. When the heat treatment is performed at 1000 ° C. or higher, the Ge layer is melted, and the surface roughness is deteriorated and at the same time, crystal defects are generated. Further, in the semiconductor device disclosed in Patent Document 2, since a special layer such as calcium fluoride is used, it is difficult to use a normal semiconductor manufacturing process, the manufacturing cost is high, and the film thickness is reduced to 100 nm or less. Lacked versatility such as inferior to Furthermore, the semiconductor device having a strained Si layer disclosed in Patent Documents 1 and 2 involves a thin film growth process at least twice, and is composed of a complex multilayer structure involving many processes. Therefore, a high-quality semiconductor wafer cannot always be manufactured, and it cannot be said that it can be manufactured by a simple method.
An object of the present invention is to provide a method for manufacturing a semiconductor wafer having a relatively simple laminated structure, a sufficient tensile strain, and a strained Si layer having few crystal defects.

As shown in FIG. 1, the invention according to claim 1 includes (a) a step of forming a SiGe mixed crystal layer 12 and a first Si layer 13 on the surface of the silicon wafer 11 in this order, and (b) a surface layer of the first Si layer 13. Or a step of forming the SiO ₂ layer 16 on one or both of the surface layers of the support wafer 14 prepared separately from the silicon wafer 11; and (c) the silicon wafer 11 and the support wafer 14 are interposed via the SiO ₂ layer 16. A step of forming the laminated body 17 by superimposing, a step (d) forming the second Si layer 18 by thinning the silicon wafer 11 of the laminated body 17 to a predetermined thickness, and (e) the first Si layer 13. Implanting at least one of hydrogen ions or rare gas ions so that the peak of the ion concentration is located in a region including both the interface between the SiO ₂ layer 16 and the vicinity of the interface on the first Si layer 13 side, and (f) A step of holding the layered body 17 in an inert gas atmosphere containing nitrogen or Ar gas at 450 to 600 ° C. for 15 to 600 minutes for a first heat treatment; and (g) 15 to 800 to 1000 ° C. following the first heat treatment. A step of relaxing the SiGe mixed crystal layer 12 by holding for 300 minutes and performing a second heat treatment and diffusing Ge into a part of the first Si layer 13 and the second Si layer 18. It is a manufacturing method.
In the invention according to claim 1, by passing through the steps (a) to (g), it has a sufficient tensile strain in spite of a relatively simple laminated structure, and 1 × 10 ² to 1 × 10 6 A semiconductor wafer on which a strained Si layer having a crystal defect of about ³ / cm ² is formed can be manufactured.

Invention of Claim 2 is invention which concerns on Claim 1, Comprising: (h) The manufacturing method which performs the 3rd heat processing hold | maintained at 1100-1300 degreeC for 1 to 600 minutes in oxidizing atmosphere after 2nd heat processing It is.
In the invention according to claim 2, by increasing the concentration of Ge diffused in the step (g) by thinning the second Si layer 18 by the third heat treatment or changing the second Si layer 18 to an oxide film. Can be planned.

As shown in FIG. 2, the invention according to claim 3 includes (A) a step of forming a SiGe mixed crystal layer 22 and a first Si layer 23 in this order on the surface of the silicon wafer 21, and (B) a surface layer of the first Si layer 23. Alternatively, the step of forming the SiO ₂ layer 26 on one or both of the surface layers of the support wafer 24 prepared separately from the silicon wafer 21, and (C) the surface of the first Si layer 23 inside the silicon wafer 21 is 0.3 A step of implanting hydrogen or rare gas ions so that a peak of ion concentration is located below 1.0 μm to form a damage layer 21a at the ion implantation position inside the silicon wafer 21, and (D) the silicon wafer 21; forming a laminated body 27 by combining the support wafer 24 overlaid through the SiO ₂ layer 26, the peeling off the silicon wafer 21 (E) damaged layer 21a located Ri forming a second 2Si layer 28, (F) hydrogen so that the peak of the interface and ion concentration in a region including both near the interface of the 1Si layer 23 side of the 1Si layer 23 and the SiO ₂ layer 26 is located A step of implanting at least one of ions or rare gas ions; and (G) a first heat treatment by holding the laminate 27 at 450 to 600 ° C. for 15 to 600 minutes in an inert gas atmosphere containing nitrogen or Ar gas. (H) The first heat treatment is followed by the second heat treatment by holding at 800 to 1000 ° C. for 15 to 300 minutes to relax the SiGe mixed crystal layer 22 and the first Si layer 23 and the second Si layer 28. And a step of diffusing Ge in the portion.
In the invention according to claim 3, by passing through the steps (A) to (H), it has a sufficient tensile strain in spite of a relatively simple laminated structure, and 1 × 10 ² to 1 × 10 6 A semiconductor wafer on which a strained Si layer having a crystal defect of about ³ / cm ² is formed can be manufactured.

The invention according to claim 4 is the invention according to claim 3, wherein (I) the second heat treatment is followed by a third heat treatment that is held at 1100 to 1300 ° C. for 1 to 600 minutes in an oxidizing atmosphere. It is.
In the invention according to claim 4, by increasing the concentration of Ge diffused in the step (H) by thinning the second Si layer 28 or changing the second Si layer 28 to an oxide film by the third heat treatment. Can be planned.

The method for producing a semiconductor wafer of the present invention is a strained Si having a sufficient tensile strain and a crystal defect of about 1 × 10 ² to 1 × 10 ³ / cm ² despite a relatively simple laminated structure. There is an advantage that a semiconductor wafer in which a layer is formed can be manufactured.

Next, a first embodiment of the present invention will be described with reference to FIG.
First, as shown in FIG. 1, a silicon wafer 11 and a support wafer 14 are prepared. The silicon wafer 11 is not particularly limited as long as it is single crystal silicon, and is a Czochralski method (hereinafter referred to as CZ method) or a floating zone method (hereinafter referred to as FZ method). The produced silicon wafer can be used. In order to improve the quality of the strained Si layer forming the device, it is preferable to use one having few crystal defects at least near the surface of the wafer. Specifically, a wafer that has been heat-treated to form a DZ (Denuded Zone) layer near the wafer surface or a wafer that has reduced or eliminated so-called Grown-in defects in a single crystal by adjusting the pulling conditions of the CZ method. An FZ wafer or the like is preferable. The support wafer 14 can be made of the single crystal silicon mentioned in the silicon wafer 11, but not only the single crystal silicon but also a high resistivity wafer having a resistivity of 1000 Ωcm or more can be used for high frequency characteristics. An excellent semiconductor wafer for mobile communication can be manufactured. The supporting wafer 14 may be an insulating substrate such as a quartz substrate, a sapphire substrate, a SiC substrate, or an aluminum nitride substrate.

Next, the SiGe mixed crystal layer 12 and the first Si layer 13 are formed in this order on the surface of the silicon wafer 11 (step (a)). The SiGe mixed crystal layer 12 and the first Si layer 13 may be formed by, for example, a molecular beam epitaxy (MBE) apparatus or an ultra high vacuum chemical vapor deposition (UHV-CVD) apparatus. preferable. The Ge composition of the SiGe mixed crystal layer 12 to be formed is preferably 3 to 30%, particularly preferably 5 to 25%. If the Ge composition of the SiGe mixed crystal layer 12 is less than 3%, the Ge concentration is reduced by diffusion, and a strained Si layer having sufficient tensile strain is not formed. If the Ge composition exceeds 30%, the first Si layer 13 and Due to the difference in lattice constant of the SiGe mixed crystal layer 12, misfit dislocations are likely to occur in the SiGe mixed crystal layer 12, and the misfit dislocations are increased by the subsequent heat treatment process, and finally formed strained Si layers. Adversely affects the crystallinity of The thickness of the SiGe mixed crystal layer 12 to be formed is preferably 20 nm to 1 μm, particularly preferably 50 to 500 nm. If the thickness is less than 20 nm, a strained Si layer having a sufficient tensile strain is not formed. If the thickness exceeds 1 μm, device characteristics formed in the strained Si layer deteriorate due to an increase in parasitic capacitance or the like. 5-50 nm is preferable and, as for the thickness of the 1st Si layer 13 to form, 10-30 nm is especially preferable.
Next, the SiO ₂ layer 16 is formed on one or both of the surface layer of the first Si layer 13 and the surface layer of the support wafer 14 (step (b)). A normal thermal oxidation method may be used to form the SiO ₂ layer 16, or SiO ₂ is deposited on one or both of the surface layer of the first Si layer 13 and the surface layer of the support wafer 14 by the CVD method. _Two layers 16 may be formed. The thickness of the SiO ₂ layer 16 to be formed is preferably 50 to 1000 nm, particularly preferably 100 to 250 nm.

Next, the laminated body 17 is formed by superimposing the silicon wafer 11 and the support wafer 14 via the SiO ₂ layer 16 (step (c)). In this step (c), the silicon wafer 11 and the support wafer 14 are bonded together by superposing them at room temperature via the SiO ₂ layer 16.
Next, the silicon wafer 11 of the laminate 17 is thinned to form the second Si layer 18 (step (d)). The thickness of the second Si layer 18 obtained by thinning is preferably 30 to 300 nm, particularly preferably 50 to 150 nm. If the thickness is less than 30 nm, the strained Si layer becomes too thin. If the thickness exceeds 300 nm, the strained Si layer becomes too thick, and defects are likely to occur. It will fall. Examples of the method for thinning the silicon wafer 11 include grinding and polishing, wet etching using an acid aqueous solution and an alkaline aqueous solution, gas phase etching using plasma, lapping, and the like. It is preferable to perform heat treatment for improving the adhesive strength of the laminate 17. In this heat treatment, for example, by holding at 1100 ° C. for 120 minutes in an argon gas atmosphere, the bonding strength at the bonding position 17a is improved.

Next, at least one of hydrogen ions or rare gas ions is applied so that the ion concentration peak is located in the region 15 including both the interface between the first Si layer 13 and the SiO ₂ layer 16 and the vicinity of the interface on the first Si layer 13 side. Inject (step (e)). By ion-implanting into the region 15, hydrogen ions or rare gas ions implanted by the first and second heat treatments performed in the subsequent steps weaken the bonding force between the first Si layer 13 and the SiO ₂ layer 16 during the heat treatment. This makes it easy for the SiGe mixed crystal layer 12 to relax the strain. As a result, the second Si layer 18 remaining at a predetermined thickness lattice matches with the strain-relieved SiGe diffusion layer 19 to form a strained Si layer 18a. The vicinity of the interface on the first Si layer 13 side means a region including both the interface between the first Si layer 13 and the SiO ₂ layer 16 and the vicinity of the interface on the first Si layer 13 side. Examples of the rare gas to be injected include helium and neon. Hydrogen ions are particularly preferable as the implanted ions. When hydrogen ions are implanted, the ion implantation amount is preferably 3 to 50 × 10 ¹⁵ atoms / cm ² , particularly preferably 10 × 10 ¹⁵ atoms / cm ² . If the ion implantation amount is less than 3 × 10 ¹⁵ atoms / cm ² , Ge in the SiGe mixed crystal layer 12 does not easily move, and the effect does not change even if it exceeds 50 × 10 ¹⁵ atoms / cm ² .
Next, a first heat treatment is performed by holding the laminate 17 at 450 to 600 ° C. for 15 to 600 minutes in an inert gas atmosphere containing nitrogen or Ar gas (step (f)). In this first heat treatment, it is particularly preferable to hold at 500 ° C. for 30 minutes. Furthermore, the SiGe mixed crystal layer 12 is relaxed by holding the first heat treatment at 800 to 1000 ° C. for 15 to 300 minutes and performing the second heat treatment, and Ge is partially added to the first Si layer 13 and the second Si layer 18. Diffusion (step (g)). In this second heat treatment, it is particularly preferable to hold at 850 ° C. for 120 minutes. By performing the first heat treatment and the second heat treatment, the SiGe mixed crystal layer 12 is relaxed, and Ge is diffused into a part of the first Si layer 13 and the second Si layer 18 to form the SiGe diffusion layer 19. The second Si layer 18 is pulled so as to follow the lattice constant of the SiGe diffusion layer 19 to be distorted to become a strained Si layer 18a.

Moreover, you may perform the 3rd heat processing hold | maintained at 1100-1300 degreeC for 1 to 600 minutes in oxidizing atmosphere after 2nd heat processing ((h) process). The second Si layer 18 that has become the strained Si layer 18a by the third heat treatment is thinned or the second Si layer 18 that has become the strained Si layer 18a is changed to an oxide film, thereby being diffused in the step (g). Further, the Ge in the SiGe diffusion layer 19 can be highly concentrated. When the strained Si layer 18a has a necessary thickness as a strained Si layer after the second heat treatment in the step (g) is completed, and the SiGe diffusion layer 19 has a necessary and sufficient Ge concentration. The third heat treatment can be omitted. Finally, by removing the oxide film 20 formed on the surface and exposing the surface layer, a semiconductor wafer having a strained Si layer is obtained. Although the thickness of the strained Si layer 18a depends on the Ge concentration of the SiGe diffusion layer 19, it is preferably 5 to 30 nm.
In addition, although it processed so that the distortion | strained Si layer 18a may be formed from the 2nd Si layer 18 by the 1st and 2nd heat treatment process, while oxidizing the surface layer of the 2nd Si layer 18, it is Ge in the SiGe mixed crystal layer 12 Each step may be carried out so that the strained Si layer is not formed by diffusing. In this case, after removing the oxide film 20 after the heat treatment step, a semiconductor wafer in which the strained Si layer 18a is formed is obtained by stacking Si on the exposed SiGe diffusion layer 19 by epitaxial growth. As described above, through the steps (a) to (g), the tensile strain is sufficient despite the relatively simple laminated structure, and 1 × 10 ² to 1 × 10 ³ / cm ^2. A semiconductor wafer on which a strained Si layer having a small degree of crystal defects can be manufactured.

Next, a second embodiment of the present invention will be described with reference to FIG.
As shown in FIG. 2, a silicon wafer 21 and a support wafer 24 are prepared. The silicon wafer 21 and the support wafer 24 here can be of the same type as the silicon wafer 11 and the support wafer 14 in the first embodiment described above. First, the SiGe mixed crystal layer 22 and the first Si layer 23 are formed in this order on the surface of the silicon wafer 21 (step (A)). Subsequently, the SiO ₂ layer 26 is formed on one or both of the surface layer of the first Si layer 23 and the surface layer of the support wafer 24 (step (B)). The steps (A) and (B) can be performed in the same manner as the steps (a) and (b) in the first embodiment described above.

Next, ions of hydrogen or a rare gas are implanted so that the ion concentration peak is located 0.3 to 1.0 μm below the surface of the first Si layer 23 inside the silicon wafer 21, and the ion implantation position inside the silicon wafer 21. The damage layer 21a is formed on (step (C)). The position where the damaged layer 21a is formed is determined by the ion implantation energy. Further, in order to peel the silicon wafer 11 in the subsequent peeling step with the formed damaged layer 21a as a boundary, an ion implantation amount exceeding 1 × 10 ¹⁶ atoms / cm ² is required.
Next, the laminated body 27 is formed by superimposing the silicon wafer 21 and the support wafer 24 via the SiO ₂ layer 26 (step (D)). In this step (D), the silicon wafer 21 and the support wafer 24 are bonded together by superposing them at room temperature via the SiO ₂ layer 26. Subsequently, the second Si layer 28 is formed by peeling the silicon wafer 21 at the position of the damaged layer 21a (step (E)). In this step (E), the laminate 27 is subjected to a heat treatment at 500 ° C. or higher, so that peeling proceeds at the damaged layer 21a position. The peeling heat treatment is preferably held at 500 ° C. for 30 minutes in a nitrogen atmosphere. Although the surface of the second Si layer 28 after peeling is a mirror surface, it has a slight surface roughness, so that it is preferable to perform a flattening process. Examples of the flattening treatment include a method of performing polishing with a very small polishing allowance called touch polishing, a method of flattening by heat treatment in an atmosphere of argon gas or hydrogen gas, and a method of flattening these in combination. The flattening by the heat treatment is preferably performed at 1000 to 1300 ° C. for about 0.5 to 5 hours when a normal resistance heating type heat treatment furnace is used, and 1100 when an RTA (Rapid Thermal Annealing) apparatus is used. A heat treatment of ˜1350 ° C. for about 1 to 120 seconds is preferred. Note that planarization treatment can be performed by combining these heat treatments. It is preferable to perform a heat treatment for improving the adhesive strength of the laminate 27. In this heat treatment, for example, by holding at 1100 ° C. for 120 minutes in an argon gas atmosphere, the bonding strength at the bonding position 27a is improved.

Next, at least one of hydrogen ions or rare gas ions is applied so that the ion concentration peak is located in a region 31 including both the interface between the first Si layer 23 and the SiO ₂ layer 26 and the vicinity of the interface on the first Si layer 23 side. Inject (step (F)). By ion-implanting into the region 31, hydrogen ions or rare gas ions implanted by the first and second heat treatments performed in subsequent steps weaken the bonding force between the first Si layer 23 and the SiO ₂ layer 26 during the heat treatment. This makes it easy for the SiGe mixed crystal layer 22 to relax the strain. As a result, the second Si layer 28 remaining at a predetermined thickness lattice-matches with the strain-relieved SiGe diffusion layer 29 to form a strained Si layer 28a. The vicinity of the interface on the first Si layer 23 side refers to a region including both the interface between the first Si layer 23 and the SiO ₂ layer 26 and the vicinity of the interface on the first Si layer 23 side. Examples of the rare gas to be injected include helium and neon. Hydrogen ions are particularly preferable as the implanted ions. When hydrogen ions are implanted, the ion implantation amount is preferably 3 to 50 × 10 ¹⁵ atoms / cm ² , particularly preferably 10 × 10 ¹⁵ atoms / cm ² . If the ion implantation amount is less than 3 × 10 ¹⁵ atoms / cm ² , Ge in the SiGe mixed crystal layer 22 does not easily move, and the effect does not change even if it exceeds 50 × 10 ¹⁵ atoms / cm ² .
Next, the laminated body 27 is subjected to a first heat treatment while being held at 450 to 600 ° C. for 15 to 600 minutes in an inert gas atmosphere containing nitrogen or Ar gas (step (G)). In this first heat treatment, it is particularly preferable to hold at 500 ° C. for 30 minutes. Furthermore, the SiGe mixed crystal layer 22 is relaxed by holding the first heat treatment at 800 to 1000 ° C. for 15 to 300 minutes and performing the second heat treatment, and Ge is partially added to the first Si layer 23 and the second Si layer 28. It diffuses ((H) process). In this second heat treatment, it is particularly preferable to hold at 850 ° C. for 120 minutes. By performing the first heat treatment and the second heat treatment, the SiGe mixed crystal layer 22 is relaxed, and Ge is diffused into a part of the first Si layer 23 and the second Si layer 28 to form the SiGe diffusion layer 29. The second Si layer 28 is pulled so as to follow the lattice constant of the SiGe diffusion layer 29 to be distorted to become a strained Si layer 28a.

Moreover, you may perform the 3rd heat processing hold | maintained for 1 to 600 minutes at 1100-1300 degreeC in oxidizing atmosphere after 2nd heat processing ((I) process). The second Si layer 28 that has become the strained Si layer 28a by the third heat treatment is thinned, or the second Si layer 28 that has become the strained Si layer 28a is changed to an oxide film so that it is diffused in the step (H). Further, the Ge in the SiGe diffusion layer 29 can be highly concentrated. When the strained Si layer 28a has a necessary thickness as a strained Si layer after the second heat treatment in the step (H) is completed, and the SiGe diffusion layer 29 has a necessary and sufficient Ge concentration. The third heat treatment can be omitted. Finally, by removing the oxide film 30 formed on the surface and exposing the surface layer, a semiconductor wafer having a strained Si layer is obtained. Although the thickness of the strained Si layer 28a depends on the Ge concentration of the SiGe diffusion layer 29, it is preferably 5 to 30 nm.
In addition, although it processed so that the distortion | strained Si layer 28a may be formed from the 2nd Si layer 28 by the 1st and 2nd heat treatment process, while oxidizing the surface layer of the 2nd Si layer 28, Ge in the SiGe mixed crystal layer 22 is included. Each step may be carried out so that the strained Si layer is not formed by diffusing. In this case, after removing the oxide film 30 after the heat treatment step, a semiconductor wafer in which the strained Si layer 28a is formed is obtained by stacking Si on the exposed SiGe diffusion layer 29 by an epitaxial growth method. As described above, through the steps (A) to (H), the tensile strain is sufficient despite the relatively simple laminated structure, and 1 × 10 ² to 1 × 10 ³ / cm ^2. A semiconductor wafer on which a strained Si layer having a small degree of crystal defects can be manufactured.

Next, embodiments of the present invention will be described in detail.
<Example 1>
First, p-type silicon wafers having a diameter of 200 mm, a crystal orientation of <100>, and a resistivity of 10 Ωcm were prepared as a silicon wafer and a support wafer, respectively. A SiGe mixed crystal layer and a first Si layer were formed in this order on the surface of the silicon wafer. An RT-CVD apparatus is used to form the SiGe mixed crystal layer and the first Si layer, and source gases are supplied so that the source gases are GeH ₄ and SiH ₄ , the growth temperature is 650 ° C., and the SiGe composition is Si _0.8 Ge _0.2. The amount of the grown SiGe mixed crystal layer was adjusted to 100 nm, and the thickness of the first Si layer was set to 20 nm. A SiO ₂ layer was formed on the surface layer of the support wafer. The formation of the SiO ₂ layer was performed by a thermal oxidation method, the oxidation conditions were pyrogenic oxidation (hydrogen combustion oxidation) at 950 ° C., and the thickness of the SiO ₂ layer was 100 nm. Next, a laminated body was formed by superposing the silicon wafer and the supporting wafer via the SiO ₂ layer. The silicon wafer and the support wafer were superposed and adhered at room temperature, and further subjected to a bonding heat treatment for 30 minutes at 1000 ° C. in a non-oxidizing atmosphere to increase the bonding strength at the bonding position.
Next, the laminated silicon wafer was thinned to form a second Si layer. In this thinning, surface grinding, etching, surface polishing and gas phase etching were performed. In the surface grinding, the second Si layer was formed by grinding until the silicon wafer was about 15 μm. In the etching, the surface layer of the second Si layer after surface grinding was etched by about 1 μm to make the second Si layer about 14 μm. In the surface polishing, the etched second Si layer was polished to make the second Si layer 3 μm. Further, in the gas phase etching, the second Si layer after surface polishing was etched to reduce the thickness of the second Si layer to 100 nm. Next, hydrogen ions were implanted so that the peak of the ion concentration was located in a region including both the interface between the first Si layer and the SiO ₂ layer and the vicinity of the interface on the first Si layer side. The ion implantation amount was 10 × 10 ¹⁵ atoms / cm ² . The SiGe mixed crystal layer is relaxed by applying a first heat treatment in which the ion-implanted laminate is held at 500 ° C. for 30 minutes in an inert gas atmosphere containing nitrogen gas, followed by a second heat treatment for 120 minutes at 850 ° C. At the same time, Ge was diffused in part of the first Si layer and the second Si layer to form a SiGe diffusion layer. Furthermore, the laminated body was subjected to a third heat treatment that was held at 1200 ° C. for 1 hour in an oxidizing atmosphere. By performing the first to third heat treatments, the second Si layer was thinned, and was strained to follow the lattice constant of the SiGe diffusion layer, resulting in a strained Si layer. Finally, the oxide film formed on the surface was removed to expose the strained Si layer as the outermost layer, thereby obtaining a semiconductor wafer having a strained Si layer. The thickness of the strained Si layer of the obtained semiconductor wafer is 10 nm, the thickness of the SiGe diffusion layer is 110 nm, and the Ge concentration of the SiGe diffusion layer is 18%. Was obtained.

<Example 2>
First, p-type silicon wafers having a diameter of 200 mm, a crystal orientation of <100>, and a resistivity of 10 Ωcm were prepared as a silicon wafer and a support wafer, respectively. A SiGe mixed crystal layer and a first Si layer were formed in this order on the surface of the silicon wafer. An RT-CVD apparatus is used to form the SiGe mixed crystal layer and the first Si layer, and the raw material gas is supplied with GeH ₄ and SiH ₄ , the growth temperature is 650 ° C., and the SiGe composition is Si _0.9 Ge _0.1. The thickness of the grown SiGe mixed crystal layer was adjusted to 100 nm, and the thickness of the first Si layer was adjusted to 15 nm. A SiO ₂ layer was formed on the surface layer of the support wafer. The formation of the SiO ₂ layer was performed by a thermal oxidation method, the oxidation conditions were pyrogenic oxidation (hydrogen combustion oxidation) at 950 ° C., and the thickness of the SiO ₂ layer was 100 nm. Next, hydrogen ions were implanted so that an ion concentration peak was located 1.0 μm below the surface of the first Si layer inside the silicon wafer, thereby forming a damage layer at the ion implantation position inside the silicon wafer. The ion implantation amount was 1 × 10 ¹⁶ atoms / cm ² . Next, a laminated body was formed by superimposing the silicon wafer and the support wafer via the SiO ₂ layer. The silicon wafer and the support wafer were superposed and adhered at room temperature, heat treatment was performed at 500 ° C. for 30 minutes, and the silicon wafer was peeled off at the damaged layer position to form a second Si layer. The thickness of the second Si layer was about 130 nm. Further, a bonding heat treatment was performed for 2 hours at 900 ° C. in a nitrogen atmosphere to increase the bonding strength at the bonding position.
Subsequently, the surface of the second Si layer was planarized by performing a touch polishing with a polishing allowance of about 30 nm. Next, hydrogen ions were implanted so that the peak of the ion concentration was located in a region including both the interface between the first Si layer and the SiO ₂ layer and the vicinity of the interface on the first Si layer side. The ion implantation amount was 10 × 10 ¹⁵ atoms / cm ² . The SiGe mixed crystal layer is relaxed by applying a first heat treatment in which the ion-implanted laminate is held at 500 ° C. for 30 minutes in an inert gas atmosphere containing nitrogen gas, followed by a second heat treatment for 120 minutes at 850 ° C. At the same time, Ge was diffused in part of the first Si layer and the second Si layer to form a SiGe diffusion layer. Further, the laminate was subjected to a third heat treatment that was held at 1200 ° C. for 4 hours in an oxidizing atmosphere. By performing the first to third heat treatments, the second Si layer disappeared as an SiGe diffusion layer and an oxide film. The oxide film formed on the surface was removed to expose the outermost SiGe diffusion layer. Finally, a strained Si layer having a thickness of 12 nm was formed on the exposed SiGe diffusion layer by epitaxial growth to obtain a semiconductor wafer having a strained Si layer. An RT-CVD apparatus was used to form the strained Si layer, the source gas was SiH ₄ , and the growth temperature was 650 ° C. The thickness of the strained Si layer of the obtained semiconductor wafer is 12 nm, the thickness of the SiGe diffusion layer is 55 nm, and the Ge concentration of the SiGe diffusion layer is 19%. Was obtained.

Process drawing which shows the manufacturing method of the semiconductor wafer in the 1st embodiment. Process drawing which shows the manufacturing method of the semiconductor wafer in the 2nd embodiment.

Explanation of symbols

11, 21 Silicon wafer 12, 22 SiGe mixed crystal layer 13, 23 First Si layer 14, 24 Support wafer 16, 26 SiO ₂ layer 17, 27 Laminate 18, 28 Second Si layer 18a, 28a Strained Si layer 19, 29 SiGe Diffusion layer 20, 30 Oxide film 21a Damage layer

Claims (4)

(a) forming a SiGe mixed crystal layer (12) and a first Si layer (13) in this order on the surface of the silicon wafer (11);
(b) forming a SiO ₂ layer (16) on one or both of the surface layer of the first Si layer (13) and the surface layer of the support wafer (14) prepared separately from the silicon wafer (11); ,
(c) forming the laminate (17) by superimposing the silicon wafer (11) and the support wafer (14) through a SiO ₂ layer (16);
(d) forming a second Si layer (18) by thinning the silicon wafer (11) of the laminate (17) to a predetermined thickness;
(e) Hydrogen ions or rare gases so that the ion concentration peak is located in a region including both the interface between the first Si layer (13) and the SiO ₂ layer (16) and the vicinity of the interface on the first Si layer (13) side. Implanting at least one of ions;
(f) performing a first heat treatment by holding the laminate (17) in an inert gas atmosphere containing nitrogen or Ar gas at 450 to 600 ° C. for 15 to 600 minutes;
(g) The SiGe mixed crystal layer (12) is relaxed by holding the first heat treatment at 800 to 1000 ° C. for 15 to 300 minutes for a second heat treatment to relax the SiGe mixed crystal layer (12) and the first Si layer (13) and the first heat treatment. And a step of diffusing Ge into a part of the 2Si layer (18). (h) The manufacturing method according to claim 1, wherein after the second heat treatment, a third heat treatment is performed by holding at 1100 to 1300 ° C. for 1 to 600 minutes in an oxidizing atmosphere. (A) forming a SiGe mixed crystal layer (22) and a first Si layer (23) in this order on the surface of the silicon wafer (21);
(B) forming a SiO ₂ layer (26) on one or both of the surface layer of the first Si layer (23) and the surface layer of a support wafer (24) prepared separately from the silicon wafer (21); ,
(C) Hydrogen or rare gas ions are implanted in the silicon wafer (21) so that an ion concentration peak is located 0.3 to 1.0 μm below the surface of the first Si layer (23). Forming a damage layer (21a) at the ion implantation position inside the wafer (21);
(D) forming the laminate (27) by superimposing the silicon wafer (21) and the support wafer (24) through a SiO ₂ layer (26);
(E) forming a second Si layer (28) by peeling the silicon wafer (21) at the position of the damaged layer (21a);
(F) Hydrogen ions or rare gases so that the ion concentration peak is located in a region including both the interface between the first Si layer (23) and the SiO ₂ layer (26) and the vicinity of the interface on the first Si layer (23) side. Implanting at least one of ions;
(G) performing a first heat treatment by holding the laminate (27) in an inert gas atmosphere containing nitrogen or Ar gas at 450 to 600 ° C. for 15 to 600 minutes;
(H) The SiGe mixed crystal layer (22) is relaxed by holding the first heat treatment at 800 to 1000 ° C. for 15 to 300 minutes for a second heat treatment to relax the SiGe mixed crystal layer (22) and the first Si layer (23) and the first heat treatment. And a step of diffusing Ge into part of the 2Si layer (28). (I) The manufacturing method according to claim 3, wherein after the second heat treatment, a third heat treatment is performed by holding at 1100 to 1300 ° C. for 1 to 600 minutes in an oxidizing atmosphere.

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