JP2006211652A - Transmission state reporting method of digital transmission system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To facilitate maintaining operation of high-quality state by transferring/transmitting the presence or absence of reflection waves, the state of a BER value, etc. which are important for digital transmission of OFDM signals or the like so as to be visually confirmed from other places. <P>SOLUTION: The transmission device system comprises a transfer/transmission device T provided with a function which takes signals about electric field intensity, the presence or absence of reflection waves, and the state of a BER value from the processing part on a reception side, thus making the state into VBL video, and a transfer/transmission device R added with a function for extracting the information which is transmitted for transfer, for superposition on a video effective area. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a digital transmission apparatus using a multicarrier modulation scheme such as an Orthogonal Frequency Division Multiplex (OFDM) modulation scheme.

In recent years, digital broadcasting has been studied in Europe, the United States, and Japan, and the adoption of OFDM modulation as a modulation method is considered promising. This OFDM modulation system is a kind of multi-carrier modulation system, which is a combination of a large number of digital modulation waves. In this case, a QPSK (Quadrature Phase Shift Keying) system or the like is used as a modulation system for each carrier, and an OFDM signal that is a composite wave can be obtained. Here, this OFDM signal is expressed by a mathematical expression as follows. First, assuming that the QPSK signal of each carrier is α _k (t), this can be expressed by equation (1).

α _k (t) = a _k (t) × cos (2πkft) + b _k (t) × sin (2πkft) (1)
Here, k indicates a carrier number, and a _k (t) and b _k (t) are data of the k-th carrier and take a value of [−1] or [1]. Next, when the number of carriers is N, the OFDM signal is a combination of N carriers, and when this is β _k (t), this can be expressed by the following equation (2).

β _k (t) = Σα _k (t) (where k = 1 to N) (2)
By the way, in the OFDM modulation system, a guard interval is generally added to a signal in order to reduce the influence of multipath. This OFDM signal is composed of the above signal units. For example, the signal unit symbols include all 894 pairs of symbols of 1,072 samples obtained by adding 48 samples of guard interval data to 1024 samples of valid samples, and 6 sets of synchronization symbols. It consists of repetitions in units of streams called frames consisting of 900 symbols.

  FIG. 20 is a block diagram showing a basic configuration of a modulation / demodulation unit in an OFDM transmission apparatus according to the prior art, a transmission path encoding unit 1T, an encoding unit 2T, an IFFT (Inverse Fast Fourier Transform) unit 3A, a guard. A transmission side processing unit 101 including an addition unit 3B, a synchronization symbol insertion unit 5, a clock oscillator 6, and a quadrature modulation processing unit 8, a transmission side Tx having a transmission antenna (not shown), a reception antenna and an ACG unit 9A (not shown), orthogonal demodulation Receiving side including processing unit 9B, synchronization detection & correlation unit 4A, FST correction unit 4B, FFT (Fast Fourier Transform) unit 3C, decoding unit 2R, transmission path decoding unit 1R, and voltage-controlled clock oscillator 10 The transmission side Tx and the reception side Rx are configured by, for example, a wireless transmission path L using radio waves. Tied. Hereinafter, the modulation / demodulation processing of the OFDM signal will be described with reference to FIG. The data Din continuously input to the transmission path encoding unit 1T of the transmission side processing unit 101 is processed for each frame of, for example, 900 symbols, and 894 pieces of data excluding 6 symbol periods of synchronization symbols within this frame period. For each information symbol, it is output as rate-converted data Dii in an intermittent state in a total of 800 sample periods from 1 to 400 and from 625 to 1024. Also, the transmission path encoding unit 1T generates a frame control pulse FST on the transmission side for every 900 symbols which is a frame period, and supplies it to other blocks as a frame pulse signal indicating the start of the synchronization symbol period. The encoding unit 2T encodes the input data Dii and outputs data Rf and If mapped to the two axes of the I axis and the Q axis. The IFFT unit 3A regards these data Rf and If as frequency components and converts them into a time axis signal R (real component) and I (imaginary component) consisting of 1024 samples.

  The guard adding unit 3B adds, for example, the waveform of the first 48 samples after the 1024 samples among the waveforms of the time axis signals R and I consisting of 1024 samples, and is an information symbol consisting of a total of 1072 samples of the time axis waveform. Rg and Ig are output. The 48 samples serve as a buffer band when the reflected wave is mixed. The synchronization symbol insertion unit 5 inserts a synchronization waveform consisting of 6 symbols stored in advance in a memory or the like into the information symbols Rg and Ig for each of 894 samples, and generates frame-structured data Rsg and Isg. create. These data Rsg and Isg are supplied to the quadrature modulation processing unit 8, where they are generated by the D / A converter 81, the quadrature modulator 82, and the local oscillator 83 as an OFDM modulated wave signal RF by a carrier of the frequency Fc, Although not shown here, the signal is amplified and sent to the transmission line L via the transmission antenna. As the transmission band, a UHF band or a microwave band is used. Note that the clock CK (frequency 16 MHz) necessary for processing on the transmission side Tx is supplied from the clock oscillator 6 to each block as the transmission side clock CKd.

  The OFDM modulated wave signal RF transmitted as described above is input to the quadrature demodulation processing unit 9B via the AGC unit 9A, which is the high frequency unit of the reception side Rx, via a reception antenna (not shown), and the quadrature demodulator 91. Is multiplied by the local oscillation signal of frequency Fc ′ supplied from the voltage controlled oscillator 93 and quadrature demodulated to a baseband signal, and then digitized by the A / D converter 92, and the data R′sg and I′sg Is converted to These data R'sg and I'sg are supplied to an FFT (Fast Fourier Transform) unit 3C, where a gate signal for determining a data period of 1024 samples to be used as an FFT is generated based on the pulse FSTrc. Then, by excluding 48 samples that are buffer bands, the time-axis waveform signals R′sg and I′sg are converted into frequency component signals R′f and I′f. These frequency component signals R′f and I′f are identified and decoded by the decoding unit 2R to become data D′ o, which is output as a continuous signal Dout by the transmission path decoding unit 1R. The On the other hand, the data R′sg and I′sg are also input to the synchronization detection & correlation unit 4A, where a synchronization symbol group is detected, and thereby a pulse FSTr serving as a frame pulse is extracted. This pulse FSTr becomes a frame control pulse of the receiving side Rx and is supplied to each block of the receiving side Rx. Further, the synchronization detection & correlation unit 4A compares the clock CKrc generated from the voltage controlled clock oscillator 10 with the synchronization components of the data R′sg and I′sg, and outputs the correlation output Sc according to the comparison result to the FST correction unit. Output to 4B. Then, the control voltage VC is generated by the FST correction unit 4B, thereby controlling the voltage control clock oscillator 10, and a clock CKrc having a correct cycle is generated and supplied to each block on the receiving side.

  Next, the details of each block shown in FIG. 20 will be described. The transmission path encoding unit 1T performs interleaving processing, energy spreading processing, error correction code processing, and the like in order to prevent data errors due to various errors that may be mixed during transmission. The encoding unit 2T converts the signal Dii into information of predetermined points on the I and Q axes using the mapping ROM, and replaces the signal in the period corresponding to the unnecessary carrier with 0 to generate data Rf and If. To do. The IFFT converter 3A converts the input signals Rf and If into time-axis waveforms R and I having a symbol period determined by the clock CKd and the pulse FST. Specifically, this can be realized by using PDSP 16510 of Pressy. The guard adding unit 3B includes a delay unit that delays the signals R and I input thereto by 1024 samples, and a switch that selects a delayed output only from the 1025th to 1072th samples. These are added by the clock CK and the pulse FST. You can decide the timing. The symbols consisting of all 1072 samples obtained here are information symbols Rg, Ig by adding a time axis waveform between 48 samples from the first sample to the 1025th sample to the 1072 sample. The quadrature modulation processing unit 8 performs D / A conversion on the real part signal Rsg and the imaginary part signal Isg by the D / A converter 81, and the quadrature modulator 82 performs the real part signal on Modulation is performed with the carrier signal of the frequency fc from the oscillator 83 as it is, and the imaginary part signal is subjected to quadrature modulation by modulating the carrier signal of the frequency fc of the oscillator 83 with a signal shifted in phase by 90 °. The signals are combined to obtain an OFDM modulated wave signal.

Next, the configuration operation of the receiving side Rx will be described. On the receiving side Rx, the transmitted frame-structured signal is input to the AGC unit 9A, where a control signal Sa for correcting the received signal level to an appropriate level is generated and the level is changed. The OFDM frame configuration signal that has reached an appropriate level in the AGC unit 9A is input to the orthogonal demodulation processing unit 9B. In this processing, contrary to the transmission side Tx, an output demodulated by the carrier signal of the frequency Fc ′ output from the voltage controlled oscillator 93 is taken out by the quadrature demodulator 91 as a real part signal, and the carrier signal is extracted by 90 °. The phase-shifted and demodulated output is taken out as an imaginary part signal. Then, each demodulated analog signal of the real part and the imaginary part is converted into a digital signal by the A / D converter 92. The synchronization detection & correlation unit 4A searches for a frame break from the received signals R′sg and I′sg, outputs a frame reference FSTrc, and outputs a correlation output Sc. Then, the FFT unit 3C delimits symbols based on the pulse FSTrc, performs OFDM demodulation by performing Fourier transform as described above, and outputs data R′f and I′f. The decryption unit 2R identifies the data R′f and I′f by, for example, a ROM table method, and calculates the data D′ o. The transmission path decoding unit 7 performs deinterleaving processing, energy despreading processing, error correction processing, etc., and performs continuous digital data Dout, a signal Sb indicating a BER (bit error rate) state that is an error correction processing status, and The receiving side clock signal CK _RX is output.

  Next, FIG. 21 shows an example of a specific configuration of the synchronization detection & correlation unit 4A. The time-axis signals R′sg and I′sg, which are digital signals subjected to quadrature demodulation, are input to the NULL end detector 4-1 and the SWEEP calculator 4-2. The NULL end detector 4-1 detects NULL in the no-signal state in the synchronization symbol from the frame group symbol group, detects the approximate position (timing) of the synchronization symbol, and SWEEP by the timer circuit from the end of NULL. A symbol start time is estimated and a SWEEP start instruction pulse ST is output. The SWEEP computing unit 4-2 estimates the SWEEP symbol waveform by taking in the waveform existing after the second symbol with reference to the SWEEP start instruction pulse ST, and searches for the exact switching timing of each symbol. Specifically, using the memory 4-3 in which the pattern of the SWEEP symbol is stored in advance, for example, the input OFDM signal and the pattern read from the memory 4-3 are subjected to correlation calculation, and the correlation output Sc is obtained as shown in FIG. To the FST correction unit 4B. The FST correction unit 4B calculates a phase shift from the exact switching timing of each symbol with reference to the frame pulse FSTr, outputs a correction signal VC of the reference clock CKr on the reception side, and uses the frame phase on the reception side as transmission data. Match. The frame counter 4-4 starts counting the clock CK based on the SWEEP start instruction pulse ST, and every time this count reaches a value corresponding to the frame period (for example, 1072 × 900), the pulse FSTr is In addition to outputting, the count value is returned to 0 and then the clock CK is counted again. Therefore, thereafter, the pulse FSTr is output at every fixed count, that is, at each frame start point, and the reception side uses this pulse FSTr as the start timing of fast Fourier transform, decoding, and reverse rate conversion.

The correct SWEEP symbol start position can be specified by the SWEEP start instruction pulse ST, and the SWEEP calculator 4-2 can capture from the start portion of the SWEEP symbol waveform. Therefore, the phase shift in the SWEEP calculation can be accurately calculated, and each symbol It is possible to search for the exact switching timing. That is, based on the correlation output Sc signal output from the SWEEP calculator 4-2, the FST correction unit 4B detects a shift, adjusts the speed of the clock CKrc serving as the reception-side sample rate, and transmits the synchronized symbol that has been transmitted. By performing the lock process with the phase, the error in the temporal position of the FFT gate disappears. An example of the correlation output signal Sc in such a case is shown in FIG. As is clear from the figure, the correlation output signal Sc in this case has a form in which there are a peak due to the main wave and a peak due to the reflected wave.
Japanese Patent No. 3714661

  By the way, when the digital transmission apparatus as described above is used for radio wave transmission while moving, such as a marathon relay, the direction of receiving strong radio waves by accurately directing the receiving antenna to the transmission antenna of a moving relay car or the like Adjustment work is required. Hereinafter, this direction adjustment work is shortened and referred to as a square tone. Such a marathon relay or the like is called mobile relay or mobile transmission. In order to facilitate this work, the conventional apparatus as shown in FIG. 20 considers the electric field strength as the control signal Sa of the AGC unit 9A, and the frequency changes according to the electric field strength (Sa value). Means for outputting a low-frequency signal (for example, means for representing the electric field intensity not shown in the figure by the pitch of the sound) and an electric field intensity level meter have been provided. In the case of traditional analog transmission, in most cases, the transmission quality becomes better as the electric field is stronger. However, in the case of digital transmission, it is possible to obtain a better transmission state when there is no reflected wave and only the main wave exists, even if the electric field is somewhat weaker than when the electric field is strong and there is a lot of reflected waves. There are overwhelmingly many. In addition, the conventional analog transmission system is greatly affected by the reflected wave, so it was used only in a line of sight. However, the recently developed digital transmission system, especially the OFDM modulation system, is less affected by the reflected wave. As described above, it is actively used for transmission outside the line of sight. However, if the transmission is out of line of sight, the antenna direction adjuster on the receiving side cannot see the transmitting side.

 For this reason, in order for the antenna direction adjuster to accurately adjust the transmission side that cannot be seen, the field strength and BER (bit error rate) state are detected and displayed on a dedicated level meter, etc. Compared with the reproduced image, the tone is performed.

  Here, in the digital transmission method, in order to convert the received signal into an image, it is necessary to restore the digital data Dout obtained by the above-described OFDM demodulation of the reception side processing unit 203 into an image using an MPEG decoder (not shown). . As described above, in the digital transmission method, it is not easy to image the received signal on the receiving antenna side where the antenna direction adjuster is present unlike the analog transmission method. In many cases, it depends on the level meter or the like. However, as described above, in the case of digital transmission, a state where there is no reflected wave even when the electric field is somewhat weaker and a state where only the main wave exists is better than a state where the electric field is strong but a lot of reflected waves are mixed. Because it is overwhelmingly often obtained, it is not always possible to grasp the state of the reflected wave mixing (ghost state), and even if the electric field strength, the BER state, and the reproduced image are individually viewed, the transmission quality is not necessarily high. Cannot be realized.

  In a general mobile relay, reception relay points are provided on small hills and the like, and video is transmitted using the above-described OFDM transmission device. The video obtained at the relay stage provided on this small hill is transmitted to a broadcasting station with a studio via an analog transmission type micro line. Usually, the person in charge of such a transmission system (director) is in the studio side, which is the final reception stage, and organizes the entire transmission relay and gives instructions to various places. For example, an instruction to select and determine a broadcast (ON-AIR) video from a plurality of mobile transmission videos transmitted is given. In this case, the transmission state in the mobile relay transmission of the digital transmission system changes from moment to moment as described above, but without grasping the electric field strength, the BER state, and the reflected wave mixing state (ghost state), Even if only the transmitted video is viewed, it cannot be judged whether the transmission status is good or bad. This is because in the digital transmission system, the transmitted video is reproduced as good video until it can be demodulated even if the transmission condition deteriorates, and suddenly an abnormality such as freeze occurs when it can no longer be demodulated Because it does. Therefore, when the director on the studio side selects and determines an ON-AIR video from among a plurality of mobile transmission images transmitted, the transmission status of each mobile, that is, the electric field strength, the BER status, and the reflected wave is selected. Since the mixing status (ghost status) is not known, an appropriate ON-AIR video cannot be selected. For this reason, the selected ON-AIR video may suddenly freeze due to the deterioration of the transmission state, resulting in a broadcast accident. The present invention eliminates these drawbacks, and information such as the electric field strength, the BER state, and the reflected wave mixing state (ghost state) indicating the transmission state in such mobile relay transmission is far away from the OFDM transmission apparatus. It is an object to enable directors and the like to accurately grasp the transmission state by transmitting to a studio or the like and displaying images.

  In order to achieve the above object, the present invention provides a digital transmission system in which a digitized video signal is relayed and transmitted by at least one stage. A transmission state video superimposing unit that takes in transmission state information of at least one of a state and a decoding error state, converts the information into a video signal, superimposes the video signal in a predetermined period, and transmits the superimposed video signal; The digital transmission system further comprises means for extracting the superimposed transmission state information from the received superimposed video signal and displaying the extracted transmission state information on a video. Further, the captured transmission state information is converted into a video signal and superimposed outside the effective period of the video signal. Further, the captured transmission state information is converted into a video signal and superimposed within the effective period of the video signal. Further, the transmission state information of at least one of the reception electric field state and the decoding error state is a signal in a form expressed by the magnitude of the amplitude level. The transmission state information of at least one of the reception electric field state and the decoding error state is a signal expressed in the form of the length of the time width pulse. Further, a signal in a format in which any one of the reception electric field state and the decoding error state is expressed in a format expressing the amplitude level, and another transmission state information is expressed in the length of the time width pulse. It is what. Further, at least one of the received electric field state and the decoding error state is a signal in a format expressed by the length of the time width pulse, and the temporal position of the time width pulse is determined from the received superimposed video signal. Means for detecting and detecting the transmission state are additionally provided. As a result, information such as electric field strength, BER state, and reflected wave mixing state (ghost state) indicating the transmission state in such mobile relay transmission is transmitted to the studio at the final reception stage, which is a point far from the OFDM transmission device. Etc., and the video can be displayed so that the director or the like can accurately grasp the transmission state.

  As described above, according to the present invention, the transmission state such as the electric field strength state, the BER state, the presence / absence of the reflected wave, and the level state can be easily transmitted to another point such as a studio far away from the OFDM transmission apparatus and transmitted. Since it can be extracted and displayed earlier, the transmission state of mobile transmission can be easily and accurately observed at other points.

  FIG. 1 shows an overall block configuration of an embodiment of the present invention, and FIG. 2 shows an output video signal of each part and a schematic diagram of its video display screen, which will be described in detail. The transmission side of a mobile relay vehicle or the like includes an MPEG-ENC unit 101M and a transmission side processing unit 101. For example, a reception side processing unit 203, an MPEG-DEC unit 203M, and a transmission state video superimposing unit 7T are provided on the reception side which is the first relay stage provided on a small hill or the like. The AGC control signal Sa representing the received electric field strength, the correlation calculation signal Sc representing the mixed wave (ghost) state and the signal Sb representing the BER state obtained from the reception side processing unit 203 are connected to the transmission state image superimposing unit 7T. Is done. Further, an FSTrc pulse that is an operation timing reference of the reception side processing unit 203 is also connected to the transmission state video superimposing unit 7T. The video output V ((a) of FIG. 2) of the MPEG-ENC unit 203M is input to the transmission state video superimposing unit 7T as a video signal. Here, the video output V is not limited to the output of the MPEG-ENC unit 203M, and may be an external input video signal from another video device. The video signal and audio signal received on the receiving side are sent to a final receiving stage such as a studio directly or via a predetermined number of relay stages. In this period, the data is transmitted by, for example, a microwave band analog FPU.

  A superimposition information extraction & transmission state video conversion unit 7R is provided on the transmission destination studio side. The transmission state video superimposing unit 7T takes in the correlation calculation signal Sc representing the mixed wave state (ghost state) of the reflected wave based on the signals Sa, Sb, and FSTrc from the receiving side processing unit 203, and converts the information representing the transmission state into MPEG. -Superposed on the vertical blanking (VBL) period outside the video valid period of the video signal ((a) of FIG. 2) from the ENC unit 203M. Then, the video signal Vs ((b) in FIG. 2) on which the transmission state information is superimposed is transmitted to the studio side using a predetermined video transmission unit. On the studio side, information Sa ′, Sb ′, and Sc ′ representing the transmission state superimposed in the VBL period by the superimposition information extraction & video conversion unit 7R from the video signal Vs ′ received using the predetermined video reception unit. Extract. Then, the extracted information Sa ′, Sb ′, Sc ′ representing the extracted transmission state is taken with reference to the synchronization signal C.SYNC, and the information is taken within the video valid period described later with reference to the synchronization signal C.SYNC. Output as a transmission status visualization signal to be displayed. This transmission state imaging signal is displayed on the video display screen as shown in FIG.

  FIG. 3 shows a block configuration of an embodiment of the transmission state video superimposing unit 7T, which will be described below. The control signal Sa is input to the electric field strength-video conversion unit 7-1, and the output of the electric field strength-video conversion unit 7-1 is input to the video integration unit 7-4. The signal Sb is input to the BER state-video conversion unit 7-2, and the output of the BER state-video conversion unit 7-2 is input to the video integration unit 7-4. The signals Sc and FSTrc are input to the ghost state-video conversion unit 7-3. The output of the ghost state-video conversion unit 7-3 is input to the video integration unit 7-4. The synchronization signal C.SYNC from the video integration unit 7-4 is connected to the synchronization input terminals of the electric field strength-video conversion unit 7-1, the BER state-video conversion unit 7-2, and the ghost state-video conversion unit 7-3. Is done. In addition, a transmission state superimposed video signal described later is output from the video integration unit 7-4. The electric field intensity-video conversion unit 7-1, the BER state-video conversion unit 7-2, and the ghost state-video conversion unit 7-3 convert each state signal into a video signal according to the synchronization signal C.SYNC input. Convert. The video integration unit 7-4 integrates these visualized signals and generates a transmission state superimposed video signal to which a video synchronization signal is added.

  FIG. 4 shows a block configuration of an embodiment of the video integration unit 7-4, which will be described in detail below. The video signal is input to the external video synchronization type sync signal generator 7-4-5 and the adder 7-4-6. The synchronization signal C.SYNC from the external video synchronization type sync signal generator 7-4-5 is output to the outside. The adder 7-4-6 has a time axis scale and a guard period for each of the imaging signals via the gates 7-4-1, 7-4-2, 7-4-3 and the ghost state imaging signal. The signal indicating the range and the video signal are added to create a transmission state superimposed video signal Vs. Note that the superposition position pulse generator 7-4-4 defines the position where each imaging signal is superposed on the video signal. Here, an example of the addition ratio in the adder 7-4-6 is shown below. The input signal is a digital level + 5V electric field strength imaging signal, BER state imaging signal, and ghost state imaging signal at a ratio of 0.2, and the time axis scale signal and the guard period range signal are 0. A video signal that is an analog signal with a video portion of about 0.7 V at a ratio of .05 is added at a ratio of 1. FIG. 5 shows a schematic waveform of an example of the transmission state superimposed video signal Vs. This shows one line in the VBL period in which the ghost state imaging signal Psc, the electric field strength imaging signals Sa0 to Sa5, and the BER state imaging signals Sb0 to Sb5 are superimposed. Since the ghost state visualization signal is superimposed at an analog level, the ghost state waveform is expressed by a continuous magnitude of the amplitude. The electric field intensity level and the BER state are superposed by assuming that the digital value representing the binary is a digital 0 or 1 in terms of the presence or absence of amplitude. That is, the values 0 and 1 of the digitized information are expressed with or without amplitude.

  FIG. 6A shows a block configuration of an embodiment of the electric field intensity-video conversion unit 7-1, which will be described below. The control signal Sa representing the electric field strength is input to the A / D converter 7-1-1 and converted into, for example, a 6-bit digital signal DSa. The signal DSa representing the electric field strength is converted into, for example, all six signals DSa0 to DSa5 by the decoder (DEC) 7-1-2. Each output of the signals DSa0 to DSa5 is input to six AND gates (AND) 7-1-4. A total of six outputs of AND7-1-4 are input to an OR gate (OR) 7-1-5. The synchronization signal C.SYNC is input to the superimposed position pulse generator 7-1-3, where the corresponding superimposed position pulses a0 to a5 are output according to the timing of the synchronization signal C.SYNC. The pulses a0 to a5 are input to the other terminal of the AND 7-1-4 and ANDed with the signals DSa0 to DSa5. Here, if the signal DSa representing the electric field intensity is 00h, that is, 0 in decimal, only the signal Da0 is at the level H, so that only the pulse a0 has the logical product H, and only the signal DSa0 at the position corresponding to the pulse a0 is output. Is done. If the signal DSa is 03h, that is, 3 in decimal, the logical product of DSa0 to DSa3 becomes H, and signals DSa0 to DSa3 at positions corresponding to the pulses a0 to a3 are output. Then, a logical sum is taken by OR7-1-5, and electric field strength imaging signals Sa0 to Sa5 are output. Here, for example, the pulse a0 corresponds to the position where the number of samples is 512 to 520 samples on the 12H scanning line, and the pulse a1 is the position where the number of samples is 521 to 529 samples on the 12H scanning line. If the pulse a5 corresponds to the position of the 540th to 548th sample on the 12H scanning line, the electric field strength imaging signals Sa0 to Sa5 at this time are shown in (b) of FIG. As shown in (), it is superimposed on the VBL period outside the video effective area.

  Next, FIG. 7A shows a block configuration of an embodiment of the BER state-video conversion unit 7-2, which will be described below using an example. The signal Sb representing the BER state is input to the A / D converter 7-2-1 and converted into a digital signal DSb of about 3 bits. The signal DSb indicating the BER state is converted into, for example, all five signals Db0 to Db4 by a decoder (DEC) 7-2-2. Each output of Db0 to Db4 is input to five AND gates (AND) 7-2-4. A total of five outputs of AND7-2-4 are input to an OR gate (OR) 7-2-5. The synchronization signal C.SYNC is input to the superposition position pulse generator 7-2-3, and pulses b0 to b4 for superimposing a signal indicating the BER state are output according to the timing of the synchronization signal C.SYNC. . The pulses b0 to b4 are input to the other terminal of the AND7-2-4 and ANDed with the signals DSb0 to DSb4. Here, if the signal DSb representing the BER state is 00h, that is, 0 in decimal, only the signal DSb0 is at the level H, so that only the pulse b0 has the logical product H, and the signal DSb0 at the position corresponding to the pulse b0 is output. Is done. If the signal DSb is 03h, that is, decimal 3, the logical product of DSb0 to DSb3 becomes H, and the signals DSb0 to DSb3 at the positions corresponding to the pulses b0 to b3 are output. For example, if the superposition position pulse generator 7-2-3 is for NTSC, it counts with a 14.3 MHz clock, and is reset with a 910 frequency division counter that is reset at an H cycle and a 1/2 H clock. Operates and performs logic processing with a 525 frequency division counter that is reset in V cycle. Accordingly, as shown in FIG. 7B, for example, the b4 signal corresponds to the position of the 12H scanning line and the number of samples is 560 to 567 samples, and the b3 signal corresponds to the 12H scanning line. The number of samples is output corresponding to the positions of 568 samples to 575 samples. The b2 signal corresponds to the position where the scanning line is 12H and the number of samples is 576 to 583 samples, the b1 signal corresponds to the position where the scanning line is 12H and the number of samples is 584 to 591 samples, The b0 signal is output corresponding to the position where the scanning line is the 12th H and the number of samples is 592 to 599 samples. Accordingly, the BER state imaging signals Sb0 to Sb4 at this time are superimposed on the VBL period outside the video effective area, as shown in FIG. 7B.

  Next, a block configuration of an embodiment of the ghost state-video conversion unit 7-3 is shown in FIG. 8, and will be described below using an example. The correlation output signal Sc representing the ghost state described above is input to the A / D converter 7-3-1 and converted into an 8-bit digital correlation output signal DSc. This signal DSc is input to the FIFO 7-3-2. The pulse FSTrc having the above-described frame period is input to the write reset terminal of the FIFO 7-3-2. The digital correlation output signal D′ Sc of the FIFO 7-3-2 is input to the D / A converter 7-3-4. The output of the D / A converter 7-3-4 is output as a ghost state imaging signal Psc. Further, the above-mentioned synchronization signal C.SYNC is input to the timing pulse generator 7-3-3. The generator 7-3-3 outputs a read reset signal RRST and a read enable signal RE to the FIFO 7-3-2 in response to the synchronization signal C.SYNC. FIG. 9 shows the relationship between the signals C.SYNC, RRST, and RE and the ghost state imaging signal Psc, and this operation will be described below. For example, the timing pulse generator 7-3-3 outputs a reset signal RRST at the 12th sample and the 128th sample in the video cycle, and causes the FIFO 7-3-2 to prepare for reading from the first written content. . Further, an RE signal having a level L is output at the 12th and 130th to 400th samples, and the contents (D′ Sc) written in the FIFO 7-3-2 are sequentially read in response to this. Then, the read signal D′ Sc is converted into a ghost state imaging signal Psc in an analog state by the D / A converter 7-3-4, and is output in the VBL period of the video period.

  Next, a block configuration of an embodiment of the superimposition information extraction & video conversion unit 7R is shown in FIG. 10A, and will be described below using an example. The superimposition information extraction & video conversion unit 7R to which the video signal Vs 'on which the information sa0' to sa5 ', sb0' to sb4 'and Psc' representing the transmission state are superimposed in the VBL period is input A conversion unit 7-1V, a superimposed BER state extraction & video conversion unit 7-2V, a superimposed ghost state extraction & video conversion unit 7-3V, and a video integration unit 7-4V are included. The synchronization signal C.SYNC from the video integration unit 7-4V is extracted from the video signal Vs ′, and is superimposed field strength extraction & video conversion unit 7-1V, superimposed BER state extraction & video conversion unit 7-2V, superimposed ghost state It is input to the extraction & video conversion unit 7-3V. The output VOsa of the superimposed electric field strength extraction & video conversion unit 7-1V, the output VOsb of the superimposed BER state extraction & video conversion unit 2-2V, the output VOsc of the superimposed ghost state extraction & video conversion unit 7-3V are the video integration unit 7 Input to -4V. The superimposed electric field strength extraction & video conversion unit 7-1V, the superimposed BER state extraction & video conversion unit 7-2V, and the superimposed ghost state extraction & video conversion unit 7-3V input video with reference to the synchronization signal C.SYNC. The periods in which the information sa0 'to sa5', sb0 'to sb4', and Psc 'representing the transmission state superimposed on the VBL period of the signal Vs' are respectively obtained, and each of these information is extracted. Then, as described later, each video signal is converted so as to be displayed at a predetermined position within the video valid period. Then, the video integration unit 7-4V integrates these video signals to generate a transmission status video signal. FIG. 10B is a schematic diagram when the transmission state imaging signal (Vosa, Vosb, Vosc) is supplied to a video monitor (not shown) and displayed during the video valid period of the video display screen. In this way, various transmission state visualization signals (field strength -Vosa, BER state -Vosb, ghost state -Vosc) are displayed during the video valid period of the video display screen, so at a point far from the OFDM transmission device. A director or the like at a certain studio can accurately grasp the transmission state.

  FIG. 11A shows a block configuration of an embodiment of the superimposed electric field strength extraction & video conversion unit 7-1V, which will be described below. As described above, the analog field strength information sa0 'to sa5' superimposed on the 12th H of the video signal Vs' is input to the comparator 7-1V-1 and converted into the digital signals DSa0 'to DSa5'. . These signals DSa0 'to DSa5' are signals arranged in time series. The signals DSa0 'to DSa5' are input to a serial / parallel conversion (S / P) & latch 7-1V-1a and converted into, for example, 6-bit parallel data DSa [5: 0] P '. The output DSa [5: 0] P ′ of the S / P & latch 7-1V-1a is parallelized and sampled and held, and is input to the decoder 7-1V-2. Then, in the decoder 7-1V-2, 6-bit DSa [5: 0] P ′ is converted into, for example, 64 pieces of data DSa63 ′ to DSa0 ′. The outputs DSa63 ′ to DSa0 ′ of the decoder 7-1V-2 are input to 64 AND gates 7-1V-4. A total of 64 outputs of the AND gate 7-1V-4 are input to the OR gate 7-1V-5. The synchronization signal C.SYNC is input to the superimposed electric field strength extraction & display position pulse generator 7-1V-3. The superimposed electric field strength extraction & display position pulse generator 7-1V-3 outputs an extraction pulse Psa and display position pulses a63 'to a0' in accordance with the timing of the C.SYNC signal. The extraction pulse Psa is output for a total of 6 pulses, for example, during the 12th H period outside the video valid period, and between 512 samples to 548 samples. The display position pulses a0 'to a63' are pulses that become level H when, for example, the scanning lines are 200 to 203H and the number of samples is 384 to 640 samples within the video valid period. That is, the a0 ′ signal is displayed at the positions of the number of samples 384 to 387 on the scanning lines 200H to 203H. The a62 ′ signal is displayed at the position of the number of samples 632 to 635 samples on the scanning lines 200H to 203H. The a63 ′ signal is displayed at the positions of 637 to 640 samples on the scanning lines 200H to 203H. The pulses a0 'to a63' are input to the other terminal of the AND gate 7-1V-4, and the AND of the outputs of DSa63 'to DSa0' is taken by the AND gate 7-1V-4. FIG. 11B schematically shows the positional relationship between the extraction pulse Psa and the display position pulses a0 ′ to a63 ′ on the video display screen.

  FIG. 12A shows a block configuration of an embodiment of the superimposed BER state extraction & video conversion unit 7-2V, which will be described below. As described above, the analog BER state information Sb0 ′ to Sb4 ′ superimposed on the 12th H of the video signal Vs ′ is input to the comparator 7-2V-1 and converted into the digital signals DSb0 ′ to DSb4 ′. . These signals DSb0 ′ to DSb4 ′ are obtained by arranging all five signals continuously in time. The signals DSb0 ′ to DSb4 ′ are input to the serial / parallel conversion (S / P) & latch 7-2V-2, and converted into, for example, all five parallel data DSb0 ′ to DSb4 ′. The outputs of the signals DSb0 ′ to DSb4 ′ are input to five AND gates 7-2V-4. A total of five outputs from the AND gate 7-2V-4 are input to the OR gate 7-2V-5. The synchronization signal C.SYNC is input to the superimposed BER state extraction & display position pulse generator 7-2V-3. The generator 7-2V-3 outputs the b0 'to b4' pulses, which are display position pulses, during the video valid period according to the timing of the C.SYNC signal. Further, the extraction pulse PSb ′ is output at the 12th H outside the video valid period. Here, FIG. 12B schematically shows the positional relationship between the extraction pulse PSb and the display position pulses b0 ′ to b4 ′ on the video display screen. The superposition BER state extraction & display position pulse generator 7-2V-3, for NTSC, counts with a 14.3 MHz clock and is reset with an H period, a 910 frequency division counter, and 1 / 2H Performs logical processing with the 525 frequency division counter that counts with the clock and is reset at the V cycle. As a result, for example, the b4 ′ signal is displayed at the positions of 512 samples to 526 samples on the scanning lines 80H to 96H. The b3 ′ signal is displayed at the position of the sample number 528 samples to 542 samples on the scanning lines 80H to 96H. The b2 ′ signal is displayed at the position of the number of samples 544 samples to 558 samples on the scanning lines 80H to 96H. The b1 ′ signal is displayed at the positions of the number of samples from 560 samples to 574 samples on the scanning lines 80H to 96H. The b0 ′ signal is displayed at positions of 576 samples to 590 samples on the scanning lines 80H to 96H.

  FIG. 13A shows a block configuration of an embodiment of the superimposed ghost state extraction & video conversion unit 7-3V, which will be described below. As described above, the ghost state information PSc ′ superimposed on the 12th H of the video signal Vs ′ is input to the A / D converter 7-3V-1. The output D′ Sc of the A / D converter 7-3V-1 is connected to the write data terminal of the FIFO 7-3V-2. The output D′ Sch of the FIFO 7-3V-2 is input to the comparator 7-3V-4. The output LE of the comparator 7-3V-4 is input to the gate 7-3V-5. The synchronization signal C.SYNC is connected to the CK regenerator 7-3V-6, the HD extractor 7-3V-7, and the VD extractor 7-3V-8. The output CK of the CK regenerator 7-3V-6 is connected to the counter 7-3V-9. The output WE from the counter 7-3V-9 is connected to the WE terminal of the FIFO 7-3V-2. The output HD of the HD extractor 7-3V-7 is connected to the counter 7-3V-10.

 The output CS of the counter 7-3V-10 is connected to the decoder 7-3V-3. The output VD of the VD extractor 7-3V-8 is connected to the H counter 7-3V-11. The output CH of the H counter 7-3V-11 is connected to the decoder 7-3V-3 and the decoder 7-3V-12. The output RRST of the decoder 7-3V-3 is connected to the RR terminal of the FIFO 7-3V-2. Similarly, the output RE of the decoder 7-3V-3 is connected to the RE terminal of the FIFO 7-3V-2. The control signal WRST for extracting the ghost state information PSc ′ is connected from the decoder 7-3V-3 to the write reset terminal WR of the FIFO 7-3V-2, and WE is connected to the write control terminal WE of the FIFO 7-3V-2. The output Dhh of the decoder 7-3V-12 is connected to the comparator 7-3V-4. The CK regenerator 7-3V-6 regenerates, for example, 14.3 MHz CK based on the input synchronization signal C.SYNC. The HD extractor 7-3V-7 extracts the H cycle component from the synchronization signal C.SYNC and outputs an H cycle HD signal. The counter 7-3V-10 is reset by the HD signal, and outputs a counter signal CS that increases in value every CK cycle.

  The VD extractor 7-3V-8 extracts a V period component from the synchronization signal C.SYNC and outputs a V period VD signal. The H counter 7-3V-11 is reset by the VD signal and outputs a counter signal C-H whose value increases every 1H period. The decoder 7-3V-3 reads the read reset signal RRST which is at the level L for 1CK period from the mth line to the m + nth scanning line from the input counter signal CS and counter signal CH. Is output, and the read address of the FIFO 7-3V-2 is initialized to 0th. Similarly, by advancing the read address of the FIFO 7-3V-2 with the read enable signal RE that becomes level H in the period from the m-th scan line to the m + n-th scan line, the correlation calculation signal Sc written in the FIFO 7-3V-2 is used. A certain D'sch is read out. The decoder 7-3V-12 outputs a level la at the scanning line m from the input counter signal C-H, and thereafter lowers the level by i every 1H to generate Dhh which becomes lb at the m + nth. The comparator 7-3V-4 compares D′ sch and Dhh, which are correlation calculation signals Sc, and sets the output LEh to level H during the period of D′ sch> Dhh.

  The state of each signal described above is shown in FIG. 14 and will be further described. For example, the WRST signal is output to the 100th sample of the 12th H of the video signal Vs ′ on which information is superimposed on the 12th H, and initializes the FIFO 7-3V-2. As the WE signal, for example, L is output during a period from the 128th sample to the 256th sample of the 12H of the video signal Vs ′ on which information is superimposed on the 12H, and D′ Sc is written into the FIFO 7-3V-2. Then, for each H cycle, RE signals are output from the mth to m + nth, and the written contents are read one by one in order. The signal D′ Sc read in accordance with the H period of the video is compared with the H period value Dhh, and an LE signal having a level H is generated during a period of D′ Sc <Dhh. In order to prevent the generation of the LE signal during the blanking period, the blanking period is forcibly set to the level L by using the GI signal that becomes the level L during the blanking period. If the level of the Sc signal is high, a ghost state imaging signal having a long H level period is created. As described above, information such as the electric field intensity indicating the transmission state in mobile transmission, the BER state, and the reflected wave mixing state (ghost state) is transmitted to a studio or the like that is far away from the OFDM transmission apparatus. Can do. On the studio side, each information representing the superimposed transmission state is extracted from the received video signal, and each piece of information representing the extracted transmission state is imaged as a transmission state imaging signal within the video valid period. By displaying, the director or the like can accurately grasp the transmission state.

  In the transmission and display method of information representing the transmission state described above, the transmission state cannot be grasped unless a dedicated receiving device is used on the receiving side. Therefore, in the embodiment described below, in order to be able to grasp the transmission state without using a dedicated receiving device, each information indicating the transmission state is in the form of the amplitude level or the time pulse width long or short. As a signal expressed in (4), it is added to and superposed on a part of the video signal. Here, an example of a transmission state superposition & continuous signal addition video signal in which the signal Asa indicating the electric field strength information Sa described above with the level magnitude and the signal Asb indicating the BER state information Sb with the same level magnitude is added. This is schematically shown in FIG. That is, there is a video waveform monitor as a device that is always installed and brought into the field such as a mobile relay. By using this waveform monitor and observing only the line where the above superimposed & additional video signal waveform is transmitted using the line selection function, a dedicated receiving device (superimposition information extracting & video converting unit of the above embodiment) The transmission state can be visually observed and observed without using 7R).

  A configuration in which the transmission state adding unit 7Tsub of the present invention is combined with the transmission state video superimposing unit 7T shown in FIGS. 1 and 3 will be described below with reference to FIG. A video signal serving as a carrier when transmitting each information representing the transmission state is output from the video integration unit 7-4 in the transmission state video superimposing unit 7T, and is transmitted from the superimposing unit 7-8 of the transmission state adding unit 7Tsub. Input to the i3 terminal. A transmission state superimposed continuous signal-added video signal is output from the output terminal O of the superimposing unit 7-8. The electric field strength information Sa is input to the electric field strength-level conversion unit 7-6 in the transmission state video superimposing unit 7T and the transmission state adding unit 7Tsub. The BER state information Sb is input to the BER state-level converting unit 7-7 in the transmission state video superimposing unit 7T and the transmission state adding unit 7Tsub. The synchronization signal C.SYNC from the transmission state video superimposing unit 7T is input to the electric field intensity-level converting unit 7-6 and the BER state-level converting unit 7-7 in the transmission state adding unit 7Tsub. The outputs Asa and Asb of the electric field strength-level conversion unit 7-6 and the BER state-level conversion unit 7-7 are connected to the input terminals i1 and i2 of the superposition unit 7-8.

  Next, the operation of each unit will be described. Since the same reference numerals as those in FIG. 3 denote the same operations, detailed description thereof is omitted. The electric field intensity-level conversion unit 7-6 changes the output level (for example, DC value) according to the state from the input electric field intensity information Sa, and is generated only for a predetermined period based on the C.SYNC signal. The signal Asa is generated as an electric field strength leveling signal that represents the electric field strength as a level. The BER state-level conversion unit 7-7 changes the output level (for example, DC value) according to the state from the input BER information Sb, and is generated only for a predetermined period based on the C.SYNC signal. Asb is generated as a BER state leveling signal that represents the BER state as a level. Specifically, as shown in FIG. It is added to a part of the non-signal period of the BL period, and represents the state of the electric field strength information Sa and the BER state information Sb depending on the level. Specifically, if the level of the signal Asa, that is, the amplitude is large, the electric field strength level is also high. If the level of the signal Asb, that is, the amplitude is large, the BER state is good. The superimposing unit 7-8 adds the superimposing information signals input to the terminals i1, i2, and i3.

  FIG. 17A shows a block configuration of an embodiment of the electric field intensity-level conversion unit 7-6, which will be described below. The electric field strength information Sa is input to the level shifter 7-6-1, and the output Ha of the level shifter 7-6-1 is input to the terminal i of the gate switch (SW) 7-6-2. C. The SYNC signal is input to the additional position pulse generator 7-6-3. The output GATE-Aa of the additional position pulse generator 7-6-3 is input to the terminal c of the SW7-6-2. Next, this operation will be described. The level shifter 7-6-1 outputs Ha having a DC voltage higher than the pedestal level of the added video signal at a level corresponding to the electric field strength information Sa. The additional position pulse generator 7-6-3 generates GATE-Aa, which is a control signal for instructing a predetermined period in which Ha is superimposed, based on the C.SYNC signal. The SW 7-6-2 outputs the signal Ha input to the terminal i as the electric field strength leveling signal Asa from the output terminal O according to the state of the control signal GATE-Aa. By the operation of each of these parts, the leveling signal Asa becomes V.V as shown in FIG. It is added to a part of the non-signal period of the BL period. Note that whether or not it is a no-signal period can be easily determined if it is a portion outside the superimposition timing of the transmission state video superimposing unit 7T.

  FIG. 18A shows a block configuration for generating a pulsed signal whose time width changes according to the BER state information as an example of the BER state-level conversion unit 7-7, which will be described below. The BER state information Sb is input to the level time converter 7-7-1, and the output Tb of the level time converter 7-7-1 is input to the terminal i of the gate switch (SW) 7-7-2. . The synchronization signal C.SYNC is input to the additional position pulse generator 7-7-3, and the output GATE-tb of the additional position pulse generator 7-7-3 is input to the terminal c of the SW 7-7-2. . Next, this operation will be described in detail. The level time converter 7-7-1 outputs a pulse Tb having a DC voltage higher than the pedestal level of the video signal to which the BER state information is added and whose time width changes according to the BER state information Sb. The additional position pulse generator 7-7-3 generates GATE-tb, which is a control signal for instructing a predetermined period for superimposing Tb with reference to the synchronization signal C.SYNC. This GATE-tb has a width corresponding to the maximum time width of the time pulse Tb. SW7-7-2 outputs a signal Tb input to the terminal i as a BER state leveling signal Tsb from the output terminal O according to the state of the control signal GATE-Tb. That is, GATE-Tb period width> Tb. By the operation of each of these parts, the BER state leveling signal Tsb is changed to V.V as shown in FIG. It is added to a part of the non-signal period of the BL period. Note that whether or not it is a no-signal period can be easily determined if it is a part outside the superimposition timing of the transmission state video superimposing unit 7T. Here, when the BER state is good, the time width of Tsb becomes long, whereas when the BER state is bad, the time width of Tsb becomes short.

  In the above embodiment, the configuration of FIG. 17 for generating a leveled signal corresponding to the magnitude of the amplitude level is applied to the electric field intensity-level converter 7-6, and the BER state-level converter 7-7 is applied to the BER state-level converter 7-7. Although the configuration of FIG. 18 for generating the leveled signal according to the time width of the time pulse is applied, a combination opposite to this may be used, or a configuration unified with either one may be used. Further, as shown in FIG. 17B, the above-described digitized electric field strength information Sa and the like are left, and the electric field strength leveling signal Asa and the like of this embodiment are added thereto. Since it is the same electric field strength information, only the electric field strength leveling signal Asa of this embodiment may be superimposed on the video signal as shown in FIG. However, in this case, when superimposing information is extracted at the transmission destination, it is necessary to recognize that the level is large and the time width indicates the transmission state and perform corresponding detection.

  The configuration of the time-BER state conversion unit 7-2Vr for detecting the length of this time width is shown in FIG. 19A and will be described below. This corresponds to the superimposed BER state extraction & video conversion unit 7-2V in FIG. The video signal Vs ′ additionally superposed with the electric field strength information Tsa and the BER state information Tsb is input to the falling detector 7-2Vr-1. The output DT-DOWN of the falling detector 7-2Vr-1 is input to the AND gate 7-2Vr-3. The synchronization signal C.SYNC is input to the control pulse generator 7-2Vr-5. This output Cu-RST is input to the counter 7-2Vr-2. The output LT-Gate of the control pulse generator 7-2Vr-5 is input to the other terminal of the AND gate 7-2Vr-3. The output Cu-B of the counter 7-2Vr-2 is input to the latch 7-2Vr-4. The output of the AND gate 7-2Vr-3 is input to the LT terminal of the latch 7-2Vr-4.

  Hereinafter, the operation of each unit will be described. The falling detector 7-2Vr-1 detects a falling portion included in the superimposed video signal Vs'. This is shown in FIG. Since the falling detector 7-2Vr-1 performs detection regardless of the type of falling of the input signal, both the signals Tsa and Tsb detect the end point of the pulse. In accordance with the C.SYNC signal, the control pulse generator 7-2Vr-5 becomes a signal LT-Gate that outputs a level H during the period t4 to t5 during which the Tsb portion may exist, and becomes L only during the synchronization. Outputs the signal Cu-RST. The AND gate 7-2Vr-3 transmits only the falling pulse only during the period t4 to t5 to the latch 7-2Vr-4. The counter 7-2Vr-2 performs a counting operation to increase the value with time only during the synchronization. During other periods, the level L signal Cu-RST continues to be input, so the value remains zero. As a result, the latch 7-2Vr-4 holds the counter value at the moment when the signal Tsb falls. As described above, a value according to the pulse width of the signal Tsb can be extracted.

The block diagram which shows one Example of the whole structure of the transmission system of this invention The schematic diagram which shows the correspondence of the transmission signal waveform of this invention, and a video display screen The block diagram which shows one Example of a structure of the transmission status image superposition | conversion part 7T of this invention The block diagram which shows one Example of a structure of the image | video integration part 7-4 of this invention. Schematic diagram showing the transmission state superimposed video signal waveform of the present invention Block diagram of electric field strength-video conversion unit 7-1 and schematic diagram of corresponding display screen of the present invention Block diagram of BER state-video conversion unit 7-2 and schematic diagram of corresponding display screen of the present invention The block diagram which shows the structure of the ghost state-video conversion part 7-3 of this invention Signal timing explanatory diagram of each part of ghost state-video converting unit 7-3 of the present invention Block diagram of superimposition information extraction & video conversion unit 7R of the present invention and schematic diagram of corresponding display screen Block diagram of superimposed electric field strength extraction & image conversion unit 7-1V of the present invention and schematic diagram of corresponding display screen Block diagram of superimposed BER state extraction & video conversion unit 7-2V of the present invention and schematic diagram of corresponding display screen Block diagram of superimposition ghost state extraction & video conversion unit 7-3V and schematic diagram of corresponding display screen of the present invention Time chart for explaining the operation of the superimposed ghost state extraction & video conversion unit 7-3V of the present invention The block diagram which shows the structure of the transmission condition video superimposition part and transmission state addition part of this invention Schematic diagram showing the transmission state superimposed video signal waveform of the present invention Block diagram of electric field intensity-level conversion unit 7-6 of the present invention and schematic diagram of corresponding display screen Block diagram of BER state-level conversion unit 7-7 and schematic diagram of display screen of the present invention Block diagram and corresponding time chart of time-BER state conversion unit 7-2Vr of the present invention Block diagram showing the overall configuration of a typical transmission system Block diagram showing the configuration of a general synchronization detection & correlation unit 4A Waveform diagram showing an example of a correlation output signal when a reflected wave is mixed

Explanation of symbols

101: Transmission side processing unit, 101M: MPEG-ENC unit, 203: Reception side processing unit, 203M: MPEG-DEC unit, 7T: Transmission state video superimposition unit, 7Tsub: Transmission state addition unit, 7R: Superimposition information extraction & video Conversion unit, 7-1: electric field strength-video conversion unit, 7-1V: superimposed electric field strength extraction & video conversion unit, 7-2: BER state-video conversion unit, 7-2V: superimposed BER state extraction & video conversion unit 7-2 Vr: time-BER state conversion unit, 7-3: ghost state-video conversion unit, 7-3V: superimposed ghost state extraction & video conversion unit, 7-4: video integration unit, 7-6: electric field strength -Level conversion part, 7-7: BER state-Level conversion part, 7-8: Superimposition part.

Claims (4)

In a transmission status notification method of a digital transmission system for transmitting a digitized video signal from at least one stage and transmitting from a transmission stage to a reception stage,
The transmission state information at the relay stage is converted into a video signal from the received video signal at a predetermined relay stage and superimposed on a predetermined period of the video signal, and the video signal on which the transmission state information at the relay stage is superimposed is received. To the side,
The receiving side extracts the transmission state information at the relay stage from the received video signal on which the transmission state information at the relay stage is superimposed, displays the video, and notifies the transmission state information at the relay stage. A transmission state notification method. The transmission state notification method according to claim 1,
A transmission status notification method characterized in that the transmission status information in the relay stage is a signal in a format expressed by the magnitude of the amplitude level. The transmission state notification method according to claim 1,
A transmission status notification method characterized in that the transmission status information in the relay stage is a signal in a format expressed by the length of a time width pulse. The transmission state notification method according to claim 3,
The reception stage detects the position of the time width pulse from the received video signal on which the transmission state information at the relay stage is superimposed, and the transmission state at the relay stage based on the length of the detected time width pulse. A transmission state notification method characterized by detecting information.

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