JP2006210970A - Video camera - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a video camera in which the quality of a compressed field image can be judged easily. <P>SOLUTION: Field images outputted repeatedly from an image sensor 12 are compressed in units of 15 frames by the encoding circuit of an MPEG encoder 30. A decision is made whether compression operation of the encoding circuit satisfies error conditions or not by the controller of the MPEG encoder 30 every frame period. If the decision results are affirmative, the controller turns the encoding circuit off during the remaining period of a remarked 15 frames. A CPU 32 delivers a message for notifying turn-off of the encoding circuit toward an operator. Consequently, the quality of MPEG data can be judged easily at the time of imaging. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a video camera, and more particularly to a video camera that records a captured moving image of a scene on a recording medium in a compressed state.

An example of a conventional video camera of this type is disclosed in Patent Document 1. According to this prior art, when the shooting mode is selected, the scene is shot by the image sensor, and a through image of the shot scene is displayed on the monitor. When the shutter button is operated in this state, the object scene image is compressed by the M-JPEG method or the MPEG method, and the compressed object image is recorded on the recording medium.
JP 2004-104471 A [H04N5 / 91]

    However, both the M-JPEG method and the MPEG method are irreversible compression, and the quality of the recorded scene image is greatly lowered as the scene image contains more high-frequency components. In the prior art, the degree of deterioration of the quality is not determined at the time of shooting, and as a result, there is a problem in usability.

    Therefore, a main object of the present invention is to provide a video camera capable of easily discriminating the quality of a compressed field image at the time of shooting.

  The video camera according to the invention of claim 1 is a photographing means for repeatedly photographing the object scene, a compression means for compressing the object scene image output from the photographing means in units of M frames (M: an integer of 2 or more), Discriminating means for discriminating whether or not the compression operation of the compressing means matches an error condition with a period corresponding to N frames (N: integer less than M), and M frame of interest when the discrimination result of the discriminating means is positive Disabling means for disabling the compression means during the remaining period of time, and output means for outputting a message notifying the operator that the compression means has been disabled by the disabling means.

  The object scene image repeatedly output from the imaging unit is compressed by the compression unit with M frames (M: an integer of 2 or more) as one unit. Whether or not the compression operation of the compression means matches the error condition is determined by the determination means at a period corresponding to N frames (N: an integer less than M). The disabling unit disables the compression unit during the remaining period of the noticed M frame when the determination result of the determining unit is affirmative. A message notifying that the compression means has been disabled by the disabling means is output to the operator by the output means.

  Due to the disabling of the compression means, the compressed scene image is missing. This causes quality degradation. In the invention of claim 1, a message is output to the operator when the compression means is disabled. Therefore, the operator can easily determine the quality of the compressed moving image at the time of shooting.

  A video camera according to a second aspect of the invention is dependent on the first aspect, and further comprises a second output means for outputting a character corresponding to the size of the compressed scene image generated by the compression means to the operator. By the output of the character, the operator can easily predict the possibility that the quality of the compressed moving image will deteriorate.

  A video camera according to a third aspect of the invention is dependent on the second aspect, and the character is a character indicating a total size value of a compressed scene image of M frames.

  According to a fourth aspect of the present invention, there is provided a video camera according to any one of the first to third aspects, wherein the compressed scene image generated by the compression means is temporarily stored, and the compressed subject stored in the memory. First reading means for reading the field image at a period corresponding to M frames is further provided, and the error condition includes a condition that the memory overflows. As a result, it is possible to prevent the compressed scene image that has not yet been read from the memory from being overwritten by the subsequent compressed scene image. In other words, time axis inversion is avoided.

  According to a fifth aspect of the present invention, there is provided a video camera according to the fourth aspect, wherein the second readout means for repeatedly reading out one frame of the compressed still image following the noticed M frame from the memory when the discrimination result of the discrimination means is affirmative. Further prepare. The compressed scene image missing due to the disabling of the compression means is compensated for by one frame of the compressed scene image following the M frame of interest. As a result, a situation in which the time axis is shortened can be avoided.

  A video camera according to a sixth aspect of the present invention is dependent on any one of the first to fifth aspects, further comprising accepting means for accepting a compression rate changing operation, wherein the compressing means is a compression rate according to the compressing rate changing operation accepted by the accepting means. To compress the scene image. The operator can avoid disabling the compression means by the compression rate changing operation.

  A video camera according to a seventh aspect of the invention is dependent on any one of the first to sixth aspects, and further comprises a recording means for recording the compressed still image generated by the compression means on a recording medium.

  The video camera according to an eighth aspect of the present invention is dependent on any one of the first to seventh aspects, wherein the compression means performs intra coding on the first frame of the M frames, and performs inter coding on a frame other than the first frame of the M frames. Encoding is performed.

  According to the present invention, since the message is output to the operator when the compression unit is disabled, the operator can easily determine the quality of the compressed moving image at the time of shooting.

  The above object, other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings.

  Referring to FIG. 1, a digital video camera 10 of this embodiment includes an image sensor 12. The optical image of the object scene is irradiated on the imaging surface of the image sensor 12 and subjected to photoelectric conversion. As a result, a charge representing the object scene image, that is, a raw image signal is generated.

  The TG 14 generates a timing signal toward the image sensor 12 when a read command is given from the CPU 32. The raw image signal generated on the imaging surface is read from the image sensor 12 in an order according to raster scanning in response to a vertical synchronization signal Vsync generated at a rate of once every 1/30 seconds. The raw image signal to be read has a frame rate of 30 fps.

  The raw image signal output from the image sensor 12 is subjected to processing such as AGC, ADS, A / D conversion, white balance adjustment, color separation, and YUV conversion by the camera processing circuit 16. By this series of processing, YUV format image data representing the object scene image is created. The created image data has a frame rate of 30 fps, like the raw image signal.

  The camera processing circuit 16 writes the image data thus created in the SDRAM 20 through the memory control circuit 18. The SDRAM 20 has a display image area 20a, a compressed image area 20b, and a character image area 20c. Image data from the camera processing circuit 16 is written in the display image area 20a.

  The video encoder 22 accesses the SDRAM 20 through the memory control circuit 18 and reads out the image data stored in the display image area 20a at a rate of 1 frame per 1/30 second. The read image data of each frame is converted into an NTSC composite video signal, and the converted composite video signal is applied to the LCD monitor 26 via the adder 24. As a result, a real-time moving image of the object scene, that is, a through image is displayed on the monitor screen.

  As long as the recording start operation is not performed by the key input device 36, the character composition circuit 28 is in a stopped state. Therefore, the adder 24 gives the composite video signal to the LCD monitor 26 as it is.

  When the recording start operation is performed, the CPU 32 activates the MPEG encoder 30 and the character synthesis circuit 28. The MPEG encoder 30 reads image data from the display image area 20a of the SDRAM 20 through the memory control circuit 18, and compresses the read image data by the MPEG4 method. The compression rate follows the operation of the compression rate change key 36a of the key input device 36. Intra coding is performed at a rate of once every 15 frames, and inter coding is performed on the remaining frames. As a result, 1 GOP is formed by intra-encoded data assigned to the first frame and inter-encoded data assigned to the remaining 14 frames.

  The MPEG data obtained in this way is temporarily stored in the buffer memory 30m, and is read from the buffer memory 30m at a period corresponding to 1 GOP. The read MPEG data is written into the compressed image area 20 b of the SDRAM 20 through the memory control circuit 18.

  However, since the capacity of the buffer memory 30m is limited, if the size of the MPEG data suddenly increases due to a change in the scene due to panning or tilting, MPEG data equivalent to 1 GOP is accumulated in the buffer memory 30m. The buffer memory 30m may cause an overflow before

  When such an overflow occurs, the compression operation is stopped for the remaining period of 1 GOP of interest. Furthermore, MPEG data that is lost due to the stop of the compression operation is compensated by MPEG data (intra-coded data) of the first frame of the next 1 GOP. For example, if an overflow occurs while the 11th frame of the 1GOP of interest is being written to the buffer memory 30m, the MPEG data of the 1st to 10th frames is read from the buffer memory 30m, and then the first frame of the next 1GOP MPEG data is repeatedly read from the buffer memory 30m. That is, MPEG data is output from the MPEG encoder 30 in the manner shown in FIG.

  Thus, by interrupting the compression operation in response to the occurrence of overflow, a situation in which MPEG data that has not yet been read from the buffer memory 30m is overwritten by subsequent MPEG data is avoided. In other words, time axis inversion is avoided.

  Further, by compensating the MPEG data lost due to the interruption of the compression process with the MPEG data of the first frame of the next 1 GOP, a situation in which the time axis is shortened can be avoided.

  Furthermore, since the compression rate of the encoding circuit 30b can be changed by operating the compression rate change key 36a, the operator can avoid the situation where the buffer memory 30c overflows.

  The CPU 32 detects the size of the MPEG data generated by the compression operation for each frame period, integrates the detected size for each GOP, and sends the bar character data indicating the integrated value to the character of the SDRAM 20 through the memory control circuit 18. Write to the image area 20c. However, when the above overflow occurs, the CPU 32 writes default bar character data in the character image area 20c.

  The character synthesizing circuit 28 reads out such character data from the character image area 20c, converts the read character data into an analog character signal, and supplies the converted character signal to the adder 24. The character signal is added to the composite video signal output from the video encoder 22 and provided to the LCD monitor 26. On the monitor screen, the through image of the object scene and the bar character are displayed as shown in FIG. The bar character Bs corresponding to the size of 1 GOP is white, and the default bar character Bd is red.

  The CPU 32 reads MPEG data from the compressed image area 20b through the memory control circuit 18 every time the amount of data accumulated in the compressed image area 20b reaches a threshold value. The read MPEG data is recorded on the recording medium 40 through the I / F 38. When the moving image recording end operation is performed, the CPU 30 stops the MPEG encoder 30 and the character synthesis circuit 28, and ends the access to the SDRAM 20 after the recording of the MPEG data remaining in the compressed image area 20b is completed.

  The MPEG encoder 30 is configured as shown in FIG. The encoding circuit 30e compresses the YUV format image data given from the memory control circuit 18 by the MPEG4 system. As described above, the compression rate follows the compression rate set by the compression rate change key 36a. The MPEG data generated by the encoding circuit 30e is stored in the buffer memory 30m. The size value of the MPEG data of each frame is set in the register 30r by the controller 30c. The MPEG data stored in the buffer memory 30m is transferred toward the memory control circuit 18 every time one GOP period elapses.

  When the buffer memory 30m overflows, the controller 30c turns off the encoding circuit 30e in the middle of the noticed 1 GOP period, and clears the register 30r to notify the CPU 32 of this. The controller 30c also transfers MPEG data less than 1 GOP that is properly stored in the buffer memory 30m to the memory control circuit 18, and then repeatedly transfers the MPEG data generated in the first frame of the next 1GOP to the memory control circuit 18. . Frames lost due to the stop of the encoding circuit 30e are compensated by MPEG data repeatedly transferred.

  Specifically, the controller 30c performs an operation according to the flowcharts shown in FIGS. First, in step S1, it is determined whether or not a start command is given from the CPU 32. If “YES” here, the encoding circuit 30e is turned on in a step S3, and a variable K is set to “0” in a step S5. When the vertical synchronization signal Vsync is generated, the process proceeds from step S7 to step S9, and the variable K is incremented.

  The encoding circuit 30e starts a compression operation in response to a vertical synchronization signal Vsync that is first generated after being turned on. Further, as will be described later, the variable K changes between “1” and “15” in response to the vertical synchronization signal Vsync. Therefore, the variable K is an identification number of each of the 15 frames forming 1 GOP.

  In step S11, the remaining amount of the buffer memory 30m at the time when the previous frame, that is, the (K-1) th frame of MPEG data is written, is detected. In step S13, the size value of the MPEG data of the current frame, that is, the Kth frame is acquired from the encoding circuit 30e. The acquired size value, that is, the compressed size information is set in the register 30r. The compression size information of the previous frame set in the register 30r is updated with the compression size information of the current frame.

  In step S15, it is determined whether or not the buffer memory 30m has overflowed. In step S17, it is determined whether or not the variable K has reached “15”. The determination process in step S15 is executed based on the remaining amount detected in step S11 and the size value acquired in step S13. If both steps S15 and S17 are NO, the process returns to step S7. If “YES” in the step S17, the MPEG data corresponding to 1 GOP stored in the buffer memory 30m is transferred to the memory control circuit 18, and then the process returns to the step S5.

  If YES is determined in the step S15, the encoding circuit 30e is turned off in a step S21, the register 30r is cleared in a step S23, and the variable K-1 is set to the variable Ks in a step S25. The off of the encoding circuit 30e becomes clear by clearing the register 30d. The variable Ks indicates the identification number of the latest frame legitimately stored in the buffer memory 30m. In step S27, MPEG data legitimately stored in the buffer memory 30m, that is, MPEG data of the first frame to the Ks frame is transferred to the memory control circuit 18.

  In step S29, it is determined whether or not the variable K has reached “15”. In step S31, it is determined whether or not the vertical synchronization signal Vsync has been generated. As long as NO in step S27, the process proceeds to step S33 each time the vertical synchronization signal Vsync is generated, and the variable K is incremented. The incremented value of the variable K is determined again in step S29.

  When the variable K reaches “15”, the process proceeds from step S27 to step S35, and the encoding circuit 30e is turned on. When the vertical synchronization signal Vsync is generated, YES is determined in a step S37, and the variable K is set to “1” in a step S38. In step S39, the MPEG data of the first frame stored in the buffer memory 30m is repeatedly transferred to the memory control circuit 18. The number of repetitions is 15-Ks. When the process of step S39 is completed, the process returns to step S7.

  When the recording start operation is performed, the CPU 32 executes processing according to the flowcharts shown in FIGS. 7 to 8 in association with the character display. The control program corresponding to this flowchart is stored in the flash memory 34.

  Referring to FIG. 7, in step S41, an activation command is issued to MPEG encoder 30 and character synthesis circuit 28. In step S43, read address Wp and write address Rp set in character image area 20c of SDRAM 20 are initialized. The read address Wp is a reference address for the character read area CR, and the write address Rp is a reference address for the character write area CW.

  Referring to FIG. 6A, the initialized read address Wp is located at the left end of the character image area 20c. The initialized write address Rp is located approximately at the center of the character image area 20c at a distance corresponding to the horizontal width of the character read area CR from the left end of the character image area 20c.

  In step S45, the variable Isz is set to “0”, and in step S47, the variable N is set to “0”. The variable Isz is an integrated value of the size of MPEG data forming one GOP of interest. A variable N is an identification number of each frame forming the 1GOP of interest, and shows the same value as the variable K.

  When the vertical synchronization signal Vsync is generated, YES is determined in a step S49, and the variable N is incremented in a step S51. In step S53, the process waits until MPEG data of the Nth frame is generated. In step S55, compressed size information is acquired from the register 30r shown in FIG.

  In step S57, it is determined whether or not the size value indicated by the acquired compressed size information is “0”. If “NO” here, the acquired compressed size information is regarded as indicating the size of the MPEG data of the Nth frame, and the process proceeds to step S59. On the other hand, if YES, it is considered that the compression operation has been interrupted due to the overflow of the buffer memory 30m, and the process proceeds to step S67.

  In step S59, the size value of the MPEG data of the Nth frame is added to the variable Isz. In step S61, it is determined whether or not the variable N has reached “15”. If “NO” here, the process returns to the step S45 as it is. If YES, the process proceeds to step S63, and the bar character data corresponding to the variable Isz is written in the character writing area CW. In the subsequent step S65, the values of the read address Rp and the write address Wp are increased by a numerical value corresponding to the horizontal width of the character write area CW. When the process of step S65 is completed, the process returns to step S45.

  In step S67, default bar character data is written in the character writing area CW. When the vertical synchronization signal Vsync is generated, YES is determined in a step S69, and the variable N is incremented in a step S71. In step S73, it is determined whether or not the variable N has reached “15”. If NO, the process returns to step S69, whereas if YES, the process returns to step S45.

  By repeating such processing, the character reading area CR and the character writing area CW move to the right as shown in FIG. The bar characters belonging to the character read area CR are read by the character synthesis circuit 28 and multiplexed on the through image in the manner shown in FIG.

  As can be understood from the above description, the object scene image repeatedly output from the image sensor 12 is compressed by the encoding circuit 30e with 15 frames as one unit. Whether or not the compression operation of the encoding circuit 30e matches the error condition (the overflow of the buffer memory 30m) is determined by the controller 30c every frame period (S15). When this determination result is affirmative, the controller 30c disables the encoding circuit 30e during the remaining period of 15 frames of interest (S21). The CPU 32 outputs a message (default bar character Bd) notifying that the encoding circuit 30e has been disabled to the operator (S67).

  Due to the disabling of the encoding circuit 30e, the MPEG data is lost. This causes quality degradation. In this embodiment, a message is output to the operator when the encoding circuit 30e is disabled. Therefore, the operator can easily determine the quality of the MPEG data at the time of shooting.

  When the compression operation of the encoding circuit 30e does not match the error condition, a bar character Bs representing the size of MPEG data equivalent to 1 GOP is output to the operator (S63). By outputting such characters, the operator can easily predict the possibility that the quality of the MPEG data will deteriorate.

  In this embodiment, the size of MPEG data equivalent to 1 GOP is expressed by the bar characters Bs and Bd, but instead of “clear”, “cloudy” and “rainy” depending on the size. You may make it display the weather mark which changes between. further. In this embodiment, a bar character is created for each GOP, but the bar character creation cycle is not limited to this.

It is a block diagram which shows the structure of one Example of this invention. It is a block diagram which shows an example of a structure of the MPEG encoder applied to the FIG. 1 Example. It is an illustration figure which shows an example of the structure of the MPEG data output from the MPEG encoder shown in FIG. FIG. 4 is a flowchart showing a part of the operation of the controller applied to the embodiment in FIG. 3; It is a flowchart which shows a part of other operation | movement of the controller applied to the FIG. 3 Example. (A) is an illustrative view showing an example of an access operation of a character image area formed in the SDRAM, (B) is an illustrative view showing an example of character image data read from the character image area, (C ) Is an illustrative view showing one example of a display image. It is a flowchart which shows a part of operation | movement of CPU applied to the FIG. 1 Example. It is a flowchart which shows a part of other operation | movement of CPU applied to the FIG. 1 Example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Digital video camera 12 ... Image sensor 16 ... Camera processing circuit 20 ... SDRAM
22 ... Video encoder 26 ... LCD monitor 28 ... Character synthesis circuit 30 ... MPEG encoder 32 ... CPU

Claims (8)

Photography means to repeatedly shoot the scene,
Compression means for compressing the object scene image output from the photographing means with M frames (M: integer of 2 or more) as one unit;
A discriminating means for discriminating whether or not the compressing operation of the compressing means meets an error condition in a cycle corresponding to N frames (N: an integer less than M);
A disabling unit that disables the compression unit during the remaining period of the M frame of interest when the determination result of the determination unit is affirmative; and a message notifying that the compression unit has been disabled by the disabling unit A video camera comprising output means for outputting the image to the operator.   The video camera according to claim 1, further comprising second output means for outputting a character corresponding to a size of the compressed scene image generated by the compression means to the operator.   The video camera according to claim 2, wherein the character is a character indicating a total size value of the compressed scene image of the M frame. A memory for temporarily storing the compressed object scene image generated by the compression means; and a first reading means for reading out the compressed object image stored in the memory at a period corresponding to the M frame,
4. The video camera according to claim 1, wherein the error condition includes a condition that the memory overflows.   5. The video camera according to claim 4, further comprising: a second reading unit that repeatedly reads from the memory one frame of a compressed still image following the target M frame when the determination result of the determination unit is positive. A receiving means for receiving a compression rate change operation;
The video camera according to claim 1, wherein the compression unit compresses the object scene image at a compression rate according to a compression rate changing operation received by the reception unit.   7. The video camera according to claim 1, further comprising recording means for recording the compressed still image generated by the compression means on a recording medium.   The video camera according to any one of claims 1 to 7, wherein the compression unit performs intra coding on a top frame of the M frames and performs inter coding on a frame other than the top frame of the M frames.

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