JP2006210489A - Semiconductor device lead frame and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plated lead frame having high adhesiveness with sealing resin. <P>SOLUTION: The semiconductor device lead frame is plated where cooper or copper alloy is made as a base. Deterioration of dimensional accuracy and a metal characteristic of copper alloy due to etching of the base is suppressed by forming a plurality of concaves and convexes with etching agent on a surface of a plated film. Then, adhesiveness of the semiconductor device lead frame and sealing resin can be made firm. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a lead frame for a semiconductor device that requires adhesion to a sealing resin.

  As a conventional lead frame for a semiconductor device, in order to improve the adhesion with the sealing resin, the base material 101 is subjected to an etching process to form an uneven portion 104 on the surface of the base material 101, and the sealing resin is formed by an anchor effect. There are some which have improved the adhesiveness (see, for example, Patent Document 1).

  FIG. 3 shows a cross-sectional view of a conventional semiconductor lead frame described in Patent Document 1. In FIG.

  In FIG. 3, a lead frame 102 is formed on a base material 101 made of copper or a copper alloy by using a molding technique such as pressing or etching, and the degree of adhesion between the lead frame 102 and a sealing resin (not shown) is improved. The roughened portion 104 is formed by performing a roughening process by an etching process.

High purity copper plating is applied to the surface of the lead frame 102 as the first plating layer 103, and nickel or nickel alloy plating is applied to the surface of the first plating layer 103 as the second plating layer 105 in an amount of 0.2 to 1.5 μm. The surface of the second plating layer 105 is subjected to 0.02 to 0.15 μm of palladium or palladium alloy plating as the third plating layer 106, and the surface of the third plating layer 106 is gold plated as 0.004 to 0 as the fourth plating layer 107. Even when the fourth plating layer 107, which is a noble metal with high chemical stability, is present on the uppermost layer, the adhesion with the sealing resin is improved by the anchor effect of the concavo-convex portion 104.
JP 2002-83917 A

  However, in the conventional configuration, since the lead frame is subjected to a roughening process by direct etching, in the case of a fine multi-pin lead frame, it is greatly affected by the etching, and the dimensional accuracy is impaired. Due to the change in the surface composition, the metal properties are lowered. In addition, since the copper plating and nickel plating (thickness gauge of about 0.4 μm to 3.0 μm) are performed after the surface roughening treatment, the roughened portion is smoothed to improve the adhesion with the sealing resin. It had the subject that an anchor effect fell.

  The present invention solves the above-described conventional problems, and provides a lead frame for a semiconductor device that has high adhesion to a resin while being a lead frame for a semiconductor device in which a copper or copper alloy base material is plated. For the purpose.

  In order to solve the above-described conventional problems, a lead frame for a semiconductor device according to the present invention is a lead frame obtained by punching or etching a metal thin plate material, and the surface of the lead frame is roughened. The first plating layer having the uneven portions is attached, the second plating layer is attached to the surface of the first plating layer, and the uneven portions having substantially the same shape as the first plating layer surface are formed, In addition, the third plating layer is attached to the surface of the second plating layer, and uneven portions having substantially the same shape as the surface of the first plating layer are formed on the surfaces of the laminated second plating layer and the third plating layer. is there. The manufacturing method further includes a step of forming a lead frame by punching or etching a thin metal plate base material, a first plating layer forming step of attaching a first plating layer to the surface of the lead frame, and a first plating. A first plating layer roughening step for roughening the surface of the layer to form uneven portions, and a second plating layer forming step for attaching a second plating layer of a thin film to the surface of the first plating layer. Furthermore, a step of forming a lead frame by punching or etching a metal thin plate material, a first plating layer forming step of attaching a first plating layer to the surface of the lead frame, and a surface of the first plating layer A first plating layer roughening step to roughen the surface to form a concavo-convex portion, a second plating layer formation step to deposit a thin second plating layer on the first plating layer surface, and a second plating layer surface Adhering a thin third plating layer It is obtained by a third plating layer forming step that.

  With this configuration, the adhesion between the lead frame for a semiconductor device and the sealing resin can be strengthened.

  As described above, according to the lead frame for a semiconductor device of the present invention, in order to perform the etching process on the plating film instead of the base material, the reduction in the dimensional accuracy of the base material is suppressed, and the surface composition of the base material is reduced. Deterioration of metal properties due to changes can be suppressed. Further, smoothing due to plating of the roughened portion can be suppressed, and the adhesion between the lead frame and the sealing resin can be improved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a cross-sectional view of a lead frame for a semiconductor device according to Embodiment 1 of the present invention.

  In FIG. 1, 1 is a base material made of copper or a copper alloy, and 2 is a lead frame for a semiconductor device formed on the base material 1 by a molding technique such as pressing or etching.

  Nickel plating or nickel alloy plating is applied to the surface of the substrate 1 as the first plating layer 3. The first plating layer 3 is formed with a thickness of 1.0 μm to 5.0 μm, and the surface of the first plating layer 3 is roughened.

  The surface roughness of the first plating layer 3 is suitably 0.05 μm to 1.0 μm in terms of arithmetic average roughness (Ra).

  According to this, it is excellent in adhesiveness with the sealing resin in the resin sealing process implemented by a post process, without being influenced by the plating layer applied later. Furthermore, since the roughening process is performed not on the base material 1 but on the first plating layer 3, the dimensional accuracy of the base material 1 is not affected.

  The surface of the first plating layer 3 is plated with palladium or palladium alloy as the second plating layer 5. The second plating layer 5 is formed with a thickness of 0.005 to 0.08 μm.

  According to this, since palladium or a palladium alloy shows good solderability, it is not necessary to perform exterior plating for improving solderability after resin sealing, and the manufacturing process can be reduced. it can.

  Gold plating is applied to the surface of the second plating layer 5 as the third plating layer 6. The third plating layer 6 is formed with a thickness of 0.001 to 0.02 μm.

  The second plating layer 5 and the third plating layer 6 are formed along the surface of the first plating layer 3, and the shape of the concavo-convex portion 4 extends to the surface of the third plating layer 6.

  According to this, the roughened first plating layer 3 is plated only with a thickness of about 0.006 to 0.1 μm in total including the second plating layer 5 and the third plating layer 6. Therefore, the roughened portion is not smoothed.

  Therefore, the concavo-convex portion 4 increases the bonding area between the lead frame 2 and the sealing resin (not shown), and improves the adhesion with the sealing resin (not shown) due to the anchor effect.

  In addition, on the surface of the 1st plating layer 3, you may give only a gold plating layer as a 4th plating layer. The fourth plating layer is formed with a thickness of 0.05 to 0.5 μm.

(Embodiment 2)
2A to 2D are cross-sectional views along the process flow of the method for manufacturing a lead frame for a semiconductor device according to the second embodiment of the present invention.

  In FIG. 2, the same components as those in FIG.

  In FIG. 2, a lead frame 2 is formed on a substrate 1 made of copper or a copper alloy by using a molding technique such as pressing or etching (FIG. 2A).

  Nickel or nickel alloy plating is applied to the surface of the lead frame 2 as the first plating layer 3, and the surface of the first plating layer 3 is roughened by etching to form the uneven portion 4 (FIG. 2B). At this time, the thickness of the first plating layer 3 is preferably 0.5 to 1.5 μm.

  Moreover, although the area | region which forms the uneven | corrugated | grooved part 4 may be formed in the lead frame 2 whole surface, you may provide only in the location which contacts sealing resin (not shown).

  As an etchant, an acid or alkaline solution that dissolves nickel and a surfactant containing an azole compound such as tetrazole and / or metal ions are added.

  Since the additive is partially adsorbed on the surface of the first plating layer 3, etching is hindered at the adsorbed portion, and the uneven portion 4 can be formed.

  According to this, the portion where the additive is not adsorbed can be selectively etched, and the surface of the first plating layer 3 can be easily roughened.

  Metal ions are essential, although they have a lower ionization tendency than the first plating layer 3.

  The concavo-convex portion 4 has an arithmetic average roughness of 0.05 to 1.0 μm, and has the effect of improving the adhesion of the sealing resin without being affected by a plating layer applied later.

  Next, the surface of the first plating layer 3 is subjected to 0.005 to 0.08 μm of palladium or palladium alloy plating as the second plating layer 5, and the gold plating of 0.001 as the third plating layer 6 is applied to the surface of the second plating layer 5. -0.02 micrometer is applied (FIG.2 (c)).

  According to such a configuration, it is possible to roughen the entire surface of the first plating layer 3 on the lead frame as shown in FIG. Adhesiveness can be improved by an anchor effect between the sealing resin and the sealing resin (not shown).

  In the description of the second embodiment, an etching method using an alkaline solution containing a surfactant has been described as a method for roughening the surface of the first plating layer 3, but the present invention is not limited to this. A similar effect can be obtained by applying a metal plating film that hinders etching on the surface of the plating layer 3 to an extremely thin thickness of about 0.5 to 10 mm and then performing an etching process to remove the extremely thin plated film. .

  In addition, any of the first plating layer 3, the second plating layer 5, and the third plating layer 6 can be formed by an electroless plating method, an electrolytic plating method, or the like.

  This is useful for improving the adhesion between a sealing resin and a thin plate material made of a metal material, and is particularly suitable for a lead frame for semiconductor devices.

The fragmentary sectional view of the lead frame for semiconductor devices in Embodiment 1 of this invention Manufacturing process diagram of lead frame for semiconductor device in Embodiment 2 of the present invention Partial sectional view of a lead frame for a semiconductor device by a conventional roughening method

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Base material 2 Lead frame 3 1st plating layer 4 Uneven part 5 Second plating layer 6 Third plating layer 101 Base material 102 Lead frame 103 First plating layer 104 Uneven part 105 Second plating layer 106 Third plating layer 107 First Four plating layers

Claims (8)

A lead frame obtained by punching or etching a thin metal plate base material, wherein a first plating layer having a rough surface with a roughened surface is attached to the lead frame, and the first plating is performed. A lead frame for a semiconductor device, wherein a second plating layer is attached to the surface of the layer, and an uneven portion having substantially the same shape as the surface of the first plating layer is formed. A third plating layer was adhered to the surface of the second plating layer, and uneven portions having substantially the same shape as the surface of the first plating layer were formed on the surfaces of the second plating layer and the third plating layer that were laminated. The lead frame for a semiconductor device according to claim 1. The lead frame for a semiconductor device according to claim 1, wherein the second plating layer is made of a noble metal. 3. The lead frame for a semiconductor device according to claim 2, wherein the second plating layer and the third plating layer are made of a noble metal. 5. The lead frame for a semiconductor device according to claim 1, wherein a surface roughness of the concavo-convex portion is an arithmetic average roughness of 0.05 to 1.0 [mu] m. Forming a lead frame by punching or etching a metal sheet material; and
A first plating layer forming step of attaching a first plating layer to the lead frame surface;
A first plating layer roughening step of roughening the surface of the first plating layer to form an uneven portion;
A method for manufacturing a lead frame for a semiconductor device, comprising: a second plating layer forming step of attaching a thin second plating layer to the surface of the first plating layer. Forming a lead frame by punching or etching a metal sheet material; and
A first plating layer forming step of attaching a first plating layer to the lead frame surface;
A first plating layer roughening step of roughening the surface of the first plating layer to form an uneven portion;
A second plating layer forming step of attaching a thin second plating layer to the first plating layer surface;
A method for manufacturing a lead frame for a semiconductor device, comprising: a third plating layer forming step of attaching a thin third plating layer to the surface of the second plating layer. The first plating layer roughening step is performed by immersing in an etching solution obtained by adding a surfactant and / or metal ions to an acidic or alkaline solution that dissolves the metal constituting the first plating layer. 8. The method of manufacturing a lead frame for a semiconductor device according to claim 6, wherein the method is an etching process for forming an uneven portion.

Images