JP2006203288A - Image processing circuit and image processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a circuit scale from being complicated while ensuring the accuracy of color conversion processing. <P>SOLUTION: This image processing circuit includes: a discrimination circuit 110 for discriminating whether input image data Din are a predetermined threshold value α or below or exceeds the threshold value α; a LUT 112 for applying gamma conversion to the input image data discriminated to exceed the threshold value α; an arithmetic circuit 114 for carrying prescribed matrix arithmetic operations; a LUT 116 for carrying out inverse gamma conversion; a LUT 152 for converting the input image data Din discriminated to be the threshold value α or below into data with a prescribed characteristic; and a selector 130 that selects output data of the LUT 116 when the input image data Din exceed the threshold value α or selects and outputs output data of the LUT 152 when the input image data Din are the threshold value α or below. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a technique of image processing when converting a color space of image data.

In recent years, when an image according to image data is displayed on an image display device, the color space may be converted. When converting the color space, the input image data is subjected to γ (gamma) conversion so that the gradation characteristic is in a linear state, and necessary calculations are performed in this state, and inverse γ conversion is performed to obtain output image data. The configuration is common. Note that 2.2 is ideal for the γ conversion in the case of a liquid crystal display device.
This γ conversion is performed using an LUT (Look Up Table) or the like in which characteristics of input gradation values and output gradation values are stored in advance (see Patent Document 1).

On the other hand, when the number of gradations is increased (when the number of bits of image data is increased) in accordance with recent high image quality in mobile phones and other electronic devices, the capacity required for the LUT increases. Therefore, a method has been proposed in which characteristic data corresponding to the number of gradations smaller than the number of gradations of the input image data is stored in the LUT, and the deficiency is obtained by interpolation by linear approximation or the like (see, for example, Patent Document 2). .
Japanese Patent Laid-Open No. 9-271036 Special table 2002-534007 gazette

By the way, during γ conversion, there may be a range in which gradation expression cannot be performed due to quantization error. For example, when the γ coefficient is 2.2 and the input is 8 bits (256 gradations) and the output is 10 bits (1024 gradations), the input value ranges from “0” to “7” in decimal notation. In this case, the output value obtained by inverse γ conversion becomes “0”, and the accuracy decreases.
On the other hand, if the number of quantization bits is increased, the accuracy is improved. However, as described above, not only the capacity required for the LUT is increased, but also the calculation after the LUT and the inverse γ conversion are performed. However, since the processing must be performed with multiple bits, the configuration becomes complicated.
The present invention has been made in view of the above-described circumstances, and an object of the present invention is to perform image processing that avoids complication of the configuration while ensuring sufficient accuracy when converting a color space. To provide a circuit and an image processing method.

In order to achieve the above object, according to the present invention, a determination circuit that determines whether input image data is equal to or less than a predetermined threshold value or exceeds the threshold value, and the determination circuit determines that the threshold value is exceeded. A first processing circuit that performs predetermined first processing on the input image data, and a second processing that performs predetermined second processing on the input image data determined by the determination circuit to be equal to or less than the threshold value.
When the processing circuit and the input image data exceed the threshold value, the image data subjected to the first process is selected. On the other hand, when the input image data is equal to or less than the threshold value, the second process is performed. And an output circuit that selects the applied image data and outputs the selected image data as output image data. According to the present invention, whether or not the threshold is exceeded,
Different processes of the first process and the second process are performed on the input image data and output.

In the present invention, the first process is a process of color-converting input image data that exceeds the threshold, and the second process stores an output value in advance for the input image data that is equal to or less than the threshold. At the same time, the output value corresponding to the input image data may be read. Also, in the present invention, the first process is a process of color-converting input image data exceeding the threshold value, and the second process is a process of converting the input image data that is equal to or less than the threshold value to the first process. A configuration in which the same color conversion process as the first process is performed by extending to bit precision may be adopted. Also, in the present invention, the first process is a process of color-converting input image data exceeding the threshold value, and the second process is a process of converting the input image data determined to be equal to or less than the threshold value to an integer of 2. The output circuit is configured to multiply the image data output from the second processing circuit by the integer power of 2 and output when the input image data is equal to or less than a threshold value. Also good. Here, in the color conversion, a value after γ conversion is stored in advance for each color and each gradation value, and a value corresponding to the input value is read and output, and output by the first processing circuit A calculation circuit that calculates and outputs the data of each color and each gradation value, and stores values after inverse γ conversion for each color and each gradation value in advance, and a value corresponding to the output value in the calculation circuit It is preferable that the second processing circuit that reads and outputs the data is used.
The present invention can be conceptualized not only as an image processing circuit but also as an image processing method.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an image processing circuit according to the first embodiment of the present invention.
The image processing circuit 100 shown in this figure performs image processing on a total of 24 bits of input image data Din for designating gradation values of RGB colors in 8 bits, and 6 bits of gradation values of RGB colors. Are respectively output and output as a total of 18-bit output image data Dout.
In FIG. 1, the numbers “24”, “30”, and “18” shown in the image data path are the number of bits, and 1/3 of these values is the number of data bits for each color. .

In FIG. 1, the determination circuit 110 determines whether each color of the input image data Din is not more than a threshold value α in decimal notation or exceeds it, and even one color exceeds the threshold value α. If there is, the image data Din is supplied to the LUT 112, while if it is equal to or less than the threshold value α for all three colors, the image data Din is supplied to the LUT 152.
Here, in this embodiment, since the image data of each color is 8 bits, “0” in decimal notation.
256 gradations from “255” can be expressed. Among these, the threshold α is lower, for example, “
7 ".

The LUT 112 stores values after γ conversion in advance for each color and each gradation value, and
A value corresponding to the input value is read and output. In this LUT 112, the input side is 3 bits of 8 bits and a total of 24 bits, but after conversion, it becomes 3 colors of 10 bits and 3 colors in total.
As a result of being 0 bits, the bits are expanded.

The arithmetic circuit 114 performs color conversion processing on 10-bit data of each color converted by the LUT 112. Here, FIG. 2A is a diagram illustrating an example of the configuration of the arithmetic circuit 114, and FIG. 2B is a diagram illustrating the contents of the calculation.
As shown in FIG. 2A, the arithmetic circuit 114 includes three multipliers 1141, 1142,
1143, an adder 1144, and a coefficient supply unit 1145.
Among these, the coefficient supply unit 1145 sets the period during which image data for one pixel is supplied to the first,
Dividing into the second and third periods, the multiplication coefficients are supplied to the multipliers 1141, 1142, and 1143 in the first to third periods, respectively. Specifically, the coefficient supply unit 11
45, in the first period, the multiplier 1141 has a coefficient a1, the multiplier 1142 has a coefficient a2,
A coefficient a3 is supplied to the multiplier 1143, and a coefficient b is supplied to the multiplier 1141 in the second period.
1 is supplied to the multiplier 1142, the coefficient b2 is supplied to the multiplier 1143, and the coefficient b3 is supplied to the multiplier 1143.
, The multiplier 1141 has a coefficient c1, the multiplier 1142 has a coefficient c2, and the multiplier 114.
3 is supplied with the coefficient c3.

The multiplier 1141 adds the coefficient supply unit 1145 to the R data Rin converted by the LUT 112.
Similarly, the multipliers 1142 and 1143 are connected to the LU.
The G data Gin and the B data Bin converted at T112 are respectively multiplied by coefficients. The adder 1144 adds the multiplication results obtained by the multipliers 1141, 1142, and 1143.
Therefore, when the coefficient supply unit 1145 outputs the coefficients a1, a2, and a3 in the first period, the addition content of the adder 1144 is a1 · Rin + a2 · Gin + a3 · Bin, which is Rout in FIG. It is none other than. Similarly, when the coefficient supply unit 1145 outputs the coefficients b1, b2, and b3 in the second period, the addition content of the adder 1144 is b1.
When Gout is Rin + b2 · Gin + b3 · Bin and the coefficient supply unit 1145 outputs coefficients c1, c2, and c3 in the third period, the addition content of the adder 1144 is c1 · R
Bout which is in + c2 · Gin + c3 · Bin.
As described above, the addition content of the adder 1144 becomes R data Rout in the first period, G data Gout in the second period, and B data Bout in the third period. Both are output in 10 bits for each color.

Returning to FIG. 1 again, the LUT 116 stores in advance the values after inverse γ conversion for each color and each gradation value, and reads and outputs a value corresponding to the input value. In this LUT 116, the input side has 3 bits of 10 bits and a total of 30 bits. However, after conversion, the color becomes 8 bits and 3 colors, resulting in a total of 24 bits. Has been.

On the other hand, the LUT 152 performs RG for the gradation values “0” to “α” (α = 7 in this embodiment).
An independent output value is stored in advance for each B, and a value corresponding to the input value is read and output. In this LUT 152, the input side has 3 bits of 8 bits for a total of 24 bits, and the output side also has 3 colors of 8 bits for a total of 24 bits.

The selector (output circuit) 130 selects and outputs the conversion result of the LUT 116 when the determination circuit 110 determines that even one color of the input image data Din exceeds the threshold value α, while all three colors are output. If it is determined that all three colors are equal to or less than the threshold value α, the conversion result of the LUT 152 is selectively output.
The color reduction circuit 132 performs color reduction processing on the 8-bit data of each color selected and output by the selector 130 to 6 bits by, for example, a dither method, and outputs the result as output image data Dout.
If there is no need for color reduction processing, the selection result by the selector 130 may be output as it is as the output image data Dout.

The register 140 sets various values and data to each unit from a host device (not shown) such as a CPU. For example, the threshold α in the determination circuit 110, the LUT 112, 1
16, 152 input / output characteristics, coefficients a1 to a3, b1 to b3, c1 in the arithmetic circuit 114
˜c3, various values such as dither matrix coefficients in the color reduction circuit 132, data, and the like can be changed by the register 140.
Each unit operates in synchronization with each other by a clock signal (not shown).

According to such a configuration, if any one of the input image data Din exceeds the threshold α, color conversion processing is performed via the LUT 112, the arithmetic circuit 114, and the LUT 116, while three colors If all of them are equal to or less than the threshold value α, the conversion result of the LUT 152 is used.
In the present embodiment, although the LUT 152 needs to be provided separately, its input gradation values “0” to “0”
Since it is sufficient to store data of about “0” to “10” corresponding to each of “7”, that is, about 4 bits of data, a large amount of storage is not required.

Here, FIG. 5 shows the effects in the present embodiment and the reason why data of about “0” to “10” should be stored corresponding to each of the input gradation values “0” to “7”. The description will be given with reference.
Since the input gradation value is expressed by 8 bits, it is “0” to “255” in decimal notation. When these input tone values are γ-converted with a γ coefficient “2.2”, the result becomes the second column in FIG. The numbers in this column include a decimal point because they are normalized to correspond to “0” to “1023” that can be expressed by 10 bits.
Here, since the fractional part must be rounded off to be converted into an integer and used as the input of the inverse γ conversion, the input of the inverse γ conversion becomes “0” for the input gradation values “0” to “7”. . Even if “0” is subjected to inverse γ conversion, the output remains “0”, so the input gradation values “0” to “7”
In the range of “”, the value after the inverse γ conversion is uniformly “0”, and there is a region where gradation cannot be expressed.

On the other hand, for the input gradation values “8” to “13”, the input of inverse γ conversion is “1”. “1
”Is converted to“ 10.9 ”, and when viewed from the input gradation value“ 7 ”, it rises at a stretch and becomes staircase characteristics.
Therefore, in this embodiment, the values after inverse γ conversion are stored in the LUT 152 corresponding to each of the input values “0” to “7”, and in the range of the input gradation values “0” to “7”. If there is, the corresponding value is read from the LUT 152.
Since “1” is “10.9” when the inverse γ conversion is performed, the value after the inverse γ conversion corresponding to the input gradation values “0” to “7” is in the range of “0” to “10”. Will fit. For this reason, LU
At T152, it can be seen that it is sufficient to store about 4 bits of data corresponding to each of the input gradation values “0” to “7”.

In addition, when the input gradation values of “0” to “255” are γ-converted as a γ coefficient “2.2”, normalization is performed so as to correspond to “0” to “65535” that can be expressed in 16 bits. Expressed values are in the rightmost column of FIG. Thus, if processing is performed with 16 bits after γ conversion, the input gradation value is “0”.
”To“ 7 ”, the converted integer value changes appropriately from“ 0 ”to“ 24 ”.
Although gradation can be expressed even after conversion, the output side of the LUT 112, the arithmetic circuit 114, L
Compared with the case where the input side of the UT 116 is 10 bits, the circuit scale is remarkably complicated.
In particular, when the processing circuit 114 increases the processing bit by 1 bit (doubled), the circuit scale is quadrupled for matrix calculation. For this reason, it becomes a big obstacle when the image processing circuit 100 is incorporated in a small portable device.

On the other hand, according to the present embodiment, the input gradation values of the input image data Din are “0” to “7”.
”Is directly converted by the LUT 152, while color conversion processing is performed using the LUT 112, the arithmetic circuit 114, and the LUT 116 with which accuracy is ensured when the input gradation value is other than that, the arithmetic accuracy and the small scale It is possible to achieve both circuit configuration.

Next, an image processing circuit according to a second embodiment of the present invention will be described. FIG. 3 is a block diagram illustrating a configuration of the image processing circuit 102 according to the second embodiment.
The image processing circuit 102 shown in this figure is different from the image processing circuit 100 shown in FIG. 1 in that the determination circuit 110 determines that all three colors in the input image data Din are less than or equal to the threshold value α. Even in the case, the LUT 162, the arithmetic circuit 164, and the LUT 166 similarly
The point is that color conversion processing is performed.
However, the LUT 162, the arithmetic circuit 164, and the LUT 166 are partially different from the LUT 112, the arithmetic circuit 114, and the LUT 116. The differences are as follows. In other words, the LUT 162, the arithmetic circuit 164, and the LUT 166 have input gradation values of “0” to “
7 ”, which is essentially a 3-bit range (the range determined by the lower 3 bits of the 8 bits)
Therefore, the upper digit is shifted by 7 bits and the processing is extended to the accuracy of 10 bits.

In the second embodiment, an LUT for γ conversion, an arithmetic circuit, and an LUT for inverse γ conversion are provided in two series. Since it is not necessary to process the entire range of 10 bits “0” to “1023”, the circuit scale can be reduced as compared with the case of processing with the accuracy of 14 to 16 bits. That is, as described above, especially when the arithmetic circuit increases the number of processing bits, 2
Since the circuit scale becomes complicated by the square of, the circuit scale can be much smaller than providing one series of processing circuits with an accuracy of 14 to 16 bits.

Next, an image processing circuit according to a third embodiment of the present invention will be described. FIG. 4 is a block diagram showing a configuration of the image processing circuit 104 according to the third embodiment.
In the image processing circuit 104 shown in this figure, when all three colors are equal to or less than the threshold value α in the input image data Din, the input image data Din is supplied to the shift register 172. Here, the shift register 172 shifts the input image data Din to the upper digit by 7 bits. That is, in the second embodiment, the input gradation values are “0” to “7”.
In this third embodiment, the shift register 172 performs an operation of substantially shifting 3-bit input image data to the upper digit by 7 bits.
The divider 174 shifts the data shifted by the shift register 172 to the opposite lower digit by 7 bits, that is, divides it by “128” and supplies it to the selector 130. In the shift register 172 and the divider 174, the LUT 112 → the arithmetic circuit 1
14 → Delay from input to output by an amount corresponding to the operation delay time by LUT116.
In the third embodiment, the divider 174 and the selector 130 constitute an output circuit.

According to the third embodiment, when the input gradation value is “0” to “7”, the input image data Din is calculated only by bit shift, so the circuit configuration is greatly simplified.

In the above-described embodiment, the threshold value α is described as “7”. However, as described above, the threshold value α can be appropriately set to an arbitrary value by the register 140.
Further, although the γ coefficient is described as “2.2”, it is not limited to this. LUT11
As described above, the input / output characteristics of 2, 114, 152, 162, and 166 can be appropriately set to arbitrary characteristics by the register 140 as described above.
Furthermore, the display device is not limited to the liquid crystal display device, and other display elements such as organic EL elements and inorganic EL elements.
An element, a field emission (FE) element, an LED, an electrophoretic element, an electrochromic element, or the like may be used, and is applicable to a CRT.

1 is a diagram illustrating a configuration of an image processing circuit according to a first embodiment of the present invention. It is a figure which shows the structure of the matrix calculating circuit in the image processing circuit. It is a figure which shows the structure of the image processing circuit which concerns on 2nd Embodiment of this invention. It is a figure which shows the structure of the image processing circuit which concerns on 3rd Embodiment of this invention. It is a figure which shows the relationship between input image data, an output value, etc.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Image processing circuit, 110 ... Judgment circuit, 112, 116, 152, 162, 166
... LUT, 114, 164 ... arithmetic circuit, 130 ... selector, 132 ... subtractive color circuit, 172 ...
Shift register, 174 ... Divider

Claims (6)

A determination circuit that determines whether the input image data is equal to or less than a predetermined threshold value, or exceeds the threshold value;
A first processing circuit for performing a predetermined first process on the input image data determined to have exceeded the threshold by the determination circuit;
A second processing circuit that performs predetermined second processing on the input image data determined by the determination circuit to be equal to or less than the threshold;
If the input image data exceeds the threshold, the image data subjected to the first process is selected,
And an output circuit that selects the image data that has been subjected to the second processing and outputs the selected image data as output image data of the input image data when the input image data is less than or equal to a threshold value. Processing circuit. The first process is a process of color-converting input image data that exceeds the threshold,
The said 2nd process is a process which reads the said output value corresponding to the said input image data while previously storing an output value with respect to the input image data below the said threshold value. Image processing circuit. The first process is a process of color-converting input image data that exceeds the threshold,
The said 2nd process expands the input image data which is below the said threshold value to the bit precision of the said 1st process, and performs the same color conversion process as the said 1st process. Image processing circuit. The first process is a process of color-converting input image data that exceeds the threshold,
The second process is a process of multiplying input image data determined to be equal to or less than a threshold by an integer power of 2.
2. The output circuit according to claim 1, wherein, when the input image data is equal to or less than a threshold value, the output circuit divides the image data output from the second processing circuit by the integer power of 2 and outputs the divided image data. Image processing circuit. The color conversion is
A first processing circuit that pre-stores values after γ conversion for each color and each gradation value, and reads and outputs a value corresponding to the input value;
An arithmetic circuit that calculates and outputs the data of each color and each gradation value output from the first processing circuit;
The second processing circuit that stores in advance a value after inverse γ conversion for each color and each gradation value, and reads and outputs a value corresponding to an output value in the arithmetic circuit. 5. The image processing circuit according to any one of 2 to 4. Determine whether the input image data is less than or equal to a predetermined threshold,
A predetermined first process is performed on the input image data determined to exceed the threshold value, while a predetermined second process is performed on the input image data determined to be equal to or less than the threshold value,
When the input image data exceeds the threshold value, the image data subjected to the first process is selected. On the other hand, when the input image data is equal to or less than the threshold value, the image subjected to the second process is selected. An image processing method, wherein data is selected and output as output image data of the input image data.

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