JP2006202875A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device with which stress which occurs on an interface of a thermal oxide film and a semiconductor substrate can be suppressed. <P>SOLUTION: The manufacturing method of the semiconductor device is provided with a process for forming a groove 1a in the semiconductor substrate 1, a process for introducing fluorine and forming a fluorine content layer 1b in the semiconductor substrate 1 positioned on an inner face of the groove 1a, a process for forming the thermal oxide film 2a on a side wall and a base of the groove 1a, and a process for embedding an insulating film 2 in the groove 1a. Since the thermal oxide film 2a includes fluorine, ionic bonding property becomes high and flexibility increases compared to a conventional case. Thus, occurrence of stress is suppressed in the interface of the thermal oxide film and the semiconductor substrate. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor device. In particular, the present invention relates to a semiconductor device manufacturing method and a semiconductor device that can suppress the occurrence of crystal defects in a semiconductor substrate on which an insulating film is formed.

  FIG. 8 is a cross-sectional view for explaining the structure of the semiconductor device according to the first conventional example. In the semiconductor device according to this conventional example, the element region is separated from other regions by the element isolation film 102. The element isolation film 102 is formed by a trench isolation method and is embedded in a groove 101 a formed in the silicon substrate 101. A thermal oxide film 101b is formed on the inner surface of the groove 101a in order to round the corners of the groove 101a (see, for example, Patent Document 1).

  In the element region, a gate oxide film 103, a gate electrode 104, a sidewall 105, low-concentration impurity regions 106a and 106b, and impurity regions 107a and 107b functioning as a source and a drain are formed. The gate oxide film 103 is a thermal oxide film formed by a wet oxidation method.

FIG. 9 is a cross-sectional view for explaining the structure of a semiconductor device according to a second conventional example. In the semiconductor device according to this conventional example, the element isolation film 102 is formed by the LOCOS method.
Japanese Patent Application Laid-Open No. 2004-281691 (FIGS. 5 to 7)

  In each of the first and second conventional examples described above, when the gate oxide film is formed, water as an oxidizing species permeates through the element isolation film. For this reason, when the gate oxide film is formed, the thermal oxide film formed on the side surface and the bottom surface of the groove becomes thick, and the stress applied to the corner of the groove increases. Due to this increase in stress, crystal defects may occur in the semiconductor substrate located at the corner of the groove. This phenomenon is particularly remarkable when it is desired to increase the thickness of the gate oxide film (for example, when a high voltage transistor is formed).

  In the first conventional example, a thermal oxide film is formed on the inner surface of the groove in which the element isolation film is embedded. By forming this thermal oxide film, the corner of the groove is rounded and the stress applied to the corner of the groove is reduced. However, as the semiconductor device becomes finer, the stress reduction due to the formation of the thermal oxide film becomes insufficient.

  The present invention has been made in consideration of the above-described circumstances, and an object of the present invention is to reduce the stress applied to the semiconductor substrate in contact with the corner of the insulating film in the semiconductor substrate on which the insulating film is formed, An object of the present invention is to provide a method for manufacturing a semiconductor device and a semiconductor device capable of suppressing the occurrence of defects.

In order to solve the above problems, a method of manufacturing a semiconductor device according to the present invention includes a step of forming a groove in a semiconductor substrate,
Introducing fluorine into the semiconductor substrate located on the inner surface of the groove;
Forming a thermal oxide film on the inner surface of the groove;
Embedding an insulating film in the trench.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming a mask film having an opening on a semiconductor substrate,
Etching the semiconductor substrate using the mask film as a mask to form a groove in the semiconductor substrate;
Using the mask film as a mask, introducing fluorine into the semiconductor substrate located on the inner surface of the groove;
Forming a thermal oxide film on the inner surface of the groove by thermally oxidizing the semiconductor substrate using the mask film as a mask;
Forming an insulating film in the groove and on the mask film;
Removing the insulating film located on the mask film;
And a step of removing the mask film.

  According to these semiconductor device manufacturing methods, since the thermal oxide film contains fluorine, the film has a lower density and higher flexibility due to higher ionic bonding than the conventional one. Therefore, the stress generated at the interface between the thermal oxide film and the semiconductor substrate can be reduced without changing the thermal oxidation temperature and oxidant when forming the thermal oxide film. Thereby, generation | occurrence | production of the crystal defect of a semiconductor substrate is suppressed.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming a mask film having an opening on a semiconductor substrate,
Using the mask film as a mask, introducing fluorine into the semiconductor substrate located inside the opening; and
Forming a thermal oxide film located under the opening by thermally oxidizing the semiconductor substrate using the mask film as a mask;
And a step of removing the mask film.

  According to this method for manufacturing a semiconductor device, since the thermal oxide film contains fluorine, the film density is lower and the flexibility is higher than the conventional one. Accordingly, the stress generated at the interface between the insulating film and the semiconductor substrate is reduced, and the generation of crystal defects in the semiconductor substrate is suppressed.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming a groove in a semiconductor substrate,
Forming a thermal oxide film on the inner surface of the groove;
Introducing fluorine into the semiconductor substrate in contact with the thermal oxide film;
Forming an insulating film embedded in the trench.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming a mask film having an opening on a semiconductor substrate,
Etching the semiconductor substrate using the mask film as a mask to form a groove in the semiconductor substrate;
Forming a thermal oxide film on the inner surface of the groove by thermally oxidizing the semiconductor substrate using the mask film as a mask;
Introducing fluorine into the semiconductor substrate in contact with the thermal oxide film using the mask film as a mask;
Forming an insulating film in the groove and on the mask film;
Removing the insulating film located on the mask film;
And a step of removing the mask film.

  A step of forming a gate oxide film by thermally oxidizing the semiconductor substrate may be provided after the step of removing the mask film. In the step of forming the gate oxide film, the oxidized species may pass through the insulating film and the thermal oxide film may become thick. However, fluorine is introduced into the semiconductor substrate in contact with the thermal oxide film. For this reason, the thickened portion of the thermal oxide film contains fluorine, resulting in a lower film density and higher flexibility than in the prior art. Accordingly, the stress generated at the interface between the insulating film and the semiconductor substrate is reduced, and the generation of crystal defects in the semiconductor substrate is suppressed.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming a groove in a semiconductor substrate,
Forming a thermal oxide film on the inner surface of the groove;
Introducing fluorine into the thermal oxide film;
Forming an insulating film embedded in the trench.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming a hole or a groove in a semiconductor substrate,
Introducing fluorine into the semiconductor substrate located on the inner surface of the hole or groove;
Forming a thermal oxide film on the inner surface of the hole or groove;
Embedding an insulating film in the hole or groove;
Forming a conductive film located on the insulating film.

Another method of manufacturing a semiconductor device according to the present invention includes a step of forming a hole or a groove in a semiconductor substrate,
Forming a thermal oxide film on the inner surface of the hole or groove;
Introducing fluorine into the thermal oxide film;
Embedding an insulating film in the hole or groove;
Forming a conductive film located on the insulating film.

A semiconductor device according to the present invention includes a semiconductor substrate,
A groove formed in the semiconductor substrate;
A thermal oxide film formed on the inner surface of the groove;
An insulating film embedded in the groove;
Comprising
Fluorine is introduced into the thermal oxide film in contact with the semiconductor substrate.

Another semiconductor device according to the present invention includes a semiconductor substrate,
An insulating film formed on the semiconductor substrate and formed by a LOCOS method;
Comprising
Fluorine is introduced into the insulating film in contact with the semiconductor substrate.

  The insulating film is an element isolation film that separates an element region from other regions. The element region is formed on the semiconductor substrate by a gate oxide film, a gate electrode formed on the gate oxide film, and the semiconductor substrate. Two impurity regions functioning as a source and a drain may be formed.

A semiconductor device according to the present invention includes a semiconductor substrate,
A hole or groove formed in the semiconductor substrate;
A thermal oxide film formed on the inner surface of the hole or groove;
An insulating film embedded in the hole or groove;
A conductive film formed on the insulating film;
And fluorine is introduced into the thermal oxide film in contact with the semiconductor substrate.

BEST MODE FOR CARRYING OUT THE INVENTION

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. 1 and 2 are cross-sectional views for explaining a method of manufacturing a semiconductor device according to the first embodiment of the present invention. The present embodiment is a method of separating an element region from other regions by forming an element isolation film by a trench isolation method.

  First, as shown in FIG. 1A, a silicon oxide film 21 is formed on a silicon substrate 1 by a CVD method, and a silicon nitride film 22 is further formed on the silicon oxide film 21 by a CVD method. Next, a photoresist film (not shown) is formed on the silicon nitride film 22, and this photoresist film is exposed and developed. As a result, a resist pattern is formed on the silicon nitride film 22. Next, the silicon nitride film 22 is etched using this resist pattern as a mask. As a result, an opening is formed in the silicon nitride film 22 above the region where the element isolation film is embedded. Thereafter, the resist pattern is removed.

  Next, as shown in FIG. 1B, the silicon oxide film 21 and the silicon substrate 1 are etched using the silicon nitride film 22 as a mask. As a result, a groove 1 a for embedding the element isolation film is formed in the silicon substrate 1.

Next, as shown in FIG. 1C, fluorine-containing ions (for example, F ions or F ₂ ions) are implanted into the silicon substrate 1 using the silicon nitride film 22 as a mask. At this time, ions are implanted obliquely into the silicon substrate so that the ions are also implanted into the silicon substrate 1 forming the side wall of the groove 1a. Thereby, the fluorine-containing layer 1b is formed on the silicon substrate 1 that forms the inner surface of the groove 1a. The position of the fluorine-containing layer 1b in the depth direction is an interface between a thermal oxide film 2a and a silicon substrate 1 described later and its periphery in the depth direction.

  Next, as shown in FIG. 2A, the silicon substrate 1 is thermally oxidized using the silicon nitride film 22 as a mask. Here, a dry oxidation method is used. Thereby, the thermal oxide film 2a is formed on the inner surface of the groove 1a, and the corners of the groove 1a are rounded.

  At this time, in the portion of the thermal oxide film 2a that is in contact with the silicon substrate 1 and on the portion thereof, fluorine in the fluorine-containing layer 1b reacts with silicon to form silicon fluoride. Silicon fluoride has a smaller covalent bond and a larger ionic bond than silicon oxide. Therefore, the portion of the thermal oxide film 2a that is in contact with the silicon substrate 1 has a lower film density and higher flexibility than the conventional one. Therefore, the stress generated at the interface between the silicon substrate 1 and the thermal oxide film 2a is reduced at the corners of the groove 1a (shown by shading in the figure), and the crystal defects are suppressed from entering the silicon substrate 1.

  Thereafter, as shown in FIG. 2B, a silicon oxide film 23 is formed by a high density plasma CVD method in the trench 1a and on the entire surface including the silicon nitride film 22.

  Next, as shown in FIG. 2C, the silicon oxide film 23 is etched back, and the silicon oxide film 23 located on the silicon nitride film 22 is removed by CMP. Thereby, the element isolation film 2 made of silicon oxide is buried in the trench 1a. Thereafter, the silicon nitride film 22 and the silicon oxide film 21 shown in FIG. 2B are removed.

  As described above, according to the first embodiment of the present invention, the fluorine-containing layer 1b is formed on the silicon substrate 1 that forms the bottom and side walls of the groove 1a, and then the thermal oxide film 2a is formed. Among them, silicon fluoride having a lower film density and higher flexibility than silicon oxide is generated at the portion in contact with the silicon substrate 1. Therefore, compared with the conventional case, the stress generated at the interface between the thermal oxide film 2a and the silicon substrate 1 at the corner of the groove 1a is reduced, and the crystal defects are suppressed from entering the silicon substrate 1 located at the corner of the groove 1a. The

  Further, the fluorine-containing layer 1b remains under the thermal oxide film 2a. For this reason, even if the fluorine-containing layer 1b is thermally oxidized in the subsequent thermal oxidation step (for example, a step of forming a gate oxide film) and the thermal oxide film 2a becomes thick, silicon fluoride is also generated in the newly thermally oxidized portion. To do. Therefore, an increase in stress generated in the subsequent process is suppressed, and the crystal defects are suppressed from entering the silicon substrate 1 located at the corner of the groove 1a.

  For this reason, when an element such as a transistor is formed in the element region in the subsequent process, the yield of the formed element is increased.

  Each drawing in FIG. 3 is a cross-sectional view for explaining the method for manufacturing a semiconductor device according to the second embodiment of the present invention. This embodiment is different from the first embodiment in that after the thermal oxide film 2 a is formed, ions containing fluorine are implanted into the silicon substrate 1. Hereinafter, the same components as those of the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

  First, as shown in FIG. 3A, a silicon oxide film 21 and a silicon nitride film 22 are formed on the silicon substrate 1, and an opening is formed in the silicon nitride film 22. These forming methods are the same as those in the first embodiment. Next, the silicon oxide film 21 and the silicon substrate 1 are etched using this opening as a mask. As a result, a groove 1 a is formed in the silicon substrate 1.

  Thereafter, as shown in FIG. 3B, the silicon substrate 1 is thermally oxidized using the silicon nitride film 22 as a mask. As a result, a thermal oxide film 2a is formed in the trench 1a.

Next, as shown in FIG. 3C, fluorine-containing layer 1b is formed by implanting fluorine-containing ions (for example, F ions or F ₂ ions) into silicon substrate 1 using silicon nitride film 22 as a mask. To do. The position in the depth direction of the fluorine-containing layer 1b is a portion in contact with the silicon substrate 1 in the thermal oxide film 2a and a portion in contact with the thermal oxide film 2 in the silicon substrate 1, respectively.

  Next, as shown in FIG. 3D, the element isolation film 2 is embedded in the trench 1a. The embedding method of the element isolation film 2 is the same as that in the first embodiment.

  As described above, according to the second embodiment, since the fluorine-containing layer 1b is formed in the portion of the thermal oxide film 2a that is in contact with the silicon substrate 1, thermal oxidation is performed in a subsequent heat treatment step (for example, a step of forming a gate oxide film). Silicon fluoride is generated in a portion of the film 2a that is in contact with the silicon substrate 1. Therefore, as in the first embodiment, the stress generated at the corners of the groove 1a (the portion indicated by shading in each drawing of FIG. 3) is smaller than in the prior art, and the silicon substrate is formed at the corner of the groove 1a. 1 is suppressed from entering crystal defects.

  Further, the fluorine-containing layer 1b remains under the thermal oxide film 2a. For this reason, even if the thermal oxide film 2a becomes thick in the subsequent thermal oxidation process (for example, a process of forming a gate oxide film), silicon fluoride is also generated in the newly thermally oxidized portion. Therefore, an increase in stress generated in the subsequent process is suppressed, and the crystal defects are suppressed from entering the silicon substrate 1 located at the corner of the groove 1a.

  FIG. 4 is a cross-sectional view for explaining the method for manufacturing a semiconductor device according to the third embodiment of the present invention. This embodiment is a method of forming a transistor in an element region.

  First, as shown in FIG. 4A, the groove 1a, the fluorine-containing layer 1b, and the thermal oxide film 2a are formed in the silicon substrate 1, and the element isolation film 2 is embedded in the groove 1a. These forming methods are the same as those in the first embodiment.

  Next, the silicon substrate 1 is thermally oxidized to form a thermal oxide film 3a in the element region. Here, a wet oxidation method is used. At this time, since the oxidizing species water passes through the element isolation film 2, the fluorine-containing layer 1b located under the thermal oxide film 2a is oxidized, and the thermal oxide film 2a becomes thick. At this time, in the newly formed thermal oxide film 2a, silicon fluoride is generated, and the flexibility becomes higher than the conventional one. For this reason, an increase in stress applied to the corners of the groove 1a (portions indicated by hatching in the figure) is suppressed.

Thereafter, as shown in FIG. 4B, the thermal oxide film 3a is removed.
Next, as shown in FIG. 4C, the silicon substrate 1 is thermally oxidized again to form a gate oxide film 3 located in the element region. Since the wet oxidation method is used here, the fluorine-containing layer 1b located under the thermal oxide film 2a is oxidized, and the thermal oxide film 2a becomes thick. At this time, in the newly formed thermal oxide film 2a, silicon fluoride is generated, and the flexibility becomes higher than the conventional one. For this reason, an increase in stress applied to the corner portion of the groove 1a is suppressed.

  Next, as shown in FIG. 4D, a polysilicon film is formed on the gate oxide film 3, and this polysilicon film is patterned. Thereby, a gate electrode 4 is formed on the gate oxide film 3. Next, impurities are introduced into the silicon substrate 1 using the gate electrode 4 and the element isolation film 2 as a mask. Thereby, low-concentration impurity regions 6 a and 6 b are formed in the silicon substrate 1.

  Next, a silicon oxide film is formed on the entire surface including on the gate electrode 4, and this silicon oxide film is etched back. Thereby, a sidewall 5 is formed on the sidewall of the gate electrode 4. Next, impurities are introduced into the silicon substrate 1 using the gate electrode 4, the sidewall 5, and the element isolation film 2 as a mask. Thereby, impurity regions 7 a and 7 b functioning as a source and a drain are formed in the silicon substrate 1. Thus, a transistor is formed in the element region.

As described above, according to the third embodiment, the thermal oxide film 3a and the gate oxide film 3 are formed by using the wet oxidation method, but the silicon substrate 1 located under the thermal oxide film 2a is formed on the silicon substrate 1. The fluorine-containing layer 1b is formed. For this reason, even if the oxidation species water permeates the element isolation film 2 and the silicon substrate 1 forming the groove 1a is additionally oxidized to increase the thickness of the thermal oxide film 2a, the newly formed thermal oxide film 2a Contains silicon fluoride. Accordingly, an increase in stress applied to the corner portion of the groove 1a is suppressed.
In addition, by implanting fluorine into the portion where the thermal oxide film 2a is formed, the film density of the thermal oxide film 2a, which is preferably a low-density oxide film, can be selectively controlled.

  5 and 6 are cross-sectional views for explaining a method for manufacturing a semiconductor device according to the fourth embodiment. In the semiconductor device according to the present embodiment, the element isolation film 2 is formed by the LOCOS method. Hereinafter, the same components as those of the third embodiment are denoted by the same reference numerals, and description thereof is omitted.

  First, as shown in FIG. 5A, a silicon oxide film 21 and a silicon nitride film 22 are formed on the silicon substrate 1, and then an opening is formed in the silicon nitride film 22. These forming methods are the same as those in the third embodiment.

Next, as shown in FIG. 5B, ions containing fluorine (for example, F ions or F ₂ ions) are implanted into the silicon substrate 1 using the silicon nitride film 22 as a mask. Thereby, the fluorine-containing layer 1 b is formed on the silicon substrate 1. The position of the fluorine-containing layer 1b in the depth direction is a position that overlaps an interface between the element isolation film 2 and the silicon substrate 1 described later, and the periphery in the depth direction.

  Next, as shown in FIG. 5C, the silicon substrate 1 is thermally oxidized using the silicon nitride film 22 as a mask. Thereby, an element isolation film 2 is formed on the silicon substrate 1. A portion of the element isolation film 2 that is in contact with the silicon substrate 1 is formed by thermally oxidizing the fluorine-containing layer 1b. Accordingly, the portion of the element isolation film 2 that is in contact with the silicon substrate 1 contains silicon fluoride and is more flexible than the conventional one. Therefore, the stress generated in the silicon substrate 1 (the portion shown by shading in the drawing) in contact with the end portion of the element isolation film 2 is smaller than that in the prior art.

Thereafter, as shown in FIG. 6A, the silicon nitride film 22 and the silicon oxide film 21 are removed. Next, the silicon substrate 1 is thermally oxidized using the element isolation film 2 as a mask to form a thermal oxide film (not shown) located in the element region. Thereafter, the thermal oxide film is removed.
Next, the silicon substrate 1 is thermally oxidized again to form a gate oxide film 3 located in the element region.

  When forming each of the thermal oxide film and the gate oxide film 3, the wet oxidation method is used. For this reason, water which is an oxidizing species permeates through the element isolation film 2, the fluorine-containing layer 1 b located under the element isolation film 2 is thermally oxidized, and the element isolation film 2 becomes thick. However, since the newly formed element isolation film 2 contains silicon fluoride, it has high flexibility. Accordingly, an increase in stress generated at the interface between the end portion of the element isolation film 2 and the silicon substrate 1 is suppressed.

  Thereafter, as shown in FIG. 6B, the gate electrode 4, the low-concentration impurity regions 6a and 6b, the sidewall 5, and the impurity regions 7a and 7b are formed. These forming methods are the same as those in the third embodiment.

  As described above, according to the fourth embodiment, the element isolation film 2 is formed by the LOCOS method. However, the element isolation film 2 is in contact with the silicon substrate 1 and the silicon substrate 1 is in contact with the element isolation film 2. A fluorine-containing layer is formed in each part. Therefore, the stress generated at the interface between the element isolation film 2 and the silicon substrate 1 is smaller than that in the prior art. Further, when the gate oxide film 3 and the like are formed, the element isolation film 2 becomes thick, but at this time, an increase in stress generated at the interface between the element isolation film 2 and the silicon substrate 1 is suppressed.

  FIG. 7 is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the fifth embodiment. In the present embodiment, a capacitive element is formed on the silicon substrate 1.

  First, as shown in FIG. 7A, a silicon oxide film 21 is formed on the silicon substrate 1, and a silicon nitride film 22 is further formed on the silicon oxide film 21. Next, an opening is formed in the silicon nitride film 22. Next, the silicon oxide film 21 and the silicon substrate 1 are etched using the silicon nitride film 22 as a mask. Thereby, a hole or groove 10a is formed in the silicon substrate 1.

Next, using the silicon nitride film 22 as a mask, fluorine-containing ions (for example, F ions or F ₂ ions) are implanted into the silicon substrate 1 that forms the inner surface of the hole or groove 10a, thereby forming the fluorine-containing layer 1b. The fluorine-containing layer 1b is formed at a position overlapping with a thermal oxide film 12a described later.

  Next, as shown in FIG. 7B, the silicon substrate 1 is thermally oxidized using the silicon nitride film 22 as a mask. Thereby, the thermal oxide film 12a is formed on the inner surface of the hole or groove 10a. Since the thermal oxide film 12a is formed by thermally oxidizing the fluorine-containing layer 1b, the thermal oxide film 12a contains silicon fluoride. Accordingly, the stress generated at the interface between the silicon substrate 1 and the thermal oxide film 12a is relaxed at the corner of the hole or groove 10a.

  Thereafter, as shown in FIG. 7C, the silicon oxide film 12 is formed by the CVD method in the hole or groove 10a and on the entire surface including the silicon nitride film 22, and then positioned on the silicon nitride film 22. The silicon oxide film 12, the silicon nitride film 22, and the silicon oxide film 21 are removed.

  Thereafter, as shown in FIG. 7D, a polysilicon film is formed on the entire surface including the silicon oxide film 12 embedded in the hole or groove 10a, and then the polysilicon film is patterned. Thereby, a polysilicon electrode 13 is formed on the silicon oxide film 12 embedded in the hole or groove 10a. In this way, a capacitive element is formed on the silicon substrate 1.

  As described above, according to the present embodiment, the thermal oxide film 12a located on the bottom and side walls of the hole or groove 10a contains silicon fluoride. Therefore, the stress generated at the interface between the silicon substrate 1 and the thermal oxide film 12a is relaxed at the corner of the hole or groove 10a. Accordingly, the generation of crystal defects is suppressed in the silicon substrate 1 located around the thermal oxide film 12a.

  In the present embodiment, after forming the hole or groove 10a, the silicon substrate 1 is thermally oxidized using the silicon nitride film 22 as a mask to form a thermal oxide film 12a, and then the silicon nitride film 22 is used as a mask to form fluorine. The fluorine-containing layer 1b may be formed by implanting ions that contain. In this case, heat treatment is performed in a later process, and silicon fluoride is generated in the thermal oxide film 12a. Therefore, the above-described effects can be obtained.

  Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

(A) is sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 1st Embodiment, (B) is sectional drawing for demonstrating the next process of (A), (C) is (B). Sectional drawing for demonstrating the next process of. (A) is a cross-sectional view for explaining the next step of FIG. 1 (C), (B) is a cross-sectional view for explaining the next step of (A), and (C) is the next step of (B). Sectional drawing for demonstrating a process. (A) is sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 2nd Embodiment, (B) is sectional drawing for demonstrating the next process of (A), (C) is (B). Sectional drawing for demonstrating the next process of (C), (D) is sectional drawing for demonstrating the next process of (C). (A) is sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 3rd Embodiment, (B) is sectional drawing for demonstrating the next process of (A), (C) is (B). Sectional drawing for demonstrating the next process of (C), (D) is sectional drawing for demonstrating the next process of (C). (A) is sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 4th Embodiment, (B) is sectional drawing for demonstrating the next process of (A), (C) is (B). Sectional drawing for demonstrating the next process of. (A) is sectional drawing for demonstrating the next process of FIG.5 (C), (B) is sectional drawing for demonstrating the next process of (A). (A) is sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on 5th Embodiment, (B) is sectional drawing for demonstrating the next process of (A), (C) is (B). Sectional drawing for demonstrating the next process of (C), (D) is sectional drawing for demonstrating the next process of (C). Sectional drawing for demonstrating the structure of the semiconductor device which concerns on a 1st prior art example. Sectional drawing for demonstrating the structure of the semiconductor device which concerns on a 2nd prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,101 ... Silicon substrate, 1a, 101a ... groove | channel, 1b ... Fluorine-containing layer, 2,102 ... Element isolation film, 2 ... Element isolation film, 2a, 3a, 12a, 101b ... Thermal oxide film, 3,103 ... Gate Oxide film, 4,104 ... gate electrode, 5,105 ... sidewall, 6a, 6b, 106a, 106b ... low concentration impurity region, 7a, 7b, 107a, 107b ... impurity region, 10a ... hole or trench, 12, 21 , 23 ... Silicon oxide film, 13 ... Polysilicon electrode, 22 ... Silicon nitride film

Claims (13)

Forming a groove in the semiconductor substrate;
Introducing fluorine into the semiconductor substrate located on the inner surface of the groove;
Forming a thermal oxide film on the inner surface of the groove;
Embedding an insulating film in the groove;
A method for manufacturing a semiconductor device comprising: Forming a mask film having an opening on a semiconductor substrate;
Etching the semiconductor substrate using the mask film as a mask to form a groove in the semiconductor substrate;
Using the mask film as a mask, introducing fluorine into the semiconductor substrate located on the inner surface of the groove;
Forming a thermal oxide film on the inner surface of the groove by thermally oxidizing the semiconductor substrate using the mask film as a mask;
Forming an insulating film in the groove and on the mask film;
Removing the insulating film located on the mask film;
Removing the mask film;
A method for manufacturing a semiconductor device comprising: Forming a mask film having an opening on a semiconductor substrate;
Using the mask film as a mask, introducing fluorine into the semiconductor substrate located under the opening;
Forming a thermal oxide film located inside the opening by thermally oxidizing the semiconductor substrate using the mask film as a mask;
Removing the mask film;
A method for manufacturing a semiconductor device comprising: Forming a groove in the semiconductor substrate;
Forming a thermal oxide film on the inner surface of the groove;
Introducing fluorine into the semiconductor substrate in contact with the thermal oxide film;
Forming an insulating film embedded in the trench;
A method for manufacturing a semiconductor device comprising: Forming a mask film having an opening on a semiconductor substrate;
Etching the semiconductor substrate using the mask film as a mask to form a groove in the semiconductor substrate;
Forming a thermal oxide film on the inner surface of the groove by thermally oxidizing the semiconductor substrate using the mask film as a mask;
Introducing fluorine into the semiconductor substrate in contact with the thermal oxide film using the mask film as a mask;
Forming an insulating film in the groove and on the mask film;
Removing the insulating film located on the mask film;
Removing the mask film;
A method for manufacturing a semiconductor device comprising:   6. The method of manufacturing a semiconductor device according to claim 5, further comprising a step of forming a gate oxide film by thermally oxidizing the semiconductor substrate after the step of removing the mask film. Forming a groove in the semiconductor substrate;
Forming a thermal oxide film on the inner surface of the groove;
Introducing fluorine into the thermal oxide film;
Forming an insulating film embedded in the trench;
A method for manufacturing a semiconductor device comprising: Forming a hole or groove in a semiconductor substrate;
Introducing fluorine into the semiconductor substrate located on the inner surface of the hole or groove;
Forming a thermal oxide film on the inner surface of the hole or groove;
Embedding an insulating film in the hole or groove;
Forming a conductive film located on the insulating film;
A method for manufacturing a semiconductor device comprising: Forming a hole or groove in a semiconductor substrate;
Forming a thermal oxide film on the inner surface of the hole or groove;
Introducing fluorine into the thermal oxide film;
Embedding an insulating film in the hole or groove;
Forming a conductive film located on the insulating film;
A method for manufacturing a semiconductor device comprising: A semiconductor substrate;
A groove formed in the semiconductor substrate;
A thermal oxide film formed on the inner surface of the groove;
An insulating film embedded in the groove;
Comprising
A semiconductor device in which fluorine is introduced into the thermal oxide film in contact with the semiconductor substrate. A semiconductor substrate;
An insulating film formed on the semiconductor substrate and formed by a LOCOS method;
Comprising
A semiconductor device in which fluorine is introduced into the insulating film in contact with the semiconductor substrate. The insulating film is an element isolation film that isolates an element region from other regions,
In the element region,
A gate oxide,
A gate electrode formed on the gate oxide film;
Two impurity regions formed on the semiconductor substrate and functioning as a source and a drain;
The semiconductor device according to claim 10, wherein: is formed. A semiconductor substrate;
A hole or groove formed in the semiconductor substrate;
A thermal oxide film formed on the inner surface of the hole or groove;
An insulating film embedded in the hole or groove;
A conductive film formed on the insulating film;
Comprising
A semiconductor device in which fluorine is introduced into the thermal oxide film in contact with the semiconductor substrate.

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