JP2006196543A - Nitride semiconductor light emitting element and its manufacturing method - Google Patents

Nitride semiconductor light emitting element and its manufacturing method Download PDF

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JP2006196543A
JP2006196543A JP2005004320A JP2005004320A JP2006196543A JP 2006196543 A JP2006196543 A JP 2006196543A JP 2005004320 A JP2005004320 A JP 2005004320A JP 2005004320 A JP2005004320 A JP 2005004320A JP 2006196543 A JP2006196543 A JP 2006196543A
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JP4626306B2 (en
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Hiromitsu Kudo
広光 工藤
Hiroaki Murata
博昭 村田
Hiroaki Okagawa
広明 岡川
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Mitsubishi Cable Industries Ltd
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<P>PROBLEM TO BE SOLVED: To provide the structure of a GaN series light emitting element which can improve a light extraction efficiency and, further, can improve a heat dissipation, and to provide its manufacturing method. <P>SOLUTION: Surface roughening is given to the principal surface Ax of a basic substrate A to provide, a recess and protrusion surface having a recess bottom surface A1 and a protrusion top surface A2 partitioned with a level difference, and unit crystals 1a and 1b are separately grown up from the above recess bottom surface A1 and the protrusion top surface A2. They are made to unite mutually and it is made as a GaN series crystal layer 1. Furthermore on it, a laminate S including a light emitting layer 2 is formed, the basic substrate is partially removed from a rear surface side, and only the protrusion of the basic substrate or the protrusion and a part with a λ/4 thickness or thinner from the bottom of the recess are left into the light emitting element. The λ is the wavelength of this light at the time of light emitted from the light emitting layer passing basic substrate. Consequently, the residual part is utilized for light scattering. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、窒化物半導体発光素子とその製造方法に関するものである。   The present invention relates to a nitride semiconductor light emitting device and a method for manufacturing the same.

窒化物半導体発光素子は、少なくとも発光層に窒化物半導体が用いられたものであって、その組成の選択によって、青色から紫外域にかけての短波長領域の発光が可能となっている。
窒化物半導体は、一般式InAlGaN(ただし、x+y+z=1、0≦x≦1、0≦y≦1、0≦z≦1)で表される化合物半導体である。前記式中の組成比x、y、zを選択することによって、例えば、GaN、InGaN、AlGaN、AlInGaN、AlN、InNなど、任意の組成の混晶が得られる。ここで、3族元素の一部を、B(ホウ素)、Tl(タリウム)等で置換したものや、N(窒素)の一部をP(リン)、As(ヒ素)、Sb(アンチモン)、Bi(ビスマス)等で置換したものも、窒化物半導体に含まれる。
以下、窒化物半導体を「GaN系」とも略し、必要に応じて、GaN系結晶、GaN系発光素子、GaN系LEDなどのように用いて、従来技術および本発明の説明を行う。
The nitride semiconductor light-emitting device uses a nitride semiconductor at least in the light-emitting layer, and can emit light in a short wavelength region from blue to ultraviolet by selecting the composition.
The nitride semiconductor is a compound semiconductor represented by a general formula In x Al y Ga z N (where x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). By selecting the composition ratios x, y, and z in the above formula, a mixed crystal having an arbitrary composition such as GaN, InGaN, AlGaN, AlInGaN, AlN, or InN can be obtained. Here, a part of the group 3 element is substituted with B (boron), Tl (thallium) or the like, or a part of N (nitrogen) is P (phosphorus), As (arsenic), Sb (antimony), Those substituted with Bi (bismuth) or the like are also included in the nitride semiconductor.
Hereinafter, the nitride semiconductor is also abbreviated as “GaN-based”, and the conventional technology and the present invention will be described using GaN-based crystals, GaN-based light emitting devices, GaN-based LEDs, and the like as necessary.

GaN系発光素子(特に、GaN系LED)には、光取り出し効率が低いという問題がある。光取り出し効率とは、発光層で生じた光の総量のうち、どの程度の量の光が素子外へ取り出されているかを示す割合である。GaN系LEDの光取出し効率が低い原因は、次に述べるように、GaN系結晶の高い屈折率にある。
先ず、GaN系発光素子の素子構造は、基板上にGaN系結晶層を成長させてなるものであるが、最も好ましい基板材料として汎用されるサファイアは、GaN系結晶よりも屈折率が低い。一方、素子の上側(基板から遠い側)では、素子を取り巻く材料や媒質〔例えば、パッシベーション膜(二酸化ケイ素など)、封止樹脂(エポキシ樹脂など)、空気(樹脂封止しない場合)など〕とGaN系結晶層が接することになるが、これらの材料や媒質も、殆どの場合、GaN系結晶より低い屈折率を有する。また、p側の電極として酸化インジウム錫(ITO)、酸化亜鉛(ZnO)などの透明導電膜材料からなる電極を用いる場合には、電極の屈折率がGaN系結晶よりも低くなる。
GaN-based light emitting devices (particularly GaN-based LEDs) have a problem of low light extraction efficiency. The light extraction efficiency is a ratio indicating how much light is extracted out of the element out of the total amount of light generated in the light emitting layer. The reason why the light extraction efficiency of the GaN-based LED is low is the high refractive index of the GaN-based crystal as described below.
First, the element structure of a GaN-based light-emitting element is obtained by growing a GaN-based crystal layer on a substrate, but sapphire, which is widely used as the most preferable substrate material, has a lower refractive index than a GaN-based crystal. On the other hand, on the upper side of the element (the side far from the substrate), the material and medium surrounding the element (for example, passivation film (silicon dioxide, etc.), sealing resin (epoxy resin, etc.), air (when not sealed with resin), etc.) Although the GaN-based crystal layer is in contact with each other, these materials and media almost always have a lower refractive index than that of the GaN-based crystal. When an electrode made of a transparent conductive film material such as indium tin oxide (ITO) or zinc oxide (ZnO) is used as the p-side electrode, the refractive index of the electrode is lower than that of the GaN-based crystal.

このように、発光構造の本体部分であるGaN系結晶層が、それよりも屈折率の低い物質によって上下から挟まれるために、発光層から発せられた光の一部は、GaN系結晶層を挟む両側の界面(例えば、〔基板とGaN系結晶層との界面〕と〔GaN系結晶層と空気との界面〕)で全反射され、多重反射によって素子内部に閉じ込められる。この光は、素子内部を伝播する間に内部吸収により減衰する。
また、フリップチップボンディング実装されるGaN系LEDでは、p側の電極がGaN系結晶層の一方の面に全面的に形成されるが(ITO等の透明導電膜を介して形成される場合もある)、この電極が光反射性とされるために、多重反射の問題が生じる。
In this way, since the GaN-based crystal layer, which is the main part of the light-emitting structure, is sandwiched from above and below by a material having a lower refractive index, a part of the light emitted from the light-emitting layer can The light is totally reflected at the interfaces on both sides (for example, [interface between the substrate and the GaN-based crystal layer] and [interface between the GaN-based crystal layer and air]) and confined inside the device by multiple reflection. This light is attenuated by internal absorption while propagating inside the device.
In a GaN-based LED mounted by flip-chip bonding, the p-side electrode is entirely formed on one surface of the GaN-based crystal layer (in some cases, it is formed via a transparent conductive film such as ITO). ) Since this electrode is made light reflective, a problem of multiple reflection occurs.

前記多重反射の問題を解決し、LEDの光取り出し効率を向上させる方法として、基板表面に凹凸構造を設けることで発光層からの光を散乱させる手法が開示されている(例えば、特許文献1)。
また別の方法として、LEDの光取り出し面に凹凸加工を施すことで発光層からの光を散乱させ光取り出し効率を高める方法が開示されている(特許文献2)。さらに、基板裏面が光取り出し面とは反対側の面であっても、該基板裏面に凹凸加工を施すことで、発光層からの光を散乱させて反射し、光取り出し効率を高める方法が知られている。
As a method for solving the problem of multiple reflection and improving the light extraction efficiency of the LED, a method of scattering light from the light emitting layer by providing an uneven structure on the substrate surface is disclosed (for example, Patent Document 1). .
As another method, a method of increasing the light extraction efficiency by scattering the light from the light emitting layer by performing uneven processing on the light extraction surface of the LED is disclosed (Patent Document 2). Furthermore, even when the back surface of the substrate is the surface opposite to the light extraction surface, a method is known in which light from the light-emitting layer is scattered and reflected by performing uneven processing on the back surface of the substrate to increase the light extraction efficiency. It has been.

しかしながら、本発明者等は、たとえ素子表面や基板の成長面に凹凸を設けても、光がGaN系結晶側から凹凸面を通過する場合には、ある程度の量の光については全反射して素子外へ取り出すことができていない点に着目し、これを解決すべき第一の問題とした。
特開2004−193619号公報 特開2003−218394号公報 特開2000−106455号公報 特開2000−331947号公報 特開2001−210598号公報 特開2002−164296号公報
However, the present inventors do not totally reflect a certain amount of light when light passes through the concavo-convex surface from the GaN-based crystal side even if the element surface and the growth surface of the substrate are uneven. Focusing on the fact that it could not be taken out of the device, this was the first problem to be solved.
JP 2004-193619 A JP 2003-218394 A JP 2000-106455 A JP 2000-331947 A Japanese Patent Laid-Open No. 2001-210598 JP 2002-164296 A

本発明の目的は、光取り出し効率を改善し得、さらには、放熱性を改善することも可能なGaN系発光素子の構造、およびその製造方法を提供することにある。   An object of the present invention is to provide a structure of a GaN-based light-emitting element capable of improving light extraction efficiency and further improving heat dissipation, and a method for manufacturing the same.

本発明は、次の特徴を有するものである。
(1)窒化物半導体結晶が成長し得る基礎基板の一方の主面が凹凸加工によって凹凸面とされ、該凹凸面は段差部で区画された凹部底面と凸部上面とを有し、
前記凹凸面上には、凹部底面および凸部上面のそれぞれから成長した単位結晶が合体して凹凸面を埋め込んでいる窒化物半導体結晶層と、その上に成長した他の窒化物半導体結晶層とを有してなる積層体が成長しており、該積層体には、発光素子構造として、n型層、発光層、p型層が含まれており、
基礎基板が他方の主面である裏面の側から部分的に除去され、
(あ)基礎基板のうちの凸部のみが、または、
(い)発光層から発せられた光が基礎基板を通過する際の該光の波長をλとして、凸部と、凹部底面から厚さλ/4以下の部分とからなる部分が、
素子中に残されていることを特徴とする、窒化物半導体発光素子。
(2)基礎基板の屈折率が、凹凸面を埋め込んでいる窒化物半導体結晶層の屈折率よりも小さいものである、上記(1)記載の窒化物半導体発光素子。
(3)基礎基板がサファイア基板である、上記(1)または(2)記載の窒化物半導体発光素子。
(4)さらに、上記積層体上に接合された支持基板を有するものである、上記(1)〜(3)のいずれかに記載の窒化物半導体発光素子。
(5)窒化物半導体発光素子の製造方法であって、
(i)窒化物半導体結晶が成長し得る基礎基板の一方の主面に凹凸加工を施し、該主面を、段差部で区画された凹部底面と凸部上面とを有する凹凸面とする凹凸加工工程と、
(ii)前記凹凸面の凹部底面と凸部上面とから別個に窒化物半導体の単位結晶を成長させそれらを互いに合体させて、凹凸面を埋め込む窒化物半導体結晶層とし、さらにその上に、他の窒化物半導体結晶層を成長させ、発光素子構造としてのn型層、発光層、p型層を含む積層体を形成する結晶成長工程と、
(iii)基礎基板の他方の主面である裏面の側から、基礎基板を部分的に除去する加工を施して、
(あ)基礎基板のうちの凸部のみを、または、
(い)発光層から発せられた光が基礎基板を通過する際の該光の波長をλとして、凸部と、凹部底面から厚さλ/4以下の部分とからなる部分を、
素子中に残す基礎基板除去工程とを、
有することを特徴とする、窒化物半導体発光素子の製造方法。
(6)上記基礎基板除去工程に先立って、さらに、上記積層体上に支持基板を接合する工程を有する、上記(5)記載の製造方法。
(7)上記基礎基板除去工程における基礎基板の部分的除去方法が、化学的エッチング、機械的研摩、または、基礎基板の裏面側から凹凸面へのレーザ照射によるレーザリフトオフである、上記(5)または(6)記載の製造方法。
The present invention has the following features.
(1) One main surface of the base substrate on which the nitride semiconductor crystal can grow is made an uneven surface by uneven processing, the uneven surface has a concave bottom surface and a convex upper surface partitioned by a stepped portion,
On the concavo-convex surface, a nitride semiconductor crystal layer in which unit crystals grown from the concave bottom surface and the convex top surface are combined to embed the concavo-convex surface, and another nitride semiconductor crystal layer grown thereon And a laminate including an n-type layer, a light-emitting layer, and a p-type layer as a light-emitting element structure.
The base substrate is partially removed from the back side, which is the other main surface,
(A) Only the convex part of the basic substrate, or
(Ii) where the light emitted from the light emitting layer passes through the base substrate, the wavelength of the light is λ, and the portion composed of the convex portion and the portion having a thickness of λ / 4 or less from the bottom surface of the concave portion,
A nitride semiconductor light-emitting device, which is left in the device.
(2) The nitride semiconductor light emitting device according to (1) above, wherein the refractive index of the basic substrate is smaller than the refractive index of the nitride semiconductor crystal layer in which the uneven surface is embedded.
(3) The nitride semiconductor light emitting device according to (1) or (2), wherein the basic substrate is a sapphire substrate.
(4) The nitride semiconductor light-emitting element according to any one of (1) to (3), further including a support substrate bonded onto the stacked body.
(5) A method for manufacturing a nitride semiconductor light emitting device,
(I) Concavity and convexity processing is performed on one main surface of a base substrate on which a nitride semiconductor crystal can grow, and the main surface is an uneven surface having a concave bottom surface and a convex top surface partitioned by stepped portions. Process,
(Ii) A nitride semiconductor unit crystal is separately grown from the concave bottom surface and the convex top surface of the concave and convex surfaces, and united with each other to form a nitride semiconductor crystal layer that embeds the concave and convex surfaces. A crystal growth step of growing a nitride semiconductor crystal layer and forming a stacked body including an n-type layer, a light-emitting layer, and a p-type layer as a light-emitting element structure;
(Iii) From the back side that is the other main surface of the base substrate, a process for partially removing the base substrate is performed,
(A) Only the convex part of the basic substrate, or
(Ii) The wavelength of the light emitted from the light emitting layer when passing through the base substrate is λ, and a portion composed of a convex portion and a portion having a thickness of λ / 4 or less from the bottom surface of the concave portion,
The basic substrate removal process left in the element,
A method for manufacturing a nitride semiconductor light emitting device, comprising:
(6) The manufacturing method according to (5), further including a step of bonding a support substrate on the laminate before the basic substrate removing step.
(7) In the above (5), the partial removal method of the basic substrate in the basic substrate removal step is chemical lift, mechanical polishing, or laser lift-off by laser irradiation from the back side of the basic substrate to the concavo-convex surface. Or the manufacturing method of (6) description.

本発明では、先ず、基礎基板の一方の主面(以下、上面)を凹凸面とし、結晶成長法として後述のファセットLEPS法を適用することによって、基礎基板上に高品質な結晶層からなる発光素子構造を形成する。素子の取り扱いや機械的強度の点から、さらに支持基板を素子最上面に積層しておくのが好ましい態様である。
次に、基礎基板の他方の主面である裏面の側から、基礎基板を特定の厚さだけ除去し、図1に示すように、基板上面の凹凸部分だけを素子内に残し、その部分を光取り出し面または光反射面として利用している。
このような製造手順、素子構造とすることで、素子内に残した基礎基板の凹凸部分が光散乱層として働く。この光散乱層は、もとの基礎基板の側から光を取り出す場合には、光を散乱させながらより多くの光を取り出し得る面となり、もとの上方側から光を取り出す場合には、光を散乱させながらより多くの光を反射し得る面となり、それぞれの場合に光散乱用の新たな凹凸を形成することなく、光取り出し効率を向上させることが出来る。
また、基礎基板がサファイア基板である場合、サファイア基板は熱伝導率が悪く、発光素子に熱がこもり易いという問題がある。しかし、本発明では、基板を薄くし凹凸部分だけを残す構成としているので、「光取り出し効率」を向上させながら、「放熱性」をも向上させることが可能となっている。
In the present invention, first, one main surface (hereinafter referred to as the upper surface) of the base substrate is made an uneven surface, and a facet LEPS method described later is applied as a crystal growth method, whereby light emission comprising a high-quality crystal layer on the base substrate. An element structure is formed. From the viewpoint of device handling and mechanical strength, it is preferable that a support substrate is further laminated on the uppermost surface of the device.
Next, the base substrate is removed by a specific thickness from the back surface side, which is the other main surface of the base substrate, and as shown in FIG. It is used as a light extraction surface or a light reflection surface.
By setting it as such a manufacturing procedure and element structure, the uneven | corrugated | grooved part of the basic substrate left in the element works as a light-scattering layer. This light scattering layer is a surface from which more light can be extracted while scattering the light when extracting light from the original base substrate side. Thus, the light extraction efficiency can be improved without forming new irregularities for light scattering in each case.
Further, when the base substrate is a sapphire substrate, the sapphire substrate has a problem that heat conductivity is poor and heat tends to be trapped in the light emitting element. However, in the present invention, since the substrate is made thin and only the uneven portion is left, it is possible to improve the “heat dissipation” while improving the “light extraction efficiency”.

本発明では、「凹部底面」、「凸部上面」、「凹凸面上」など、上下方向を示唆する文言を用いているが、これらは、次に説明するように、基礎基板を最下層と位置付けて規定したものであって、素子構造中における基板や各層の位置関係を明確に説明することを目的とするものである。即ち、本発明では、基礎基板の大部分を除去することが必須となっており、最上層に設けた支持基板を下にして基礎基板除去面を新たな素子上面とする場合や、最上層に設けた支持基板をそのまま上側にしてフリップチップ実装する場合があり、素子の上下方向が分かりにくい。そこで、製造工程の最初に用いる基礎基板を最下層として位置付け、〔その上にGaN系結晶層が積層されていく〕と規定して、素子の積層構造に上下の方向を与えて説明を明確にした。この上下方向は、最終製品の形状から受ける上下のイメージや、実装姿勢とは関係が無い。   In the present invention, words suggesting the vertical direction such as “bottom surface of concave portion”, “upper surface of convex portion”, “on the concave and convex surface”, etc. are used. It is defined by positioning, and is intended to clearly explain the positional relationship between the substrate and each layer in the element structure. That is, in the present invention, it is indispensable to remove most of the basic substrate. When the base substrate removal surface is a new element upper surface with the support substrate provided on the uppermost layer facing down, Flip chip mounting is sometimes performed with the provided support substrate as it is, and the vertical direction of the element is difficult to understand. Therefore, the basic substrate used at the beginning of the manufacturing process is positioned as the lowest layer, and it is defined that [GaN-based crystal layer is stacked on top of it], and the explanation is clearly given by giving the vertical direction to the stacked structure of the element. did. This vertical direction has nothing to do with the vertical image received from the shape of the final product or the mounting orientation.

以下、本発明による製造方法を説明しながら、それに沿って、本発明によるGaN系発光素子の構造をも同時に説明する。
図1は、本発明による製造方法の各工程における加工状態を示した模式図である。
本発明による製造方法は、(i)の凹凸加工工程と、(ii)の結晶成長工程と、(iii)の基礎基板除去工程とを、少なくとも有する。
In the following, while explaining the manufacturing method according to the present invention, the structure of the GaN-based light emitting device according to the present invention will also be described along with it.
FIG. 1 is a schematic diagram showing a processing state in each step of the manufacturing method according to the present invention.
The manufacturing method according to the present invention has at least the unevenness processing step (i), the crystal growth step (ii), and the basic substrate removal step (iii).

(i)の凹凸加工工程では、図1(a)に示すように、窒化物半導体結晶が成長するための基礎基板の上面Axに凹凸加工を施し凹凸面とする。
該凹凸面は、段差部によって区画された凹部底面A1と凸部上面A2とを有し、後述するファセットLEPS法(該凹凸面上にGaN系結晶層を気相成長させるための公知の手法)が適用可能な凹凸であればよい。この凹凸の形状や寸法仕様についても後述する。
In the concavo-convex processing step (i), as shown in FIG. 1A, the concavo-convex surface is formed on the upper surface Ax of the base substrate on which the nitride semiconductor crystal is grown.
The concavo-convex surface has a concave bottom surface A1 and a convex top surface A2 partitioned by a stepped portion, and a facet LEPS method (a known method for vapor-phase growth of a GaN-based crystal layer on the concavo-convex surface) described later. As long as the irregularities are applicable. The shape and dimensional specifications of the unevenness will also be described later.

基礎基板は、GaN系結晶がエピタキシャル成長し得るものであればよく、例えば、サファイア(C面、A面、R面)、SiC(6H、4H、3C)、Si、スピネル、ZnO、GaAs、NGO、LGOなどが挙げられる。また、これらの材料からなる結晶層を表層として有する基板であってもよい。
好ましいファセットLEPS法を実施する点からは、成長するGaN系結晶が基礎基板の主面に垂直にc軸配向して成長し得る基板が好ましい。
サファイア基板は、GaN系結晶を成長させるための基礎基板として最も汎用であり好ましいが、背景技術の説明において問題点を述べたとおり、GaN系結晶よりも屈折率が低いために光を閉じ込め、また放熱性も低いという問題を有している。従って、基礎基板としてサファイア基板を用いた場合に、本発明の作用効果〔光取り出し効率の改善、放熱性の改善〕は最も顕著となる。
The base substrate may be any substrate as long as a GaN-based crystal can be epitaxially grown. For example, sapphire (C plane, A plane, R plane), SiC (6H, 4H, 3C), Si, spinel, ZnO, GaAs, NGO, LGO etc. are mentioned. Moreover, the board | substrate which has a crystal layer which consists of these materials as a surface layer may be sufficient.
From the viewpoint of carrying out the preferred facet LEPS method, a substrate on which the GaN-based crystal to be grown can grow with c-axis orientation perpendicular to the main surface of the base substrate is preferable.
A sapphire substrate is the most versatile and preferable as a basic substrate for growing a GaN-based crystal. However, as described in the background art, a sapphire substrate confines light because it has a lower refractive index than a GaN-based crystal. It has a problem of low heat dissipation. Therefore, when a sapphire substrate is used as the basic substrate, the effects of the present invention [improvement of light extraction efficiency, improvement of heat dissipation] are most prominent.

基礎基板の上面への凹凸加工法、凹凸の仕様について説明する。
凹凸面を上から見た時の凹凸が描くパターンは、後述のファセットLEPS法が実施され得るパターンであればよく、従来公知の凹凸基板のパターンを参照してよい。好ましい態様としては、構成辺の全てが基板の結晶方位との関係において等価な方向に配向した多角形状の凸部(または凹部)が、規則的に配列されたパターン、直線状または曲線状の凹溝(または凸尾根)が一定間隔で配列されたストライプ状パターンなどが挙げられる。
これらのパターンの中でも、直線状の凹溝(または凸尾根)が一定間隔で配列されたストライプ状パターンは、加工が容易であるため、好ましいパターンである。
A method for processing unevenness on the upper surface of the base substrate and specifications of the unevenness will be described.
The pattern drawn by the unevenness when the uneven surface is viewed from above may be any pattern that can be subjected to the facet LEPS method described below, and a conventionally known uneven substrate pattern may be referred to. As a preferred embodiment, a polygonal convex portion (or concave portion) in which all of the constituent sides are oriented in an equivalent direction in relation to the crystal orientation of the substrate is a regularly arranged pattern, linear or curved concave portion. Examples include a stripe pattern in which grooves (or convex ridges) are arranged at regular intervals.
Among these patterns, a stripe pattern in which linear grooves (or convex ridges) are arranged at regular intervals is preferable because it is easy to process.

凹凸のパターンをストライプ状とする場合のストライプの長手方向や、凸部または凹部を多角形状とする場合の、該多角形の構成辺の方向は、その上に成長するGaN系結晶にとって<11−20>方向、<1−100>方向などとすることが好ましい。これらの方向は、公知のファセットLEPS法を参照して、ファセットLEPS法に特有の結晶成長態様が発生し易い成長条件(成長雰囲気、成長温度、雰囲気圧力など)と適宜組合わせればよい。   The longitudinal direction of the stripe when the uneven pattern is formed into a stripe shape, and the direction of the constituent side of the polygon when the convex portion or the concave portion is formed into a polygonal shape are <11− for the GaN-based crystal grown thereon. 20> direction, <1-100> direction, and the like are preferable. These directions may be appropriately combined with the growth conditions (growth atmosphere, growth temperature, atmospheric pressure, etc.) in which a crystal growth mode peculiar to the facet LEPS method is likely to occur with reference to a known facet LEPS method.

凹凸をストライプ状パターンとする場合、図3(a)に示す凹部底面の帯幅(凹溝幅)W1、凸部上面の帯幅(凸稜幅)W2は、共に1μm〜10μm、特に2μm〜6μmが好ましい。この帯幅が1μm以上であれば、エッチングマスクのパターニングに際して、レジストマスクの露光を安価なコンタクト露光装置で行うことができる。より高精度の露光が可能な、ステッパ等の露光装置を用いる場合には、更に狭い帯幅としてもよい。この帯幅が10μmを越えると、基板上の凹凸の密度が低くなるために、凹凸を利用するファセットLEPS法の効果が小さくなる。
W1:W2は、2:3〜3:2、特に1:1とすることが好ましい。
これらの値は、凹凸を多角形状とする場合の、多角形の高さや、隣接する多角形の構成辺間の間隔として適用してよい。
When the irregularities are formed in a stripe pattern, the band width (concave groove width) W1 of the bottom surface of the recess and the band width (convex ridge width) W2 of the top surface of the projection shown in FIG. 3A are both 1 μm to 10 μm, particularly 2 μm to 6 μm is preferable. When the band width is 1 μm or more, the resist mask can be exposed with an inexpensive contact exposure apparatus when patterning the etching mask. When using an exposure apparatus such as a stepper capable of higher-accuracy exposure, a narrower band width may be used. When the band width exceeds 10 μm, the density of the unevenness on the substrate is reduced, and the effect of the facet LEPS method using the unevenness is reduced.
W1: W2 is preferably 2: 3 to 3: 2, particularly 1: 1.
These values may be applied as the height of the polygon or the interval between the constituent sides of the adjacent polygon when the irregularities are polygonal.

凹凸の段差hは、凹部底面から結晶単位が成長し得、かつ凸部上面から成長した結晶単位と合体し得るように、またさらに、基礎基板除去工程の後に凹凸が光散乱の作用を充分に示すように、0.1μm〜5μm、特に0.5μm〜2μmとすることが好ましい。これによって、凹凸形状を精度よく成長させることが容易となり、光の散乱効果を最も効率よく得ることができるようになる。   The unevenness step h is such that the crystal unit can grow from the bottom surface of the concave portion and can merge with the crystal unit grown from the top surface of the convex portion. As shown, it is preferably 0.1 μm to 5 μm, particularly 0.5 μm to 2 μm. As a result, it becomes easy to grow the concavo-convex shape with high accuracy, and the light scattering effect can be obtained most efficiently.

基板の主面に凹凸を加工する方法としては、フォトレジスト膜をエッチングマスクとして、ドライエッチングにより凹部を形成する方法が挙げられる。フォトレジスト膜に、目的の凹部形状に合わせた開口パターンを形成するには、フォトリソグラフィの技法を用いればよい。
ドライエッチングの際に用いるエッチングマスクはフォトレジストに限定されず、無機材料や金属材料からなるマスクも使用することができる。樹脂製のフォトレジスト膜は製膜、パターニング、除去の各操作を簡便に行うことができ、特に基板表面に大きなダメージを与えることなく除去できることから、最も好ましいマスクである。ただし、樹脂材料からなるために、ドライエッチングによる加工時間が過度に長くなると基板表面への焼き付きが生じ、良好なGaN系結晶の成長を阻害する。
As a method of processing the unevenness on the main surface of the substrate, there is a method of forming a recess by dry etching using a photoresist film as an etching mask. Photolithographic techniques may be used to form an opening pattern in the photoresist film in accordance with the target concave shape.
An etching mask used in dry etching is not limited to a photoresist, and a mask made of an inorganic material or a metal material can also be used. A resin-made photoresist film is the most preferable mask because it can be easily subjected to film forming, patterning, and removal operations and can be removed without particularly damaging the substrate surface. However, since it is made of a resin material, if the processing time by dry etching is excessively long, the surface of the substrate is seized, which hinders the growth of good GaN-based crystals.

ドライエッチングには、プラズマエッチング、反応性イオンエッチング(RIE)があり、いずれも好ましく用いることができる。これらのドライエッチングに用いるエッチングガスは、使用する基板の材料に合わせて、従来公知のガスから選択することができる。   Dry etching includes plasma etching and reactive ion etching (RIE), and any of them can be preferably used. The etching gas used for these dry etchings can be selected from conventionally known gases according to the material of the substrate to be used.

凹凸の断面形状は、図1(a)、図3(a)に示すように、凹部底面A1と凸部上面A2とを確保する点から、基本的に矩形(台形を含む)波状が好ましい。
図3(a)に示すように、主面Axと段差面A3とのなす角度θは、10°≦θ≦90°が好ましく、45°≦θ≦90°が特に好ましい範囲である。
As shown in FIGS. 1 (a) and 3 (a), the concave-convex cross-sectional shape is basically preferably rectangular (including trapezoidal) wavy from the viewpoint of securing the concave bottom surface A1 and the convex top surface A2.
As shown in FIG. 3A, the angle θ formed between the main surface Ax and the step surface A3 is preferably 10 ° ≦ θ ≦ 90 °, and particularly preferably 45 ° ≦ θ ≦ 90 °.

(ii)の結晶成長工程では、先ず、図1(b)に示すように、基礎基板Aの凹凸面に対してファセットLEPS法を適用し、その凹部底面A1と凸部上面A2とから別個に窒化物半導体の単位結晶1a、1bを気相成長させ、それらを互いに合体させて上面を平坦化させて、凹凸面を埋め込むGaN系結晶層(以下、埋め込み層)1とする。
さらに該埋め込み層の上に、図1(c)に示すように、他のGaN系結晶層を成長させ、発光素子構造としてのn型層、発光層、p型層を含んだ、GaN系結晶からなる積層体Sを形成する。
In the crystal growth step (ii), first, as shown in FIG. 1B, the facet LEPS method is applied to the uneven surface of the base substrate A, and separately from the concave bottom surface A1 and the convex top surface A2. Nitride semiconductor unit crystals 1a and 1b are vapor-phase grown, and united with each other to flatten the upper surface, thereby forming a GaN-based crystal layer (hereinafter referred to as a buried layer) 1 that fills the uneven surface.
Further, as shown in FIG. 1C, another GaN-based crystal layer is grown on the buried layer, and includes a n-type layer, a light-emitting layer, and a p-type layer as a light-emitting element structure. A laminate S made of is formed.

積層体Sの各層の導電型の上下関係は、n型層、p型層のどちらを下側にするかは限定されないが、埋め込み層1は、最終的な素子構造では必ず電流経路となるので、積層体の下側の層の導電型と同じ導電型とすべきである。
図1の例では、埋め込み層1と、クラッド層2とは、キャリア濃度や結晶の組成が互いに異なる別の層としたが、1つの層で兼用してもよい。
The vertical relationship of the conductivity type of each layer of the stacked body S is not limited as to which of the n-type layer and the p-type layer is on the lower side, but the buried layer 1 always becomes a current path in the final element structure. The conductivity type of the lower layer of the laminate should be the same.
In the example of FIG. 1, the buried layer 1 and the clad layer 2 are separate layers having different carrier concentrations and crystal compositions, but may be combined into one layer.

また、埋め込み層として好ましいGaN系材料は、ファセットを形成した材料と同じ材料であるGaNであり、キャリア濃度は1×1017〜1×1021cm−3が好ましい範囲である。 A preferable GaN-based material for the buried layer is GaN, which is the same material as the facet-formed material, and the carrier concentration is preferably in the range of 1 × 10 17 to 1 × 10 21 cm −3 .

ファセットLEPS法の基礎技術であるLEPS法(Lateral Epitaxy on a Patterned Substrate)は、基板の主面に凹凸加工を施し、その凹凸上にGaN系結晶を成長させる方法である。LEPS法は、基板の主面への加工を完了させた後に、前述の基板表面処理(バッファ層の形成、窒化処理等)を含めたGaN系結晶の成長を行う方法であり、また、SiOなどからなる選択成長マスクは用いない。これらの点から、LEPS法は、結晶の横方向成長を意図的に発生させる方法の中でも、最も製造工程が簡素化でき、かつ、GaN系結晶の汚染や変質を最小限に抑えられる方法である。 The LEPS method (Lateral Epitaxy on a Patterned Substrate), which is the basic technology of the facet LEPS method, is a method in which a main surface of a substrate is subjected to uneven processing and a GaN crystal is grown on the uneven surface. LEPS method, and finishes the processing into the main surface of the substrate, a method to grow a GaN group crystal including substrate surface treatment described above (formation of a buffer layer, nitriding treatment, etc.), also, SiO 2 A selective growth mask made up of or the like is not used. From these points, the LEPS method is the method that can most simplify the manufacturing process and minimize the contamination and alteration of the GaN-based crystal among the methods that intentionally generate the lateral growth of the crystal. .

LEPS法の中でもファセットLEPS法は、平坦化後の結晶層表面における転位密度(貫通転移の密度)が一様に低くなる優れた結晶成長法である(例えば、特許文献3〜6)。ファセットLEPS法によって高品質な結晶層を成長させることによって、活性層における発光効率の向上、pn接合部の耐圧特性の向上や、素子の動作電圧低減に係わる、コンタクト層の導電率の向上、コンタクト層と電極との接触抵抗の低減等の、好ましい効果が期待できる。   Among the LEPS methods, the facet LEPS method is an excellent crystal growth method in which the dislocation density (density of threading transition) on the crystal layer surface after planarization is uniformly reduced (for example, Patent Documents 3 to 6). By growing a high-quality crystal layer by the facet LEPS method, the light emitting efficiency in the active layer is improved, the withstand voltage characteristic of the pn junction is improved, and the contact layer is improved in electrical conductivity, which is related to the reduction of the operating voltage of the device, Desirable effects such as reduction in contact resistance between the layer and the electrode can be expected.

ファセットLEPS法は、凹凸の仕様と成長条件との組合わせが重要である。凹凸面は、図1(a)に示すように、GaN系結晶がc軸配向し得る主面(その主面上にGaN系結晶を成長させた場合にその結晶のc軸が該主面に対し垂直となるような板面)Axに凹凸加工を施すことによって形成する。
この主面上に、c軸方向の成長速度が高く、c軸に直交する方向の成長速度が低くなる成長条件(比較的低い温度、比較的高い水素ガス濃度、比較的高い圧力)を用いて、GaN系結晶の成長を行う。これによって、結晶成長の過程で、凹部底面A1および凸部上面A2のそれぞれに、{1−101}ファセット、{11−22}ファセットのような、主面に対して斜めに配向したファセット(以下「斜めファセット」という)1fを側壁面とする独立した結晶単位が発生する。これがファセット成長である。
In the facet LEPS method, a combination of unevenness specifications and growth conditions is important. As shown in FIG. 1A, the concavo-convex surface is a main surface on which the GaN-based crystal can be c-axis oriented (when the GaN-based crystal is grown on the main surface, the c-axis of the crystal is the main surface. A plate surface that is perpendicular to the surface Ax) is formed by subjecting it to irregularities.
On this main surface, using growth conditions (relatively low temperature, relatively high hydrogen gas concentration, relatively high pressure) in which the growth rate in the c-axis direction is high and the growth rate in the direction perpendicular to the c-axis is low. GaN-based crystals are grown. As a result, facets oriented obliquely with respect to the main surface (hereinafter referred to as {1-101} facets and {11-22} facets) are respectively formed on the concave bottom surface A1 and the convex top surface A2 during crystal growth. Independent crystal units with 1f as side walls are generated (called "oblique facets"). This is facet growth.

上記のように、ファセット成長では、その成長の初期に、斜めファセットを側壁面として有する微小な結晶が多数形成される。この微小な結晶同士が合体を繰り返して大きくなる過程で、転位の伝播方向が曲がり、逆方向の転位がループを形成して消滅していくことにより、転位密度の低減が生じる。
また、ファセット成長から平坦化へと移行するとき、凹部底面および凸部上面に発生した結晶体の側壁面から横方向成長が発生し、転位の伝播方向が曲げられるために、上方に伝播する転位の密度が低減する。
後者の効果を最大とするために、ファセット成長工程で発生させる結晶体は、側壁面となる斜めファセットの面積が最大となる形状とすることが好ましい。その形状は、多角形状の凹部または凸部から成長する結晶体の場合には、該多角形を底面とする角錐状であり、ストライプ状の凹部または凸部から成長する結晶体の場合には、ストライプの長手方向に伸びる、断面三角形の屋根形である。
As described above, in facet growth, a large number of fine crystals having oblique facets as side wall surfaces are formed in the initial stage of the growth. In the process in which the small crystals are repeatedly united and become larger, the propagation direction of the dislocations is bent, and the dislocations in the opposite direction form loops and disappear, thereby reducing the dislocation density.
Also, when shifting from facet growth to flattening, lateral growth occurs from the side wall surface of the crystal generated on the bottom surface of the concave portion and the top surface of the convex portion, and the propagation direction of the dislocation is bent. Density is reduced.
In order to maximize the latter effect, it is preferable that the crystal generated in the facet growth process has a shape that maximizes the area of the oblique facet that becomes the side wall surface. In the case of a crystal growing from a polygonal concave or convex portion, the shape is a pyramid with the polygon as the bottom, and in the case of a crystal growing from a striped concave or convex portion, It is a roof shape with a triangular cross section extending in the longitudinal direction of the stripe.

ファセット成長によって、凹部底面と凸部上面のそれぞれに独立した結晶単位が発生した後も成長を継続すると、各結晶単位は横方向にも徐々に伸張して行く。やがて、隣り合った結晶単位同士が接すると、より速い横方向成長が発生して、隣り合う結晶単位の側壁面(斜めファセット)の間が埋め込まれて行き、表面が平坦化する。   If the growth continues even after the independent crystal units are generated on the concave bottom surface and the convex top surface by the facet growth, each crystal unit gradually expands in the lateral direction. Eventually, when adjacent crystal units come into contact with each other, faster lateral growth occurs, and the space between the side wall surfaces (diagonal facets) of the adjacent crystal units gradually fills, flattening the surface.

平坦化の工程を早く開始させるには、それぞれの凹部底面と凸部上面に独立した結晶単位が形成されたところで、成長条件を変化させ、二次元成長が優勢となる成長条件(より高い温度、より低い雰囲気中水素ガス濃度、より低い圧力)に切り替える。このような成長条件の切り替えを行うと、基板表面が短時間でGaN系結晶に覆い尽くされ、また、その後の、隣り合う結晶単位の側壁面の間の埋め込みも短時間で進み、表面平坦化がより早く達成される。   In order to start the flattening process quickly, when independent crystal units are formed on the bottom surfaces of the respective recesses and the top surfaces of the projections, the growth conditions are changed so that two-dimensional growth becomes dominant (higher temperature, Switch to lower atmospheric hydrogen gas concentration, lower pressure). When such growth conditions are switched, the substrate surface is completely covered with the GaN-based crystal in a short time, and the subsequent filling between the side wall surfaces of adjacent crystal units also proceeds in a short time, thereby flattening the surface. Is achieved faster.

凹凸基板上にGaN系結晶を成長させる方法は特に限定されるものではなく、MOVPE法の他、ハイドライド気相成長(HVPE)法、分子ビーム蒸着(MBE)法等、従来公知の方法を適宜使用することができる。
また、製造効率の点からは、基礎基板上に積層されるGaN系半導体層の成長を、全てMOVPE法により、ひとつの成長炉内で一貫して行うことが好ましい。
The method for growing the GaN-based crystal on the concavo-convex substrate is not particularly limited. In addition to the MOVPE method, a conventionally known method such as a hydride vapor phase epitaxy (HVPE) method or a molecular beam deposition (MBE) method is appropriately used. can do.
From the viewpoint of manufacturing efficiency, it is preferable that the growth of the GaN-based semiconductor layer stacked on the base substrate is performed consistently in one growth furnace by the MOVPE method.

埋め込み層上に順次成長させるGaN系結晶層は、発光素子構造に応じて適宜設計してよい。図1(c)の例では、埋め込み層1がn型クラッド層を兼ねたn型コンタクト層となっており、GaN系発光層2、p型AlGaNクラッド層3、p型GaNコンタクト層4を有する素子構造となっている。発光層は、多重量子井戸構造など、さらに多層に細分化してもよい。
また、必要に応じて、ブラッグ反射層などの必要な機能層を、適宜設けてよい。
最上層であるp型層は、必ずしも上面が平坦な層である必要はなく、テトラエチルシラン、シラン、ジシラン、ビスシクロペンタジエニルマグネシウム、Siなどのサーファクタント処理を施すことによって、下地であるGaN系結晶層上面にドット状に成長させた3次元結晶体であってもよい。
The GaN-based crystal layer that is sequentially grown on the buried layer may be appropriately designed according to the light emitting element structure. In the example of FIG. 1C, the buried layer 1 is an n-type contact layer that also serves as an n-type cladding layer, and includes a GaN-based light emitting layer 2, a p-type AlGaN cladding layer 3, and a p-type GaN contact layer 4. It has an element structure. The light emitting layer may be further subdivided into multiple layers such as a multiple quantum well structure.
Moreover, you may provide required functional layers, such as a Bragg reflective layer, as needed.
The p-type layer, which is the uppermost layer, does not necessarily have to have a flat top surface. By applying a surfactant treatment such as tetraethylsilane, silane, disilane, biscyclopentadienylmagnesium, or Si, the underlying GaN-based layer It may be a three-dimensional crystal grown in the form of dots on the upper surface of the crystal layer.

本発明では基礎基板の大部分が除去されるために、素子を製品として取り扱うには、図1(c)に示すように、積層体Sの最上層に支持基板を設けることが好ましい。支持基板を付与することによって、たとえ基礎基板の大部分が除去されても、最終的な製品では充分な機械的強度が確保され、また、素子の取り扱い性も向上する。
支持基板の厚さは限定されないが、発光素子の反りを防止する点からは、90μm〜1000μm、特に100μm〜500μmが好ましい寸法である。
Since most of the basic substrate is removed in the present invention, in order to handle the element as a product, it is preferable to provide a support substrate on the uppermost layer of the laminate S as shown in FIG. By providing the support substrate, even if most of the base substrate is removed, sufficient mechanical strength is ensured in the final product, and the handleability of the element is improved.
Although the thickness of a support substrate is not limited, 90 micrometers-1000 micrometers, especially 100 micrometers-500 micrometers are a preferable dimension from the point which prevents the curvature of a light emitting element.

支持基板の材料は、限定はされないが、好ましいものとしては、GaAs、SiC、CuW、GaP、InP,ZnO,ZnSeなどが挙げられる。
積層体の最上層への支持基板の接合方法は、その支持基板の材料によっても異なるが、導電性材料を介しての接着が好ましい。接合に介在させ得る導電性材料としては、Au、Al、In、はんだ、Agペーストなどが例示される。
支持基板の材料としてn型GaAs、p型GaAsなどの導電性材料を用いると、図2(b)に示すように、支持基板に電極を形成することが可能となり、n電極E2とp電極E1とを平行平板状に対向配置し、これら電極によって素子構造部分を上下から挟んだ構造とすることもできる。
The material of the support substrate is not limited, but preferred examples include GaAs, SiC, CuW, GaP, InP, ZnO, and ZnSe.
The method of bonding the support substrate to the uppermost layer of the laminate varies depending on the material of the support substrate, but adhesion via a conductive material is preferable. Examples of the conductive material that can be interposed in the bonding include Au, Al, In, solder, and Ag paste.
When a conductive material such as n-type GaAs or p-type GaAs is used as the material for the support substrate, an electrode can be formed on the support substrate as shown in FIG. 2B, and the n-electrode E2 and the p-electrode E1. Can be arranged so as to face each other in a parallel plate shape, and the element structure portion is sandwiched from above and below by these electrodes.

(iii)の基礎基板除去工程では、図1(d)に示すように基礎基板Aを裏面側から部分的に除去し、凹凸部分を素子内に残す。素子内に残す部分は、次の(あ)または(い)に示す部分である。
(あ)図3(b)に示すように、凹凸のうちの凸部A10だけの部分。
(い)図3(c)に示すように、凸部A10と、凹部底面A1から厚さtまでの部分A11とからなる部分。ただし、tは、発光層から発せられた光が該基礎基板を通過する際の該光の波長をλとして、0<t≦λ/4である。
上記(あ)または(い)の部分を素子内に残すことによって、ファセットLEPS法に用いた凹凸が、光散乱用として利用される。
In the basic substrate removing step (iii), the basic substrate A is partially removed from the back surface side as shown in FIG. The part to be left in the element is the part shown in (a) or (ii) below.
(A) As shown in FIG. 3B, only the convex portion A10 of the irregularities.
(Ii) As shown in FIG. 3 (c), a portion comprising a convex portion A10 and a portion A11 from the concave bottom surface A1 to the thickness t. However, t is 0 <t ≦ λ / 4, where λ is the wavelength of the light emitted from the light emitting layer through the base substrate.
By leaving the part (a) or (ii) in the element, the unevenness used in the facet LEPS method is used for light scattering.

素子内に残す部分は、光散乱による光取り出し効率を改善する点からは、上記(あ)に示すように、凸部A10だけとすること、または可及的に凸部A10だけに近いことが好ましい。
0<t≦λ/4であるならば、たとえ、基礎基板と埋め込み層のGaN系結晶との屈折率が互いに異なっても、発光層からの光に対して透明領域となるので、全反射などの屈折が生じることがなく、基礎基板は上記(い)の態様として素子内に残存させてよい。
しかしながら、理論上1/4λ以下で結晶成長させた場合であっても、場所によっては1/4λ以上の基板が残留してしまう可能性も考えられる。したがって、1/4λ以上残留した場合には、その界面における反射により光取出し効率が低下するのを防止するため、凸部A10のみ、またはそれ以下が残留する形態が好ましい。
From the point of improving the light extraction efficiency by light scattering, the part to be left in the element should be only the convex part A10 or as close as possible to the convex part A10 as shown in (a) above. preferable.
If 0 <t ≦ λ / 4, even if the refractive indexes of the base substrate and the GaN-based crystal of the buried layer are different from each other, it becomes a transparent region with respect to the light from the light emitting layer. Therefore, the basic substrate may be left in the element as the above-mentioned (ii).
However, even if the crystal is grown theoretically at 1 / 4λ or less, there is a possibility that a substrate of 1 / 4λ or more may remain depending on the location. Therefore, when 1 / 4λ or more remains, in order to prevent the light extraction efficiency from being lowered due to reflection at the interface, a form in which only the convex portion A10 or less remains is preferable.

基礎基板除去工程における基礎基板の除去方法としては、化学的エッチング(例えば、湿式エッチング、乾式エッチング(酸性、アルカリ性溶液)など)、機械的研摩、下面側から凹凸面へレーザ照射することよるレーザリフトオフなどが挙げられる。
これら基礎基板の除去方法のなかでも、残存部分の総厚(h、またはh+t)を好ましい精度でコントロールできる点からは、機械的研磨が好ましい除去方法である。
The substrate removal method in the substrate removal process includes chemical etching (for example, wet etching, dry etching (acidic, alkaline solution, etc.)), mechanical polishing, and laser lift-off by irradiating the uneven surface with laser from the lower surface side. Etc.
Among these basic substrate removal methods, mechanical polishing is a preferred removal method in that the total thickness (h or h + t) of the remaining portion can be controlled with favorable accuracy.

図2は、本発明による製造方法によって得られるGaN系発光素子(GaN系LED)の素子構造を模式的に示した断面図である。同図では、従来公知の発光素子の構造と比較し易いように、図1の例に対して積層方向の上下を逆転させ、新たに加えられた支持基板Bを図の下側にして描いている。
図2(a)の発光素子では、上記製造方法の説明で述べたとおり、凹凸加工された基礎基板(除去され、残存部分A10だけが残っている)に埋め込み層(n型コンタクト兼クラッド層)1が形成され、下方へ順に、発光層2、p型クラッド層3、p型コンタクト層4、支持基板Bが形成されている。残存部分A10は、基礎基板のうちの凸部上面A2から厚さ0.1μm〜5μmまでの部分が素子中に残されている。
基礎基板除去面にはn型側電極E1が形成されている。
FIG. 2 is a cross-sectional view schematically showing the device structure of a GaN-based light emitting device (GaN-based LED) obtained by the manufacturing method according to the present invention. In the figure, for easy comparison with the structure of a conventionally known light-emitting element, the stacking direction is reversed upside down with respect to the example of FIG. 1, and the newly added support substrate B is drawn on the lower side of the figure. Yes.
In the light emitting device of FIG. 2A, as described in the description of the manufacturing method, a buried layer (n-type contact / cladding layer) is formed on the uneven substrate (removed and only the remaining portion A10 remains). 1 is formed, and a light emitting layer 2, a p-type cladding layer 3, a p-type contact layer 4, and a support substrate B are formed in order downward. As for the remaining portion A10, a portion from the convex portion upper surface A2 of the basic substrate to a thickness of 0.1 μm to 5 μm is left in the element.
An n-type side electrode E1 is formed on the base substrate removal surface.

図2(a)の発光素子では、絶縁性の支持基板が用いられており、支持基板にはp型側の電極を形成することができない。よって、従来のサファイア基板を用いたGaN系LEDと同様、積層体Sの一部が基礎基板除去面からp型GaNコンタクト層4が露出する深さまでドライエッチング法により除去され、これにより露出されたp型GaNコンタクト層4上に、p型側電極E2が形成されている。
一方、図2(b)の発光素子では、導電性の支持基板が用いられており、支持基板にp型側の電極E2が形成されており、n型側の電極E1と平行平板状に対向し、それらの間に発光層2を挟んでいる。
In the light emitting device of FIG. 2A, an insulating support substrate is used, and a p-type electrode cannot be formed on the support substrate. Therefore, like the GaN-based LED using the conventional sapphire substrate, a part of the stacked body S is removed by the dry etching method from the base substrate removal surface to the depth at which the p-type GaN contact layer 4 is exposed, and thus exposed. A p-type side electrode E2 is formed on the p-type GaN contact layer 4.
On the other hand, in the light emitting element of FIG. 2B, a conductive support substrate is used, and a p-type side electrode E2 is formed on the support substrate, and is opposed to the n-type side electrode E1 in a parallel plate shape. The light emitting layer 2 is sandwiched between them.

電極の形成方法自体は従来の方法を用いてよいが、導通を確保するため少なくともn型GaN層を電極に接触させる必要がある。具体的には、Si、Ge、Se、S等のn型ドーパントをドープして成長させたGaN系結晶層表面、またはノンドープのGaN系結晶層表面に、蒸着、スパッタ等の技術により、アルミニウム単体もしくは、チタンとアルミニウムよりなる合金膜を形成する。
なお、電極を形成すべき面に非導電性のサファイア基板が残留している場合、すなわち、サファイア基板が1/4λ残留している場合には、基板除去工程の後、少なくとも電極形成部分にエッチング処理を行い、GaN系結晶層を露出させて電極を形成する。
また、基板上のGaN系結晶層がノンドープの場合には、該GaN系結晶層を除去し、コンタクト層となり得る一定以上のキャリア濃度とされたGaN系結晶層を露出させ、該層に電極を形成する方が、通電状態が良好になる点で好ましい。
また、電極の種類としては開口電極、くし型電極、透明電極が挙げられる。例えば、透明電極(例えばITO)を用いる場合、n層表面全面にITOを形成しても良いし、残存サファイア上に選択的に電流拡散体を設けその上に全面にわたってITO膜を形成しても良い。
A conventional method may be used for forming the electrode, but at least the n-type GaN layer needs to be in contact with the electrode in order to ensure conduction. Specifically, aluminum alone is deposited on the surface of a GaN-based crystal layer grown by doping with an n-type dopant such as Si, Ge, Se, S, or the surface of a non-doped GaN-based crystal layer by a technique such as vapor deposition or sputtering. Alternatively, an alloy film made of titanium and aluminum is formed.
If a non-conductive sapphire substrate remains on the surface on which the electrode is to be formed, that is, if the sapphire substrate remains ¼λ, at least the electrode forming portion is etched after the substrate removal step. Processing is performed to expose the GaN-based crystal layer and form an electrode.
Further, when the GaN-based crystal layer on the substrate is non-doped, the GaN-based crystal layer is removed to expose a GaN-based crystal layer having a carrier concentration higher than a certain level that can be a contact layer, and an electrode is formed on the layer. The formation is preferable in that the energized state is improved.
Examples of the electrode include an aperture electrode, a comb electrode, and a transparent electrode. For example, when a transparent electrode (for example, ITO) is used, ITO may be formed on the entire surface of the n layer, or a current diffuser may be selectively provided on the remaining sapphire and an ITO film may be formed on the entire surface. good.

本発明は、LEDだけでなく全てのGaN系半導体発光素子(LED以外の発光素子)、受光素子、電子デバイスなどの製造方法として有用である。素子の構造や、その製造のために必要となる技術(GaN系半導体の積層構造の形成技術、パターニング技術、電極材料技術、素子分離技術など)については、公知の技術を参照してよい。   The present invention is useful as a method for manufacturing not only LEDs but also all GaN-based semiconductor light-emitting elements (light-emitting elements other than LEDs), light-receiving elements, and electronic devices. Known techniques may be referred to for the structure of the element and the techniques required for its manufacture (eg, a GaN-based semiconductor multilayer structure formation technique, patterning technique, electrode material technique, element isolation technique, etc.).

実施例1
本実施例では、図2(a)に示す構造(即ち、絶縁性の支持基板を接合し、基礎基盤のうち凸部だけを残す態様)のGaN系LEDを製作し、性能を評価した。
〔凹凸加工工程〕
先ず、基礎基板として直径2インチのc面サファイア基板(円板状ウエハ)用いた。
フォトリソグラフィの方法を用いて、基礎基板の主面上に幅3μmの帯状のエッチングマスクを3μmの間隔をおいて平行ストライプ状に配列した。ストライプの長手方向は、サファイアの<1−100>方向に平行とした。
次に、基礎基板の主面のうちエッチングマスクによって覆われていない部分(主面が露出している部分)に、ドライエッチングを施し、深さ1μmの断面略矩形波状の溝を形成した。その後、エッチングマスクを除去し、有機洗浄および酸洗浄を行ない、凹凸面を得た。
図3(a)における凹凸面の各部の寸法は、凹部底面の幅W1=凸部上面の幅W2=3μm、凹凸の段差h=1μmである。
Example 1
In this example, a GaN-based LED having a structure shown in FIG. 2A (that is, a mode in which an insulating support substrate is bonded and only a convex portion of the basic substrate is left) was manufactured, and performance was evaluated.
[Roughing process]
First, a c-plane sapphire substrate (disk-shaped wafer) having a diameter of 2 inches was used as a basic substrate.
Using a photolithography method, strip-shaped etching masks having a width of 3 μm were arranged in parallel stripes on the main surface of the base substrate with an interval of 3 μm. The longitudinal direction of the stripe was parallel to the <1-100> direction of sapphire.
Next, dry etching was performed on a portion of the main surface of the base substrate that is not covered with the etching mask (a portion where the main surface is exposed) to form a groove having a substantially rectangular wave shape with a depth of 1 μm. Thereafter, the etching mask was removed, and organic cleaning and acid cleaning were performed to obtain an uneven surface.
In FIG. 3A, the size of each part of the concave and convex surface is the width W1 of the bottom surface of the concave portion = the width W2 of the top surface of the convex portion = 3 μm and the step height h of the concave and convex portions = 1 μm.

〔サーマルクリーニングと、低温バッファ層の形成〕
凹凸加工を施したサファイア基板を、MOVPE装置内(ヒータ加熱されるサセプタ上)に配置し、常圧、水素ガスが25L/分の流量で導入される雰囲気中で、基板温度を1100℃まで上昇させ、約10分間の気相エッチング(サーマルクリーニング)を行なった。これによって、サファイア基板表面の自然酸化膜を除去した。
この後、基板温度を400℃まで降温し、トリメチルガリウム(TMG)とアンモニアを導入し、凹部底面および凸部上面にGaNからなる低温バッファ層を形成した。
[Thermal cleaning and low temperature buffer layer formation]
An uneven sapphire substrate is placed in a MOVPE device (on a susceptor heated by a heater), and the substrate temperature is increased to 1100 ° C in an atmosphere where hydrogen gas is introduced at a flow rate of 25 L / min. And vapor phase etching (thermal cleaning) for about 10 minutes was performed. As a result, the natural oxide film on the surface of the sapphire substrate was removed.
Thereafter, the substrate temperature was lowered to 400 ° C., trimethylgallium (TMG) and ammonia were introduced, and a low-temperature buffer layer made of GaN was formed on the bottom surface of the recess and the top surface of the projection.

〔ファセットLEPS法による埋め込み層の形成〕
続いて、TMG、TMAの供給を停止し、アンモニアのみを流したまま、基板温度を1000℃まで昇温した。その後、キャリアガスとして水素ガスおよび窒素ガス、原料としてアンモニアとTMGを供給し、ファセットLEPS法を実施することによってファセット成長の後に平坦化を行い、アンドープGaN埋め込み層を成長させた。アンドープGaN埋め込み層の厚さは、サファイア基板の表面の凸部上面から約2μmとした。
アンドープGaN埋め込み層の成長初期過程では、先ず基板面に対して傾斜したファセット面を表面とする三次元形状のGaN結晶体が、基板面の凹凸の凸部上と凹部底のそれぞれにおいて別個に成長した。このような過程を経てアンドープGaN埋め込み層を成長させると、基板面の凹凸の凹部は、殆ど空洞を残すことなくアンドープGaN埋め込み層によって埋め込まれる。
アンドープGaN埋め込み層の成長後、成長槽内にシランを導入し、これによって厚さ約4μmのn型GaNコンタクト層を形成した。
[Formation of buried layer by facet LEPS method]
Subsequently, the supply of TMG and TMA was stopped, and the substrate temperature was raised to 1000 ° C. with only ammonia flowing. Thereafter, hydrogen gas and nitrogen gas were supplied as carrier gases, ammonia and TMG were supplied as raw materials, and facet growth was performed by performing facet LEPS method to grow an undoped GaN buried layer. The thickness of the undoped GaN buried layer was about 2 μm from the upper surface of the convex portion on the surface of the sapphire substrate.
In the initial stage of growth of the undoped GaN buried layer, first, a three-dimensional GaN crystal having a facet surface inclined with respect to the substrate surface is separately grown on each of the convex and concave portions of the concave and convex portions of the substrate surface. did. When the undoped GaN buried layer is grown through such a process, the concave and convex recesses on the substrate surface are buried by the undoped GaN buried layer almost without leaving a cavity.
After the growth of the undoped GaN buried layer, silane was introduced into the growth tank, thereby forming an n-type GaN contact layer having a thickness of about 4 μm.

〔発光層としての多重量子井戸構造の形成〕
埋め込み層の成長後、TMG及びシランの供給を停止し、基板温度を700℃まで降下させ、キャリアガスを窒素ガスのみに切替え、アンモニアとTMGを導入して、GaNからなるバリア層(障壁層)を成長させた。
次に、トリメチルインジウム(TMI)を導入し、InGaNからなる井戸層を成長させた。TMGとTMIの供給量は、LEDの設計発光波長に合わせて、InGaNのInN混晶比が適当な値となるように調節される。本実施例では、中心発光波長が405nmとなるように、混晶比を設定した。
バリア層と井戸層とを所定の回数だけ交互に成長させ、多重量子井戸構造を得た。
[Formation of multiple quantum well structure as light emitting layer]
After the growth of the buried layer, supply of TMG and silane is stopped, the substrate temperature is lowered to 700 ° C., the carrier gas is switched to only nitrogen gas, ammonia and TMG are introduced, and a barrier layer made of GaN (barrier layer) Grew.
Next, trimethylindium (TMI) was introduced to grow a well layer made of InGaN. The supply amounts of TMG and TMI are adjusted so that the InN mixed crystal ratio of InGaN becomes an appropriate value according to the design emission wavelength of the LED. In this example, the mixed crystal ratio was set so that the center emission wavelength was 405 nm.
Barrier layers and well layers were alternately grown a predetermined number of times to obtain a multiple quantum well structure.

〔p型クラッド層、p型コンタクト層の形成〕
槽内温度を1000℃に上昇させ、キャリアガスを水素ガスと窒素ガスに切替え、TMG、トリメチルアルミニウム(TMA)、ビスシクロペンタジエニルマグネシウム(Cp2 Mg)を導入し、厚さ50nmのp型AlGaNクラッド層15を成長させた。
続いて、TMAの供給を停止すると共に、CpMgの流量を増加して、厚さ100nmのp型GaNコンタクト層(高キャリア濃度層)を成長させた。
[Formation of p-type cladding layer and p-type contact layer]
The temperature in the tank is raised to 1000 ° C., the carrier gas is switched between hydrogen gas and nitrogen gas, TMG, trimethylaluminum (TMA), biscyclopentadienylmagnesium (Cp 2 Mg) is introduced, and a p-type with a thickness of 50 nm An AlGaN cladding layer 15 was grown.
Subsequently, the supply of TMA was stopped and the flow rate of Cp 2 Mg was increased to grow a p-type GaN contact layer (high carrier concentration layer) having a thickness of 100 nm.

〔支持基板の接合〕
上記積層体を有するウエハをMOVPE装置から取り出し、最上層のp型GaNコンタクト層上に、厚さ100μmのGaAsからなる支持基板を導電性材料を接着剤として接合した。
[Joining of support substrate]
The wafer having the laminated body was taken out of the MOVPE apparatus, and a support substrate made of GaAs having a thickness of 100 μm was bonded onto the uppermost p-type GaN contact layer using a conductive material as an adhesive.

〔基礎基板除去工程〕
基礎基板を裏面側から機械的研磨により厚さが減少するように除去して行き、該基礎基板の凸部上面を基準として裏面側へ1μmの部分だけが残る状態とした。
除去面には、サファイアからなる帯状領域と、埋め込み層のn型GaNからなる帯状領域とによるストライプが現れた。
[Basic substrate removal process]
The base substrate was removed from the back surface side by mechanical polishing so as to reduce the thickness, and only the 1 μm portion remained on the back surface side with respect to the upper surface of the convex portion of the base substrate.
On the removal surface, stripes of a band-like region made of sapphire and a band-like region made of n-type GaN in the buried layer appeared.

〔電極形成とチップ化〕
このウエハに対して、基礎基板除去面側からさらに部分的に(分断後に個々の素子のp型電極を形成すべき領域が露出するように)p型GaNコンタクト層が露出する深さまでドライエッチングを施し、露出したp型GaNコンタクト層上に、Ni(結晶とオーミック接触する側)/Au(被覆側)からなるp型側電極を形成した。
また、ドライエッチングを施さなかった基礎基板除去面には、Alからなるn型側電極を形成した。
以上のようにして得られたウエハーに対して、スクライブ・ブレーキング法を用い、一辺0.35mmの正方形のベアチップへと分断した。
[Electrode formation and chip formation]
This wafer is further dry-etched from the base substrate removal surface side to a depth at which the p-type GaN contact layer is exposed partially (so that the region where the p-type electrode of each element is to be formed is exposed after division). Then, on the exposed p-type GaN contact layer, a p-type side electrode made of Ni (the side in ohmic contact with the crystal) / Au (the coated side) was formed.
An n-type side electrode made of Al was formed on the base substrate removal surface that was not subjected to dry etching.
The wafer obtained as described above was divided into a square bare chip having a side of 0.35 mm by using a scribe braking method.

〔評価〕
得られたチップをTo缶上に実装し、20mA駆動で発光させたところ、出力は15mWであり、発光層から発せられた光が残存部によって散乱し、光取り出し効率が向上していることがわかった。
また、出力の向上とともに、基板を除去したことで放熱性が向上し、電流注入による熱の影響を回避でき、LEDの素子寿命が増加することもわかった。
[Evaluation]
When the obtained chip was mounted on a To can and made to emit light at 20 mA drive, the output was 15 mW, and the light emitted from the light emitting layer was scattered by the remaining part, and the light extraction efficiency was improved. all right.
It was also found that the removal of the substrate as well as the output improved the heat dissipation, the influence of heat due to current injection could be avoided, and the LED element life increased.

実施例2
本実施例では、図2(b)に示す構造のGaN系LEDを製作し、性能を評価した。
p型GaAsからなる導電性の支持基板を用いたこと、それによって支持基板上にp型側電極を形成したこと以外は、上記実施例1と同様の素子構造、形成工程にて、GaN系LEDを作製した。
得られたチップを上記実施例1と同様に評価したところ、出力は18mWであり、実施例1の場合と同様に、発光層から発せられた光が残存部によって散乱し、光取り出し効率が向上しており、また、放熱性が向上し、電流注入による熱の影響を回避でき、LEDの素子寿命が増加していることもわかった。
Example 2
In this example, a GaN-based LED having the structure shown in FIG. 2B was manufactured and performance was evaluated.
A GaN-based LED is used in the same element structure and formation process as in Example 1 except that a conductive support substrate made of p-type GaAs is used and thereby a p-type side electrode is formed on the support substrate. Was made.
When the obtained chip was evaluated in the same manner as in Example 1, the output was 18 mW, and as in Example 1, the light emitted from the light emitting layer was scattered by the remaining part, and the light extraction efficiency was improved. In addition, it was also found that the heat dissipation is improved, the influence of heat due to current injection can be avoided, and the element life of the LED is increased.

本発明によって、GaN系発光素子(特にGaN系LED)の光取り出し効率が改善された。また、基礎基板としてサファイア基板を用いる際には、該サファイア基板の大部分を除去するので、放熱性が改善された。   According to the present invention, the light extraction efficiency of a GaN-based light emitting device (particularly a GaN-based LED) has been improved. Further, when a sapphire substrate is used as the base substrate, most of the sapphire substrate is removed, so that heat dissipation is improved.

本発明による製造方法の各工程における加工状態を示した模式図である。同図(a)、(b)では、凹凸部分を拡大して示している。It is the schematic diagram which showed the processing state in each process of the manufacturing method by this invention. In FIGS. 4A and 4B, the uneven portion is shown enlarged. 本発明による製造方法によって得られるGaN系発光素子(GaN系LED)の素子構造を模式的に示した断面図である。It is sectional drawing which showed typically the element structure of the GaN-type light emitting element (GaN-type LED) obtained by the manufacturing method by this invention. 主面に加工された凹凸、および、基礎基板除去後の残存部分を拡大して示す図である。It is a figure which expands and shows the unevenness processed into the main surface, and the remaining part after a base substrate removal.

符号の説明Explanation of symbols

A 基礎基板
A1 凹部底面
A2 凸部上面
A3 段差面
A10 残存部分
1 埋め込み層
2〜4 GaN系結晶層
S GaN系結晶からなる積層体
B 支持基板
A Basic substrate A1 Concave bottom A2 Convex top A3 Stepped surface A10 Remaining part 1 Buried layer 2-4 GaN-based crystal layer S Laminated body made of GaN-based crystal B Support substrate

Claims (7)

窒化物半導体結晶が成長し得る基礎基板の一方の主面が凹凸加工によって凹凸面とされ、該凹凸面は段差部で区画された凹部底面と凸部上面とを有し、
前記凹凸面上には、凹部底面および凸部上面のそれぞれから成長した単位結晶が合体して凹凸面を埋め込んでいる窒化物半導体結晶層と、その上に成長した他の窒化物半導体結晶層とを有してなる積層体が成長しており、該積層体には、発光素子構造として、n型層、発光層、p型層が含まれており、
基礎基板が他方の主面である裏面の側から部分的に除去され、
(あ)基礎基板のうちの凸部のみが、または、
(い)発光層から発せられた光が基礎基板を通過する際の該光の波長をλとして、凸部と、凹部底面から厚さλ/4以下の部分とからなる部分が、
素子中に残されていることを特徴とする、窒化物半導体発光素子。
One main surface of the base substrate on which the nitride semiconductor crystal can grow is formed into a concavo-convex surface by concavo-convex processing, and the concavo-convex surface has a concave bottom surface and a convex top surface partitioned by a stepped portion,
On the concavo-convex surface, a nitride semiconductor crystal layer in which unit crystals grown from the concave bottom surface and the convex top surface are combined to embed the concavo-convex surface, and another nitride semiconductor crystal layer grown thereon And a laminate including an n-type layer, a light-emitting layer, and a p-type layer as a light-emitting element structure.
The base substrate is partially removed from the back side, which is the other main surface,
(A) Only the convex part of the basic substrate, or
(Ii) where the light emitted from the light emitting layer passes through the base substrate, the wavelength of the light is λ, and the portion composed of the convex portion and the portion having a thickness of λ / 4 or less from the bottom surface of the concave portion,
A nitride semiconductor light-emitting device, which is left in the device.
基礎基板の屈折率が、凹凸面を埋め込んでいる窒化物半導体結晶層の屈折率よりも小さいものである、請求項1記載の窒化物半導体発光素子。   The nitride semiconductor light-emitting element according to claim 1, wherein the refractive index of the base substrate is smaller than the refractive index of the nitride semiconductor crystal layer in which the uneven surface is embedded. 基礎基板がサファイア基板である、請求項1または2記載の窒化物半導体発光素子。   The nitride semiconductor light-emitting device according to claim 1, wherein the base substrate is a sapphire substrate. さらに、上記積層体上に接合された支持基板を有するものである、請求項1〜3のいずれかに記載の窒化物半導体発光素子。   Furthermore, the nitride semiconductor light emitting element in any one of Claims 1-3 which has a support substrate joined on the said laminated body. 窒化物半導体発光素子の製造方法であって、
(i)窒化物半導体結晶が成長し得る基礎基板の一方の主面に凹凸加工を施し、該主面を、段差部で区画された凹部底面と凸部上面とを有する凹凸面とする凹凸加工工程と、
(ii)前記凹凸面の凹部底面と凸部上面とから別個に窒化物半導体の単位結晶を成長させそれらを互いに合体させて、凹凸面を埋め込む窒化物半導体結晶層とし、さらにその上に、他の窒化物半導体結晶層を成長させ、発光素子構造としてのn型層、発光層、p型層を含む積層体を形成する結晶成長工程と、
(iii)基礎基板の他方の主面である裏面の側から、基礎基板を部分的に除去する加工を施して、
(あ)基礎基板のうちの凸部のみを、または、
(い)発光層から発せられた光が基礎基板を通過する際の該光の波長をλとして、凸部と、凹部底面から厚さλ/4以下の部分とからなる部分を、
素子中に残す基礎基板除去工程とを、
有することを特徴とする、窒化物半導体発光素子の製造方法。
A method for manufacturing a nitride semiconductor light emitting device, comprising:
(I) Concavity and convexity processing is performed on one main surface of a base substrate on which a nitride semiconductor crystal can grow, and the main surface is an uneven surface having a concave bottom surface and a convex top surface partitioned by stepped portions. Process,
(Ii) A nitride semiconductor unit crystal is separately grown from the concave bottom surface and the convex top surface of the concave and convex surfaces, and united with each other to form a nitride semiconductor crystal layer that embeds the concave and convex surfaces. A crystal growth step of growing a nitride semiconductor crystal layer and forming a stacked body including an n-type layer, a light-emitting layer, and a p-type layer as a light-emitting element structure;
(Iii) From the back side that is the other main surface of the base substrate, a process for partially removing the base substrate is performed,
(A) Only the convex part of the basic substrate, or
(Ii) The wavelength of the light emitted from the light emitting layer when passing through the base substrate is λ, and a portion composed of a convex portion and a portion having a thickness of λ / 4 or less from the bottom surface of the concave portion,
The basic substrate removal process left in the element,
A method for manufacturing a nitride semiconductor light emitting device, comprising:
上記基礎基板除去工程に先立って、さらに、上記積層体上に支持基板を接合する工程を有する、請求項5記載の製造方法。   The manufacturing method of Claim 5 which has the process of joining a support substrate on the said laminated body further before the said base substrate removal process. 上記基礎基板除去工程における基礎基板の部分的除去方法が、化学的エッチング、機械的研摩、または、基礎基板の裏面側から凹凸面へのレーザ照射によるレーザリフトオフである、請求項5または6記載の製造方法。   The partial removal method of the basic substrate in the basic substrate removal step is chemical lift, mechanical polishing, or laser lift-off by laser irradiation from the back surface side of the basic substrate to the concavo-convex surface. Production method.
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