JP2006192768A - Printing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the cost of an image generator circuit for a color printing apparatus of so-called a quadruplicate drum type. <P>SOLUTION: The printing apparatus comprises three image signal generating means and four image signal selecting means which select one set of image signal from three sets of image signals. The image signal selecting means has its option controlled by being synchronized with the printing process, corresponding to four printing drums. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a print control apparatus that receives data from an information processing apparatus such as a computer, forms an image, and outputs the image to a printing unit such as a four-drum system.

  In the case of a printing apparatus having an electrophotographic development process, there is a restriction that once printing is started, it cannot be stopped halfway, and an image must be formed at a constant speed. Therefore, the print control unit that outputs the image signal must generate the image signal in accordance with the operation of the print engine. In order to realize easily, raster data in units of pages may be stored in the RAM in advance, and an image signal may be output in synchronization with the operation of the print engine. However, many of the conventional examples have smaller size data. Is stored in the RAM in advance and converted into an image signal in synchronism with the operation of the print engine to perform printing. The purpose is to reduce the RAM capacity required for the print control apparatus (see, for example, Patent Document 1).

  One specific conventional example is that the print control apparatus uses a dedicated image drawing circuit. The input image information such as PDL is analyzed by a CPU or the like in the print control apparatus, and intermediate data that can be temporarily rasterized is created. The page is divided into bands, and the intermediate data is stored in the first area of the RAM for each band, and then printing is started. The image drawing circuit draws the intermediate data stored in the first area of the RAM in another area of the RAM in a band unit for a predetermined time before the printing operation. The rendered data is transferred to the print engine unit in order from the band in the head direction by an image transfer circuit provided in the print control apparatus, and the print engine prints it.

  As another conventional example, there is a configuration using data decompression means. The CPU or the like in the print control apparatus divides one page into bands and develops the input image information such as PDL on the RAM one band at a time. The developed band image is compressed by the CPU or a dedicated compression circuit and the compressed data generated is stored in the second area on the RAM. The compressed data is decompressed by dedicated decompression means provided in the print control apparatus and drawn in the third area on the RAM. The rendered data is transferred to the print engine unit in order from the head direction by an image transfer circuit provided in the print control apparatus, and the print engine prints it.

  For the sake of simplicity, the above conventional example has been described with respect to a so-called monocolor printing apparatus. In a color electrophotographic system, there are four printing sections (when color is configured with general YMCK), and image data to be generated is for four colors. The configuration composed of the image drawing circuit, compression means, decompression means and the like described above is required for each color, that is, four each.

A device for reducing the capacity of the RAM has been conventionally used. However, since a large number of dedicated image signal generating means are required, the configuration is complicated, the quality is difficult to maintain, and the overhead is increased because the same memory is used. And other problems will increase.
JP 2003-341152 A

  The problem to be solved by the present invention is to provide a printing control apparatus that has a simpler configuration and is inexpensive.

  In order to solve the above-described problems, the present invention inputs Nk image signal generation means and Nk image signals output from the respective image signal generation means, and outputs a set of image signals. N image signal selection means for selecting according to the signal selection signal, N printing means for forming an image based on the image signals output from the N image signal selection means, and each image signal selection means are controlled. Image signal selection signal generation means for generating an image signal selection signal is provided.

  Since the printing apparatus according to the present invention has image signal generating means that operates corresponding to the printing drum, high-speed color printing can be performed. As is clear from the conventional example, since the number of image signal generating means is smaller, the function can be realized with a smaller circuit configuration, so that a less expensive printing apparatus can be provided, and quality such as suppression of noise such as radio waves can be provided. Improvement becomes easy.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a system configuration of a printing apparatus embodying the present invention.

  In FIG. 1, reference numeral 130 denotes a printing unit that performs color printing with four series of electrostatic drums. 101 is a CPU that performs overall control and data processing, 102 is a ROM that stores control programs and font data, 103 is an interface unit for connecting to an external device such as a host computer, and 105 is via the interface unit 103. This is a buffer for temporarily storing print information to be fetched, and a RAM used for creating and storing application lists and objects to be described later.

  Reference numeral 104 denotes an ASIC for connecting the CPU 101 to another device. ROM controller circuit for controlling ROM 102, controller circuit for controlling interface 103, RAM controller circuit for controlling RAM 105, engine interface circuit for controlling printing unit 130, and image signal selection signal for generating image signal selection signals 121-124 Includes generation circuitry. The logic circuit 104 is connected to the bus 106 and includes an arbitration circuit that arbitrates the master of the bus 106.

  The bus 106 is connected to four image signal generation blocks 107 to 110. Each image signal generation block includes an interface unit, an image generation unit, an image memory, and a transfer unit.

  The bus 106 is a multi-master bus. When the CPU 101 sets the address of the target data to each image signal generation block, reads the status, issues an image generation start command, etc., the CPU becomes the master of the bus 106 via the ASIC 104 and accesses each image signal generation block. When each image signal generation block starts image generation processing and font information in the ROM 102 and print information in the RAM 105 are required, the image generation unit of each image signal generation block becomes the master of the bus 106 and the logic circuit 104 is set. The ROM 102, the RAM 105, etc. are accessed.

  Each of the image signal generation blocks 107 to 109 includes an I / F unit, an image generation unit, an image memory, and a transfer unit.

  The I / F unit receives a command such as a start command from the CPU 101 and returns a status. Further, application data and object data are read from the RAM 105 by DMA in accordance with a request from the image generation unit described later, and the data is supplied to the image generation unit.

  The image generation unit is composed of a logic circuit, and can analyze an application list, object data, and the like and develop them into raster data. A DSP may be used.

  The image memory is a memory for storing raster data generated by the image generation unit, and includes two areas. While the image generator is drawing an image in one area, the other area is read in the scanning order by the transfer section. The transfer unit transfers and outputs the image signal by synchronizing the read image data with the process operation of the printing unit 130. That is, when the image generation unit and the transfer unit alternately access the two areas of the image memory, the image signal can be output without interruption as the image signal generation block.

The image signal selection circuits 131 to 134 receive the image signals output from the image signal generation blocks 107 to 109, respectively, and output one image signal based on the corresponding signals among the image signal selection signals 121 to 124. Select output.
Image signals output from the image signal selection circuits 131 to 134 are input to the laser drivers 111 to 114 in the printing unit 130, respectively, to drive the laser signals.

  Since the printing unit 130 is communicably connected to the CPU 101 via the printing unit interface 135 and the logic circuit 104, the CPU 101 can control operation such as starting the printing operation of the printing unit 130 and the progress of printing. It is possible to monitor.

  2 and 3 show the image generation processing of the present invention, in which (a) is a configuration of an application, (b) is an application list 210 configured on the main memory 105, and (c) to (c). f) shows various object data, (c) is a bitmap font object 206, (d) is a compressed font object 207, (e) is an image object 208, (f) is a (standard) line, and a graphic object 209 3G shows object data 211 configured on the main memory 104, and FIG. 3H shows an image drawn on the image memory in the image signal generation blocks 107 to 110 based on application information. .

  As shown in FIG. 2A, the application is a drawing position 201 of various object data such as a bitmap font and an image, an object number 202 for identifying the object data, and a logic when the objects are superimposed. Are composed of attribute data such as drawing logic 203, enlargement 204 and rotation 205. Such application data is stored at a predetermined address in the main memory 105 in a list (table) format as indicated by reference numeral 210 in FIG.

  The object data 211 is data described in various different formats, such as bitmap font 206 (FIG. 2 (c)), compressed font 207 (same (d)), bitmap data having an arbitrary shape or color. Image 208 (same (e)), a (standard) line having a predetermined basic shape, and a figure 209 (same (f)). These are stored in a predetermined object data area of the main memory 104 as shown in FIG. 3G, and each object data 211 is identified by an object number 202 in the application list.

  The operation when performing print control of the present invention with the above configuration will be described. The interface 103 receives input print data such as a page description language from an information processing apparatus such as a host computer, and the received data is stored in the RAM 105 via the ASIC 104 under the control of the CPU 101.

  Next, the CPU 101 analyzes the print data stored on the RAM 105, divides the page into a plurality of bands, and generates an application data list and an object data list for each band. For example, the printing position, drawing logic, enlargement, and presence / absence of rotation are determined for each drawing unit such as characters and images, and an application as shown in FIG. 2 is generated, and an application list as shown in FIG. The image data drawn by the application is configured as a group of objects as shown in FIG. 3G in a predetermined area of the main memory 105.

  The object number in the application in FIG. 2A indicates the number of the object to be drawn in the object group.

  When the application list and the object group have been generated for one page, the CPU 101 gives an activation command to the image signal generation blocks 107 to 110 to start image generation for each block. Further, the printing operation of the printing unit 130 is started when the image signal generation block 107 is ready to output an image signal.

  Since the control method of the image signal selection circuits 131 to 134 is a feature of the present invention, it will be described with reference to the timing chart of FIG. 4 and the flowchart of FIG. In this example, two pages of color printing are performed.

  In step 1, the CPU 101 activates the image signal generation block 107 to start generating an image signal of the first page Y color component. Further, the CPU 101 starts a printing process in the printing unit via the printing unit interface 135. The CPU 101 predicts the timing of the Y color printing process and activates the image signal generation block 107 so that the image signal can be output at that time. Further, the CPU 101 performs setting so that 0 is output as the image signal selection signal 121 to the ASIC 104.

  The image signal selection circuit 131 selects a signal output from the image signal generation block 107 from image signals input according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, a Y-color image signal is generated in the image processing circuit 107 and transmitted to the laser driver 111 in the printing unit 130 by the image signal selection circuit 131 to form a Y-color image.

  In step 2, the CPU 101 activates the image signal generation block 108 to start generating the image signal of the first page Y color component. The CPU 101 predicts the timing of the M color printing process and activates the image signal generation block 108 so that the image signal can be output at that time. Further, the CPU 101 performs setting so that 1 is output as the image signal selection signal 122 to the ASIC 104. The image signal selection circuit 132 selects a signal output from the image signal generation block 108 from the input image signals according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, an M color image signal is generated in the image processing circuit 108 and transmitted to the laser driver 112 in the printing unit 130 by the image signal selection circuit 132 to form an M color image.

  In step 3, the CPU 101 activates the image signal generation block 109 to start generating the image signal of the first page C color component. The CPU 101 predicts the timing of the C color printing process and activates the image signal generation block 109 so that the image signal can be output at that time. Further, the CPU 101 performs setting so that 2 is output as the image signal selection signal 123 to the ASIC 104. The image signal selection circuit 133 selects a signal output from the image signal generation block 109 from image signals input according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, a C color image signal is generated in the image processing circuit 109 and transmitted to the laser driver 113 in the printing unit 130 by the image signal selection circuit 133 to form a C color image.

  In step 4, the CPU 101 activates the image signal generation block 107 to start generating the image signal of the first page K color component. The CPU 101 predicts the timing of the K color printing process, and activates the image signal generation block 107 so that the image signal can be output at that time.

  Further, the CPU 101 performs setting so that 0 is output as the image signal selection signal 124 to the ASIC 104. The image signal selection circuit 134 selects a signal output from the image signal generation block 107 from image signals input according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, a C color image signal is generated in the image processing circuit 107 and transmitted to the laser driver 114 in the printing unit 130 by the image signal selection circuit 134 to form a C color image.

  In step 5, the CPU 101 activates the image signal generation block 108 to start generating the image signal of the second page Y color component. The CPU 101 predicts the timing of the printing process for the Y color of the second page, and activates the image signal generation block 108 so that the image signal can be output at that time. Further, the CPU 101 performs setting so that 1 is output as the image signal selection signal 121 to the ASIC 104.

  The image signal selection circuit 131 selects a signal output from the image signal generation block 108 from image signals input according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, the second page Y color image signal is generated in the image processing circuit 108 and transmitted to the laser driver 111 in the printing unit 130 by the image signal selection circuit 131 to form a C color image.

  In step 6, the CPU 101 activates the image signal generation block 109 to start generating the image signal of the second page M color component. The CPU 101 predicts the timing of the printing process for the M color of the second page, and activates the image signal generation block 109 so that the image signal can be output at that time.

  Further, the CPU 101 performs setting so that 2 is output as the image signal selection signal 122 to the ASIC 104. The image signal selection circuit 132 selects a signal output from the image signal generation block 109 from image signals input according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, an image signal for the second page M color is generated in the image processing circuit 109 and transmitted to the laser driver 112 in the printing unit 130 by the image signal selection circuit 132 to form a C color image.

  In step 7, the CPU 101 activates the image signal generation block 107 to start generating the image signal of the second page C color component. The CPU 101 predicts the timing of the second page C color printing process, and activates the image signal generation block 107 so that the image signal can be output at that time.

  Further, the CPU 101 performs setting so that 0 is output as the image signal selection signal 123 to the ASIC 104. The image signal selection circuit 133 selects a signal output from the image signal generation block 107 from image signals input according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, the second page C color image signal is generated in the image processing circuit 107 and transmitted to the laser driver 113 in the printing unit 130 by the image signal selection circuit 133 to form a C color image.

  In step 8, the CPU 101 activates the image signal generation block 108 to start generating the image signal of the second page K color component. The CPU 101 predicts the timing of the printing process for the K color of the second page, and activates the image signal generation block 108 so that the image signal can be output at that time.

  Further, the CPU 101 performs setting so that 1 is output as the image signal selection signal 124 to the ASIC 104. The image signal selection circuit 134 selects a signal output from the image signal generation block 108 from the input image signals according to the value of the image signal selection signal, and outputs the selected signal to the printing unit. With the above settings, the image signal of the second page K color is generated in the image processing circuit 108 and transmitted to the laser driver 114 in the printing unit 130 by the image signal selection circuit 134 to form a K color image.

  A total of two pages can be printed by the control method shown in steps 1 to 8 above.

  In this embodiment, the ROM 102, the RAM 105, the image generation blocks 107 to 109, the image signal selection circuits 131 to 134, and the interface unit 103 have been described as being separated from the ASIC 104. However, some or all of the ASICs may be the same chip. It may be configured as above. The CPU 101 may also be configured in the ASIC 104.

  FIG. 6 shows a configuration as another embodiment.

  The difference from FIG. 1 is that the image generation unit 140 and the compression unit 141 are newly added and the internal configuration of the image generation block 107.

  The image generation unit 140 has the same function as the image generation unit in the image generation block in the first embodiment.

  That is, when the image generation unit needs the font information of the ROM 102, the printing information of the RAM 105, etc., the image generation unit of each image signal generation block becomes the master of the bus 106 to the ROM 102, the RAM 105, etc. via the logic circuit 104. Access and generate images. The generation of an image for each band is the same as in the first embodiment, but the difference is that the generated image is written back to the RAM 105.

  The image written back to the RAM 105 is read and compressed by the compression unit 141 and then stored in the RAM 105. Image generation processing by the image generation unit 140 and compression processing by the compression unit 141 are performed in a pipeline.

  In the image generation blocks 107 to 109, an expansion unit capable of expanding the data generated by the compression unit 141 is arranged.

  As an overall flow, the image generation processing by the image generation unit 140 and the compression processing by the compression unit 141 are performed in advance, and the image generation processing by the image generation blocks 107 to 109 and the printing processing performed in synchronization therewith are the same. It is executed in the form of chasing. The advantage of this embodiment is that the image generation speed margin is increased by separating the image generation operation and the printing operation process.

  The control procedure of the image generation processing by the image generation blocks 107 to 109 and the printing processing performed in synchronization therewith is the same as that described in the first embodiment. The difference lies in the image generation method, and the image signal switching procedure, which is a feature of the present invention, is the same, and the description thereof is omitted.

  In the second embodiment, it is the same that the entire configuration or a part of it can be decoded in the ASIC.

  In both of the two embodiments, three image signal generating means are provided for four printing drums. However, if the paths of each printing drum are separated, two or less image signal generating means are provided. Configuration may also be possible.

1 shows a system configuration of a printing apparatus embodying the present invention. The image generation process of this invention is shown. The image generation process of this invention is shown. 2 shows a timing chart of the present invention. 2 shows a flowchart of the present invention. The internal structure of Example 2 of this invention is shown.

Explanation of symbols

101 CPU
102 ROM
103 Interface unit 105 Buffer 130 Printing unit

Claims (1)

Storage means for storing print information;
Nk (N> k) image signal generating means for generating images based on print information;
N image signal selecting means for inputting Nk sets of signals generated by the Nk image signal generating means and outputting a set of image signals;
A printing apparatus having N printing means for receiving signals output from N image signal selection means and forming an image.

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