JP2006191710A - Dc converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve the efficientization and downsizing by simplification of a circuit and reduction of loss. <P>SOLUTION: This DC converter has a switch Q1 which converts the DC voltage of a DC power source Vdc1 into high frequency voltage by switching it on or off via primary winding 5a, a series circuit which is composed of a switch Q2 and a clamp capacitor C2, a saturable reactor SL1 which is saturated by the energy accumulated in C2, a smoothing reactor Lo and a smoothing capacitor Co which smooth the rectified output of synchronous rectification circuits Q3 and Q4 synchronizing and rectifying the voltage of secondary winding 5b, a control circuit 10a which switches on or switches off Q1 and Q2 alternately and also zero-voltage-switches Q1 when SL1 is saturated, a capacitor C5 which accumulates, via a diode D5, the energy accumulated in Lo by the counterflow of the current of a synchronous rectification circuit at light load, and a switch Q5 which feeds back the energy accumulated in C5 to C2, being switched on synchronously with Q2, and this adjusts the saturation state of SL1 by the energy fed back to C2. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a DC converter such as a high-efficiency, small-sized DC / DC converter.

  FIG. 13 shows a circuit configuration diagram of a conventional DC converter. In the DC converter shown in FIG. 13, a synchronous rectifier including a MOSFET (field effect transistor) having a low on-resistance is used on the secondary side (output side) of the transformer in order to reduce the loss.

  In FIG. 13, a switch Q1 made of a MOSFET or the like is connected to a DC power source Vdc1 through a primary winding 5a (number of turns n1) of a transformer T1, and a series circuit of a resistor R1 and a capacitor C1 is connected to both ends of the switch Q1. Is connected. A series circuit of a diode D2 and a capacitor C2 is connected to both ends of the primary winding 5a of the transformer T1, and a resistor R2 is connected to both ends of the capacitor C2. The switch Q1 is turned on / off by PWM control of the control circuit 10.

  Further, the primary winding 5a of the transformer T1 and the secondary winding 5b (the number of turns n2) of the transformer T1 are wound so as to generate an in-phase voltage, and are formed at both ends of the secondary winding 5b of the transformer T1. The switch Q3 made of MOSFET and the switch Q4 made of MOSFET are connected in series. One end (● side) of the secondary winding 5b of the transformer T1 is connected to the gate of the switch Q4, and the other end of the secondary winding 5b of the transformer T1 is connected to the gate of the switch Q3. A diode D3 is connected in parallel to the switch Q3, and a diode D4 is connected in parallel to the switch Q4. A synchronous rectifier circuit is constituted by these elements. This synchronous rectifier circuit rectifies and outputs a voltage (pulse voltage on / off controlled) generated in the secondary winding 5b of the transformer T1 in synchronization with the on / off of the switch Q1.

  Further, a smoothing reactor Lo and a smoothing capacitor Co are connected in series at both ends of the switch Q3 to constitute a smoothing circuit. The smoothing circuit smoothes the rectified output of the synchronous rectifier circuit and outputs a DC output to the load RL.

  The control circuit 10 performs on / off control of the switch Q1, and controls the on width of the pulse applied to the switch Q1 to be narrowed when the output voltage of the load RL becomes equal to or higher than the reference voltage. That is, when the output voltage of the load RL becomes equal to or higher than the reference voltage, the output voltage is controlled to a constant voltage by narrowing the ON width of the pulse of the switch Q1.

  Next, the operation of the DC converter configured as described above will be described with reference to a timing chart at light load shown in FIG. In FIG. 14, Q1v is the drain-source voltage of the switch Q1, Q1i is the drain current of the switch Q1, Q3i is the drain current of the switch Q3, Q4i is the drain current of the switch Q4, and Q3v is the drain-source of the switch Q3. A voltage Q1g indicates a gate voltage signal of the switch Q1.

  First, the operation under heavy load will be described. When the switch Q1 is turned on by the gate voltage signal Q1g, Vdc1 → 5a → Q1 → Vdc1 and current Q1i flow. This current Q1i increases linearly with time.

At this time, since a voltage is also generated in the secondary winding 5b of the transformer T1, the switch Q4 is turned on, the current Q4i flows through 5b → Lo → Co → Q4 → 5b, and power is supplied to the load RL. The The current Q4i increases linearly with time. In this case, Lo (Io) ^2/2 of energy is stored in the smoothing reactor Lo. Io is a current flowing through the smoothing reactor Lo.

  Next, when the switch Q1 is turned off, the voltage of the secondary winding 5b of the transformer T1 becomes a reverse voltage, so that the switch Q4 is turned off and the switch Q3 is turned on. For this reason, Lo → Co → Q3 → Lo and the current Q3i flow due to the energy stored in the smoothing reactor Lo, and power is continuously supplied to the load RL.

  Next, when the switch Q1 is turned on, the voltage of the secondary winding 5b is reversed again, the switch Q4 is turned on, the switch Q3 is turned off, and the same operation is performed. This state is called a continuous mode because the current of the smoothing reactor Lo continuously flows in the same direction.

On the other hand, when the load current decreases (during light load), the current of the smoothing reactor Lo when the switch Q1 is turned off (for example, at time t ₃₂ ) becomes zero during the off period of the switch Q1, Q3 is on. For this reason, the electric charge accumulated in the smoothing capacitor Co is discharged, a current flows through Co → Lo → Q3 → Co, and energy is stored in the smoothing reactor Lo.

Then, at time _{t 33} (time _{t 31} same), the switch Q1 is turned on, the switch Q4 is turned on, the switch Q3 is turned off. For this reason, the current of the smoothing reactor Lo flows in the order of Lo → 5b → Q4 → Co → Lo. For this reason, energy is fed back to the DC power supply Vdc1 on the primary side (input side) via the primary winding 5a of the transformer T1.

For example, Patent Document 1 is known as a related art of a conventional switching power supply device.
JP 2002-10636 A

  As described above, in the conventional DC converter shown in FIG. 13 and the switching power supply device described in Patent Document 1, when synchronous rectification is applied, in the heavy load state in which the current of the smoothing reactor Lo continues, the loss It works less and lightly.

  However, in a light load state as shown in FIG. 14, the current of the smoothing reactor Lo is not continuous, and reversely flows in the feedback mode, and when the switch Q3 is off, the energy stored in the smoothing reactor Lo is the switch Q4. And is fed back to the DC power supply Vdc1 on the input side via the transformer T1.

  At this time, when the switch-on timing of the switch Q4 is delayed or the leakage inductance of the transformer T1 is large, a large spike voltage SP is generated as shown in FIG. 14, and the element (synchronous rectifier) is destroyed.

  As a countermeasure, a spike voltage absorption circuit such as an absorber of the resistor R1, the capacitor C1, the resistor R2, and the capacitor C2 is mounted. Further, the reverse current is detected to stop synchronous rectification, or an element with a high breakdown voltage is used. This complicates the circuit and increases the loss.

  In addition, in a DC converter that performs zero voltage switching using an active clamp circuit in which an auxiliary switch and a clamp capacitor are added in addition to the switch Q1 (main switch), it is necessary to increase the exciting current of the transformer. Increased, and the efficiency decreased.

  An object of the present invention is to provide a DC converter capable of achieving high efficiency and miniaturization by simplifying a circuit and reducing loss.

  The present invention employs the following means in order to solve the above problems. According to the first aspect of the present invention, there is provided a first switch for converting a DC voltage of a DC power source into a high frequency voltage by turning on / off via a primary winding of the transformer, and both ends of the primary winding of the transformer or the first switch. A series circuit in which a second switch and a clamp capacitor are connected in series is connected to both ends of one switch, and is connected in parallel to the primary winding of the transformer, and may be saturated by energy stored in the clamp capacitor. A saturated reactor, a synchronous rectifier circuit that synchronously rectifies a high-frequency voltage generated in the secondary winding of the transformer, and a smoothing circuit that outputs a DC voltage by smoothing the rectified output of the synchronous rectifier circuit with a smoothing reactor and a smoothing capacitor The first switch and the second switch are alternately turned on / off, and the first switch is turned on when the saturable reactor is saturated. A control circuit that performs voltage switching, a capacitor that stores energy stored in the smoothing reactor via a diode due to a reverse flow of the current of the synchronous rectifier circuit at a light load, and is turned on in synchronization with the second switch; A third switch that feeds back the energy stored in the capacitor to the clamp capacitor on the primary side via the transformer, and the saturation state of the saturable reactor is adjusted by the energy fed back to the clamp capacitor It is characterized by.

  According to a second aspect of the present invention, in the DC converter according to the first aspect, the transformer has a tertiary winding connected in series to the secondary winding of the transformer, and the third switch is the second switch. When the switch is turned on, it is turned on by a voltage generated in the tertiary winding of the transformer, and the energy stored in the capacitor is fed back to the clamp capacitor on the primary side through the transformer.

  According to a third aspect of the present invention, in the DC converter according to the second aspect, the tertiary winding of the transformer is wound in a reverse phase with respect to the primary winding of the transformer.

  According to a fourth aspect of the present invention, there is provided a first switch for converting a DC voltage of a DC power source into a high frequency voltage by turning on / off via a primary winding of the transformer, and both ends of the primary winding of the transformer or the first switch. Connected in parallel to a series circuit in which a second switch and a clamp capacitor are connected in series and a primary winding or a secondary winding of the transformer connected to both ends of one switch and stored in the clamp capacitor A saturable reactor that is saturated by energy, a synchronous rectifier that synchronously rectifies a high-frequency voltage generated in a secondary winding loosely coupled to the primary winding of the transformer, and a smoothing that smoothes the rectified output of the synchronous rectifier circuit A capacitor is tightly coupled to the primary winding of the transformer and connected in series to the secondary winding, and stored in leakage inductance between the primary and secondary windings. When the first switch is turned off, the feedback winding of the transformer that feeds back to the smoothing capacitor, the first switch, and the second switch are alternately turned on / off, and the saturable reactor is saturated. A control circuit that switches the first switch to zero voltage; a capacitor that stores energy stored by a current that flows back to the leakage inductance during a light load through a diode; and a capacitor that is turned on in synchronization with the second switch; And a third switch that feeds back the energy stored in the transformer to the primary-side clamp capacitor via the feedback winding of the transformer, and the saturation state of the saturable reactor is determined by the energy fed back to the clamp capacitor. It has been adjusted.

  A fifth aspect of the present invention is the DC converter according to the fourth aspect, further comprising a tertiary winding of the transformer connected in series to a feedback winding of the transformer, wherein the third switch is the second switch. When the power is turned on, the power is turned on by the voltage generated in the tertiary winding of the transformer, and the energy stored in the capacitor is fed back to the clamp capacitor on the primary side through the feedback winding of the transformer. To do.

  According to a sixth aspect of the present invention, in the DC converter according to the fourth or fifth aspect, the primary winding and the secondary winding of the transformer are wound so that an in-phase voltage is generated. The next winding and the feedback winding are wound so as to generate a reverse phase voltage.

  According to a seventh aspect of the present invention, in the DC converter according to any one of the first to sixth aspects, the on-time setting means for setting the on-time of the third switch to be shorter than the on-time of the second switch. It is characterized by having.

  According to the present invention, the energy stored in the leakage inductance between the smoothing reactor or the primary winding and the secondary winding of the transformer due to the reverse current at the time of light load is stored in the capacitor via the diode, and the second switch is turned on. The spike voltage can be removed by feeding back energy to the clamp capacitor on the primary side without loss by the third switch that is turned on synchronously. As a result, the breakdown voltage of the element used for the synchronous rectifier is reduced, and a low breakdown voltage element can be used. Further, since the absorber for preventing spike voltage can be removed, the circuit can be simplified.

  In addition, the energy supplied from the secondary side of the transformer is fed back to the clamp capacitor, and the saturation of the saturable reactor can be adjusted by the energy stored in the clamp capacitor, so that the saturable reactor can be in an optimum saturation state. it can. As a result, the spike voltage of the rectifier element can be suppressed and the exciting current of the transformer can be reduced, so that the DC converter can be highly efficient and downsized.

  Hereinafter, embodiments of a direct-current converter according to the present invention will be described in detail with reference to the drawings. The DC converter according to the embodiment employs an active clamp circuit on the primary side of the transformer, a synchronous rectifier circuit on the secondary side, and connects a saturable reactor in parallel to the primary winding of the transformer. By saturating the saturable reactor with the energy stored in the clamp capacitor just before the end of the ON period of the two switches (auxiliary switch) and increasing the current, the generation of the reverse voltage when the second switch is OFF is made sharp. The first switch (main switch) is zero-voltage switched.

  Further, the DC converter according to the embodiment stores energy stored in the leakage inductance between the smoothing reactor or the primary winding and the secondary winding of the transformer due to the backflow of current at a light load in a capacitor via a diode, The spike voltage is eliminated by feeding back energy to the clamp capacitor on the primary side without loss by the third switch that is turned on in synchronization with the turning on of the two switches. Further, the saturation of the saturable reactor is adjusted by the energy fed back to the clamp capacitor from the secondary side of the transformer, the spike voltage of the rectifying element is suppressed, and the exciting current of the transformer is reduced.

  FIG. 1 is a circuit configuration diagram of the DC converter according to the first embodiment. In FIG. 1, a DC power source Vdc1 is connected to a switch Q1 comprising a MOSFET as a first switch via a primary winding 5a (number of turns n1) of a transformer T2, and a diode D1 and a capacitor C1 are connected to both ends of the switch Q1. Are connected in parallel. The diode D1 and the capacitor C1 may be a parasitic diode and a parasitic capacitance of the switch Q1.

  One end of a switch Q2 made of a MOSFET as a second switch is connected to a connection point between one end of the primary winding 5a of the transformer T2 and one end of the switch Q1, and the other end of the switch Q2 is connected to the DC via the clamp capacitor C2. The power supply Vdc1 is connected to the positive electrode. The other end of the switch Q2 may be connected to the negative electrode of the DC power supply Vdc1 via the capacitor C2.

  A switch Q3 made of a MOSFET and a switch Q4 made of a MOSFET are connected in series to both ends of the secondary winding 5b of the transformer T2. One end (● side) of the secondary winding 5b of the transformer T2 is connected to the gate of the switch Q4, and the other end of the secondary winding 5b of the transformer T2 is connected to the gate of the switch Q3. A diode D3 is connected in parallel to the switch Q3, and a diode D4 is connected in parallel to the switch Q4. A synchronous rectifier circuit is constituted by these elements. This synchronous rectifier circuit rectifies and outputs the voltage (pulse voltage controlled on / off) generated in the secondary winding 5b of the transformer T2 when the switches Q3 and Q4 are turned on and off in synchronization with the on / off of the switch Q1. To do.

  A saturable reactor SL1 is connected to both ends of the primary winding 5a of the transformer T2. The saturable reactor SL1 uses the saturation characteristic of the core of the transformer T2. Since alternating currents of equal magnitude flow through the saturable reactor SL1, the magnetic flux increases and decreases equally in the first quadrant and the third quadrant around zero on the BH curve shown in FIG.

  However, since there is a loss in the circuit, the magnetic flux is not perfectly symmetric and is mainly in the first quadrant. Further, since it is necessary to discharge the capacitor C1 in a short time and make the voltage zero, the exciting inductance of the saturable reactor SL1 or the transformer T2 is lowered to increase the exciting current.

  Further, as shown in FIG. 5, the magnetic flux B (precisely, B is the magnetic flux density, the magnetic flux φ = B · S, and S is the cross-sectional area of the core, with respect to a constant positive magnetic field H. = 1 and φ = B.) Is saturated at Bm, and the magnetic flux B is saturated at −Bm with respect to a constant negative magnetic field H. The magnetic field H is generated in proportion to the magnitude of the current i. In the saturable reactor SL1, the magnetic flux B moves on the BH curve from Ba → Bb → Bc → Bd → Be → Bf → Bg, and the operating range of the magnetic flux is wide. Ba-Bb and Bf-Bg on the BH curve are saturated.

  A diode D2 is connected in parallel to both ends of the switch Q2. The diode D2 may be a parasitic diode of the switch Q2. The switches Q1 and Q2 both have a period (dead time) in which they are turned off, and are alternately turned on / off by PWM control of the control circuit 10a.

  The transformer T2 includes a primary winding 5a, a secondary winding 5b (number of turns n2) that is tightly coupled to the primary winding 5a and wound to generate an in-phase voltage, and a primary winding 5a. The secondary winding 5b and the tertiary winding 5c are connected in series. The tertiary winding 5c (number of turns n3) is tightly coupled and wound so as to generate a reverse-phase voltage.

  Here, the reverse phase voltage of the tertiary winding 5c means that the tertiary winding 5c is turned off when the switch Q1 is turned on, and the switch Q5 is turned on when the switch Q1 is turned off. Is wound around.

  The anode of the diode D5 is connected to one end of the secondary winding 5b, the cathode of the diode D3, and one end of the smoothing reactor Lo. The cathode of the diode D5 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is connected to one end of the smoothing capacitor Co and the anodes of the diodes D3 and D4. The connection point between the cathode of the diode D5 and one end of the capacitor C5 is connected to one end (drain) of a switch Q5 made of a MOSFET as the third switch and the cathode of the diode D6, and the other end (source) of the switch Q5 and the diode D6. Is connected to the connection point between the secondary winding 5b and the tertiary winding 5c and the cathode of the diode D4. The gate of the switch Q5 is connected to one end (the non- ● side) of the tertiary winding 5c through a waveform shaping circuit 11 as an on-time setting means.

  The diode D6 is connected to both ends of the drain-source of the switch Q5. The diode D6 is provided in order to suppress the spike voltage by absorbing energy due to the spike voltage at the time of recovery of the diode D4 to the capacitor C5. That is, during the recovery of the diode D4, the recovery current flows in the order of D3 → 5b → D4 → D3, but the spike voltage at the time of recovery of the diode D4 is suppressed by flowing the current in the order of D3 → 5b → D6 → C5 → D3.

  The waveform shaping circuit 11 shapes the waveform of the voltage generated in the tertiary winding 5c of the transformer T2, and sets the drive voltage to the gate of the switch Q5 to be shorter than the ON time of the switch Q2. FIG. 2 shows an example of the waveform shaping circuit 11. The waveform shaping circuit 11 includes a resistor RT having one end connected to the tertiary winding 5c and the other end connected to the gate of the switch Q5, and a capacitor CT connected between the other end of the resistor RT and the ground. The time constant circuit.

As shown in FIG. 3, the time constant circuit of the resistor RT and the capacitor CT is such that the waveform of the voltage V _CT across the capacitor CT is linear with respect to the input rectangular voltage waveform V _{n3 of the} tertiary winding 5c. It is raised, by applying the voltage to the gate of the switch Q5, thereby turning on the switch Q5 only and the second threshold voltage V _TH2 following parts in the first threshold voltage V _TH1 or more gates switch Q5. By controlling the on-time of the switch Q5, the saturation of the saturable reactor SL1 is adjusted.

  The control circuit 10a alternately turns on / off the switch Q1 and the switch Q2, and when the output voltage of the load RL becomes equal to or higher than the reference voltage, the on width of the pulse applied to the switch Q1 is reduced. Control is performed so as to widen the ON width of the pulse applied to Q2. That is, when the output voltage of the load RL becomes equal to or higher than the reference voltage, the output voltage is controlled to a constant voltage by narrowing the ON width of the pulse of the switch Q1.

  Further, the control circuit 10a turns off the switch Q2 at the time when the current Q2i of the switch Q2 increases, and then turns on the switch Q1. When the switch Q1 is turned on, the control circuit 10a is in a predetermined period from when the voltage of the switch Q1 becomes zero voltage due to resonance between the capacitor C1 connected in parallel with the switch Q1 and the saturation inductance of the saturable reactor SL1. The switch Q1 is turned on.

  Next, the operation of the direct-current converter according to Embodiment 1 configured as described above will be described with reference to the timing chart shown in FIG. In FIG. 4, Q1v is the drain-source voltage of the switch Q1, Q1i is the drain current of the switch Q1, Q2i is the drain current of the switch Q2, SL1i is the current flowing through the saturable reactor SL1, and Q5i is the drain current of the switch Q5. , Q3v is a drain-source voltage of the switch Q3, Q1g is a gate voltage signal of the switch Q1, Q2g is a gate voltage signal of the switch Q2, and Q5g is a gate voltage signal of the switch Q5.

At time _{t 1,} the switch Q2 is turned off, resonance with saturated inductance and the capacitor C1 of the saturable reactor SL1, voltage Q1v switch Q1 is lowered. When the voltage Q1v of the switch Q1 is zero and the switch Q1 is turned on, a zero voltage switch of the switch Q1 is realized.

Next, when the switch Q1 is turned on, Vdc1 → 5a → Q1 → Vdc1 and current Q1i flow. At this time, since a voltage is also generated in the secondary winding 5b of the transformer T2, the switch Q4 is turned on, and 5b → Lo → Co → Q4 → 5b and a current Q4i (not shown) flow to supply power to the load RL. Is supplied. At this time, the primary winding 5a and the secondary winding 5b are tightly coupled, but have a small leakage inductance Lr (not shown). Therefore, the leakage inductance ^{Lr, Lr (Ir) 2/} 2 of energy is stored. Ir is a current flowing through the leakage inductance Lr.

When switch Q1 is turned on, current SL1i also flows through saturable reactor SL1, and energy is stored in saturable reactor SL1. Current SL1i, as shown in FIG. 6, the current value a (negative value) at time _{t 1,} the current value b (negative value) at time _{t 1} b, the current value c (zero) at time _{t 13,} the time _{t 2} The current value d (positive value) changes.

Then, at time t _2, the the switch Q1 is turned off, the capacitor C1 current flows is charged by the exciting energy stored in the primary winding 5a. At this time, resonance occurs due to the saturation inductance of the saturable reactor SL1 and the capacitor C1, and the voltage Q1v of the switch Q1 increases.

  When the potential of the switch Q1 becomes the same as the potential of the clamp capacitor C2, the diode D2 is turned on and the clamp capacitor C2 is charged. That is, the energy stored in the saturable reactor SL1 is supplied to the clamp capacitor C2 via the diode D2.

  At this time, by turning on the switch Q2, the switch Q2 becomes a zero voltage switch. Further, since the voltage of the secondary winding 5b of the transformer T2 is a reverse voltage, the switch Q4 is turned off and the switch Q3 is turned on. For this reason, Lo → Co → Q3 → Lo and current Q3i (not shown) flow by the energy stored in the smoothing reactor Lo, and power is continuously supplied to the load RL.

Current SL1i at time _{t 20} from the time _{t 2, the} change from the current value d (positive value) to the current value e (zero). Simultaneously with the release of the energy of the saturable reactor SL1, the energy from the leakage inductance Lr between the primary winding and the secondary winding is supplied to the clamp capacitor C2, and the clamp capacitor C2 is charged.

Next, at time _{t 20} ~ time _{t 3,} the energy stored in the clamp capacitor C2, flows to C2 → Q2 → SL1 → C2, to reset the magnetic flux of the saturable reactor SLl. In this case, since the energy stored in the clamp capacitor C2 is fed back to the saturable reactor SL1, the current SL1i flowing through the saturable reactor SL1 becomes a negative value as shown in FIG. Current SL1i, at the time _{t 20} ~ time _{t 2a,} changes from the current value e (zero) to a current value f (negative value). The current SL1i, at the time _{t 2a} ~ time _{t 3,} changes from current value f (negative value) to the current value g (negative value).

That is, the current SL1i increases by the amount of energy supplied from the leakage inductance Lr at the time of reset, so that the magnetic flux moves to the third quadrant, reaches the saturation region (Bf−Bg), the current SL1i increases, and the time t It becomes maximum at ₃ (time _{t 1} as well). The current SL1i increases just before the end of the ON period of the switch Q2, and is a current when the saturable reactor SL1 is saturated. The current Q2i in the switch Q2 also becomes maximum at time _{t 3.} By turning off the switch Q2 at this time, the discharge of the capacitor C1 becomes steep and becomes zero in a short time. At this time, the switch Q1 can achieve a zero voltage switch by turning on the switch Q1.

Also, when the switch Q1 is ON (for example, time _t 1 _~t 2), the voltage generated on the secondary winding 5b, via a diode D5, capacitor C5 is charged. When the ON ratio of the switch Q1 is 50% or less, this voltage is higher than the voltage generated in the secondary winding 5b when the switch Q2 is ON.

Thus, at time _t 21 _{~t 22} during the period in which the switch Q2 is turned on (for example, time _t 2 ~t _3), when turning on the switch Q5, the current in the path of the C5 → Q5 → 5b → Q3 → C5 Q5i flows. The clamp capacitor C2 is charged through the primary winding 5a of the transformer T2 and the switch Q2 by the energy by this current. At this time, a current Q2i flows through the switch Q2 (A portion in FIG. 4).

  Since the charge of the clamp capacitor C2 saturates the saturable reactor SL1, the saturation state of the saturable reactor SL1 can be controlled by adjusting this energy. Moreover, the saturation state of the saturable reactor SL1 can be controlled by controlling the ON time of the switch Q5. That is, if the ON time of the switch Q5 is lengthened, the saturation of the saturable reactor SL1 can be deepened.

Next, the light load operation will be described. When the load current is below the critical state of the smoothing reactor Lo, the current of the smoothing reactor Lo when the switch Q1 is turned off (for example, time t ₂ ) becomes zero during the off period of the switch Q1, Q3 is on. For this reason, the electric charge accumulated in the smoothing capacitor Co is discharged, a current flows through Co → Lo → Q3 → Co, and energy is stored in the smoothing reactor Lo.

Next, at time _{t 3} (time _{t 1} is also the same), the switch Q2 is turned off, the switch Q1 is turned on, the switch Q3 is turned off, the switch Q4 is turned on. For this reason, the energy stored in the smoothing reactor Lo is stored in the capacitor C5 via the diode D5. That is, since the diode D5 is turned on and energy is stored in the capacitor C5, the spike voltage is absorbed.

Then, at time _{t 4} (the time _{t 2} is also the same), the switch Q1 is turned off, the switch Q2 is turned on, the switch Q3 voltage at one end of the secondary winding 5b of the transformer T2 is applied to the gate of the switch Q3 Turns on.

The waveform shaping circuit 11, based on the voltage generated at one end of the tertiary winding 5c of the transformer T2, at time _t 41 _{~t 42} after the switch Q2 is turned on (time _t 21 _{~t 22} versa), A gate voltage signal Q5g is applied to the gate of the switch Q5 to turn on the switch Q5. For this reason, the energy of the capacitor C5 is released in the order of C5->Q5->5b->Q3-> C5. For this reason, a voltage is induced in the primary winding 5a of the transformer T2.

  Due to the voltage induced in the primary winding 5a, a current flows through 5a → Q2 → C2 → 5a, and the clamp capacitor C2 is charged. At this time, a current Q2i flows through the switch Q2 (A portion in FIG. 4). Since the charge of the clamp capacitor C2 saturates the saturable reactor SL1, the saturation state of the saturable reactor SL1 can be controlled by adjusting this energy. That is, the saturation of the saturable reactor SL1 can be adjusted by the energy fed back to the clamp capacitor C2 from the secondary side of the transformer T2, and the spike voltage of the rectifying element can be suppressed, and the exciting current of the transformer T2 can be reduced. it can.

As shown in FIG. 4, during the on period of the switch Q2 (gate voltage signal Q2g is the duration of the H level) and on period of the switch Q5 (e.g., time _t 21 _{~t 22} and time _t 41 _{~t 42)} It can be seen that the current Q5i flows and is fed back to the clamp capacitor C2 on the primary side.

  Also, as shown in FIG. 4, the voltage Q3v of the switch Q3 is clamped and no spike voltage is generated. For this reason, the breakdown voltage of the switch Q3 can be lowered. Therefore, the loss can be further reduced by using an element having a low on-resistance.

  As described above, according to the direct-current converter of the first embodiment, the energy stored in the smoothing reactor Lo due to the backflow of current at the time of light load is stored in the capacitor C5 via the diode D5, and is turned on in synchronization with the switch Q2 being turned on. The spike voltage can be removed by feeding back energy to the primary side clamp capacitor C2 without loss by the switch Q5. Thereby, the withstand voltage of the rectifying element is reduced, and the on-resistance can be reduced by using a low withstand voltage element. In addition, since the CR absorber for preventing spike voltage can be removed, the circuit can be simplified.

  Further, the energy supplied from the secondary side of the transformer T2 is fed back to the clamp capacitor C2, and the saturation state of the saturable reactor SL1 can be adjusted by the energy stored in the clamp capacitor C2, and the saturable reactor SL1 is optimized. It can be saturated. As a result, the spike voltage of the rectifier element can be suppressed and the exciting current of the transformer can be reduced, so that the DC converter can be highly efficient and downsized.

  FIG. 7 is a signal timing chart in each part of the conventional DC converter when the load current is in a critical state and the saturable reactor is not used. FIG. 8 is a timing chart of signals in each part of the DC converter according to the first embodiment when the saturable reactor is used in a critical state of the load current. In the conventional example shown in FIG. 7, the saturable reactor SL1 does not saturate as shown by part B, so that the zero voltage switch of the switch Q1 cannot be achieved. Moreover, in Example 1 shown in FIG. 8, since the saturable reactor SL1 is saturated as shown by C part, it turns out that the zero voltage switch of switch Q1 has been achieved.

  FIG. 9 is a circuit configuration diagram of the DC converter according to the second embodiment. The DC converter of the second embodiment shown in FIG. 9 differs from the DC converter of the first embodiment shown in FIG. 1 only in that the waveform shaping circuit 11 is deleted. The other configuration shown in FIG. 9 is the same as the configuration shown in FIG. 1, and thus the same reference numerals are given to the same parts, and the details thereof are omitted.

  Even in the DC converter of the second embodiment, the same effect as that of the DC converter of the first embodiment can be obtained.

  FIG. 10 is a circuit configuration diagram of the DC converter according to the third embodiment. In FIG. 10, the primary side of the transformer T3 employs an active clamp circuit and is the same as the configuration of the primary side of the transformer T2 shown in FIG.

  The transformer T3 includes a primary winding 5a, a secondary winding 5b that is loosely coupled to the primary winding 5a and wound so as to generate an in-phase voltage, a tight coupling to the primary winding 5a, and The feedback winding 5d (number of turns n4) wound so as to generate a reverse phase voltage and the tertiary winding 5c (tightly coupled to the primary winding 5a and wound so as to generate a reverse phase voltage) Number of turns n3). One end of the secondary winding 5b is connected to one end of the feedback winding 5d and one end (● side) of the tertiary winding 5c.

  Here, the reverse phase voltage of the tertiary winding 5c means that the tertiary winding 5c is turned off when the switch Q1 is turned on, and the switch Q5 is turned on when the switch Q1 is turned off. Is wound around. The reverse phase voltage of the feedback winding 5d means that the feedback winding 5d is wound around the primary winding 5a so that the switch Q3 is turned off when the switch Q1 is turned on and the switch Q3 is turned on when the switch Q1 is turned off. It has been done.

  A saturable reactor SL1 is connected to both ends of the secondary winding 5b. Saturable reactor SL1 may be connected to both ends of primary winding 5a in place of both ends of secondary winding 5b. The saturable reactor SL1 uses the saturation characteristic of the core of the transformer T3.

  The connection points of one end of the secondary winding 5b, one end of the feedback winding 5d, and one end of the tertiary winding 5c of the transformer T3 are the gate of the switch Q3, one end of the switch Q4, the cathode of the diode D4, and one end of the switch Q5. And the anode of the diode D6. The other end (● side) of the secondary winding 5b of the transformer T3 is connected to one end of the smoothing capacitor Co.

  The other end (● side) of the feedback winding 5d of the transformer T3 is connected to one end of the switch Q3, the gate of the switch Q4, the cathode of the diode D3, and the anode of the diode D5. The anode of the diode D4, the other end of the switch Q4, the anode of the diode D3, and the other end of the switch Q3 are connected to the other end of the smoothing capacitor Co and one end of the capacitor C5. The cathode of the diode D5, the other end of the switch Q5, and the cathode of the diode D6 are connected to the other end of the capacitor C5. The other end of the tertiary winding 5c is connected to the gate of the switch Q5 via the waveform shaping circuit 11.

  The diode D6 is connected between the drain and source of the switch Q5. The diode D6 is provided in order to suppress the spike voltage by absorbing energy due to the spike voltage at the time of recovery of the diode D4 to the capacitor C5. That is, during the recovery of the diode D4, the recovery current flows in the order of D3 → 5b → D4 → D3, but the spike voltage at the time of recovery of the diode D4 is suppressed by flowing the current in the order of D3 → 5b → D6 → C5 → D3.

(Transformer configuration)
A configuration example of the transformer T3 is shown in FIG. A transformer T3 shown in FIG. 11 has a Japanese character-shaped core 30. A primary winding 5a, a feedback winding 5d, and a tertiary winding 5c are wound in close proximity to the core portion 30a of the core 30. It has been turned. Thus, a slight leakage inductance is provided between the primary winding 5a, the feedback winding 5d, and the tertiary winding 5c. In addition, a pass core 30c and a gap 31 are formed in the core 30, and a secondary winding 5b is wound around the outer peripheral core. That is, the leakage inductance is increased by loosely coupling the primary winding 5a and the secondary winding 5b by the pass core 30c.

  In addition, two recesses 30b are formed on the outer core and between the primary winding 5a and the secondary winding 5b. Due to the recess 30b, the cross-sectional area of a part of the magnetic path of the outer peripheral core becomes narrower than the other part and only that part is saturated, so that the core loss can be reduced. Further, this saturated portion is also used as the saturable reactor SL1.

  Next, the operation of the direct-current converter according to Embodiment 3 configured as described above will be described.

  First, when the switch Q2 is turned off, resonance occurs due to the saturation inductance of the saturable reactor SL1 and the capacitor C1, and the voltage Q1v of the switch Q1 decreases. When the voltage Q1v of the switch Q1 is zero and the switch Q1 is turned on, a zero voltage switch of the switch Q1 is realized.

  Next, when the switch Q1 is turned on, Vdc1 → 5a → Q1 → Vdc1 and current Q1i flow. This current Q1i increases linearly with time.

At this time, since voltage is also generated in the secondary winding 5b and the feedback winding 5d of the transformer T3, the switch Q4 is turned on, and the current Q4i flows through 5b → Co → Q4 → 5b and power is supplied to the load RL. Is supplied. The current Q4i increases linearly with time. Further, since the primary winding 5a and the secondary winding 5b are loosely coupled, a large leakage inductance Lr (not shown) is provided between the primary winding and the secondary winding. Therefore, the leakage inductance ^{Lr, Lr (Ir) 2/} 2 of energy is stored. Ir is a current flowing through the leakage inductance Lr.

  When switch Q1 is turned on, current SL1i also flows through saturable reactor SL1, and energy is stored in saturable reactor SL1.

  Next, when the switch Q1 is turned off, a current flows due to the excitation energy stored in the primary winding 5a, and the capacitor C1 is charged. At this time, resonance occurs due to the saturation inductance of the saturable reactor SL1 and the capacitor C1, and the voltage Q1v of the switch Q1 increases.

  When the potential of the switch Q1 becomes the same as the potential of the clamp capacitor C2, the diode D2 is turned on and the clamp capacitor C2 is charged. That is, the energy stored in the saturable reactor SL1 is supplied to the clamp capacitor C2 via the diode D2.

  At this time, by turning on the switch Q2, the switch Q2 becomes a zero voltage switch. Further, since the voltage of the feedback winding 5d of the transformer T3 is a reverse voltage, the switch Q4 is turned off and the switch Q3 is turned on. Therefore, a voltage is generated in the feedback winding 5d by the energy stored in the leakage inductance Lr, a current Q3i flows as 5d → 5b → Co → Q3 → 5d, and the energy is fed back to the smoothing capacitor Co to continue to load Power is supplied to the RL.

  Simultaneously with the release of the energy of the saturable reactor SL1, the energy from the leakage inductance Lr between the primary winding and the secondary winding is supplied to the clamp capacitor C2, and the clamp capacitor C2 is charged. The energy stored in the clamp capacitor C2 flows in the order of C2, Q2, SL1, and C2, and resets the magnetic flux of the saturable reactor SLl. That is, the current SL1i increases because the amount of energy supplied from the leakage inductance Lr at the time of reset increases. The current SL1i increases just before the end of the ON period of the switch Q2, and the current Q2i of the switch Q2 also becomes maximum. By turning off the switch Q2 at this time, the discharge of the capacitor C1 becomes steep and becomes zero in a short time. At this time, the switch Q1 can achieve a zero voltage switch by turning on the switch Q1.

  Further, when the switch Q1 is on, the capacitor C5 is charged via the diode D5 by the voltage generated in the feedback winding 5d. Next, when the switch Q5 is turned on at a certain time during the period when the switch Q2 is turned on, a current Q5i flows through a path of C5 → Q5 → 5d → Q3 → C5. The clamp capacitor C2 is charged through the primary winding 5a of the transformer T3 and the switch Q2 by the energy generated by this current.

  Since the charge of the clamp capacitor C2 saturates the saturable reactor SL1, the saturation state of the saturable reactor SL1 can be controlled by adjusting the power. Moreover, the saturation state of the saturable reactor SL1 can be controlled by controlling the ON time of the switch Q5. That is, if the ON time of the switch Q5 is lengthened, the saturation of the saturable reactor SL1 can be deepened.

On the other hand, when the load current decreases (light load), the leakage inductance Lr current when the switch Q1 is turned off becomes zero during the off period of the switch Q1, but the switch Q3 is still on. . For this reason, the electric charge accumulated in the smoothing capacitor Co is discharged, current flows through Co → 5b → 5d → Q3 → Co, and energy is stored in the leakage inductance Lr.
Next, when the switch Q1 is turned on, the switch Q4 is turned on and the switch Q3 is turned off. For this reason, the energy stored in the leakage inductance Lr is stored in the capacitor C5 via the diode D5. That is, since the diode D5 is turned on and energy is stored in the capacitor C5, the spike voltage is absorbed.

  Next, when the switch Q1 is turned off and the switch Q2 is turned on, a voltage is generated at one end of the tertiary winding 5c of the transformer T3. This voltage is applied to the gate of the switch Q5 via the waveform shaping circuit 11. Switch Q5 is turned on. Further, the voltage at one end of the feedback winding 5d of the transformer T3 is applied to the gate of the switch Q3, and the switch Q3 is turned on.

  For this reason, since current flows in the order of C5 → Q5 → 5d → Q3 → C5, the energy stored in the capacitor C5 is fed back to the primary side clamp capacitor C2 via the primary winding 5a. That is, a current flows through 5a → Q2 → C2 → 5a, and the clamp capacitor C2 is charged. Since the charge of the clamp capacitor C2 saturates the saturable reactor SL1, the saturation state of the saturable reactor SL1 can be controlled by adjusting this energy. That is, the saturation of the saturable reactor SL1 can be adjusted by the energy fed back from the secondary side of the transformer T3 to the clamp capacitor C2. Further, the voltage Q3v of the switch Q3 is clamped and no spike voltage is generated. For this reason, the breakdown voltage of the switch Q3 can be lowered. Therefore, the loss can be further reduced by using an element having a low on-resistance.

  As described above, according to the direct-current converter of the third embodiment, the energy stored in the leakage inductance Lr between the primary winding and the secondary winding of the transformer T3 due to the backflow of current at the time of light load is transferred to the capacitor C5 via the diode D5. Thus, the spike voltage can be removed by returning energy to the primary side clamp capacitor C2 through the feedback winding 5d without loss by the switch Q5 which is turned on in synchronization with the switch Q2 being turned on. Thereby, the withstand voltage of the rectifying element is reduced, and the on-resistance can be reduced by using a low withstand voltage element. In addition, since the CR absorber for preventing spike voltage can be removed, the circuit can be simplified.

  Further, the energy supplied from the secondary side of the transformer T3 is fed back to the clamp capacitor C2, and the saturation of the saturable reactor SL1 can be adjusted by the energy stored in the clamp capacitor C2, and the saturable reactor SL1 is optimally saturated. Can be in a state. As a result, the spike voltage of the rectifier element can be suppressed and the exciting current of the transformer can be reduced, so that the DC converter can be highly efficient and downsized.

  FIG. 12 is a circuit configuration diagram of the DC converter according to the fourth embodiment. The DC converter of the fourth embodiment shown in FIG. 12 differs from the DC converter of the third embodiment shown in FIG. 10 only in that the waveform shaping circuit 11 is deleted. Other configurations shown in FIG. 12 are the same as the configurations shown in FIG. 10, and thus the same reference numerals are given to the same portions, and details thereof are omitted.

  Even in the DC converter of Example 4, the same effect as that of the DC converter of Example 3 can be obtained.

  The present invention is applicable to switching power supply devices such as a DC-DC converter and an AC-DC converter.

It is a circuit block diagram of the direct-current converter of Example 1. It is a figure which shows an example of the waveform shaping circuit provided in the DC converter of Example 1. FIG. It is a figure which shows the operation | movement waveform of the waveform shaping circuit shown in FIG. 3 is a signal timing chart in each part of the DC converter according to Embodiment 1; It is a figure which shows the BH characteristic of the transformer provided in the DC converter of Example 1. 3 is a timing chart of a current of a saturable reactor provided in the DC converter according to Embodiment 1. It is a timing chart of the signal in each part of the conventional DC converter when a load current is a critical state and a saturable reactor is not used. It is a timing chart of the signal in each part of the direct-current converter of Example 1 when a load current is a critical state and a saturable reactor is used. It is a circuit block diagram of the direct-current converter of Example 2. 6 is a circuit configuration diagram of a DC converter according to Embodiment 3. FIG. 6 is a structural diagram of a transformer provided in the direct-current converter of Embodiment 3. FIG. 6 is a circuit configuration diagram of a DC converter according to Embodiment 4. FIG. It is a circuit block diagram of the conventional DC converter. It is a timing chart of the signal in each part at the time of the light load of the DC converter shown in FIG.

Explanation of symbols

Vdc1 DC power supply 10, 10a Control circuit Q1-Q5 Switch RL Load
R1, R2, RT Resistance Lo Smoothing reactor Co Smoothing capacitor C1, C2, C5, CT Capacitor SL1 Saturable reactor T1, T2, T3 Transformer 5a Primary winding (n1)
5b Secondary winding (n2)
5c Tertiary winding (n3)
5d Feedback winding (n4)
D1 to D6 Diode 11 Waveform shaping circuit 30 Core 30a Core portion 30b Recessed portion 31 Gap

Claims (7)

A first switch for converting a DC voltage of a DC power source into a high-frequency voltage by turning on / off via a primary winding of a transformer;
A series circuit connected to both ends of the primary winding of the transformer or both ends of the first switch, and a second switch and a clamp capacitor connected in series;
A saturable reactor connected in parallel to the primary winding of the transformer and saturated by energy stored in the clamp capacitor;
A synchronous rectifier circuit for synchronously rectifying a high-frequency voltage generated in the secondary winding of the transformer;
A smoothing circuit that smoothes the rectified output of the synchronous rectifier circuit with a smoothing reactor and a smoothing capacitor and outputs a DC voltage;
A control circuit for alternately turning on and off the first switch and the second switch and causing the first switch to perform zero voltage switching when the saturable reactor is saturated;
A capacitor that stores the energy stored in the smoothing reactor via a diode due to a reverse flow of the current of the synchronous rectifier circuit at a light load;
A third switch that is turned on in synchronization with the second switch and that feeds back the energy stored in the capacitor to the clamp capacitor on the primary side via the transformer;
A DC converter, wherein a saturation state of the saturable reactor is adjusted by energy fed back to the clamp capacitor. Having a tertiary winding of the transformer connected in series to a secondary winding of the transformer;
The third switch is turned on by a voltage generated in the tertiary winding of the transformer when the second switch is turned on, and the energy stored in the capacitor is transferred to the clamp capacitor on the primary side through the transformer. The DC converter according to claim 1, wherein the DC converter is fed back.   The DC converter according to claim 2, wherein the tertiary winding of the transformer is wound in a phase opposite to that of the primary winding of the transformer. A first switch for converting a DC voltage of a DC power source into a high-frequency voltage by turning on / off via a primary winding of a transformer;
A series circuit connected to both ends of the primary winding of the transformer or both ends of the first switch, and a second switch and a clamp capacitor connected in series;
A saturable reactor connected in parallel to the primary winding or the secondary winding of the transformer and saturated by the energy stored in the clamp capacitor;
A synchronous rectifier circuit for synchronously rectifying a high-frequency voltage generated in a secondary winding loosely coupled to the primary winding of the transformer;
A smoothing capacitor that smoothes the rectified output of the synchronous rectifier circuit;
When the first switch is turned off, the energy stored in the leakage inductance between the primary winding and the secondary winding is tightly coupled to the primary winding of the transformer and connected in series to the secondary winding. A feedback winding of the transformer that feeds back to the smoothing capacitor;
A control circuit for alternately turning on and off the first switch and the second switch and causing the first switch to perform zero voltage switching when the saturable reactor is saturated;
A capacitor for storing the energy stored by the current flowing back to the leakage inductance at the time of light load via a diode;
A third switch that is turned on in synchronization with the second switch, and that feeds back the energy stored in the capacitor to the clamp capacitor on the primary side via a feedback winding of the transformer;
A DC converter, wherein a saturation state of the saturable reactor is adjusted by energy fed back to the clamp capacitor. Having a tertiary winding of the transformer connected in series with a feedback winding of the transformer;
The third switch is turned on by a voltage generated in the tertiary winding of the transformer when the second switch is turned on, and the energy stored in the capacitor is transferred to the primary side through the feedback winding of the transformer. The DC converter according to claim 4, wherein the DC capacitor is fed back to the clamp capacitor.   The primary and secondary windings of the transformer are wound so as to generate an in-phase voltage, and the primary winding and feedback winding of the transformer are wound so as to generate a reverse-phase voltage. 6. The direct current converter according to claim 4, wherein the direct current converter is provided.   7. The DC converter according to claim 1, further comprising an on-time setting unit configured to set an on-time of the third switch to be shorter than an on-time of the second switch.

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