JP2006190872A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of semiconductor device for sufficiently reducing parasitic capacitance among wiring portions. <P>SOLUTION: The manufacturing method of semiconductor device comprises steps of: forming a porous insulating film 54 on a semiconductor substrate 10; and forming a dense layer 56 having higher density than that of the porous insulating film on the front surface of the porous insulating film 54, by conducting the process to give higher density to the front surface of the porous insulating film. Extremely thinner high density layer to work as an etching stopper film and a protection film is formed because of forming the highly dense layer through the process to give high density to the front surface of the porous insulating film. Accordingly, parasitic capacitance among the wirings is reduced sufficiently. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having an insulating film having a low relative dielectric constant.

  In recent years, with the high integration of semiconductor devices, wiring widths and wiring intervals have been set to be very narrow. Then, it has been studied to reduce the wiring interval to 0.1 μm or less. The parasitic capacitance between wirings is inversely proportional to the wiring spacing. For this reason, the parasitic capacitance between the wirings increases as the wiring interval is narrowed. An increase in the parasitic capacitance between the wirings causes a delay in the propagation speed of the signal, which becomes an impediment to improving the operation speed of the semiconductor device. In order to reduce the parasitic capacitance between the wirings, it is effective to use a material having a low relative dielectric constant as the material of the interlayer insulating film.

Conventionally, inorganic films such as silicon dioxide (SiO ₂ ), silicon nitride (SiN), and phosphosilicate glass (PSG) have been used as a material for the interlayer insulating film. Further, an organic film such as polyimide has also been used as a material for the interlayer insulating film. For example, the relative dielectric constant of the SiO ₂ film formed by the CVD method is about 4.

A SiOF film has been proposed as an insulating film having a relative dielectric constant lower than that of the SiO ₂ film. The relative dielectric constant of the SiOF film is about 3.3 to 3.5, which is lower than that of the SiO ₂ film. However, in order to sufficiently reduce the parasitic capacitance between the wirings, it is necessary to use an insulating film having a lower relative dielectric constant.

Recently, a porous insulating film has attracted attention as an insulating film having an extremely low relative dielectric constant. The porous insulating film is a film in which a large number of pores are formed in the insulating film. If a porous insulating film is used as the material of the interlayer insulating film, it is possible to reduce the parasitic capacitance between the wirings.
JP 2002-261121 A JP 2003-68850 A

When a groove is formed in the porous insulating film and wiring is embedded in the groove, a stopper film having etching characteristics different from that of the porous insulating film is formed under the porous insulating film, and the groove is formed using the stopper film as an etching stopper. Need to form. When the material of the porous insulating film is SiO ₂ , it is conceivable to use SiN, which is a material having a relatively high selectivity with respect to SiO ₂ , as the material of the stopper film. However, since the relative dielectric constant of SiN is as high as 7, when SiN is used as the material for the stopper film, it is difficult to sufficiently reduce the parasitic capacitance between the wirings.

  An object of the present invention is to provide a method of manufacturing a semiconductor device that can sufficiently reduce the parasitic capacitance between wirings.

  According to one aspect of the present invention, the step of forming a porous insulating film on a semiconductor substrate and the densification treatment for densifying the surface layer portion of the porous insulating film, And a step of forming a dense layer having a higher density than the porous insulating film in the surface layer portion.

  According to the present invention, since a dense layer is formed by performing a densification process for densifying the surface layer portion of the porous insulating film, a high-quality dense layer that can function as an etching stopper film or a protective film is formed extremely thin. be able to. Therefore, according to the present invention, the parasitic capacitance between the wirings can be sufficiently reduced.

  As described above, when a stopper film made of SiN is formed under the porous insulating film and a groove is formed using such a stopper film as an etching stopper, the relative permittivity of the stopper film is very high. It is difficult to sufficiently reduce the parasitic capacitance.

  Here, it is conceivable to form a groove in the porous insulating film by appropriately setting the etching time without using the etching stopper film.

  However, it is very difficult to accurately control the depth of the groove formed in the porous insulating film by the etching time, and the groove depth varies greatly. Variation in the depth of the groove will cause variation in wiring resistance and the like. Further, when the depth of the groove formed in the porous insulating film is controlled by the etching time, the state of the bottom surface of the groove becomes very rough. If the bottom surface of the groove is very rough, a good barrier film cannot be formed on the bottom surface of the groove. For this reason, the wiring material embedded in the trench diffuses to the outside through the barrier film. If the wiring material diffuses into the porous insulating film through the barrier film, disconnection of the wiring or the like occurs.

  Further, when embedding wiring in an interlayer insulating film made of a porous insulating film, a groove is formed by etching the porous insulating film using a photoresist film having an opening as a mask, and the groove thus formed Embed wiring inside. However, if the selective ratio between the photoresist film and the porous insulating film is not sufficiently ensured, even the photoresist film is etched greatly when the porous insulating film is etched, and the desired shape is obtained. The groove may not be formed. Even when the selective ratio between the photoresist film and the porous insulating film cannot be sufficiently secured, a protective film functioning as a hard mask is previously formed on the porous insulating film in order to form a groove having a desired shape. It is necessary to form. As the protective film (hard mask), for example, a silicon oxide film formed by a CVD method may be used. However, when the silicon oxide film is formed by the CVD method, the film thickness of the silicon oxide film must be set to be relatively thick, for example, 30 nm or more. This is because when a silicon oxide film is thinly formed by the CVD method, a high-quality silicon oxide film cannot be obtained and cannot function sufficiently as a protective film. Since the silicon oxide film formed by the CVD method has a relative dielectric constant larger than that of the porous insulating film, when the silicon oxide film is set to a relatively large thickness of 30 nm or more, the parasitic capacitance between the wirings is sufficient. It is difficult to reduce.

  Further, when the wiring is embedded in the groove, a conductive film is formed in the groove and on the porous insulating film, and the conductive film is polished by CMP to embed the wiring made of the conductive film in the groove. Since the porous insulating film easily absorbs moisture, a protective film (barrier film) is previously formed on the porous insulating film in order to prevent moisture from reaching the porous insulating film during polishing of the conductive film by the CMP method. It is necessary to form. As the protective film, it is conceivable to use a silicon oxide film formed by, for example, a CVD method in the same manner as described above. However, when the silicon oxide film is formed by the CVD method, as described above, the thickness of the silicon oxide film has to be set to be relatively thick, for example, 30 nm or more. This is because when the silicon oxide film is thinly formed by the CVD method, as described above, a high-quality silicon oxide film cannot be obtained and cannot function sufficiently as a barrier film. Since the silicon oxide film formed by the CVD method has a relative dielectric constant larger than that of the porous insulating film, when the silicon oxide film is set to a relatively large thickness of 30 nm or more, the parasitic capacitance between the wirings is sufficient. It is difficult to reduce.

  As a result of diligent study, the inventors of the present application formed a dense layer on the surface layer portion of the porous insulating film by performing a densification treatment for densifying the surface layer portion of the porous insulating film, and this dense layer was formed into an etching stopper. I came up with the idea of using it as a film or protective film. Since the dense layer has a higher density than the porous insulating film, the etching rate is slower than that of the porous insulating film. For this reason, this dense layer can function as an etching stopper film. Further, since the dense layer has a very high density, it can function as a protective film (barrier film) that prevents moisture and the like from reaching the porous insulating film when the conductive film is polished by the CMP method. Further, since the dense layer has an etching rate slower than that of the porous insulating film, it can function as a hard mask (protective film) when the porous insulating film is etched. Moreover, such a dense layer can sufficiently function as an etching stopper film and a protective film even when it is formed very thin. That is, when an insulating film is formed by a CVD method, a high-quality insulating film cannot be formed unless it is formed to a relatively large thickness of 30 nm or more, but it is formed by a densification process for densifying the porous surface layer portion. Even if the dense layer is formed extremely thin, it becomes a high-quality etching stopper film or protective film. As described above, according to the present invention, a high-quality dense layer that can function as an etching stopper film and a protective film can be formed extremely thin, so that the parasitic capacitance between wirings can be sufficiently reduced.

[First Embodiment]
A method of manufacturing a semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 8 are process cross-sectional views illustrating the semiconductor device manufacturing method according to the present embodiment.

  First, as shown in FIG. 1A, an element isolation film 12 is formed on a semiconductor substrate 10 by, for example, a LOCOS (LOCal Oxidation of Silicon) method. An element region 14 is defined by the element isolation film 12. For example, a silicon substrate is used as the semiconductor substrate 10.

  Next, a gate electrode 18 is formed on the element region 14 via the gate insulating film 16. Next, a sidewall insulating film 20 is formed on the side surface of the gate electrode 18. Next, dopant impurities are introduced into the semiconductor substrate 10 using the sidewall insulating film 20 and the gate electrode 18 as a mask, thereby forming the source / drain diffusion layers 22 in the semiconductor substrate 10 on both sides of the gate electrode 18. Thus, the transistor 24 having the gate electrode 18 and the source / drain diffusion layer 22 is formed.

  Next, an interlayer insulating film 26 made of a silicon oxide film is formed on the entire surface by, eg, CVD.

  Next, a stopper film 28 of, eg, a 50 nm-thickness is formed on the interlayer insulating film. Examples of the material of the stopper film 28 include a SiN film formed by plasma CVD, a hydrogenated SiC film (SiC: H film), a hydrogenated oxide SiC film (SiC: O: H film), and a nitrided SiC film (SiC: N). Film) or the like. The SiC: H film is a film formed by allowing H (hydrogen) to exist in the SiC film. The SiC: O: H film is a film formed by allowing O (oxygen) and H (hydrogen) to exist in the SiC film. The SiC: N film is a film formed by causing N (nitrogen) to exist in the SiC film. The stopper film 28 functions as a stopper when the tungsten film 34 and the like are polished by a CMP method in a process described later. The stopper film 28 also functions as an etching stopper when the groove 46 is formed in the interlayer insulating film 38 or the like in a process described later.

  Next, a contact hole 30 reaching the source / drain diffusion layer 22 is formed by using a photolithography technique (see FIG. 1B).

  Next, an adhesion layer 32 made of a 50 nm thick TiN film is formed on the entire surface by, eg, sputtering. The adhesion layer 32 is for ensuring adhesion to the base of a conductor plug described later.

  Next, a tungsten film 34 of, eg, a 1 μm-thickness is formed on the entire surface by, eg, CVD.

  Next, the adhesion layer 32 and the tungsten film 34 are polished by, for example, CMP until the surface of the stopper film 28 is exposed. Thus, the conductor plug 34 made of tungsten is buried in the contact hole (see FIG. 1C).

  Next, as shown in FIG. 2A, an insulating film 36 made of a hydrogenated SiC film (SiC: O: H film) is formed on the entire surface by vapor phase growth, more specifically, plasma CVD. Form. As described above, the SiC: O: H film is a film formed by allowing O (oxygen) and H (hydrogen) to exist in the SiC film. The SiC film is electrically a semiconductor, but the SiC: O: H film is electrically an insulator. The insulating film 36 is a highly dense insulating film. The density of the insulating film 36 is higher than the density of a porous insulating film 38 described later. The insulating film 36 functions as a barrier film that prevents diffusion of moisture and the like. The insulating film 36 can prevent moisture and the like from reaching the porous insulating film 38 and can prevent the relative dielectric constant of the porous insulating film 38 from increasing.

  The insulating film 36 made of a SiC: O: H film can be formed as follows, for example.

  First, the semiconductor substrate 10 is introduced into the chamber of the plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is heated to 300 to 400 ° C.

  Next, the siloxane monomer having an alkyl group is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using an inert gas as a carrier. The supply amount of the reactive gas is, for example, 1 mg / min. At this time, when high frequency power is applied between the plate electrodes, reactive gas plasma is generated, and an insulating film 36 made of a SiC: O: H film is formed.

  Thus, the insulating film 36 made of SiC: O: H is formed.

  Next, a porous interlayer insulating film (porous insulating film) 38 is formed on the entire surface. As the porous interlayer insulating film 38, for example, an interlayer insulating film (porous silica film) made of porous silica is formed. The film thickness of the porous interlayer insulating film 38 is, for example, 160 nm. The method for forming the porous interlayer insulating film 38 is, for example, the same as the method for forming the porous interlayer insulating film 54 described in detail later.

  Next, the insulating film 40 is formed on the entire surface of the semiconductor substrate 10 on which the porous interlayer insulating film 38 is formed, for example, by plasma CVD. The insulating film 40 functions as a barrier film that prevents diffusion of moisture and the like. The insulating film 40 can prevent moisture and the like from reaching the porous insulating film 38 and can prevent the relative dielectric constant of the porous insulating film 38 from increasing.

  Next, a photoresist film 42 is formed on the entire surface by, eg, spin coating.

  Next, an opening 44 is formed in the photoresist film 42 by using a photolithography technique (see FIG. 2B). The opening 44 is for forming a first layer wiring (first metal wiring layer) 50 described later. For example, the opening 44 is formed in the photoresist film 42 so that the wiring width is 100 nm and the wiring interval is 100 nm.

Next, as shown in FIG. 3A, the insulating film 40, the interlayer insulating film 38, and the insulating film 36 are etched using the photoresist film 42 as a mask. When etching is performed, etching is performed using fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials. At this time, the stopper film 38 functions as an etching stopper. Thus, a trench (trench) 46 for embedding the wiring 50 is formed in the insulating film 40, the interlayer insulating film 38 and the insulating film 36. The upper surface of the conductor plug 34 is exposed in the groove 46. Thereafter, the photoresist film 42 is peeled off.

  Next, a barrier film (not shown) made of TaN with a thickness of 10 nm is formed on the entire surface by, eg, sputtering. The barrier film is for preventing Cu in the wiring described later from diffusing into the insulating film. Next, a seed film (not shown) made of Cu with a thickness of 10 nm is formed on the entire surface by, eg, sputtering. The seed film functions as an electrode when a wiring made of Cu is formed by electroplating. Thus, a laminated film 48 composed of the barrier film and the seed film is formed.

  Next, a Cu film 50 having a thickness of 600 nm is formed by, for example, electroplating.

  Next, the Cu film 50 and the laminated film 48 are polished by CMP until the surface of the insulating film is exposed. Thus, the wiring 50 made of Cu is embedded in the groove. Such a manufacturing process of the wiring 50 is referred to as a single damascene method.

  Next, an insulating film 52 made of a SiC: O: H film having a thickness of 30 nm is formed on the entire surface by, eg, plasma CVD. The insulating film 52 functions as a barrier film that prevents diffusion of moisture. The insulating film 52 prevents moisture from reaching the porous interlayer insulating film 38. The insulating film 52 made of a SiC: O: H film can be formed as follows, for example.

  First, the semiconductor substrate 10 is introduced into the chamber of the plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 400 ° C., for example.

Next, trimethylsilane is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using a carrier gas. At this time, when high-frequency power is applied between the plate electrodes, reactive gas plasma is generated. At this time, if the deposition rate is set to be relatively slow, the dense insulating film 40 can be formed. Specifically, for example, if the film formation conditions are set as follows, the dense insulating film 40 can be formed. The supply amount of the reactive gas is, for example, 1 mg / min. For example, CO ₂ is used as the carrier gas. The flow rate of the carrier gas is set to 100 sccm, for example. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). The time for generating the plasma by applying the high frequency power between the plate electrodes is, for example, 5 seconds.

  Thus, the insulating film 52 functioning as a barrier film is formed.

  Next, as shown in FIG. 4A, a porous interlayer insulating film (porous insulating film) 54 is formed on the entire surface. As the porous interlayer insulating film 54, for example, an interlayer insulating film (porous silica film) made of porous silica is formed. The film thickness of the porous interlayer insulating film 54 is, for example, 180 nm.

  The interlayer insulating film 54 made of porous silica can be formed, for example, as described below.

  First, an insulating film material for forming the porous interlayer insulating film 54 is prepared. Specifically, for example, tetraalkoxysilane, trialkoxysilane, methyltrialkoxysilane, ethyltrialkoxysilane, propyltrialkoxysilane, phenyltrialkoxysilane, vinyltrialkoxysilane, allyltrialkoxysilane, glycidyltrialkoxysilane , Dialkoxysilane, dimethyl dialkoxysilane, diethyl dialkoxysilane, dipropyl dialkoxysilane, diphenyl dialkoxysilane, divinyl dialkoxysilane, diallyl dialkoxysilane, diglycidyl dialkoxysilane, phenylmethyl dialkoxysilane, phenyl Ethyl dialkoxy silane, phenyl propyl trialkoxy silane, phenyl vinyl dialkoxy silane, phenyl allyl dialkoxy silane , Phenylglycidyl dialkoxysilane, methyl vinyl dialkoxy silane, ethyl vinyl dialkoxy silane, propyl vinyl dialkoxy silane, etc. A liquid insulating film material is prepared. As the thermally decomposable compound, for example, an acrylic resin or the like is used.

  Next, an insulating film material is applied to the entire surface by, eg, spin coating. The application conditions are, for example, 3000 rotations / minute and 30 seconds. Thereby, an interlayer insulating film 54 made of an insulating film material is formed.

  Next, heat treatment (soft bake) is performed. When performing the heat treatment, for example, a hot plate is used. As a result, the thermally decomposable compound is thermally decomposed and pores (pores) are formed in the interlayer insulating film 54. The diameter of the holes is, for example, about 10 to 20 nm. The heat treatment temperature is set to 200 to 350 ° C., for example. The reason for setting the heat treatment temperature to 200 to 350 ° C. is as follows. When the heat treatment temperature is set lower than 200 ° C., the thermally decomposable compound is not sufficiently thermally decomposed and vacancies are not sufficiently formed. In addition, when the heat treatment temperature is set lower than 200 ° C., the rate at which the thermally decomposable compound is thermally decomposed is extremely slow, and it takes a long time to form pores. On the other hand, when the heat treatment temperature is set higher than 350 ° C., the curing of the insulating film material proceeds rapidly and the formation of vacancies is hindered. For these reasons, the heat treatment temperature is preferably set to 200 to 350 ° C. Here, the heat treatment temperature is set to 200 ° C., for example.

  Thus, an interlayer insulating film (porous silica film) 54 made of porous silica is formed.

  The material, formation method, and the like of the porous interlayer insulating film 54 are not limited to the above.

For example, as shown below, a porous interlayer insulating film (Carbon Doped SiO ₂ film) 54 may be formed by vapor phase growth.

  First, the semiconductor substrate 10 is introduced into the chamber of the plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 300 to 400 ° C., for example.

Next, the siloxane monomer having an alkyl group is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using a carrier gas. At this time, when high-frequency power is applied between the plate electrodes, reactive gas plasma is generated. At this time, if the deposition rate is set relatively fast, the porous interlayer insulating film 54 can be formed. Specifically, for example, the porous interlayer insulating film 54 can be formed by setting the film forming conditions as follows. For example, hexamethyldisiloxane is used as the reactive gas. The supply amount of the reactive gas is, for example, 3 mg / min. CO ₂ is used as the carrier gas. The flow rate of the carrier gas is 6000 sccm, for example. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (500 W) and 100 kHz (500 W). Thus, a porous interlayer insulating film 54 made of a silicon oxide film containing carbon is formed.

As described above, the porous interlayer insulating film (Carbon Doped SiO ₂ film) 54 may be formed by vapor phase growth.

In addition, as shown below, using a raw material containing a thermally decomposable atomic group (thermally decomposable compound) or an oxidatively decomposable atomic group (oxidatively decomposable compound), a thermally decomposable or oxidatively decomposable atomic group A porous interlayer insulating film (Porous Carbon Doped SiO ₂ film) 54 may be formed by vapor phase epitaxy while decomposing the substrate with plasma.

  First, the semiconductor substrate 10 is introduced into the chamber of the plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 250 to 350 ° C., for example.

Next, the siloxane monomer having an alkyl group is vaporized by a vaporizer to generate a first reactive gas. Moreover, the silane compound which has a phenyl group is vaporized with a vaporizer, and a 2nd reactive gas is produced | generated. The phenyl group is an atomic group (thermally decomposable and oxidatively decomposable atomic group) that decomposes when an oxidation reaction is caused in a heated state. Then, these reactive gases are introduced into the chamber using CO ₂ gas as a carrier gas. At this time, when high frequency power is applied between the plate electrodes, the CO ₂ gas becomes plasma (oxygen plasma), and the phenyl group is decomposed. Since the interlayer insulating film 54 is deposited while decomposing the phenyl group, the porous interlayer insulating film 54 is formed. The film forming conditions are set as follows, for example. More specifically, for example, hexamethyldisiloxane is used as the first reactive gas. The supply amount of the first reactive gas is, for example, 1 mg / min. More specifically, for example, diphenylmethylsilane is used as the second reactive gas. The supply amount of the second reactive gas is, for example, 1 mg / min. The flow rate of the carrier gas is, for example, 3000 sccm. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (300 W) and 100 kHz (300 W). Thus, a porous interlayer insulating film 54 made of a silicon oxide film containing carbon is formed.

  In this example, the case of using a material containing a thermal decomposable and oxidative decomposable atomic group that decomposes when oxidized while applying heat has been described as an example. The porous interlayer insulating film 54 may be formed by a vapor phase growth method using a raw material containing the atomic group or a raw material containing an oxidatively decomposable atomic group that can be oxidized and decomposed without heating.

In this way, a raw material containing a thermally decomposable or oxidatively decomposable atomic group (thermally decomposable compound, oxidatively decomposable compound) is used, and a thermally decomposable or oxidatively decomposable atomic group is used using heat, oxygen plasma, or the like While being decomposed, a porous interlayer insulating film (Porous Carbon Doped SiO ₂ film) 54 may be formed by vapor phase growth.

  Further, as shown below, a porous interlayer insulating film (organic porous film) 54 is obtained by applying an insulating film material containing a thermally decomposable organic compound and then thermally decomposing the thermally decomposable atomic group. May be formed.

  First, an insulating film material is formed by diluting a polyaryl ether polymer containing a thermally decomposable organic compound with a solvent. As the thermally decomposable organic compound, for example, an organic compound that thermally decomposes at 200 to 300 ° C. is used. Examples of such an organic compound include acrylic resin, polyethylene resin, polypropylene resin, acrylic oligomer, ethylene oligomer, and propylene oligomer. For example, cyclohexanone is used as the solvent.

  Next, an insulating film material is applied to the entire surface of the semiconductor substrate 10 by spin coating. As a result, an interlayer insulating film 54 made of an insulating film material is formed on the semiconductor substrate 10.

  Next, heat treatment is performed using a hot plate. The heat treatment temperature is, for example, 100 to 400 ° C. As a result, the solvent in the interlayer insulating film 54 is evaporated, and a dried interlayer insulating film 54 is formed.

  Next, the semiconductor substrate 10 is introduced into the curing apparatus and heat treatment is performed. The heat treatment temperature is, for example, 300 to 400 ° C. As a result, the thermally decomposable organic compound is thermally decomposed, and holes are formed in the interlayer insulating film 54. Thus, a porous interlayer insulating film 54 is formed.

  Thus, after applying the insulating film material containing the thermally decomposable organic compound, the thermally decomposable organic compound is thermally decomposed to form a porous interlayer insulating film (organic porous film) 54. Also good.

  Further, as shown below, the porous interlayer insulating film 54 may be formed by applying an insulating film material containing a clustered silicon compound (silica) and then performing a heat treatment.

  First, an insulating film material (silica cluster precursor) containing cluster-like silica is prepared. As such an insulating film material, for example, nanoclustering silica (NCS) (model number: Ceramate NCS) manufactured by Catalytic Chemical Industry Co., Ltd. is used. In such an insulating film material, clustered silica is formed using a quaternary alkylamine as a catalyst.

  Next, an insulating film material is applied to the entire surface by, eg, spin coating. The application conditions are, for example, 3000 rotations / minute and 30 seconds. As a result, an interlayer insulating film 54 is formed on the semiconductor substrate 10.

  Next, heat treatment (soft bake) is performed. When performing the heat treatment, for example, a hot plate is used. The heat treatment temperature is set to 200 ° C., for example. The heat treatment time is, for example, 150 seconds. Thereby, the solvent in the insulating film material is evaporated, and the porous interlayer insulating film 54 is formed. Since the interlayer insulating film 54 is formed using an insulating film material containing clustered silica, the porous interlayer insulating film 54 having very small pores is formed. Specifically, the diameter of the holes is, for example, 2 nm or less. In addition, since the interlayer insulating film 54 is formed using an insulating film material containing clustered silica, the distribution of vacancies becomes very uniform. If the interlayer insulating film 54 is formed using an insulating film material containing clustered silica, an extremely good porous interlayer insulating film 54 can be formed.

  As described above, the porous interlayer insulating film 54 may be formed by applying an insulating film material containing a clustered silicon compound (silica) and then performing a heat treatment.

  Note that although the case where an insulating film material containing a silicon compound is applied as a cluster-like compound has been described as an example here, the cluster-like compound is not limited to a silicon compound. An insulating film material containing a cluster-like compound made of any other material may be applied.

The density of the porous interlayer insulating film 54 formed as described above is about 0.6 to 1.3 g / cm ³ .

  Next, a dense layer 56 is formed on the surface layer portion of the porous interlayer insulating film 54 by performing a densification treatment for densifying the surface layer portion of the porous interlayer insulating film 54.

  The dense layer 56 can be formed as follows, for example.

For example, an excimer lamp is used to irradiate the porous interlayer insulating film 54 with ultraviolet rays. When ultraviolet rays are irradiated in the atmosphere, ozone is generated. When the porous interlayer insulating film 54 is irradiated with ozone, the bulky organic group introduced into the molecular structure of the porous interlayer insulating film 54 is oxidized by ozone to generate SiOH. Then, SiOH each other was generated condensation, SiO ₂ is produced. At this time, the distance between the molecules is reduced due to the disappearance of the bulky organic group, and the molecules are bonded by the condensation of SiOH, so that the densification proceeds. Thus, the surface layer portion of the porous interlayer insulating film 54 is densified with ozone. By this densification treatment, a dense layer 56 having a higher density than the porous interlayer insulating film 54 is formed on the surface layer portion of the porous interlayer insulating film 54.

  Conditions for forming the dense layer 56 are, for example, as follows.

  The wavelength of the excimer lamp is 172 nm, for example. The pressure when irradiating with ultraviolet rays is, for example, normal pressure. The time for irradiating with ultraviolet rays is, for example, 60 seconds.

  The thickness of the dense layer 56 is preferably 2 to 25 nm. This is because when the thickness of the dense layer 56 is 2 nm or less, the dense layer 56 is too thin to function sufficiently as an etching stopper film. Moreover, when the thickness of the dense layer 56 is larger than 25 nm, the parasitic capacitance between the wirings becomes considerably large. Therefore, the thickness of the dense layer 56 is preferably 2 to 25 nm.

The density of the dense layer 56 is preferably 1.5 to 3.5 g / cm ³ . This is because when the density of the dense layer 56 is smaller than 1.5 g / cm ³ , the dense layer 56 cannot sufficiently function as an etching stopper film. Further, when the dense layer 56 is larger than 3.5 g / cm ³ , the capacitance between the wirings becomes considerably large. Therefore, the density of the dense layer 56 is preferably 1.5 to 3.5 g / cm ³ .

  The conditions for forming the dense layer 56 are not limited to the above. The conditions for forming the dense layer 56 may be appropriately set so that the dense layer 56 having a desired thickness and a desired density can be obtained.

  Here, the case where the surface layer portion of the porous interlayer insulating film 54 is densified using ozone by irradiating ultraviolet rays in the atmosphere to generate ozone has been described as an example. The method for forming the dense layer 56 on the surface layer portion 54 is not limited to this.

  For example, the dense layer 56 may be formed on the surface layer portion of the porous interlayer insulating film 54 by performing a densification treatment using ozone water.

  Here, ozone is generated by irradiating ultraviolet rays in the atmosphere, but the atmosphere for generating ozone may not be the atmosphere. If ultraviolet rays or the like are irradiated in an atmosphere containing oxygen, ozone can be generated.

  Although the case where the dense layer 56 is formed on the surface layer portion of the interlayer insulating film 54 by performing the densification process using ozone has been described here as an example, the dense layer 56 is formed on the surface layer portion of the interlayer insulating film 54. The forming method is not limited to the densification treatment using ozone. The dense layer 56 may be formed on the surface layer portion of the interlayer insulating film 54 by densifying the surface layer portion of the interlayer insulating film 54 by any other method.

For example, the dense layer 56 may be formed on the surface layer portion of the porous interlayer insulating film 54 by irradiating the porous interlayer insulating film 54 with an electron beam. When the porous interlayer insulating film 54 is irradiated with an electron beam, bulky organic groups introduced into the molecular structure of the porous interlayer insulating film 54 are decomposed and SiOH is generated. Then, SiOH each other was generated condensation, SiO ₂ is produced. The distance between the molecules is reduced by the disappearance of the bulky organic group, and the molecules are bonded by the condensation of SiOH, so that the densification proceeds. Thus, the surface layer portion of the porous interlayer insulating film 54 is densified with ozone. As described above, even when the porous interlayer insulating film 54 is irradiated with an electron beam, a dense layer 56 having a higher density than the porous interlayer insulating film 54 is formed on the surface layer portion of the porous interlayer insulating film 54. It is possible to form.

Further, the dense layer 56 may be formed on the surface layer portion of the porous interlayer insulating film 54 by irradiating the porous interlayer insulating film 54 with plasma generated using oxygen or carbon dioxide. When the porous interlayer insulating film 54 is irradiated with plasma generated using oxygen or carbon dioxide, the bulky organic groups introduced into the molecular structure of the porous interlayer insulating film 54 are oxidized, and SiOH is generated. The Then, SiOH each other was generated condensation, SiO ₂ is produced. The distance between the molecules is reduced by the disappearance of the bulky organic group, and the molecules are bonded by the condensation of SiOH, so that the densification proceeds. In this way, the surface layer portion of the porous interlayer insulating film 54 is densified by the plasma generated using oxygen or carbon dioxide. As described above, even when the porous interlayer insulating film 54 is irradiated with plasma generated using oxygen or carbon dioxide, the porous interlayer insulating film 54 is formed on the surface layer portion of the porous interlayer insulating film 54. It is possible to form the dense layer 56 with higher density.

  Thus, the dense layer 56 is formed on the surface layer portion of the porous interlayer insulating film 54. Since the dense layer 56 formed by densifying the surface layer portion of the porous interlayer insulating film 54 has a higher density than the porous interlayer insulating film 54, as described above, the porous interlayer insulating film 54 is formed. The etching rate is slower. Therefore, the dense layer 56 can function as an etching stopper film. In addition, the dense layer 56 formed by densifying the surface layer portion of the porous interlayer insulating film 54 can sufficiently function as an etching stopper film even when it is formed extremely thin. Therefore, according to the present embodiment, the parasitic capacitance between the wirings can be sufficiently reduced.

  Next, as shown in FIG. 5, a porous interlayer insulating film 58 is formed. The method for forming the porous interlayer insulating film 58 is the same as the method for forming the porous interlayer insulating film 54 described above, for example. The film thickness of the interlayer insulating film 58 is 160 nm, for example.

  Next, a dense layer 60 is formed on the surface layer portion of the porous interlayer insulating film 58 by performing a densification treatment for densifying the surface layer portion of the porous interlayer insulating film 58. The method for forming the dense layer 60 is, for example, the same as the method for forming the dense layer 56 described above.

  The thickness of the dense layer 60 is preferably 2 to 25 nm. This is because when the thickness of the dense layer 60 is 2 nm or less, the dense layer 60 is too thin to function sufficiently as a protective film. Moreover, when the thickness of the dense layer 60 is larger than 25 nm, the parasitic capacitance between the wirings becomes considerably large. Therefore, the thickness of the dense layer 60 is preferably 2 to 25 nm.

The density of the dense layer 60 is preferably 1.5 to 3.5 g / cm ³ . This is because when the density of the dense layer 60 is smaller than 1.5 g / cm ³ , the dense layer 60 cannot sufficiently function as a protective film. Further, when the dense layer 60 is larger than 3.5 g / cm ³ , the capacitance between the wirings becomes considerably large. Therefore, the density of the dense layer 60 is preferably 1.5 to 3.5 g / cm ³ .

  The conditions for forming the dense layer 60 are not limited to the above. What is necessary is just to set suitably the conditions at the time of forming the dense layer 60 so that the dense layer 60 of desired thickness and desired density may be obtained.

  Next, the interlayer insulating films 54, 58, etc. are baked to cure (cure) the interlayer insulating films 54, 58, etc. Conditions for curing the interlayer insulating films 54, 58, etc. are, for example, as follows. As a gas introduced into the curing furnace, for example, nitrogen gas is used. The flow rate of nitrogen gas is, for example, 10 liters / minute. The temperature in the curing furnace is 400 ° C. The firing time is 30 minutes. Thus, the interlayer insulating films 54, 58 and the like are cured.

  Next, a photoresist film 62 is formed on the entire surface by, eg, spin coating.

  Next, as shown in FIG. 6, an opening 64 is formed in the photoresist film 62 using a photolithography technique. The opening 64 is for forming a contact hole 66 reaching the wiring 50.

Next, the dense layer 60, the interlayer insulating film 58, the dense layer 56, the interlayer insulating film 54, and the insulating film 52 are etched using the photoresist film 62 as a mask. When etching is performed, etching is performed using fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials. The dense layer 60, the interlayer insulating film 58, the dense layer 56, the interlayer insulating film 54, and the insulating film 52 can be etched by appropriately changing the composition ratio of the etching gas, the pressure at the time of etching, and the like. When the selection ratio of the interlayer insulating films 54, 58, etc. to the photoresist film 62 is not sufficiently high, the photoresist film 62 is gradually etched when the interlayer insulating films 54, 58, etc. are etched, and the dense layer 60 The surface may be exposed. Since the dense layer formed by densifying the porous interlayer insulating film 58 has a slower etching rate than the porous interlayer insulating film 58, even when the photoresist film 62 is almost removed by etching. It will remain to some extent. Therefore, according to the present embodiment, the dense layer 60 formed in the upper layer portion of the porous interlayer insulating film 58 can function as a protective film (hard mask) that protects the porous interlayer insulating film 58. it can. In addition, the dense layers 56 and 60 formed by densifying the porous interlayer insulating films 54 and 58 can sufficiently function as an etching stopper film and a protective film even when formed extremely thin. . Therefore, according to the present invention, it is possible to sufficiently reduce the parasitic capacitance between the wirings. Thus, a contact hole 66 reaching the wiring 50 is formed. Thereafter, the photoresist film 62 is peeled off.

  Next, a photoresist film 68 is formed on the entire surface by, eg, spin coating.

  Next, as shown in FIG. 7, an opening 70 is formed in the photoresist film 68 using a photolithography technique. The opening 70 is for forming a second layer wiring (second metal wiring layer) 76a described later.

Next, the dense layer 60 and the interlayer insulating film 58 are etched using the photoresist film 68 as a mask and the dense layer 56 as an etching stopper. When etching is performed, etching is performed using fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials. Since the dense layer 56 formed by densifying the surface layer portion of the porous interlayer insulating film 54 has a slower etching rate than the porous interlayer insulating film 58, the dense layer 56 functions as an etching stopper. . The etching selection ratio of the interlayer insulating film 58 to the dense layer 56 is preferably 2 or more. This is because if the etching selectivity is too low, the dense layer 56 is considerably etched and the bottom surface of the groove becomes very rough. If the bottom surface of the groove is very rough, a good barrier film cannot be formed on the bottom surface of the groove. For this reason, the wiring material embedded in the trench diffuses to the outside through the barrier film. If the wiring material diffuses into the interlayer insulating film 58 through the barrier film, the wiring 76a is disconnected or the like.

  If the selection ratio of the interlayer insulating film 58 and the like to the photoresist film 68 is not sufficiently high, the photoresist film 68 is gradually etched when the interlayer insulating film 58 and the like are etched, and the surface of the dense layer 60 is exposed. There is also a case. Since the dense layer formed by densifying the surface layer portion of the porous interlayer insulating film 58 has a slower etching rate than the porous interlayer insulating film 58 as described above, the photoresist film 62 is hardly etched. Even if it has been removed, it will remain to some extent. Therefore, according to the present embodiment, the dense layer 60 formed in the upper layer portion of the porous interlayer insulating film 58 can function as a protective film (hard mask) that protects the porous interlayer insulating film 58. Thus, a groove 72 for embedding the wiring 76a is formed in the interlayer insulating film 58. The groove 72 is connected to the contact hole 66.

  Next, a barrier film (not shown) made of TaN with a thickness of 10 nm is formed on the entire surface by, eg, sputtering. The barrier film is for preventing Cu in the wiring 76a and the conductor plug 76b described later from diffusing. Next, a seed film (not shown) made of Cu with a thickness of 10 nm is formed on the entire surface by, eg, sputtering. The seed film functions as an electrode when the wiring 76a and the conductor plug 76b made of Cu are formed by electroplating. Thus, a laminated film 74 composed of the barrier film and the seed film is formed.

  Next, a Cu film 76 having a thickness of 1400 nm is formed by, for example, electroplating.

  Next, the Cu film 76 and the laminated film 74 are polished by CMP until the surface of the insulating film 60 is exposed. Thus, the conductor plug 76 b made of Cu is embedded in the contact hole 66, and the wiring 76 a made of Cu is embedded in the groove 72. The conductor plug 76b and the wiring 76a are integrally formed (see FIG. 8A). The manufacturing process in which the conductor plugs 76b and the wirings 76a are formed in this way is called a dual damascene method. Since the dense layer 60 formed by densifying the surface layer portion of the porous interlayer insulating film 58 has a relatively high density, the porous interlayer insulating film 58 is polished when the Cu film 76 is polished by the CMP method. It can also function as a protective film (barrier film) that prevents moisture and the like from reaching the surface.

  Next, as shown in FIG. 8B, an insulating film 78 made of a SiC: O: H film having a thickness of 30 nm is formed on the entire surface by, eg, plasma CVD. The method for forming the insulating film 78 is the same as the method for forming the insulating film 78 described above, for example. The insulating film 78 functions as a barrier film that prevents diffusion of moisture.

  Thereafter, the same process as described above is repeated as appropriate to form a third layer wiring (third metal wiring layer) (not shown).

  Thus, the semiconductor device according to the present embodiment is manufactured.

  As described above, according to this embodiment, a high-quality dense layer that can sufficiently function as an etching stopper film and a protective film can be formed extremely thin on the surface layer portion of the porous interlayer insulating film. It is possible to sufficiently reduce the parasitic capacitance.

[Second Embodiment]
A method for fabricating a semiconductor device according to the second embodiment of the present invention will be described with reference to FIGS. 9 to 12 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment. The same components as those of the semiconductor device manufacturing method according to the first embodiment shown in FIGS. 1 to 8 are denoted by the same reference numerals, and description thereof is omitted or simplified.

  In the manufacturing method of the semiconductor device according to the present embodiment, the dense layer 56 that can function as an etching stopper film is formed by densifying the surface layer portion of the porous interlayer insulating film 54, and the porous interlayer insulating film is formed. The protective film 80 for protecting 58 has a main feature in that it is formed by a vapor deposition method or a coating method.

  First, the process up to forming the dense layer 56 on the surface layer portion of the porous interlayer insulating film 54 is the same as the method for manufacturing the semiconductor device described above with reference to FIGS. . That is, the dense layer functioning as an etching stopper film is formed by densifying the surface layer portion of the porous interlayer insulating film 54.

  Next, as shown in FIG. 9, a porous interlayer insulating film 58 is formed in the same manner as the semiconductor device manufacturing method according to the first embodiment.

  Next, a highly dense insulating film 80 is formed on the porous interlayer insulating film 58 by vapor deposition, more specifically, plasma CVD. As the insulating film 80, for example, a SiC: O: H film is formed. The thickness of the insulating film 80 is, for example, 30 nm. The insulating film 80 made of a SiC: O: H film is formed as follows, for example.

  First, the semiconductor substrate 10 is introduced into the chamber of the plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 400 ° C., for example.

Next, SiC ₄ H ₁₂ is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using a carrier gas. At this time, when high-frequency power is applied between the plate electrodes, reactive gas plasma is generated. At this time, if the deposition rate is set to be relatively slow, a highly dense insulating film 80 can be formed. Specifically, for example, if the film formation conditions are set as follows, the dense insulating film 80 can be formed. The supply amount of the reactive gas is, for example, 1 mg / min. For example, CO ₂ is used as the carrier gas. The flow rate of the carrier gas is set to 100 sccm, for example. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). The time for generating the plasma by applying the high frequency power between the plate electrodes is, for example, 5 seconds.

  Thus, a highly dense insulating film 80 made of a SiC: O: H film is formed by the vapor phase growth method.

  The thickness of the dense insulating film 80 is preferably about 30 nm. This is because if the thickness of the insulating film 80 is too thin, it cannot function sufficiently as a protective film. Moreover, if the thickness of the insulating film 80 is too thick, the parasitic capacitance between the wirings becomes considerably large. Therefore, the thickness of the insulating film 80 is preferably about 30 nm.

The density of the dense insulating film 80 is preferably 1.5 to 3.5 g / cm ³ . This is because when the density of the insulating film 80 is smaller than 1.5 g / cm ³ , the insulating film 80 cannot sufficiently function as a protective film. Further, when the insulating film 80 is larger than 3.5 g / cm ³ , the capacitance between the wirings becomes considerably large. Therefore, the density of the insulating film 80 is preferably 1.5 to 3.5 g / cm ³ .

  Note that the material and the deposition method of the dense insulating film 80 are not limited to the above.

  For example, as shown below, the insulating film 80 made of a highly airtight silicon oxide film may be formed by a vapor deposition method.

  First, the semiconductor substrate 10 is placed in a chamber of a plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 400 ° C., for example.

Next, trimethylsilane is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using an inert gas as a carrier. At this time, when high-frequency power is applied between the plate electrodes, reactive gas plasma is generated. At this time, if the deposition rate is set relatively low, it is possible to form the insulating film 80 with high density. Specifically, for example, if the film formation conditions are set as follows, the dense insulating film 80 can be formed. The supply amount of the reactive gas is, for example, 1 mg / min. For example, CO ₂ is used as the carrier gas. The flow rate of the carrier gas is set to 100 sccm, for example. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). The time for generating the plasma by applying the high frequency power between the plate electrodes is, for example, 5 seconds.

When the insulating film 80 made of a silicon oxide film is formed under such conditions, the density of the insulating film 40 is about 2 g / cm ^3, for example. Here, the thickness of the insulating film 80 is, for example, 30 nm. Thus, a dense insulating film 80 is formed on the porous interlayer insulating film 58.

Further, as shown below, a highly dense insulating film (Carbon Doped SiO ₂ film) 80 made of a silicon oxide film doped with carbon may be formed by a vapor phase growth method.

  First, the semiconductor substrate 10 is placed in a chamber of a plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 400 ° C., for example.

  Next, hexamethyldisiloxane is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using an inert gas as a carrier. At this time, when high-frequency power is applied between the plate electrodes, reactive gas plasma is generated. At this time, if the deposition rate is set to be relatively slow, a highly dense insulating film 80 can be formed. Specifically, for example, if the film formation conditions are set as follows, the dense insulating film 80 can be formed. The supply amount of the reactive gas is, for example, 1 mg / min. The flow rate of the carrier gas is, for example, 500 sccm. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). The time for generating the plasma by applying the high frequency power between the plate electrodes is, for example, 5 seconds.

In this way, a highly dense insulating film (Carbon Doped SiO ₂ film) 80 made of a silicon oxide film doped with carbon may be formed by a vapor deposition method.

  Further, as shown below, a highly dense insulating film 80 made of a hydrogenated SiC film (SiC: H film) may be formed by a vapor phase growth method. As described above, the SiC: H film is a film formed by allowing H (hydrogen) to exist in the SiC film.

  First, the semiconductor substrate 10 is placed in a chamber of a plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 400 ° C., for example.

  Next, trimethylsilane is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using a carrier gas. At this time, when high-frequency power is applied between the plate electrodes, reactive gas plasma is generated. At this time, if the deposition rate is set to be relatively slow, a highly dense insulating film 80 can be formed. Specifically, for example, if the film formation conditions are set as follows, the dense insulating film 80 can be formed. The supply amount of the reactive gas is, for example, 1 mg / min. For example, nitrogen is used as the carrier gas. The flow rate of the carrier gas is, for example, 1000 sccm. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). The time for generating the plasma by applying the high frequency power between the plate electrodes is, for example, 5 seconds.

  As described above, the dense insulating film 80 made of the SiC: H film may be formed by a vapor phase growth method.

  Further, as shown below, a highly dense insulating film 80 made of a nitrided SiC film (SiC: N film) may be formed by a vapor deposition method. As described above, the SiC: N film is a film formed by causing N (nitrogen) to exist in the SiC film.

  First, the semiconductor substrate 10 is placed in a chamber of a plasma CVD apparatus. As the plasma CVD apparatus, for example, a parallel plate type plasma CVD apparatus is used.

  Next, the substrate temperature is set to 400 ° C., for example.

  Next, trimethylsilane is vaporized by a vaporizer to generate a reactive gas. Then, a reactive gas is introduced into the chamber using a carrier gas. At this time, when high-frequency power is applied between the plate electrodes, reactive gas plasma is generated. At this time, if the deposition rate is set to be relatively slow, a highly dense insulating film 80 can be formed. Specifically, for example, if the film formation conditions are set as follows, the dense insulating film 80 can be formed. The supply amount of the reactive gas is, for example, 1 mg / min. For example, ammonia is used as the carrier gas. The high frequency power applied between the plate electrodes is, for example, 13.56 MHz (200 W) and 100 kHz (200 W). The time for generating the plasma by applying the high frequency power between the plate electrodes is, for example, 5 seconds.

  As described above, the dense insulating film 80 made of a SiC: N film may be formed by a vapor deposition method.

  In addition, as shown below, a highly dense insulating film 80 may be formed by applying an organic SOG film.

  First, an insulating film material for forming an organic SOG film is prepared. As such an insulating film material, for example, a polymer obtained by using tetraethoxysilane and methyltriethoxysilane as raw materials and causing a hydrolysis reaction and a condensation reaction is used.

  Next, an insulating film material is applied to the entire surface by spin coating. The application conditions are, for example, 3000 rotations / minute and 30 seconds. Thereby, the insulating film 80 is formed on the porous interlayer insulating film 58.

  Next, heat treatment (soft bake) is performed. When performing the heat treatment, for example, a hot plate is used. The heat treatment temperature is set to 200 ° C., for example. The heat treatment time is, for example, 150 seconds.

  Thus, the insulating film 80 may be formed by applying an organic SOG film.

  Further, as shown below, an insulating film 80 with high density may be formed by applying an inorganic SOG film.

  First, an insulating film material for forming an inorganic SOG film is prepared. As such an insulating film material, for example, a polymer obtained by causing a hydrolysis reaction and a condensation reaction using tetraethoxysilane as a raw material is used.

  Next, an insulating film material is applied to the entire surface by spin coating. The application conditions are, for example, 3000 rotations / minute and 30 seconds. Thereby, the insulating film 80 is formed on the porous interlayer insulating film 58.

  Next, heat treatment (soft bake) is performed. When performing the heat treatment, for example, a hot plate is used. The heat treatment temperature is set to 200 ° C., for example. The heat treatment time is, for example, 150 seconds.

  In this way, the dense insulating film 80 may be formed by applying the inorganic SOG film.

  The subsequent manufacturing method of the semiconductor device is the same as the manufacturing method of the semiconductor device described above with reference to FIGS. 6 to 8B, and the description thereof will be omitted (see FIGS. 10 to 12B).

  As described above, the dense layer 56 that can function as an etching stopper film is formed by densifying the surface layer portion of the porous interlayer insulating film 54, and the protective film 80 that protects the porous interlayer insulating film 58. The film may be formed by a vapor deposition method or a coating method.

[Third Embodiment]
A method for fabricating a semiconductor device according to the third embodiment of the present invention will be described with reference to FIGS. 13 to 16 are process cross-sectional views illustrating the semiconductor device manufacturing method according to the present embodiment. The same components as those in the method of manufacturing the semiconductor device according to the first or second embodiment shown in FIGS. 1 to 12 are denoted by the same reference numerals, and description thereof is omitted or simplified.

  In the semiconductor device manufacturing method according to the present embodiment, the insulating film 82 that can function as an etching stopper film is formed by vapor deposition or coating, and the dense layer 60 that can function as a protective film is porous. The main feature is that the surface layer portion of the interlayer insulating film 58 is formed by densification treatment.

  First, the process up to the step of forming the insulating film 52 is the same as the method for manufacturing the semiconductor device described above with reference to FIGS.

  Next, as shown in FIG. 13A, a porous interlayer insulating film 54 is formed in the same manner as in the semiconductor device manufacturing method according to the first embodiment.

  Next, a highly dense insulating film 82 is formed on the porous interlayer insulating film 54 by vapor deposition or coating. A method for forming the insulating film 82 with high density is the same as the method for forming the insulating film 80 with high density, for example. Here, for example, a SiC: O: H film is formed as the insulating film 82. The thickness of the insulating film 82 is, for example, 30 nm.

  The subsequent manufacturing method of the semiconductor device is the same as the manufacturing method of the semiconductor device described above with reference to FIGS. 6 to 8B, and the description thereof will be omitted (see FIGS. 14 to 16B).

  As described above, the insulating film 82 that can function as an etching stopper film is formed by a vapor deposition method or a coating method, and the dense layer 60 that can function as a protective film is a surface layer of the porous interlayer insulating film 58. You may form by densifying a part.

[Fourth Embodiment]
A method for fabricating a semiconductor device according to the fourth embodiment of the present invention will be described with reference to FIGS. 17 to 20 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment. The same components as those in the semiconductor device manufacturing method according to the first to third embodiments shown in FIGS. 1 to 16 are denoted by the same reference numerals, and description thereof will be omitted or simplified.

  In the method of manufacturing the semiconductor device according to the present embodiment, the dense layer 56 is formed on the surface layer portion of the porous interlayer insulating film 54, the dense layer 60 is formed on the surface layer portion of the porous interlayer insulating film 58, and then the vapor phase The main feature is that an insulating film 84 is further formed by a growth method or a coating method, and then a contact hole 66, a groove 72, and the like are formed.

  First, the process up to forming the dense layer 60 on the surface layer portion of the porous interlayer insulating film 58 is the same as the method for manufacturing the semiconductor device described above with reference to FIGS. (See FIG. 17 (a)).

  Next, as shown in FIG. 17B, a highly dense insulating film 84 is formed on the porous interlayer insulating film 60 by vapor deposition or coating. The method for forming the insulating film 84 with high density is the same as the method for forming the insulating film 80 with high density, for example. Here, for example, a SiC: O: H film is formed as the insulating film 84. The thickness of the insulating film 84 is 30 nm, for example.

  Thus, a highly dense insulating film 84 is formed by a vapor deposition method, a coating method, or the like.

  Next, a photoresist film 62 is formed on the entire surface by, eg, spin coating.

  Next, an opening 64 is formed in the photoresist film 62 by using a photolithography technique (see FIG. 18). The opening 64 is for forming a contact hole 66 reaching the wiring 50.

Next, the insulating film 84, the dense layer 60, the interlayer insulating film 58, the dense layer 56, the interlayer insulating film 54, and the insulating film 52 are etched using the photoresist film 62 as a mask. When etching is performed, etching is performed using fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials. The insulating film 84, the dense layer 60, the interlayer insulating film 58, the dense layer 56, the interlayer insulating film 54, and the insulating film 52 can be etched by appropriately changing the composition ratio of the etching gas, the etching pressure, and the like. It is. When the selection ratio of the interlayer insulating films 54, 58, etc. to the photoresist film 62 is not sufficiently high, the photoresist film 62 is gradually etched when the interlayer insulating films 54, 58, etc. are etched. The surface may be exposed. The highly dense insulating film 84 has a slower etching rate than the porous interlayer insulating films 54 and 58, and therefore remains to some extent even when the photoresist film 62 is almost removed by etching. Therefore, the insulating film 84 functions as a protective film (hard mask) when the contact hole 66 is formed. Thus, a contact hole 66 reaching the wiring 50 is formed. Thereafter, the photoresist film 62 is peeled off.

  Next, a photoresist film 68 is formed on the entire surface by, eg, spin coating.

  Next, an opening 70 is formed in the photoresist film 68 using a photolithography technique (see FIG. 19). The opening 70 is for forming a second layer wiring (second metal wiring layer) 76a.

Next, the dense layer 60 and the interlayer insulating film 58 are etched using the photoresist film 68 as a mask and the dense layer 56 as an etching stopper. When etching is performed, etching is performed using fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials. In the step of forming the contact hole 66 (see FIG. 18), if the selection ratio of the interlayer insulating films 54, 58, etc. to the photoresist film 62 is not sufficiently high, the interlayer insulating films 54, 58, etc. are etched. In some cases, the photoresist film 62 is gradually etched, and even the insulating film 84 is almost etched. If the selection ratio of the interlayer insulating film 58 and the like to the photoresist film 68 is not sufficiently high, the photoresist film 68 is gradually etched when the interlayer insulating film 58 and the like are etched, and the surface of the dense layer 60 is It may be exposed. As described above, the dense layer formed by densifying the porous interlayer insulating film 58 has a slower etching rate than the porous interlayer insulating film 58, so that the photoresist film 62 is almost removed by etching. Even if you do, it will remain to some extent. Therefore, according to the present embodiment, the dense layer 60 formed in the upper layer portion of the porous interlayer insulating film 58 can function as a protective film (hard mask) that protects the porous interlayer insulating film 58. it can. Thus, a groove 72 for embedding the wiring 76a is formed in the interlayer insulating film 58. The groove 72 is connected to the contact hole 66.

  The subsequent manufacturing method of the semiconductor device is the same as the manufacturing method of the semiconductor device described above with reference to FIGS. 8A and 8B, and thus the description thereof will be omitted (FIGS. 20A and 20B). 20 (b)).

  Thus, the semiconductor device according to the present embodiment is manufactured.

  As described above, after forming the dense layer 56 on the surface layer portion of the porous interlayer insulating film 54 and forming the dense layer 60 on the surface layer portion of the porous interlayer insulating film 58, the insulating film 84 is formed by vapor phase growth. Further, after that, contact holes 66 and grooves 72 may be formed. According to the present embodiment, the insulating film 84 functions as a hard mask in the step of forming the contact hole 66, and the dense layer 60 functions as a hard mask in the step of forming the groove 72. For this reason, according to this embodiment, the groove | channel 72 etc. for embedding wiring 76a etc. can be formed reliably. Therefore, according to the present embodiment, it is possible to improve the yield when manufacturing the semiconductor device.

[Fifth Embodiment]
A method for fabricating a semiconductor device according to the fifth embodiment of the present invention will be explained with reference to FIGS. 21 to 25 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment. The same components as those in the semiconductor device manufacturing method according to the first to fourth embodiments shown in FIGS. 1 to 20 are denoted by the same reference numerals, and description thereof will be omitted or simplified.

  The manufacturing method of the semiconductor device according to the present embodiment uses an insulating film 82 formed by a vapor deposition method or a coating method as an etching stopper film to be formed on the porous interlayer insulating film 54, and uses the porous interlayer insulating film. The main feature is that after the dense layer 60 is formed on the surface layer portion 58, an insulating film 84 is further formed by a vapor phase growth method or a coating method, and then a contact hole 66, a groove 72, and the like are formed.

  First, the steps until the insulating film 52 is formed are the same as those in the method for manufacturing the semiconductor device described above with reference to FIGS.

  Next, a porous interlayer insulating film 54 is formed in the same manner as in the semiconductor device manufacturing method according to the first embodiment.

  Next, a highly dense insulating film 82 is formed on the porous interlayer insulating film 54 by vapor deposition or coating. A method for forming the insulating film 82 with high density is the same as the method for forming the insulating film 80 with high density, for example. Here, for example, a SiC: O: H film is formed as the insulating film 82. The thickness of the insulating film 82 is, for example, 30 nm.

  The subsequent manufacturing method of the semiconductor device is the same as the manufacturing method of the semiconductor device described above with reference to FIGS. 17A to 20B, and the description thereof will be omitted (FIGS. 22A to 25). (See (b)).

  As described above, as the etching stopper film formed on the porous interlayer insulating film 54, the insulating film 82 formed by a vapor deposition method or a coating method is used, and a dense layer is formed on the surface layer portion of the porous interlayer insulating film 58. After forming 60, an insulating film 84 may be further formed by a vapor deposition method or a coating method, and then a contact hole 66, a groove 72, or the like may be formed.

[Modified Embodiment]
The present invention is not limited to the above embodiment, and various modifications can be made.

  For example, the method for forming the porous interlayer insulating film is not limited to the above. The porous interlayer insulating film may be formed by any other forming method. Further, the material of the porous insulating film is not limited to the above.

  Moreover, the formation method of a dense layer is not limited to the above. The dense layer may be formed by any other forming method. Further, the dense material is not limited to the above.

  Further, the method for forming a dense insulating film is not limited to the above. A highly dense insulating film may be formed by any other formation method. Further, the material of the dense insulating film is not limited to the above.

[Example 1]
FIG. 26 is a process cross-sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment.

  First, an insulating film material was produced as follows. That is, 20.8 g (0.1 mol) of tetraethoxysilane, 17.8 g (0.1 mol) of methyltriethoxysilane, 23.6 g (0.1 mol) of glycidoxypropyltrimethoxysilane, and 39. 6 g was placed in a 200 ml reaction vessel, and 16.2 g of a 1% tetrabutylammonium hydroxide aqueous solution was added dropwise over 10 minutes. After completion of the dropping, an aging reaction was performed for 2 hours. Next, 5 g of magnesium sulfate was added to remove excess water. Next, using a rotary evaporator, ethanol produced during the aging reaction was removed until the reaction solution reached 50 ml. 20 ml of methyl isobutyl ketone was added to the reaction solution thus obtained to produce an insulating film material (porous silica precursor).

  Next, an insulating film material was applied onto the silicon wafer (semiconductor substrate) 10 by spin coating. The coating conditions were 3000 rpm / 30 seconds.

  Next, a porous interlayer insulating film 54 was formed by performing heat treatment (soft baking) at 200 ° C. using a hot plate (see FIG. 26A).

Next, as shown in FIG. 26B, the excimer lamp was used to irradiate the porous interlayer insulating film 54 with ultraviolet rays. The wavelength of the excimer lamp was set to 172 nm, for example. Ultraviolet irradiation was performed in the atmosphere. The pressure when irradiating with ultraviolet rays was normal pressure. The time for irradiation with ultraviolet rays was 60 seconds. When the densification process using ozone was performed under such conditions, the dense layer 56 was formed on the surface layer portion of the porous interlayer insulating film 54. The dense layer 56 thus formed was measured by a spectroscopic ellipso method. As a result, the film thickness of the dense layer 56 was 10 nm. The refractive index of the dense layer 56 was 1.44. The film thickness of the porous interlayer insulating film 54 was 160 nm. The refractive index of the porous interlayer insulating film 54 was 1.29. Moreover, when the density was measured using the X-ray-diffraction apparatus, the density of the dense layer 56 was 2.1 g / cm < ³ >. The density of the porous interlayer insulating film 54 was 1.05 g / cm ³ .

  Next, an insulating film material was applied on the dense layer 56 by spin coating. The coating conditions were 3000 rpm / 30 seconds.

  Next, a porous interlayer insulating film 58 was formed by performing heat treatment (soft baking) at 200 ° C. using a hot plate (see FIG. 26C).

  Next, the interlayer insulating films 54, 58, etc. were baked to cure (cure) the interlayer insulating films 54, 58, etc. Nitrogen gas was used as the gas introduced into the curing furnace. The flow rate of nitrogen gas was, for example, 10 liters / minute. The temperature in the curing furnace was 400 ° C. The firing time was 30 minutes. The relative dielectric constant of the laminate composed of the interlayer insulating film 54, the dense layer 56, and the interlayer insulating film 58 was measured and found to be 2.3.

Next, a photoresist film (not shown) was formed on the entire surface by spin coating. Next, an opening (not shown) was formed in the photoresist film using a photolithography technique. Next, the porous interlayer insulating film 58 was etched using the photoresist film as a mask and the dense layer 56 as an etching stopper. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, a trench 72 for embedding wiring (not shown) was formed in the insulating film 58 (see FIG. 26D). When the roughness of the bottom surface of the groove 72 was measured using an atomic force microscope (AFM), it was as small as 3 nm.

[Example 2]
27 and 28 are process cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment.

  First, in the same manner as in Example 1, an insulating film material was applied on the silicon wafer 10.

  Next, a porous interlayer insulating film 54 was formed by performing heat treatment (soft baking) in the same manner as in Example 1 (see FIG. 27A).

  Next, in the same manner as in Example 1, the dense layer 56 was formed on the surface layer portion of the porous interlayer insulating film 54 by irradiating ultraviolet rays and performing a densification treatment using ozone (FIG. 27B). )reference).

  Next, in the same manner as in Example 1, an insulating film material was applied on the dense layer 56 by spin coating.

  Next, a porous interlayer insulating film 58 was formed by performing heat treatment (soft baking) at 200 ° C. in the same manner as in Example 1 (see FIG. 27C).

  Next, as shown in FIG. 27D, the excimer lamp was used to irradiate the porous interlayer insulating film 58 with ultraviolet rays. The wavelength of the excimer lamp was set to 172 nm, for example. Ultraviolet irradiation was performed in the atmosphere. The pressure when irradiating with ultraviolet rays was normal pressure. The time for irradiation with ultraviolet rays was 60 seconds. When the densification process using ozone was performed under such conditions, the dense layer 60 was formed on the surface layer portion of the porous interlayer insulating film 58.

  Next, the interlayer insulating films 54, 58, etc. were baked to cure (cure) the interlayer insulating films 54, 58, etc. Nitrogen gas was used as the gas introduced into the curing furnace. The flow rate of nitrogen gas was, for example, 10 liters / minute. The temperature in the curing furnace was 400 ° C. The firing time was 30 minutes. The relative dielectric constant of the laminate composed of the interlayer insulating film 54, the dense layer 56, and the interlayer insulating film 58 was measured and found to be 2.35.

Next, a photoresist film (not shown) was formed on the entire surface by spin coating. Next, an opening (not shown) was formed in the photoresist film using a photolithography technique. Next, the dense layer 60 and the porous interlayer insulating film 58 were etched using the photoresist film as a mask and the dense layer 56 as an etching stopper. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, a trench 72 for embedding wiring (not shown) was formed in the insulating film 58 (see FIG. 28). When the roughness of the bottom surface of the groove 72 was measured using an atomic force microscope (AFM), it was as small as 5 nm.

[Comparative Example 1]
29 is a process cross-sectional view illustrating the method for manufacturing the semiconductor device according to Comparative Example 1. FIG.

  First, in the same manner as in Example 1, an insulating film material was applied on the silicon wafer 10.

  Next, a porous interlayer insulating film 54 was formed by performing heat treatment (soft baking) at 200 ° C. in the same manner as in Example 1 (see FIG. 29A). The porous interlayer insulating film 54 thus formed was measured by a spectroscopic ellipso method. As a result, the thickness of the porous interlayer insulating film 54 was 165 nm. The refractive index of the porous interlayer insulating film 54 was 1.29.

  Next, an insulating film material was applied on the porous interlayer insulating film 54 by spin coating. The coating conditions were 3000 rpm / 30 seconds.

  Next, a porous interlayer insulating film 58 was formed by performing heat treatment (soft baking) at 200 ° C. using a hot plate (see FIG. 29B).

  Next, the interlayer insulating films 54 and 58 were baked to cure (cure) the interlayer insulating films 54 and 58. Nitrogen gas was used as the gas introduced into the curing furnace. The flow rate of nitrogen gas was, for example, 10 liters / minute. The temperature in the curing furnace was 400 ° C. The firing time was 30 minutes. The relative dielectric constant of the laminate composed of the interlayer insulating film 54 and the interlayer insulating film 58 was measured and found to be 2.3.

Next, a photoresist film (not shown) was formed on the entire surface by spin coating. Next, an opening (not shown) was formed in the photoresist film using a photolithography technique. Next, using the photoresist film as a mask, the porous interlayer insulating film 58 was etched without forming an etching stopper film. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, a trench 72 for embedding wiring (not shown) was formed in the insulating film 58 (see FIG. 29C). When the roughness of the bottom surface of the groove 72 was measured using an atomic force microscope (AFM), it was as large as 12 nm. From this, it can be seen that when the groove 72 is formed by controlling the etching time without using the etching stopper film, the bottom surface of the groove 72 becomes very rough.

[Example 3]
First, the element isolation film 12 was formed on the semiconductor substrate 10 by the LOCOS method. Next, a gate electrode 18 was formed on the element region 14 via a gate insulating film 16. Next, a sidewall insulating film 20 was formed on the side surface of the gate electrode 18. Next, dopant impurities were introduced into the semiconductor substrate 10 using the sidewall insulating film 20 and the gate electrode 18 as a mask, thereby forming the source / drain diffusion layers 22 in the semiconductor substrate 10 on both sides of the gate electrode 18. Thus, the transistor 24 having the gate electrode 18 and the source / drain diffusion layer 22 was formed (see FIG. 1).

  Next, an interlayer insulating film 26 was formed on the entire surface by CVD. Next, a stopper film 28 was formed on the interlayer insulating film 26. Next, a contact hole 30 reaching the source / drain diffusion layer 22 was formed by using a photolithography technique (see FIG. 1B).

  Next, an adhesion layer 32 made of a TiN film having a thickness of 50 nm was formed on the entire surface by sputtering. Next, a tungsten film 34 was formed on the entire surface by CVD. Next, the adhesion layer 32 and the tungsten film 34 were polished by, for example, a CMP method until the surface of the stopper film was exposed. Thus, the conductor plug 34 made of tungsten was buried in the contact hole 30 (see FIG. 1C).

  Next, an insulating film 36 made of a SiC: O: H film having a thickness of 30 nm was formed on the entire surface by plasma CVD. Next, a porous interlayer insulating film 38 was formed on the entire surface. The film thickness of the porous interlayer insulating film 38 was 160 nm. Next, an insulating film 40 made of a 30 nm-thickness silicon oxide film was formed on the entire surface by plasma CVD (see FIG. 2A).

  Next, a photoresist film 42 was formed on the entire surface by spin coating. Next, an opening 44 for forming the first layer wiring 50 was formed in the photoresist film using a photolithography technique. The openings 44 were formed so that the wiring width was 100 nm and the wiring interval was 100 nm (see FIG. 2B).

Next, the insulating film 40, the interlayer insulating film 38, and the insulating film 36 were etched using the photoresist film 42 as a mask. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, the trench 46 for embedding the wiring 50 was formed in the insulating film 40, the interlayer insulating film 38, and the insulating film 36 (see FIG. 3A). Thereafter, the photoresist film 42 was peeled off.

  Next, a barrier film made of TaN having a thickness of 10 nm was formed on the entire surface by sputtering. Next, a seed film made of Cu having a thickness of 10 nm was formed on the entire surface by sputtering. Thus, a laminated film 48 composed of the barrier film and the seed film was formed. Next, a Cu film 50 having a thickness of 600 nm was formed by electroplating. Next, the Cu film 50 and the laminated film 48 were polished by CMP until the surface of the insulating film 40 was exposed. Thus, the wiring 50 made of Cu was embedded in the groove 46. Next, an insulating film 52 made of a SiC: O: H film having a thickness of 30 nm was formed on the entire surface by plasma CVD (see FIG. 3B).

  Next, in the same manner as in Example 1, a porous interlayer insulating film 54 was formed. The film thickness of the interlayer insulating film 54 was 180 nm (see FIG. 4A).

  Next, in the same manner as in Example 1, the dense layer 56 was formed on the surface layer portion of the interlayer insulating film 54 by irradiating ultraviolet rays and performing a densification treatment using ozone (see FIG. 4B). .

  Next, in the same manner as in Example 1, a porous interlayer insulating film 58 was formed. The film thickness of the porous interlayer insulating film 58 is, for example, 160 nm.

  Next, in the same manner as in Example 2, the dense layer 60 was formed on the surface layer portion of the interlayer insulating film 58 by irradiating ultraviolet rays and performing a densification treatment using ozone (see FIG. 17A). .

Next, an insulating film 84 made of a SiC: O: H film was formed on the insulating film 86 by plasma CVD (see FIG. 17B). The film thickness of the insulating film 84 was 30 nm. As a gas introduced into the deposition chamber, SiC ₄ H ₁₂ gas and CO ₂ gas were used.

  Next, in the same manner as in Example 2, the interlayer insulating films 54, 58, etc. were baked to cure (cure) the interlayer insulating films 54, 58, etc.

Next, a photoresist film 62 was formed on the entire surface by spin coating. Next, an opening 64 for forming the contact hole 66 was formed in the photoresist film 62 by using a photolithography technique. Next, the insulating film 60, the interlayer insulating film 58, the insulating film 56, the interlayer insulating film 54, and the insulating film 52 were etched using the photoresist film 62 as a mask. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. The insulating film 60, the interlayer insulating film 58, the insulating film 56, the interlayer insulating film 54, and the insulating film 52 were etched by appropriately changing the composition ratio of the etching gas, the pressure at the time of etching, and the like. Thus, a contact hole 66 reaching the wiring 50 was formed (see FIG. 18). Thereafter, the photoresist film was peeled off.

Next, a photoresist film 68 was formed on the entire surface by spin coating. Next, an opening 70 for forming the second-layer wiring 76a was formed in the photoresist film 68 by using a photolithography technique. Next, the insulating film 60 and the interlayer insulating film 58 were etched using the photoresist film 68 as a mask and the dense layer 56 as an etching stopper. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, a trench 72 for embedding the wiring 76a was formed in the insulating film 60, the interlayer insulating film 58, and the insulating film 56 (see FIG. 19).

  Next, a barrier film made of TaN having a thickness of 10 nm was formed on the entire surface by sputtering. Next, a seed film made of Cu having a thickness of 10 nm was formed on the entire surface by sputtering. Thus, a laminated film 74 composed of the barrier film and the seed film was formed. Next, a Cu film 76 having a thickness of 1400 nm was formed by electroplating. Next, the Cu film 76 and the laminated film 74 were polished by CMP until the surface of the insulating film 60 was exposed. Thus, the conductor plug 76b made of Cu was buried in the contact hole 66, and the wiring 76a made of Cu was buried in the groove 72 (see FIG. 20A).

  Next, an insulating film 78 made of a SiC: O: H film having a thickness of 30 nm was formed on the entire surface by plasma CVD (see FIG. 20B). Thereafter, the third layer wiring was formed by repeating the same steps as described above as appropriate.

  With respect to the semiconductor device thus formed, wiring and conductor plugs were formed so that 1 million conductor plugs were electrically connected in series, and the yield was measured. As a result, the yield was 90%.

  The effective relative dielectric constant between the wirings was calculated to be 2.5. The effective relative dielectric constant is a relative dielectric constant measured in a state where not only the porous interlayer insulating film but also other insulating films exist around the wiring. The effective relative dielectric constant is not limited to porous interlayer insulation films with a low relative dielectric constant, because an insulating film with a relatively high relative dielectric constant is measured around the wiring. The value is larger than the relative dielectric constant of the interlayer insulating film.

  Further, when the resistance of the wiring was measured after being allowed to stand at 200 ° C. for 3000 hours, no increase in resistance was confirmed.

[Example 4]
First, in the same manner as in Example 3, the element isolation film 12 was formed on the semiconductor substrate 10 by the LOCOS method. Next, similarly to Example 3, a gate electrode 18 was formed on the element region 14 with a gate insulating film 16 interposed therebetween. Next, as in Example 3, sidewall insulating films 20 were formed on the side surfaces of the gate electrode 18. Next, as in the third embodiment, dopant impurities are introduced into the semiconductor substrate 10 using the sidewall insulating film 20 and the gate electrode 18 as a mask, so that source / drain diffusion is performed in the semiconductor substrate 10 on both sides of the gate electrode 18. Layer 22 was formed. Thus, the transistor 24 having the gate electrode 18 and the source / drain diffusion layer 22 was formed (see FIG. 1).

  Next, in the same manner as in Example 3, an interlayer insulating film 26 was formed on the entire surface by CVD. Next, as in Example 3, a stopper film 28 was formed on the interlayer insulating film 26. Next, in the same manner as in Example 3, a contact hole 30 reaching the source / drain diffusion layer 22 was formed by using a photolithography technique (see FIG. 1B).

  Next, as in Example 3, an adhesion layer 32 made of a TiN film having a thickness of 50 nm was formed on the entire surface by sputtering. Next, as in Example 3, a tungsten film 34 was formed on the entire surface by CVD. Next, as in Example 3, the adhesion layer 32 and the tungsten film 34 were polished by CMP, for example, until the surface of the stopper film was exposed. Thus, the conductor plug 34 made of tungsten was buried in the contact hole 30 (see FIG. 1C).

  Next, as in Example 3, an insulating film 36 made of a SiC: O: H film having a thickness of 30 nm was formed on the entire surface by plasma CVD. Next, as in Example 3, a porous interlayer insulating film 38 was formed on the entire surface. The film thickness of the porous interlayer insulating film 38 was 160 nm. Next, as in Example 3, an insulating film 40 made of a 30 nm-thickness silicon oxide film was formed on the entire surface by plasma CVD (see FIG. 2A).

  Next, similarly to Example 3, a photoresist film 42 was formed on the entire surface by spin coating. Next, as in Example 3, the opening 44 for forming the first-layer wiring 50 was formed in the photoresist film using the photolithography technique. The openings 44 were formed so that the wiring width was 100 nm and the wiring interval was 100 nm (see FIG. 2B).

Next, as in Example 3, the insulating film 40, the interlayer insulating film 38, and the insulating film 36 were etched using the photoresist film 42 as a mask. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, the trench 46 for embedding the wiring 50 was formed in the insulating film 40, the interlayer insulating film 38, and the insulating film 36 (see FIG. 3A). Thereafter, the photoresist film 42 was peeled off in the same manner as in Example 3.

  Next, similarly to Example 3, a barrier film made of TaN having a thickness of 10 nm was formed on the entire surface by sputtering. Next, as in Example 3, a seed film made of Cu having a thickness of 10 nm was formed on the entire surface by sputtering. Thus, a laminated film 48 composed of the barrier film and the seed film was formed. Next, as in Example 3, a Cu film 50 having a thickness of 600 nm was formed by electroplating. Next, similarly to Example 3, the Cu film 50 and the laminated film 48 were polished by CMP until the surface of the insulating film 40 was exposed. Thus, the wiring 50 made of Cu was embedded in the groove 46. Next, as in Example 3, an insulating film 52 made of a SiC: O: H film having a thickness of 30 nm was formed on the entire surface by plasma CVD (see FIG. 3B).

  Next, in the same manner as in Example 1, a porous interlayer insulating film 54 was formed. The film thickness of the interlayer insulating film 54 was 180 nm (see FIG. 21A).

Next, an insulating film 82 made of a SiC: O: H film was formed on the porous interlayer insulating film 54 by plasma CVD (see FIG. 22A). The film thickness of the insulating film 82 is, for example, 30 nm. As a gas introduced into the deposition chamber, SiC ₄ H ₁₂ gas and CO ₂ gas were used.

  Next, in the same manner as in Example 1, a porous interlayer insulating film 58 was formed. The film thickness of the porous interlayer insulating film 58 is, for example, 160 nm.

  Next, in the same manner as in Example 2, ozone was generated by irradiating ultraviolet rays, so that densification treatment was performed using ozone to form a dense layer 60 on the surface layer portion of the interlayer insulating film 58 (FIG. 22). (See (a)).

  Next, in the same manner as in Example 2, the interlayer insulating films 54, 58, etc. were baked to cure (cure) the interlayer insulating films 54, 58, etc.

Next, an insulating film 84 made of a SiC: O: H film was formed on the insulating film 86 by plasma CVD (see FIG. 22B). The film thickness of the insulating film 84 was 30 nm. As a gas introduced into the deposition chamber, SiC ₄ H ₁₂ gas and CO ₂ gas were used.

Next, a photoresist film 62 was formed on the entire surface by spin coating. Next, an opening 64 for forming the contact hole 66 was formed in the photoresist film 62 by using a photolithography technique. Next, the insulating film 84, the insulating film 60, the interlayer insulating film 58, the insulating film 82, the interlayer insulating film 54, and the insulating film 52 were etched using the photoresist film 62 as a mask. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. The insulating film 60, the interlayer insulating film 58, the insulating film 82, the interlayer insulating film 54, and the insulating film 52 were etched by appropriately changing the composition ratio of the etching gas, the pressure at the time of etching, and the like. Thus, a contact hole 66 reaching the wiring 50 was formed (see FIG. 23). Thereafter, the photoresist film was peeled off.

Next, a photoresist film 68 was formed on the entire surface by spin coating. Next, an opening 70 for forming the second-layer wiring 76a was formed in the photoresist film 68 by using a photolithography technique. Next, the insulating film 60 and the interlayer insulating film 58 were etched using the photoresist film 68 as a mask and the dense layer 82 as an etching stopper. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, a trench 72 for embedding the wiring 76a was formed in the insulating film 60 and the interlayer insulating film 58 (see FIG. 24).

  Next, a barrier film made of TaN having a thickness of 10 nm was formed on the entire surface by sputtering. Next, a seed film made of Cu having a thickness of 10 nm was formed on the entire surface by sputtering. Thus, a laminated film 74 composed of the barrier film and the seed film was formed. Next, a Cu film 76 having a thickness of 1400 nm was formed by electroplating. Next, the Cu film 76 and the laminated film 74 were polished by CMP until the surface of the insulating film 60 was exposed. Thus, the conductor plug 76b made of Cu was buried in the contact hole 66, and the wiring 76a made of Cu was buried in the groove 72 (see FIG. 25A).

  Next, an insulating film 78 made of a SiC: O: H film having a thickness of 30 nm was formed on the entire surface by plasma CVD (see FIG. 25B). Thereafter, the third layer wiring was formed by repeating the same steps as described above as appropriate.

  With respect to the semiconductor device thus formed, wiring and conductor plugs were formed so that 1 million conductor plugs were electrically connected in series, and the yield was measured. The yield was 92%. The effective relative dielectric constant between the wirings was calculated to be 2.55. Further, when the resistance of the wiring was measured after being allowed to stand at 200 ° C. for 3000 hours, no increase in resistance was confirmed.

[Comparative Example 2]
30 to 38 are process cross-sectional views illustrating a method of manufacturing a semiconductor device according to Comparative Example 2.

  First, in the same manner as in Example 3, the transistor 24 is formed (see FIG. 30A), the interlayer insulating film 26 and the stopper film 28 are formed (see FIG. 30B), and then the contact hole 30 is formed. A conductor plug 34 was embedded therein (see FIG. 30C).

  Next, in the same manner as in Example 3, an insulating film 36 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD, and then a porous interlayer insulating film 38 was formed. Next, an insulating film 40 made of a 30 nm-thickness silicon oxide film was formed on the entire surface by plasma CVD (see FIG. 31A).

  Next, in the same manner as in Example 3, a photoresist film 42 was formed, and an opening 44 for forming the first-layer wiring 50 was formed in the photoresist film 42 (see FIG. 31B). .

  Next, in the same manner as in Example 3, grooves 46 were formed in the insulating film 40, the porous interlayer insulating film 38, and the insulating film 36 (see FIG. 32A).

  Next, in the same manner as in Example 3, the wiring 50 was embedded in the insulating film 40, the interlayer insulating film 38, and the insulating film 36. Next, an insulating film 52 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD as in Example 3 (see FIG. 32B).

  Next, a porous interlayer insulating film 54 was formed in the same manner as in Example 3 (see FIG. 33A).

  Next, a porous interlayer insulating film 58 was formed without forming a dense layer on the surface layer portion of the porous interlayer insulating film 54. The method for forming the porous interlayer insulating film 58 was the same as that in Example 3 (see FIG. 33B).

  Next, in the same manner as in Example 3, the interlayer insulating films 54, 58, etc. were baked to cure (cure) the interlayer insulating films 54, 58, etc.

  Next, an insulating film 86 made of a 30 nm-thickness silicon oxide film was formed on the entire surface by plasma CVD (see FIG. 34).

  Next, a contact hole 66 reaching the wiring 50 was formed in the same manner as in Example 3 (see FIG. 35).

Next, a photoresist film 68 was formed on the entire surface by spin coating. Next, an opening 70 for forming the second-layer wiring 76a was formed in the photoresist film 68 by using a photolithography technique. Next, the insulating film 86 and the interlayer insulating film 58 were etched using the photoresist film 68 as a mask. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, the trench 72 for embedding the wiring 76a was formed in the insulating film 86 and the interlayer insulating film 58. The depth of the groove 72 was set by controlling the etching time (see FIG. 36).

  Next, in the same manner as in Example 3, a wiring 76a was embedded in the groove 72, and a conductor plug 76b was embedded in the contact hole 66 (see FIG. 37).

  Next, in the same manner as in Example 3, an insulating film 78 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD (see FIG. 38). Thereafter, the third layer wiring was formed by repeating the same steps as described above as appropriate.

  With respect to the semiconductor device thus formed, wiring and conductor plugs were formed so that 1 million conductor plugs were electrically connected in series, and the yield was measured. As a result, the yield was as low as 75%. Moreover, when the effective relative dielectric constant between wirings was calculated, it was as large as 2.9. Further, when the resistance of the wiring was measured after being left at 200 ° C. for 3000 hours, an increase in resistance was confirmed. The reason why the resistance of the wiring 76a is increased is that the bottom surface of the groove 72 is rough, so that a high-quality barrier film 74 is not formed on the bottom surface of the groove 72, and the material of the wiring 76a passes through the barrier film 74, This is thought to be due to the fact that it has diffused into 58.

[Comparative Example 3]
39 to 43 are process cross-sectional views illustrating a method of manufacturing a semiconductor device according to Comparative Example 3.

  First, as in Comparative Example 2, the transistor 24 is formed (see FIG. 30A), the interlayer insulating film 26 and the stopper film 28 are formed (see FIG. 30B), and then the contact hole 30 is formed. A conductor plug 34 was embedded therein (see FIG. 30C).

  Next, as in Comparative Example 2, an insulating film 36 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD, and then a porous interlayer insulating film 38 was formed. Next, an insulating film 40 made of a 30 nm-thickness silicon oxide film was formed on the entire surface by plasma CVD (see FIG. 31A).

  Next, as in Comparative Example 2, a photoresist film 42 was formed, and an opening 44 for forming the first-layer wiring 50 was formed in the photoresist film 42 (see FIG. 31B). .

  Next, in the same manner as in Comparative Example 2, grooves 46 were formed in the insulating film 40, the porous interlayer insulating film 38, and the insulating film 36 (see FIG. 32A).

  Next, in the same manner as in Comparative Example 2, the wiring 50 was embedded in the insulating film 40, the interlayer insulating film 38, and the insulating film 36. Next, as in Comparative Example 2, an insulating film 52 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD (see FIG. 32B).

  Next, a porous interlayer insulating film 54 was formed in the same manner as in Comparative Example 2 (see FIG. 39A).

Next, an insulating film 82 made of a SiC: O: H film was formed on the porous interlayer insulating film 54 by plasma CVD (see FIG. 38B). The film thickness of the insulating film 82 is, for example, 30 nm. As a gas introduced into the deposition chamber, SiC ₄ H ₁₂ gas and CO ₂ gas were used.

  Next, a porous interlayer insulating film 58 was formed on the entire surface. The method for forming the porous interlayer insulating film 58 was the same as in Comparative Example 2 (see FIG. 40A).

  Next, in the same manner as in Comparative Example 2, the interlayer insulating films 54, 58, etc. were baked to cure (cure) the interlayer insulating films 54, 58, etc.

  Next, in the same manner as in Comparative Example 2, an insulating film 86 made of a silicon oxide film was formed on the porous interlayer insulating film 58. The film thickness of the insulating film 86 was 30 nm (see FIG. 40B).

Next, an insulating film 84 made of a SiC: O: H film was formed on the insulating film 86 by plasma CVD. The film thickness of the insulating film 84 was 30 nm. As a gas introduced into the deposition chamber, SiC ₄ H ₁₂ gas and CO ₂ gas were used.

  Next, in the same manner as in Comparative Example 2, a contact hole 66 reaching the wiring 50 was formed (see FIG. 41).

Next, a photoresist film 68 was formed on the entire surface by spin coating. Next, an opening 70 for forming the second-layer wiring 76a was formed in the photoresist film 68 by using a photolithography technique. Next, the insulating film 84, the insulating film 86, and the interlayer insulating film 58 were etched using the photoresist film 68 as a mask and the insulating film 82 as an etching stopper. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, a trench 72 for embedding the wiring 76a was formed in the insulating films 84 and 86 and the interlayer insulating film 58 (see FIG. 42).

  Next, in the same manner as in Comparative Example 2, a wiring 76a was embedded in the groove 72, and a conductor plug 76b was embedded in the contact hole 66 (see FIG. 43A).

  Next, as in Comparative Example 2, an insulating film 78 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD (see FIG. 43B). Thereafter, the third layer wiring was formed by repeating the same steps as described above as appropriate.

  With respect to the semiconductor device thus formed, wiring and conductor plugs were formed so that 1 million conductor plugs were electrically connected in series, and the yield was measured. As a result, the yield was as high as 96%. Moreover, when the effective dielectric constant between wirings was calculated, it was as large as 2.86. It is considered that the effective dielectric constant between the wirings is increased due to the influence of the thick insulating films 82, 84 and 86 functioning as an etching stopper film and a protective film. Further, when the resistance of the wiring was measured after being allowed to stand at 200 ° C. for 3000 hours, no increase in resistance was confirmed.

[Comparative Example 4]
44 to 47 are process cross-sectional views illustrating a method of manufacturing a semiconductor device according to Comparative Example 4.

  First, as in Comparative Example 2, the transistor 24 is formed (see FIG. 30A), the interlayer insulating film 26 and the stopper film 28 are formed (see FIG. 30B), and then the contact hole 30 is formed. A conductor plug 34 was embedded therein (see FIG. 30C).

  Next, as in Comparative Example 2, an insulating film 36 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD, and then a porous interlayer insulating film 38 was formed. Next, an insulating film 40 made of a 30 nm-thickness silicon oxide film was formed on the entire surface by plasma CVD (see FIG. 31A).

  Next, as in Comparative Example 2, a photoresist film 42 was formed, and an opening 44 for forming the first-layer wiring 50 was formed in the photoresist film 42 (see FIG. 31B). .

  Next, in the same manner as in Comparative Example 2, grooves 46 were formed in the insulating film 40, the porous interlayer insulating film 38, and the insulating film 36 (see FIG. 32A).

  Next, in the same manner as in Comparative Example 2, the wiring 50 was embedded in the insulating film 40, the interlayer insulating film 38, and the insulating film 36 (see FIG. 32B).

  Next, as in Comparative Example 2, an insulating film 52 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD.

  Next, a porous interlayer insulating film 54 was formed in the same manner as in Comparative Example 2 (see FIG. 44).

Next, an insulating film 82 made of a SiC: O: H film was formed on the porous interlayer insulating film 54 by plasma CVD. The film thickness of the insulating film 82 is, for example, 30 nm. As a gas introduced into the deposition chamber, SiC ₄ H ₁₂ gas and CO ₂ gas were used.

  Next, a porous interlayer insulating film 58 was formed on the entire surface. The method for forming the porous interlayer insulating film 58 was the same as in Comparative Example 2.

  Next, in the same manner as in Comparative Example 2, the interlayer insulating films 54, 58, etc. were baked to cure (cure) the interlayer insulating films 54, 58, etc.

Next, an insulating film 84 made of a SiC: O: H film was formed on the entire surface by plasma CVD. The film thickness of the insulating film 84 was 30 nm. As a gas introduced into the deposition chamber, SiC ₄ H ₁₂ gas and CO ₂ gas were used.

  Next, in the same manner as in Comparative Example 2, a contact hole 66 reaching the wiring 50 was formed (see FIG. 45).

Next, a photoresist film 68 was formed on the entire surface by spin coating. Next, an opening 70 for forming the second-layer wiring 76a was formed in the photoresist film 68 by using a photolithography technique. Next, the insulating film 84 and the interlayer insulating film 58 were etched using the photoresist film 68 as a mask and the insulating film 82 as an etching stopper. When performing the etching, fluorine plasma using CF ₄ gas and CHF ₃ gas as raw materials was used. Thus, a trench 72 for embedding the wiring 76a was formed in the insulating film 84 and the interlayer insulating film 58 (see FIG. 46).

  Next, in the same manner as in Comparative Example 2, a wiring 76a was embedded in the groove 72, and a conductor plug 76b was embedded in the contact hole 66 (see FIG. 47A).

  Next, as in Comparative Example 2, an insulating film 78 made of a SiC: O: H film having a thickness of 30 nm was formed by plasma CVD (see FIG. 47B). Thereafter, the third layer wiring was formed by repeating the same steps as described above as appropriate.

  With respect to the semiconductor device thus formed, wiring and conductor plugs were formed so that 1 million conductor plugs were electrically connected in series, and the yield was measured. As a result, the yield was as high as 96%. Moreover, when the effective dielectric constant between wirings was calculated, it was as large as 2.78. It is considered that the effective dielectric constant between the wirings is increased due to the influence of the thick insulating films 82 and 84 functioning as an etching stopper film and a protective film. Further, when the resistance of the wiring was measured after being allowed to stand at 200 ° C. for 3000 hours, no increase in resistance was confirmed.

As described above in detail, the features of the present invention are summarized as follows.
(Appendix 1)
Forming a porous insulating film on a semiconductor substrate;
Forming a dense layer having a density higher than that of the porous insulating film on the surface layer portion of the porous insulating film by performing a densification treatment for densifying the surface layer portion of the porous insulating film. A method of manufacturing a semiconductor device.
(Appendix 2)
In the method for manufacturing a semiconductor device according to attachment 1,
In the step of forming the dense layer, the dense layer is formed by densifying the surface layer portion of the porous insulating film using ozone.
(Appendix 3)
In the method for manufacturing a semiconductor device according to attachment 2,
In the step of forming the dense layer, ozone is generated by irradiating ultraviolet rays in an atmosphere containing oxygen.
(Appendix 4)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 3,
After the step of forming the dense layer, a step of forming another porous insulating film on the dense layer; a step of forming a photoresist film having an opening formed on the dense layer; Forming a groove in the other porous insulating film by etching the other porous insulating film using the resist film as a mask and the dense layer as an etching stopper; and embedding a wiring in the groove A method for manufacturing a semiconductor device, further comprising:
(Appendix 5)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 3,
After the step of forming the dense layer, the step of forming another porous insulating film on the dense layer; and the densification treatment for densifying the surface layer portion of the other porous insulating film, Forming another dense layer having a higher density than the other porous insulating film on the surface layer portion of the other porous insulating film; and a photoresist film having an opening formed on the other dense layer Forming a groove in the porous insulating film by etching the other dense layer and the other porous insulating film using the photoresist film as a mask and the dense layer as an etching stopper. A method of manufacturing a semiconductor device, further comprising: embedding a wiring in the groove.
(Appendix 6)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 3,
A step of forming another porous insulating film on the dense layer after the step of forming the dense layer; an insulating film having a higher density than the other porous insulating film on the other porous insulating film; Forming a photoresist film having an opening formed on the insulating film; using the photoresist film as a mask and the dense layer as an etching stopper; and the insulating film and the other A method of manufacturing a semiconductor device, further comprising: forming a groove in the porous insulating film by etching the porous insulating film; and embedding a wiring in the groove.
(Appendix 7)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 3,
Before the step of forming the porous insulating film, there is further provided a step of forming another porous insulating film on the semiconductor substrate; and a step of forming an insulating film having a higher density than the other porous insulating film. And
After the step of forming the dense layer, a step of forming a photoresist film having an opening formed on the dense layer; the dense layer using the photoresist film as a mask and the insulating film as an etching stopper And a step of forming a groove in the porous insulating film by etching the porous insulating film; and a step of embedding wiring in the groove.
(Appendix 8)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 3,
After the step of forming the dense layer, the step of forming another porous insulating film on the dense layer; and the densification treatment for densifying the surface layer portion of the other porous insulating film, Forming another dense layer having a higher density than the other porous insulating film on the surface layer portion of the other porous insulating film; and a density higher than the other porous insulating film on the other dense layer. Forming a high-insulating film; forming a first photoresist film having a first opening formed on the insulating film; and using the first photoresist film as a mask, the insulating film Forming a contact hole by etching the film, the other dense layer, the other porous insulating film, the dense layer, and the porous insulating film; and a second layer on the other dense layer; Process for forming a second photoresist film having an opening. Etching the other dense layer and the other porous insulating film using the second photoresist film as a mask and the dense layer as an etching stopper, thereby forming a groove in the other porous insulating film. A method of manufacturing a semiconductor device, further comprising: forming a conductive plug in the contact hole and embedding a wiring in the groove.
(Appendix 9)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 3,
Before the step of forming the porous insulating film, the step of forming another porous insulating film on the semiconductor substrate; and the step of forming an insulating film having a higher density than the other porous insulating film Have
A step of forming another insulating film having a higher density than the porous insulating film after the step of forming the dense layer; and a first photo in which a first opening is formed on the other insulating film. Forming a resist film; and etching the other insulating film, the dense layer, the porous insulating film, the insulating film, and the other porous insulating film using the first photoresist film as a mask. Forming a contact hole; forming a second photoresist film having a second opening formed on the dense layer; and using the second photoresist film as a mask to form the insulating film. Forming a groove in the porous insulating film by etching the porous insulating film using the film as an etching stopper; embedding a conductor plug in the contact hole and wiring in the groove The method of manufacturing a semiconductor device characterized by further comprising a burying.
(Appendix 10)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 9,
The density of the porous insulating film is 0.6 to 1.3 g / cm ³ ,
The density of the dense layer is 1.5 to 3.5 g / cm ³ .
(Appendix 11)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 10,
A thickness of the dense layer is 2 to 25 nm. A method of manufacturing a semiconductor device, wherein:
(Appendix 12)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 11,
The step of forming the porous insulating film includes a step of applying an insulating material containing a thermally decomposable compound on a semiconductor substrate; a thermal treatment is performed to decompose the thermally decomposable compound and into the insulating material Forming the porous insulating film by forming pores. A method for manufacturing a semiconductor device, comprising:
(Appendix 13)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 11,
The step of forming the porous insulating film includes a step of applying an insulating material containing a cluster-like compound on a semiconductor substrate; and a heat treatment to evaporate the solvent in the insulating material, whereby the porous insulating film is formed. A method of manufacturing a semiconductor device, comprising: forming a film.
(Appendix 14)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 11,
In the step of forming the porous insulating film, the porous insulating film is formed by a vapor deposition method.
(Appendix 15)
In the method for manufacturing a semiconductor device according to any one of appendices 1 to 11,
In the step of forming the porous insulating film, a raw material containing a thermally decomposable or oxidatively decomposable atomic group is used, and the porous insulating film is formed by vapor deposition while decomposing the atomic group. A method of manufacturing a semiconductor device.

It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 1st Embodiment of this invention. FIG. 9 is a process cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention; It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 1st Embodiment of this invention. FIG. 9 is a process cross-sectional view (No. 4) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention; It is process sectional drawing (the 5) which shows the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is process sectional drawing (the 6) which shows the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is process sectional drawing (the 7) which shows the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is process sectional drawing (the 8) which shows the manufacturing method of the semiconductor device by 1st Embodiment of this invention. It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 2nd Embodiment of this invention. It is process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device by 2nd Embodiment of this invention. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 2nd Embodiment of this invention. It is process sectional drawing (the 4) which shows the manufacturing method of the semiconductor device by 2nd Embodiment of this invention. It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 3rd Embodiment of this invention. It is process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device by 3rd Embodiment of this invention. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 3rd Embodiment of this invention. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 3rd Embodiment of this invention. It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 4th Embodiment of this invention. It is process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device by 4th Embodiment of this invention. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 4th Embodiment of this invention. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 4th Embodiment of this invention. It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 5th Embodiment of this invention. It is process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device by 5th Embodiment of this invention. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 5th Embodiment of this invention. It is process sectional drawing (the 4) which shows the manufacturing method of the semiconductor device by 5th Embodiment of this invention. It is process sectional drawing (the 5) which shows the manufacturing method of the semiconductor device by 5th Embodiment of this invention. FIG. 10 is a process cross-sectional view illustrating the method for manufacturing the semiconductor device according to Example 1; FIG. 10 is a process cross-sectional view (part 1) illustrating the method for manufacturing the semiconductor device according to the second embodiment; FIG. 10 is a process cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the second embodiment; 11 is a process cross-sectional view illustrating the method for manufacturing the semiconductor device according to Comparative Example 1. FIG. FIG. 11 is a process cross-sectional view (part 1) illustrating the method for manufacturing a semiconductor device according to Comparative Example 2; FIG. 11 is a process cross-sectional view (part 2) illustrating the method for manufacturing a semiconductor device according to Comparative Example 2; FIG. 11 is a process cross-sectional view (part 3) illustrating the method for manufacturing a semiconductor device according to Comparative Example 2; FIG. 11 is a process cross-sectional view (part 4) illustrating the method for manufacturing a semiconductor device according to Comparative Example 2; FIG. 16 is a process cross-sectional view (part 5) illustrating the method for manufacturing a semiconductor device according to Comparative Example 2; FIG. 16 is a process cross-sectional view (No. 6) illustrating the method for manufacturing a semiconductor device according to Comparative Example 2; FIG. 16 is a process cross-sectional view (No. 7) illustrating the method for manufacturing the semiconductor device according to Comparative Example 2; FIG. 16 is a process cross-sectional view (No. 8) illustrating the method for manufacturing the semiconductor device according to Comparative Example 2; FIG. 16 is a process cross-sectional view (No. 9) illustrating the method for manufacturing the semiconductor device according to Comparative Example 2; FIG. 11 is a process cross-sectional view (part 1) illustrating the method for manufacturing a semiconductor device according to Comparative Example 3; FIG. 11 is a process cross-sectional view (part 2) illustrating the method for manufacturing a semiconductor device according to Comparative Example 3; FIG. 11 is a process cross-sectional view (part 3) illustrating the method for manufacturing a semiconductor device according to Comparative Example 3; FIG. 11 is a process cross-sectional view (part 4) illustrating the method for manufacturing a semiconductor device according to Comparative Example 3; FIG. 16 is a process cross-sectional view (part 5) illustrating the method for manufacturing a semiconductor device according to Comparative Example 3; FIG. 11 is a process cross-sectional view (part 1) illustrating the method for manufacturing a semiconductor device according to Comparative Example 4; FIG. 16 is a process cross-sectional view (part 2) illustrating the method for manufacturing a semiconductor device according to Comparative Example 4; FIG. 11 is a process cross-sectional view (part 3) illustrating the method for manufacturing a semiconductor device according to Comparative Example 4; FIG. 16 is a process cross-sectional view (part 4) illustrating the method for manufacturing a semiconductor device according to Comparative Example 4;

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate 12 ... Element isolation film 14 ... Element region 16 ... Gate insulating film 18 ... Gate electrode 20 ... Side wall insulating film 22 ... Source / drain diffused layer 24 ... Transistor 26 ... Interlayer insulating film 28 ... Insulating film 30 ... Contact Hole 32 ... Adhesion layer 34 ... Conductor plug 36 ... Insulating film 38 ... Porous interlayer insulating film 40 ... Insulating film 42 ... Photoresist film 44 ... Opening 46 ... Groove 48 ... Multilayer film 50 ... Wiring 52 ... Insulating film 54 ... Porous interlayer insulating film 56 ... dense layer 58 ... porous interlayer insulating film 60 ... dense layer 62 ... photoresist film 64 ... opening 66 ... contact hole 68 ... photoresist film 70 ... opening 72 ... groove 74 ... lamination Film 76 ... Cu film 76a ... Wiring 76b ... Conductor plug 78 ... Insulating film 80 ... Insulating film 82 ... Insulating film 84 ... Insulating film 86 ... Insulating film

Claims (5)

Forming a porous insulating film on a semiconductor substrate;
Forming a dense layer having a density higher than that of the porous insulating film on the surface layer portion of the porous insulating film by performing a densification treatment for densifying the surface layer portion of the porous insulating film. A method of manufacturing a semiconductor device. In the manufacturing method of the semiconductor device according to claim 1,
In the step of forming the dense layer, the dense layer is formed by densifying the surface layer portion of the porous insulating film using ozone. The method of manufacturing a semiconductor device according to claim 2.
In the step of forming the dense layer, ozone is generated by irradiating ultraviolet rays in an atmosphere containing oxygen. In the manufacturing method of the semiconductor device according to any one of claims 1 to 3,
The density of the porous insulating film is 0.6 to 1.3 g / cm ³ ,
The density of the dense layer is 1.5 to 3.5 g / cm ³ . In the manufacturing method of the semiconductor device of any one of Claims 1 thru / or 4,
A thickness of the dense layer is 2 to 25 nm. A method of manufacturing a semiconductor device, wherein:

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