JP2006186032A - Radiation imager - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a radiation imager whose manufacturing process is simplified and which can be manufactured at high yield and at low cost. <P>SOLUTION: The radiation imager is provided with a radiation imaging substrate having a pixel area 10 and a wavelength conversion body to convert radiation by wavelength. The pixel area 10 is provided with on an insulating substrate 1, a plurality of capacitance elements C11-C33 arranged like a matrix, TFTs (T11-T33) as a switch and a photoelectric conversion element that are provided with a semiconductor layer constituting a photoelectric conversion layer for converting radiation into potential, a gate electrode and a source-drain electrode and that are connected with the capacitance elements C11-C33, a bias wiring (Vs line) to apply bias to the capacitance elements C11-C33, gate wirings Vg 1-3 to supply driving signals to the TFTs (T11-T33), and signal wirings Sig 1-3 to read out the output from the TFTs (T11-T33). Such a structure is used to accumulate potentials equivalent to a quantity of radiation entering the TFTs (T11-T33) in the capacitance elements C11-T33, and the accumulated potential is output. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a photoelectric conversion substrate and a photoelectric conversion device, a radiation imaging substrate, and a radiation imaging device that are applied to a medical image diagnostic device, a nondestructive inspection device, an analysis device using radiation, and the like. In this specification, electromagnetic waves such as visible light, X-rays, α-rays, β-rays, γ-rays, and the like are also included in the radiation.

  Conventionally, as a representative radiation imaging apparatus of this type, a plurality of pixels each including a PIN (Positive-Intrinsic-Negative) photodiode and a switch TFT (Thin Film Transistor) as in Patent Document 1 are arranged. 2. Description of the Related Art A radiation imaging apparatus is known in which a radiation imaging substrate on which a PIN-TFT structure optical sensor is arranged and a phosphor for converting radiation into visible light are combined. Further, a radiation imaging substrate on which an optical sensor having a MIS-TFT structure in which a plurality of pixels each composed of a MIS (Metal-Insulator-Semiconductor) type photoelectric conversion element and a switch TFT as in Patent Document 2 are arranged; A radiation imaging apparatus combined with a phosphor for converting radiation into visible light is also known.

  Here, a radiation imaging apparatus using an optical sensor having a MIS-TFT structure will be described with reference to the drawings.

  7 is an equivalent circuit diagram of a conventional radiation imaging apparatus, FIG. 8 is a plan view of the pixel area thereof, FIG. 9 is a cross-sectional view of one pixel along the line CC ′ in FIG. 8, and FIG. It is a timing diagram explaining the drive method of the radiation imaging device of an example.

  P11 to P33 are semiconductor conversion elements such as photoelectric conversion elements, and T11 to T33 are thin film transistors (TFTs), each of which constitutes a pixel, and a plurality of two-dimensionally arranged pixel areas (pixel portions) on an insulating substrate (not shown). 200 is formed. Here, 3 × 3 pixels are shown as the pixel array of the pixel area 200, but actually, for example, 1000 × 2000 pixels are arranged on a radiation imaging substrate (insulating substrate).

  As shown in the drawing, the photoelectric conversion elements P11 to P33 are connected to common bias wirings Vs1 to Vs3, and a constant bias is applied from the reading device (reading circuit unit) 201. The gate electrodes of the TFTs (T11 to T33) are connected to common gate wirings Vg1 to Vg3, and the gate drive device (drive circuit unit) 202 controls the ON and OFF of the TFT gates. The source or drain electrode of each TFT (T11 to T33) is connected to common signal wirings Sig1 to Sig3, and each signal wiring Sig1 to Sig3 is connected to the reading device 201.

  The X-rays exposed toward the subject are attenuated and transmitted by the subject, converted into visible light by the phosphor layer shown in FIG. 9, and this visible light is incident on the photoelectric conversion elements P11 to P33. , Converted into electric charge. This electric charge is transferred to the signal wirings Sig1 to Sig3 through the TFTs (T11 to T33) by the gate driving pulse applied by the gate driving device 202, and is read out to the outside by the reading device 201. Thereafter, residual charges generated in the photoelectric conversion elements P11 to P33 and not transferred are removed by the common bias lines Vs1 to Vs3.

  In the radiation imaging apparatus, the radiation imaging substrate is cut at a predetermined cutting portion, and the signal wirings Sig1 to Sig3 and the bias wirings Vs1 to Vs3 are transferred to the reading device 201 via a printed wiring board such as a TCP (tape carrier package). The gate lines Vg1 to Vg3 are connected to the gate driving device 202, respectively.

  The layer configuration of the radiation imaging apparatus will be described with reference to FIG.

  The MIS type photoelectric conversion element P11 is formed on an insulating substrate 210, and includes a G electrode (first electrode layer) 211, an insulating layer (first insulating layer) 212, and a photoelectric conversion layer (first semiconductor layer) 213. , D electrode (hole blocking layer) 214, and second electrode layer 215, and G electrode is connected to the source / drain electrode of TFT (T11). Here, the hole blocking layer also serves as an electrode.

  The TFT (T11) includes a gate electrode (first electrode layer) 221, a gate insulating layer (first insulating layer) 222, a first semiconductor layer 223, an ohmic contact layer 224, and the like formed on the insulating substrate 210. A source / drain electrode (second electrode layer) 225 is provided.

  Each Vg line is connected to a first electrode layer on which a gate electrode of the TFT (T11) is formed, and each Sig line is connected to a second electrode layer forming a source / drain electrode.

  A second insulating layer 231 and an organic protective layer 232 are formed on the upper layer, and a phosphor layer 242 is further disposed on the upper layer with an adhesive layer 241 interposed therebetween.

  Here, the operation of the conventional radiation imaging apparatus will be described with reference to the timing chart of FIG. In FIG. 10, the control signal VSC is for giving two types of bias to the D electrode via the bias wiring (Vs line) of the photoelectric conversion elements P11 to P33. The Vs line becomes Vref (V) when VSC is at a high level and becomes Vs (V) when it is at a low level. The reading power supply Vs (V) and the refreshing power supply Vref (V) are DC power supplies, respectively.

  First, the operation in the refresh period T11 will be described.

  All signals of the shift register SR1 in the gate driving device 202 are set to a high level, and the CRES signal in the reading device 201 is set to a high level. Then, all the switching TFTs (T11 to T33) are turned on, and the switch elements RES1 to RES3 in the reading device 201 are also turned on, so that the G electrodes of all the photoelectric conversion elements P11 to P33 are set to the GND potential. When the VSC signal in the reading device 201 becomes “Hi” level, the D electrodes of all the photoelectric conversion elements P11 to P33 are biased to the refresh power supply Vref (negative potential). Then, all the photoelectric conversion elements P11 to P33 enter the refresh mode, and refresh is performed.

  Next, the photoelectric conversion period T12 will be described.

  The VSC signal is switched to the low level state, and the D electrodes of all the photoelectric conversion elements P11 to P33 are biased to the reading power source Vs (positive potential). Then, the photoelectric conversion elements P11 to P33 are in the photoelectric conversion mode. In this state, all the signals of the shift register SR1 are set to “Lo”, and the CRES signal in the reading device 201 is set to a low level state. Then, all the TFTs for switching (T11 to T33) are turned off, and the switch elements RES1 to RES3 in the readout device 201 are also turned off, and the G electrodes of all the photoelectric conversion elements P11 to P33 are in an open state in terms of DC. However, since the photoelectric conversion elements P11 to P33 are also capacitors, the potential is maintained. However, at this time, since no light is incident on the photoelectric conversion elements P11 to P33, no charge is generated. That is, no current flows.

  In this state, when the light source is turned on in a pulsed manner, each photoelectric conversion element P11 to P33 is irradiated with light, and so-called photocurrent flows. The light source is literally an X-ray source in the case of an X-ray imaging apparatus. In this case, a scintillator (phosphor) for X-ray visible conversion may be used. The photocurrent that has flowed by the light is accumulated in the respective photoelectric conversion elements P11 to P33 as electric charges, and is retained even after the light source is turned off.

  Next, the reading period T13 will be described.

  The reading operation is performed in the order of the photoelectric conversion elements P11 to P31 in the first row, the photoelectric conversion elements P12 to P32 in the second row, and then the photoelectric conversion elements P13 to P33 in the third row. First, in order to read out the photoelectric conversion elements P11 to P31 in the first row, a gate pulse is given from the gate wiring Vg1 of the TFT (T11 to T31). At this time, the high level of the gate pulse is the voltage V (on) of the gate driving device 202 supplied from the outside. Thereby, the TFTs (T11 to T31) in the first row are turned on, and the signal charges accumulated in the photoelectric conversion elements P11 to P31 in the first row are transferred to the signal wirings Sig1 to Sig3.

  Although not shown in particular, the signal wirings Sig1 to Sig3 are provided with a read capacitor, and the signal charges are transferred to the read capacitor via the TFTs (T11 to T33). For example, the readout capacitance added to the signal wiring Sig1 is the total (for three) of the inter-electrode capacitance (Cgs) between the gate / source of each TFT (T11 to T13) connected to the signal wiring Sig1. .

  The signal charges transferred to the signal wirings Sig1 to Sig3 are amplified by the amplifiers A1 to A3. When the CRES signal is turned on, the CRES signal is transferred to the sample hold capacitors CL1 to CL3, and the CRES signal is turned off and held. Next, by applying pulses in the order of the switches Sr1, Sr2, and Sr3 from the shift register SR2, the signals held in the sample and hold capacitors CL1 to CL3 are amplified in the order of the sample and hold capacitors CL1, CL2, and CL3. Amplified by B1 to B3 and output from the amplifier Ab. As a result, photoelectric conversion signals S11, S12, and S13 corresponding to the signal charges for one row are sequentially output from the photoelectric conversion elements P11, P21, and P31 in the first row.

  Thereafter, the read operation of the photoelectric conversion elements P12 to P32 in the second row is performed in the same manner. If the signals of the signal wirings Sig1 to Sig3 are sampled and held in the sample hold capacitors CL1 to CL3 by the SMPL signal in the first row, the signal wirings Sig1 to Sig3 are reset to the GND potential by the CRES signal, and then the gate wiring in the second row A gate pulse of Vg2 can be applied. That is, the signal charges of the photoelectric conversion elements P12 to P32 in the second row can be simultaneously transferred by the shift register SR1 while the signal in the first row is subjected to the serial conversion operation by the shift register SR2.

With the above operation, the signal charges of the photoelectric conversion elements P11 to P31 in all the first to third rows can be output. In the operation of the conventional radiation imaging apparatus described above, a single still image can be acquired by performing a refresh operation, irradiating X-rays, and performing a read operation. When acquiring a continuous moving image, it is sufficient to operate repeatedly for the number of moving images to be acquired at the timing described in FIG.
JP 05-503770 gazette JP 08-116044 A

  In recent years, with the development of manufacturing technology for liquid crystal panels using TFTs and the development of area sensors having photoelectric conversion elements in various fields (for example, X-ray imaging devices), mass production of panels using TFTs is possible. It has become. However, unlike a liquid crystal panel or the like, a radiation imaging apparatus has a characteristic of having a photoelectric conversion element and a TFT, and digitally converting a minute signal to output an image.

  For example, in the case of a PIN type sensor as in Patent Document 1, it is difficult to optimize two types of injection blocking layers having different polarities of P type and N type. In addition, since the layer structure of the PIN photodiode and TFT is different, it cannot be formed in the same process, and must be formed in a separate process, resulting in an increase in manufacturing cost and a decrease in yield. Concerned.

  In addition, in the case of the MIS type sensor as in Patent Document 2, since the layer configuration of the MIS type photoelectric conversion element and the TFT is the same, it can be formed by the same process. While different characteristics, that is, the performance of the semiconductor layer of the MIS type photoelectric conversion element is desired that the photosensitivity is good, the performance of the TFT semiconductor layer such that the leakage current due to light is small is desired. ing. For this reason, there is a concern that the manufacturing process is complicated, the yield is reduced, and the cost is increased.

  As described above, the photoelectric conversion apparatus having a plurality of pixels including the photoelectric conversion elements and the switch elements in a two-dimensional form and the radiation detection apparatus using the photoelectric conversion apparatus have a very large number of processes in manufacturing, and a high yield in a production line for mass production. It was difficult to secure and reduce costs.

  The present invention has been made in consideration of such a conventional situation, and an object thereof is to provide a radiation imaging apparatus that can be manufactured at a high yield and at a low cost.

  In order to achieve the above object, a radiation imaging apparatus according to the present invention includes a wavelength converter that converts radiation into light, a pixel unit in which a plurality of pixels are two-dimensionally arranged on a substrate, A plurality of bias wirings connected to a pixel to apply a bias to the pixels, a plurality of driving wirings connected to the plurality of pixels to drive the pixels, and charges generated by the pixels connected to the plurality of pixels In a radiation imaging apparatus having a photoelectric conversion substrate having a signal wiring to be read out, the pixel is connected to a capacitive element connected to the bias wiring, the capacitive element, the drive wiring, and the signal wiring The photoelectric conversion element includes a gate electrode connected to the drive wiring, an insulating layer, a semiconductor layer that converts the light into electric charge, one connected to the capacitor element, and the other Said It has a drain electrode connected to No. wiring, and connected to the signal line, and having a power supply unit having at least two or more reference potential.

  In the present invention, the capacitive element accumulates the electric charge generated in the semiconductor layer in response to the light, and the photoelectric conversion element accumulates the electric charge accumulated in the capacitive element by a driving signal from the driving wiring. You may transfer to the said signal wiring. Further, in the present invention, charge is accumulated in the capacitor element in advance, and the photoelectric conversion element discharges the charge accumulated in the capacitor element according to the light, and by a drive signal from the drive wiring, The remaining charge of the capacitive element may be transferred to the signal wiring.

The power supply unit may include a storage power source for storing the electric charge generated in the photoelectric conversion element in the capacitor element, and a reset power source for resetting the capacitor element. The wavelength converter may be a phosphor mainly composed of gadolinium oxysulfide (Gd ₂ O ₂ S ₃ ) or cesium iodide (CsI). You may further have the insulating layer arrange | positioned on the area | region in which the said pixel part exists, and the protective layer arrange | positioned on the said insulating layer.

  According to the present invention, the capacitive element and the photoelectric conversion element can be formed in the same process, the number of manufacturing steps can be reduced, and the manufacturing process can be simplified. As a result, the radiation imaging apparatus can be manufactured at a high yield and at a low cost. Can be provided.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

  A radiation imaging apparatus according to the present embodiment will be described with reference to the drawings.

  FIG. 1 is an equivalent circuit diagram of the radiation imaging apparatus of the present embodiment, FIG. 2 is a plan view thereof, and FIG. 3 is a cross-sectional view of one pixel along the line A-A 'in FIG.

  The radiation imaging apparatus of the present embodiment is a radiation imaging as a photoelectric conversion apparatus in which an optical sensor composed of a capacitive element and a TFT using, for example, amorphous silicon (a-Si) functioning as a switch and a photoelectric conversion element is arranged. And a phosphor as a wavelength converter for converting radiation into visible light.

  C11 to C33 are capacitive elements, and T11 to T33 are switches and photoelectric conversion elements (TFTs), each of which constitutes a pixel and is arranged in a two-dimensional manner on an insulating substrate to form a pixel area (pixel portion) 100. ing. In the present embodiment, as shown in the figure, for simplification of explanation, 3 × 3 = 9 pixels are shown, but in actuality, for example, 2000 × 2000 pixels are arranged on an insulating substrate.

  Vg1 to Vg3 are gate wirings for turning on / off the TFTs (T11 to T33), Sig1 to Sig3 are signal wirings, and Vs1 to Vs3 and Vs lines are common bias wirings for applying a bias to the capacitive elements C11 to C33. is there. In this embodiment, the area on the radiation imaging substrate where the capacitive elements C11 to C33, TFTs (T11 to T33), gate wirings Vg1 to Vg3, signal wirings Sig1 to Sig3, and common bias wirings Vs1 to Vs3 are formed is a pixel area. This will be referred to as (pixel portion) 100.

  As shown in the cross-sectional view of FIG. 3, the layer configuration of one pixel in the pixel area 100 includes a capacitive element C11 and a TFT (T11) on the insulating substrate 1. In the example of FIG. 3, one pixel along the line A-A ′ in the plan view of FIG. 2 is illustrated, but the same applies to the layer configuration of other pixels.

  The TFT (T11) includes a first electrode layer 2 that forms a gate electrode, a first insulating layer 3 that forms a gate insulating layer, and a first semiconductor that forms a photoelectric conversion layer such as amorphous silicon (a-Si). A layer 4, an ohmic contact layer 5 such as an n-type semiconductor layer, and second electrode layers 6 and 7 for forming source / drain electrodes are provided.

  The capacitive element C11 includes a first electrode layer 8 that forms a G electrode, a first insulating layer 9 that forms an insulating layer, and a second electrode layer 10 that forms a D electrode. The G electrode is a TFT (T11 ) Source / drain electrodes (second electrode layers 6 and 7).

  The gate wiring Vg1 is connected to the first electrode layer 2 that forms the gate electrode of the TFT (T11), and the signal wiring Sig1 is connected to the second electrode layers 6 and 7 that form the source / drain electrodes. The bias wiring Vs1 is connected to the second electrode layer 10 that forms the D electrode of the capacitive element C11.

  In these upper layers, a second insulating layer 11 such as SiNx and an organic protective layer 12 such as polyimide are disposed. In addition to protecting the lower layer, the organic protective layer 12 changes the surface shape on which the phosphor layer 14 is formed from a concavo-convex shape along the arrangement shape of the source / drain electrodes of the TFT (T11) to a flat (planar) shape. Also play a role such as.

Furthermore, a phosphor layer 14 is disposed on the upper layer via an adhesive layer 13. For example, when the first semiconductor layer 4 forming the photoelectric conversion layer is amorphous silicon (a-Si), the phosphor layer 14 has cesium iodide having an emission wavelength substantially close to the photosensitive wavelength of a-Si. An alkali halide material having a columnar crystal structure such as (CsI) is desirable. Further, it may be formed by direct vapor deposition without providing an adhesive layer. Further, the phosphor layer 14 may be made of a material having a particulate crystal structure such as gadolinium oxysulfide (Gd ₂ O ₂ S ₃ ) in addition to CsI.

  Signal wirings Sig1 to Sig3, bias wirings Vs1 to Vs3, and gate wirings Vg1 to Vg3 are connected to each pixel in the pixel area 100 having the above configuration. The insulating substrate on which the pixel area 100 is formed is cut at a predetermined cutting portion, and the signal wirings Sig1 to Sig3 and the common bias wirings Vs1 to Vs1 are connected through a printed wiring board such as a TCP (tape carrier package) (not shown). Vs3 (Vs line) is connected to the readout device (readout circuit portion) 11, and gate wirings Vg1 to Vg3 are connected to the gate drive device (drive circuit portion) 102, respectively.

  The gate drive device 102 outputs a drive signal (gate pulse) for on / off control of the gates of the TFTs (T11 to T33) via the gate wirings Vg1 to Vg3. In the example of FIG. 1, SR1 is a driving shift register that applies a driving pulse voltage to the gate wirings Vg1 to Vg3. In the driving shift register SR1, an on-voltage that turns on the TFTs (T11 to T33) from the on-voltage source Vg (on) and an off-voltage that turns off the TFTs (T11 to T33) from the off-voltage source Vg (off). Are supplied respectively.

  The reading device 101 reads parallel signal outputs from the pixel area 100, converts them in series, and outputs them. In the example of FIG. 1, Vs is a bias power source that supplies a bias voltage to the Vs line. A1 to A3 are operational amplifiers in which signal wirings Sig1 to Sig3 and an inverting terminal (−) are connected, and capacitive elements Cf1 to Cf3 are connected between the inverting terminal (−) and the output terminal, respectively. Capacitance elements Cf1 to Cf3 integrate the current that flows to the Cf side when the signal of the capacitance element turns on the TFTs (T11 to T33), and convert them into voltage amounts. RES1 to RES3 are reset switches that reset the capacitive elements Cf1 to Cf3 to the reset bias voltage V (reset), and are connected in parallel to the capacitive elements Cf1 to Cf3. In the example of FIG. 1, the reset bias voltage V (reset) is represented by 0V, that is, GND. The reset switches RES1 to RES3 are controlled by a reset control signal (RC signal) supplied from a controller (not shown).

  CL1 to CL3 are sample and hold capacitors for temporarily storing signals accumulated by the operational amplifiers A1 to A3 and the capacitive elements Cf1 to Cf3, Sn1 to Sn3 are transfer switches for sample and hold, and B1 to B3 are buffers. Amplifiers, Sr1 to Sr3 are serial conversion switches for serially converting parallel signals, SR2 is a serial conversion shift register that provides pulses for serial conversion to Sr1 to Sr3, Ab is a serially converted signal This is a buffer amplifier that outputs. The transfer switches Sn1 to Sn3 are controlled by a sampling control signal (SMPL signal) supplied from a controller (not shown).

  SW-res is a reset power switch for resetting the non-inverting terminals of the operational amplifiers A1 to A3 to the reset bias voltage V (reset) (reset to 0V in the example of FIG. 1), and SW-str This is a storage power switch for setting the non-inverting terminals (+) of the operational amplifiers A1 to A3 to the storage bias voltage V (str), and is controlled by a control signal (XRES signal) supplied from a controller (not shown). When the XRES signal is at a high level, the storage power switch SW-str is turned on. When the XRES signal is at a low level, the reset power switch SW-res is turned on. In this way, both switches SW-str and SW-res are not turned on at the same time.

  Next, the operation of the radiation imaging apparatus of the present embodiment will be described with reference to FIG.

  FIG. 4 is a timing chart showing the operation of the radiation imaging apparatus of the present embodiment.

  First, the photoelectric conversion period T1 will be described (the previous reading and reset period T0 will be described later).

  First, the D electrodes of all the capacitive elements C11 to C33 are biased to the reading power source Vs (positive potential), and the G electrodes are biased to the storage bias voltage V (reset) by a reset operation described separately. All signals from the shift register SR1 to the gate wirings Vg1 to Vg3 are at a low level, and all TFTs for switching (T11 to T33) are turned off. The signal wirings Sig1 to Sig3 are biased to the storage bias voltage V (str) by setting the RC signal from a controller (not shown) to a high level and the XRES signal to a high level. In this state, when the light source (X-ray: X-ray in the example in the figure) is turned on in a pulsed manner, the respective TFTs (T11 to T33) are irradiated with light, and charges are accumulated in the capacitive elements C11 to C33. The

  The charge accumulation operation at this time will be described with reference to FIG.

  FIG. 5 is a graph (vertical axis: TFT drain current Ids [A] indicating the gate bias dependence (TFT voltage-current characteristics) of the OFF leak amount with respect to the light irradiation amount when the TFT semiconductor layer is used as a photoelectric conversion layer. ], Horizontal axis: TFT gate voltage Vg [V]). FIG. 5 shows a case where amorphous silicon (a-Si) is used for a semiconductor layer of a TFT serving as a photoelectric conversion layer (a-Si TFT size: W (width) / L (length) = 50/8 [μm]. , Drain voltage Vds = 1 [V], light irradiation amount = 0, 1, 10, 100 [lx]).

  As shown in FIG. 5, since the TFTs (T11 to T33) of this embodiment use a photoelectric conversion layer for the semiconductor layer (first semiconductor layer 4) forming the channel region, the gate bias voltage Vg [V ] Is a negative value, that is, even when the gate is in an OFF state, a current flows according to the amount of incident light [lx]. This is because, when light is absorbed by the photoelectric conversion layer (first semiconductor layer 4), an electron hole pair is generated, and the electrons are guided to the source or drain electrode (second electrode layers 6 and 7) by an electric field. To be free. The holes are stored at the interface between the photoelectric conversion layer (first semiconductor layer 4) of the TFT (T11 to T33) and the gate insulating layer (first insulating layer 3), and converted into light that can be sensed by the wavelength converter. Held even after the X-rays are turned off.

  Due to the characteristics of the TFTs (T11 to T33), the potentials of the G electrodes of the capacitive elements C11 to C33 are raised, and an accumulation operation is performed.

  Next, the reading and reset period T2 will be described.

  Here, the read and reset operations are performed in the pixel area 10 in the order of the capacitor elements C11 to C31 in the first row, the capacitor elements C12 to C32 in the second row, and then the capacitor elements C13 to C33 in the third row. This is performed sequentially for each line.

  First, in order to read the accumulated charges of the capacitor elements C11 to C31 in the first row, the RC signal is set to a low level, and the gate wiring Vg1 connected to the TFTs (T11 to T31) in the first row is connected to the gate from the shift register SR1. Give a pulse. The high level of the gate pulse corresponds to the ON voltage Vg (on) supplied from the outside.

  As a result, the TFTs (T11 to T31) in the first row are turned on, and the charges accumulated in the capacitive elements C11 to C31 flow as currents through the TFTs (T11 to T31) in the first row. It flows into the capacitive elements Cf1 to Cf3 connected to the operational amplifiers A1 to A3 and is integrated. At this time, a read capacitor (not shown) is added to the signal wirings Sig1 to Sig3, and the signal charges are transferred to the read capacitor side via the TFTs (T11 to T31) in the first row. .

  Thereby, the signals at the output terminals of the operational amplifiers A1 to A3 (output signals A1-out to A3-out in FIG. 4) change as shown in FIG. 4 according to the signal amounts of the capacitive elements C11 to C31. . At this time, since the TFTs (T11 to T31) in the first row are simultaneously turned on, the output signals A1-out to A3-out of the operational amplifiers A1 to A3 change simultaneously and are output in parallel. In this state, when the SMPL signal is turned on, the output signals A1-out to A3-out of the operational amplifiers A1 to A3 are transferred to the sample hold capacitors CL1 to CL3, respectively, and the SMPL signal is turned off and temporarily held. Thus, if the output signals A1-out to A3-out of the operational amplifiers A1 to A3 are sampled and held in the sample and hold capacitors CL1 to CL3 by the SMPL signal in the first row, the signals of the capacitive elements C11 to C31 in the first row are obtained. This is output from the pixel area 100.

  Next, by applying pulses from the shift register SR2 in the order of the serial conversion switches Sr1, Sr2, and Sr3 from the shift register SR2, the signals held in the sample and hold capacitors CL1 to CL3 are changed to the sample and hold capacitors CL1 and CL3. Output from the amplifier Ab in the order of CL2 and CL3. As a result, the accumulated signals for one row of the capacitive elements C11, C21, C31 are sequentially converted and output.

  In parallel with this operation, in order to reset the capacitive elements C11 to C31 and the operational amplifiers A1 to A3, the RC signal from the controller (not shown) is high level, the XRES signal is low level, and the gate from the shift register SR1 to the gate wiring Vg1 Set the pulse to high level. As a result, the G electrodes of the capacitive elements C11 to C31 are biased to the reset bias voltage V (reset), and the capacitive elements C11 to C31 return to the initial state. In this way, during the serial conversion and output from the serial conversion switches Sr1 to Sr3 in the readout device 11, the reset operation of the capacitive elements C11 to C31 in the pixel area 100 and the capacitive element in the readout device 11 are performed. The reset operation of Cf1 to Cf3 is performed.

  Next, the read and reset operations of the capacitor elements C12 to C32 in the second row and the capacitor elements C13 to C33 in the third row are performed in the same manner, whereby the signals of the capacitor elements C11 to C33 in all the first to third rows are performed. Electric charge can be output.

  Thereafter, a continuous moving image can be obtained by repeatedly executing the photoelectric conversion period T1 and the readout and reset period T2. Here, the photoelectric conversion period T1 and the readout and reset period T2 have been described in this order. However, since it is actually necessary to reset the capacitor element immediately before photographing the first frame, the photoelectric conversion period T1 as illustrated in FIG. A read and reset period T0 is provided before the read operation, and the capacitive elements C11 to C33 are reset by the same operation as the read and reset period T2.

  Therefore, the time chart shown in the present embodiment is different from the time chart of FIG. 10 shown in the conventional example in that no refresh period is provided, and the frame frequency when acquiring a moving image is increased accordingly. There is a merit that can be done.

  In the conventional example, since all the photoelectric conversion elements are collectively refreshed, it is necessary to provide a wait period for alleviating fluctuations in GND, power supply, and the like due to dark current components at the time of refresh. On the other hand, in the present embodiment, since refresh is performed in units of rows, the number of capacitive elements to be refreshed at one time is much smaller, so there is no need to provide a special wait period, and the frame frequency of the moving image is accordingly increased. Can be increased.

  As described above, the radiation imaging apparatus of the present embodiment is arranged in a matrix on the insulating substrate 1 and the phosphor layer 14 such as cesium iodide and gadolinium oxysulfide as a wavelength converter for wavelength conversion of radiation. A plurality of capacitive elements C11 to C33 provided, and a first semiconductor layer 4 that forms a photoelectric conversion layer that converts light converted in wavelength from radiation (X-rays) incident on the phosphor layer 14 into charges. A plurality of switches and photoelectric conversion elements having a first electrode layer 2 for forming a gate electrode and second electrode layers 6 and 7 for forming a source / drain electrode and connected to capacitive elements C11 to C33 TFTs (T11 to T33) functioning as a bias, bias wirings Vs1 to Vs1 to apply a bias to the capacitive elements C11 to C32, and gate wirings Vs1 to Vs1 to supply drive signals to the TFTs (T11 to T33) A radiation imaging substrate having a pixel area 100 composed of signal wirings Sig1 to 3 that read out the outputs of the TFTs (T11 to T33), and charge corresponding to the amount of radiation incident on the TFTs (T11 to T33) It is configured to accumulate in C11 to C33 and output the accumulated charge.

  Further, in this configuration, the signal lines Sig1 to Sig3 to which the source electrodes or drain electrodes of the TFTs (T11 to T33) are connected are TFTs (T11 to T33) as power supply units having at least two reference potentials. An accumulation power source V (str) for accumulating the generated charges in the capacitor element and a reset power source V (reset) for resetting the capacitor elements C11 to C33 are connected.

  Therefore, according to this embodiment, the manufacturing process is simplified by comprising a capacitor element and a TFT that functions as a switch and a photoelectric conversion element, and enabling connection of at least two or more reference potentials to the signal wiring of the TFT. It is possible to provide an inexpensive radiation imaging apparatus with a high yield. That is, comparing the mutual layer configuration of the capacitive element and the TFT (FIG. 3), since there is no single layer formed only for the capacitive element formation, the capacitive element and the TFT can be formed by the same process. In addition, the number of manufacturing steps can be greatly reduced and the manufacturing process can be simplified.

  In addition, according to the radiation imaging apparatus of the present embodiment, since the TFT has a function of a photoelectric conversion element in addition to the switch function, increasing the TFT size can increase the sensitivity and improve the transfer capability. It is possible to have an effect at the same time.

  Next, the radiation imaging apparatus of a present Example is demonstrated using drawing. The difference between the present embodiment and the first embodiment is that a bias power source Vs is provided in the gate driving device 102 and the bias wirings Vs1 to Vs3 are connected to the gate driving device 102. Other components are the same as those in the first embodiment.

  The radiation imaging apparatus of the present embodiment is a radiation imaging as a photoelectric conversion apparatus in which an optical sensor composed of a capacitive element and a TFT using, for example, amorphous silicon (a-Si) functioning as a switch and a photoelectric conversion element is arranged. 1 is a combination of a substrate for use and a phosphor as a wavelength converter for converting radiation into visible light, but the layer configuration of each element is different from that of the first embodiment.

  11 is an equivalent circuit diagram of the radiation imaging apparatus of the present embodiment, FIG. 12 is a plan view, and FIG. 13 is a cross-sectional view of one pixel along the line BB ′ in FIG.

  As shown in FIG. 11, the radiation imaging substrate includes a capacitive element and a TFT that functions as a switch and a photoelectric conversion element. C11 to C33 are capacitive elements, and T11 to T33 are TFTs serving as switches and photoelectric conversion elements. Each of them constitutes a pixel, and a plurality of two-dimensionally arranged pixels are formed on an insulating substrate to form a pixel area (pixel portion) 100. ing. Here, 3 × 3 pixels are shown as the pixel arrangement of the pixel area 100, but actually, for example, 2000 × 1000 pixels are arranged on the insulating substrate.

  The insulating substrate (photoelectric conversion substrate) is cut at a predetermined cutting portion, and the signal wirings Sig1 to Sig3 are connected to the reading device 101 via the printed wiring board such as TCP (tape carrier package), the bias wirings Vs1 to Vs3 and the gate. The wirings Vg1 to Vg3 are connected to the gate driving device 102, respectively. The bias lines Vs1 to Vs3 are connected to a bias power source (not shown) provided in the gate driving device 102.

  As shown in the figure, the capacitive elements C11 to C33 are connected to common bias lines Vs1 to Vs3, and a constant bias is applied from the gate driving device 102. The gate electrodes of the TFTs (T11 to T33) are connected to the common gate wirings Vg1 to Vg3, and the gate driving device 102 controls the ON and OFF of the gates of the TFTs (T11 to T33). The source or drain electrode of each TFT (T11 to T33) is connected to common signal wirings Sig1 to Sig3, and each signal wiring Sig1 to Sig3 is connected to the reading device 101.

  As shown in the plan view of FIG. 12, each of the TFTs (T11 to T33) includes a plurality of source electrodes or drain electrodes in a region between the capacitive elements C11 to C33 and the signal wirings Sig1 to Sig3. The signal lines Sig1 to Sig3 are formed at predetermined intervals extending in a direction orthogonal to the direction of the signal lines Sig1 to Sig3. In this way, the TFT size is increased.

  As shown in FIG. 13, the layer configuration of the radiation imaging apparatus includes a TFT (T11) and a capacitive element C11 on an insulating substrate 21.

  The TFT (T11) includes a first electrode layer 22 that forms a gate electrode, a first insulating layer 23 that forms a gate insulating layer, a first semiconductor layer 24 that forms a photoelectric conversion layer, an n-type semiconductor layer, and the like. An ohmic contact layer 25 and second electrode layers 26 and 27 for forming source / drain electrodes are provided.

  The capacitive element C11 includes a first electrode layer 28 that forms a G electrode, a first insulating layer 29 that forms an insulating layer (same layer as the first insulating layer 23 on the TFT (T11) side), and a D electrode. The second electrode layer 30 is made up of. The D electrode (second electrode layer 30) of the capacitive element C11 and the source / drain electrodes (second electrode layers 26, 27) of the TFT (T11) are formed of the same second electrode layer, and D The electrode (second electrode layer 30) and the source or drain electrode (second electrode layers 26, 27) are connected.

  The gate wiring Vg1 is formed from the first electrode layer, and is connected to the gate electrode (first electrode layer 22) of the TFT (T11). The signal wiring Sig1 is formed from the second electrode layer and is connected to the source / drain electrodes (second electrode layers 26 and 27). The bias wiring Vs1 is formed of the first electrode layer, and is connected to the G electrode (first electrode layer 28) of the capacitor C11.

On these layers, a second insulating layer 31 made of SiNx or the like and an organic protective layer 32 made of polyimide or the like are formed. Furthermore, a phosphor layer 34 is disposed on the upper layer via an adhesive layer 33.
[Application example]
FIG. 6 shows an application example of the radiation imaging apparatus according to the present invention to an X-ray diagnostic system.

  X-rays 6060 generated by the X-ray tube 6050 pass through the chest 6062 of the patient or subject 6061 and enter a radiation imaging apparatus 6040 having a scintillator (phosphor) mounted thereon. This incident X-ray includes information inside the body of the patient 6061. The scintillator emits light in response to the incidence of X-rays, and this is photoelectrically converted to obtain electrical information. This information can be digitally converted and image-processed by an image processor 6070 as a signal processing means, and can be observed on a display 6080 as a display means in a control room.

  Further, this information can be transferred to a remote place by transmission processing means such as a telephone line 6090, and can be displayed on a display 6081 serving as a display means such as a doctor room in another place or stored in a recording means such as an optical disk. It is also possible for a doctor to make a diagnosis. Moreover, it can also record on the film 6110 used as a recording medium by the film processor 6100 used as a recording means.

  As described above, the present invention is a medical image diagnostic apparatus, a nondestructive inspection apparatus, a photoelectric conversion substrate and a photoelectric conversion apparatus, a radiation imaging substrate, a radiation imaging apparatus, and the like applied to an analysis apparatus using radiation. It is applicable to the use of.

1 is an equivalent circuit diagram of a radiation imaging apparatus according to Embodiment 1 of the present invention. It is a top view of the radiation imaging device shown in FIG. FIG. 3 is a cross-sectional view of one pixel along the line A-A ′ in FIG. 2. 5 is a timing chart illustrating a method for driving a radiation imaging apparatus according to an embodiment of the present invention. It is a graph which shows the gate bias dependence of the amount of OFF leaks with respect to the light irradiation amount at the time of using a photoelectric converting layer for the semiconductor layer of TFT. It is the schematic explaining the example of application to the X-ray diagnostic system of the radiation imaging device of this invention. It is the equivalent circuit schematic of the radiation imaging device of a prior art example. It is a top view of the radiation imaging device of a prior art example. It is sectional drawing of 1 pixel of the radiation imaging device of a prior art example. It is a timing diagram explaining the drive method of the radiation imaging device of a prior art example. It is the equivalent circuit schematic of the radiation imaging device by Example 2 of this invention. It is a top view of the radiation imaging device shown in FIG. FIG. 13 is a plan view of one pixel along the line B-B ′ in FIG. 12.

Explanation of symbols

100 pixel area (pixel part)
101 Reading device (reading circuit unit)
102 Gate drive device (drive circuit section)
P11 to P33 Photoelectric conversion element (semiconductor conversion element)
C11 to C33 Capacitance elements T11 to T33 TFT (Thin Film Transistor)
Vg1 to 3 Common gate wiring Sig1 to 3 Common signal wiring Vs1 to 3 Common bias wiring

Claims (6)

A wavelength converter for converting radiation into light;
A pixel portion in which a plurality of pixels are two-dimensionally arranged on a substrate, a plurality of bias wirings that connect to the plurality of pixels and apply a bias to the pixels, and a plurality of pixels that are connected to the plurality of pixels. In a radiation imaging apparatus comprising: a plurality of drive wirings to be driven; and a photoelectric conversion substrate having a signal wiring that is connected to the plurality of pixels and reads out charges generated in the pixels.
The pixel includes a capacitive element connected to the bias wiring, and a photoelectric conversion element connected to the capacitive element, the driving wiring, and the signal wiring,
The photoelectric conversion element includes a gate electrode connected to the drive wiring, an insulating layer, a semiconductor layer that converts the light into electric charge, one connected to the capacitor, and the other connected to the signal wiring. A source / drain electrode,
A radiation imaging apparatus comprising a power supply unit connected to the signal wiring and having at least two reference potentials. The capacitive element accumulates the charge generated in the semiconductor layer in response to the light,
2. The radiation imaging apparatus according to claim 1, wherein the photoelectric conversion element transfers the electric charge accumulated in the capacitor element to the signal wiring by a driving signal from the driving wiring. In the capacitor element, charges are accumulated in advance,
The photoelectric conversion element discharges the electric charge accumulated in the capacitive element according to the light, and transfers the remaining electric charge of the capacitive element to the signal wiring in accordance with a driving signal from the driving wiring. The radiation imaging apparatus according to claim 1 or 2.   The power supply unit includes: a storage power supply for storing the electric charge generated in the photoelectric conversion element in the capacitive element; and a reset power supply for resetting the capacitive element. The radiation imaging apparatus according to any one of 1 to 3. 5. The wavelength converter according to claim 1, wherein the wavelength converter is a phosphor mainly composed of gadolinium oxysulfide (Gd ₂ O ₂ S ₃ ) or cesium iodide (CsI). Radiation imaging device. An insulating layer disposed to cover the pixel portion;
The radiation imaging apparatus according to claim 1, further comprising a protective layer disposed between the insulating layer and the wavelength converter.