JP2006165099A5 - - Google Patents
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- Publication number
- JP2006165099A5 JP2006165099A5 JP2004351172A JP2004351172A JP2006165099A5 JP 2006165099 A5 JP2006165099 A5 JP 2006165099A5 JP 2004351172 A JP2004351172 A JP 2004351172A JP 2004351172 A JP2004351172 A JP 2004351172A JP 2006165099 A5 JP2006165099 A5 JP 2006165099A5
- Authority
- JP
- Japan
- Prior art keywords
- clock
- block
- input terminal
- asic
- blocks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001934 delay Effects 0.000 claims 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004351172A JP4298639B2 (ja) | 2004-12-03 | 2004-12-03 | Asic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004351172A JP4298639B2 (ja) | 2004-12-03 | 2004-12-03 | Asic |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006165099A JP2006165099A (ja) | 2006-06-22 |
| JP2006165099A5 true JP2006165099A5 (https=) | 2008-01-17 |
| JP4298639B2 JP4298639B2 (ja) | 2009-07-22 |
Family
ID=36666788
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004351172A Expired - Fee Related JP4298639B2 (ja) | 2004-12-03 | 2004-12-03 | Asic |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4298639B2 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010063258A (ja) * | 2008-09-03 | 2010-03-18 | Panasonic Corp | モータ制御装置 |
| JP5743063B2 (ja) | 2011-02-09 | 2015-07-01 | ラピスセミコンダクタ株式会社 | 半導体集積回路、半導体チップ、及び半導体集積回路の設計手法 |
| CN109274334A (zh) * | 2018-11-20 | 2019-01-25 | 广州市力驰微电子科技有限公司 | 一种极低功耗石英晶体振荡电路 |
-
2004
- 2004-12-03 JP JP2004351172A patent/JP4298639B2/ja not_active Expired - Fee Related
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