JP2006148846A - Wireless reception circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inexpensive, power consumption reduced and lightweight wireless receiver comprising a double super-heterodyne reception circuit without using a VCO, PLL circuit, frequency control CPU and the like conventionally used for a wireless receiver in a standard manner. <P>SOLUTION: The double super-heterodyne circuit is constituted by using an independent reference signal oscillator as a second local oscillation signal, multiplying a reference oscillation frequency using a multiplication circuit communicated to that reference signal oscillator to produce a first local oscillation signal and inputting it to first and second mixers, a switch is provided for slightly varying a frequency in the independent reference signal oscillator, and a plurality of different signal frequencies are received in accordance with that frequency change. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to simplification of a receiving circuit of a radio device.

  At present, a reception circuit of a double superheterodyne reception system including a voltage controlled oscillation circuit (hereinafter referred to as a VCO), a PLL circuit, and a control CPU is widely used as a reception circuit of a standard radio.

  Hereinafter, an example of the above-described conventional wireless reception circuit will be described with reference to the drawings. FIG. 2 shows a block diagram of a conventional radio receiver. In FIG. 2, reference numeral 1 denotes a receiving antenna, which captures radio waves in an incoming space.

  Reference numeral 2 denotes a band-pass filter that passes only a signal of a necessary reception band and removes an unnecessary band signal.

  Reference numeral 3 denotes a high-frequency amplifier for amplifying a signal of a necessary band taken out by a band-pass filter, and is added to obtain a necessary sensitivity as a radio receiver.

  Reference numeral 4 denotes a first mixer, which generates a first intermediate frequency by frequency-converting a signal of a necessary band.

  5 is an oscillation circuit that can change the oscillation frequency by changing the DC voltage applied by the VCO, 6 is a PLL circuit, 8 is a reference crystal oscillation circuit, and PLL circuit 6 is a frequency generated by the reference crystal oscillation circuit 8. Is divided to generate a comparison frequency of the PLL circuit.

  Reference numeral 9 denotes a CPU, which is connected to the PLL circuit 6 and sets a frequency division ratio that provides a necessary frequency. The PLL circuit 6 and the VCO 5 are connected in a closed loop. The phase of the frequency oscillated by the VCO 5 and the target frequency generated by the PLL circuit 6 are compared, and if the frequency is deviated from the target frequency, the difference is output as a voltage. Thus, the VCO 5 is always caused to follow the frequency set by the PLL circuit 6.

  For example, assuming that the signal input from the receiving antenna 1 is the frequency f1, in the case of the lower heterodyne, the VCO 5 generates a local oscillation frequency of f1 minus the first intermediate frequency, and the first mixer 4 generates the signal f1 and the previously described local oscillation frequency. Mixed to produce a first intermediate frequency signal.

  Reference numeral 10 denotes a first intermediate frequency filter which takes out only the first intermediate frequency signal generated by the first mixer 4. 11 is a first intermediate frequency amplifier that performs necessary signal amplification.

  The second mixer 12 converts the first intermediate frequency into the second intermediate frequency. The second mixer 12 receives the local oscillation frequency from the second local oscillation circuit 13 and the second intermediate frequency. To produce.

  Reference numeral 14 denotes a second intermediate frequency filter that takes out only the second intermediate frequency signal generated by the second mixer 12. A second intermediate frequency amplifier 15 performs necessary signal amplification.

  Reference numeral 16 denotes a detection circuit which extracts only the modulated signal from the modulated second intermediate frequency signal and outputs an audio signal. The output is input to 17 AF amplifiers to amplify the audio signal and drive 18 speakers.

  Since the VCO 5 can arbitrarily set the frequency by the PLL circuit 6 and the CPU 9, a receiving circuit that receives a plurality of frequencies can be configured.

  As described above, the purpose of performing multiple frequency conversions is to increase the interference rejection capability and obtain the necessary sensitivity for stability, and as a simple method, a super regenerative reception system that does not perform multiple frequency conversion operations May be used, but the ability to eliminate interference is weak, and it is almost never used except for special purposes.

JP-A-4-192725

  However, in the configuration as described above, since the circuit becomes complicated, the cost of the receiving circuit is increased, and a large amount of power is required for each circuit, and the number of parts increases, which makes it difficult to reduce the weight of the receiver. there were.

  The present invention has been made in view of the above points, and it is possible to receive a plurality of frequencies and simplify the circuit, reduce power consumption, and reduce weight while maintaining necessary interference elimination capability. Can be realized.

  In order to solve the above problems, a wireless communication device of the present invention slightly changes the frequency of one independent reference frequency oscillation circuit, a multiplication circuit that multiplies the reference frequency, and one independent reference frequency oscillation circuit. And the reference frequency oscillation circuit is a second local oscillator, and a frequency multiplied by a multiplication circuit for multiplying the reference frequency is a first local oscillation frequency.

  In the independent reference frequency oscillation circuit, the frequency can be slightly varied within a range in which a plurality of frequencies can be obtained by varying the frequency so as to be within the pass bandwidth of the first intermediate frequency filter and the second intermediate frequency filter. It is characterized in that it can be used for the reception frequency.

  With the above configuration, the wireless reception circuit of the present invention can receive a plurality of frequencies without deterioration in reception performance without using a VCO, PLL circuit, second local oscillation circuit, and CPU required in the prior art. A receiver can be configured.

  Embodiments according to the present invention will be described below with reference to the drawings. In addition, the same code | symbol is attached | subjected about the component similar to a conventional circuit.

  FIG. 1 is a block diagram of a radio receiving circuit according to an embodiment of the present invention. In FIG. 1, the components denoted by the same reference numerals as those in FIG. 2 are identical in purpose, function and operation to the conventional example in FIG. Therefore, description is abbreviate | omitted and only a different component from a prior art example is demonstrated.

  Reference numeral 19 denotes an independent reference frequency oscillating circuit, which is a general-purpose reference oscillating frequency of 22.25 MHz in this embodiment. In addition, a case will be described where the frequencies received by the receiving antenna 1 are 422.3 MHz and 422.2 MHz, which are frequencies currently allocated to the specific low-power radio.

  Reference numeral 7 denotes a multiplication circuit, which is assumed to be an 18-fold multiplication circuit as an embodiment, and is connected to a reference frequency oscillation circuit to extract a signal having a frequency multiplied by 18.

  Reference numeral 20 denotes frequency varying means for slightly varying the frequency of an independent reference frequency oscillation circuit. For example, even in a crystal oscillation circuit, the center frequency can be slightly changed by adding an additional component to the crystal resonator. In addition, an oscillation circuit called a temperature controlled crystal oscillation circuit (VCTCXO) with a voltage control terminal that can vary the frequency by voltage can be used as a reference frequency oscillation circuit, and the frequency can be set by selecting the frequency control voltage of the reference frequency oscillation circuit with a switch. It can also be changed.

Originally, a crystal oscillation circuit generates a stable fixed frequency, and the frequency cannot be varied greatly. However, a slight frequency change of the present invention can vary the frequency while maintaining stable performance. Is possible.

The operation will be described below with a specific example. First, the case where the signal frequency from the receiving antenna 1 is 422.3 MHZ will be described. The first intermediate frequency is set to 21.8 MHz, and the second intermediate frequency is set to 450 KHz. The first intermediate frequency is fixedly determined by the receiving circuit and corresponds to the center frequency of the filter. The reference oscillation frequency is set to 22.25 MHz in advance, and the reference oscillation frequency 22.25 MHz is obtained by the multiplier circuit to extract the harmonic component 400.5 MHZ of 18-fold component, which becomes the local oscillation frequency of the first mixer 4.

The first mixer 4 is supplied with a signal frequency of 422.3 MHZ and a local oscillation frequency of 400.5 MHZ, and a first intermediate frequency of 21.8 MHZ of the difference component is created. It passes through one intermediate frequency amplifier 11 and is added to the second mixer 12.

The reference oscillation frequency of 22.25 MHz of the reference frequency oscillation circuit is added to the second mixer 12 as it is, and 450 KHz which is the frequency difference between 21.8 MHz and 22.25 MHz is taken out as the output of the second mixer 12.

  Next, the case where the signal frequency from the receiving antenna 1 is 422.2 MHZ will be described. By turning off the frequency varying means 20 of the reference oscillation frequency oscillation circuit, the frequency is changed to 22.2447 MHz. In this case, the multiplication circuit 7 takes out the harmonic component 400.4046 MHZ of the 18-fold component, and this becomes the local oscillation frequency of the first mixer 4. The first mixer 4 is supplied with a signal frequency of 422.2 MHZ and a local oscillation frequency of 400.4046 MHZ. The first mixer 4 produces a first intermediate frequency of 21.7954 MHZ as the difference component. It passes through the intermediate frequency filter 10 and the first intermediate frequency amplifier 11 and is added to the second mixer 12.

Here, the first intermediate frequency filter 10 is fixed at 21.8 MHz, and a shift of 4.6 KHz occurs between 21.7954 MHz, but the pass bandwidth of the crystal filter normally used in the radio can be selected, In this embodiment, if ± 10 KHz is selected with respect to the center value, a shift of 4.6 KHz can be used within the passband without any problem.

  The reference oscillation frequency of 22.2447 MHz of the reference frequency oscillation circuit is added to the second mixer 12 as it is, and 449.3 KHz, which is the difference between 21.795 MHZ and 22.2447 MHz, is taken out as the output of the second mixer 12. . Here, the second intermediate frequency filter 14 is fixed at 450 KHz, and a deviation of 0.7 KHz occurs between 449.3 KHz, but the pass bandwidth of the crystal filter normally used in a radio can be selected, and this embodiment In the case of the example, if ± 1.5 KHz is selected with respect to the center value, a deviation of 0.7 KHz can be used within the passband without any problem.

  In the embodiment, the case where there are two reception frequencies has been described. However, if the bandwidth of the first intermediate frequency filter and the pass bandwidth of the second intermediate frequency filter are not separated, the number of reception frequencies is increased. Yes.

  In this embodiment, the first intermediate frequency is 21.8 MHz and the second intermediate frequency is 450 KHz. However, any intermediate frequency can be selected as long as the above-described frequency relationship is maintained, and the reception frequency can be extended to any frequency. it can. Further, although the multiplication number of the multiplication circuit 7 is set to 18 in the previous embodiment, any magnification can be selected as long as the frequency relationship is maintained.

  Further, in this embodiment, the heterodyne relationship is a lower heterodyne in the first mixer 4 and an upper heterodyne in the second mixer 12, but these can be arbitrarily selected.

  Further, the high frequency amplifier circuit is omitted from the line receiving circuit of the present invention. As the interference rejection capability, it is more effective not to use a high-frequency amplifier circuit, and it is deleted for the purpose of reducing the power consumption of the present invention. However, it may be added when particularly high sensitivity is required.

  As a practical application example, when using it for portable receivers for wireless guidance at event venues and exhibitions, the receivers are lent out to a large number of visitors, but problems such as loss are likely to occur. It is desired to make it inexpensively. In addition, it is often used by ordinary children and older people, and forgetting to turn off the power, there is a demand for a battery that lasts as long as possible and that consumes less power. On the other hand, radio devices with many frequencies are used in event venues, and it is not preferable that the interference elimination performance of the receiver deteriorates because there are many external signals that interfere. According to the wireless receiver circuit of the present invention, it is possible to provide a wireless receiver that is inexpensive, lightweight, and that consumes as little power as possible while maintaining the reception performance equivalent to that of a normal wireless device.

The block diagram of the radio | wireless receiving circuit which shows embodiment of this invention Block diagram of a conventional radio receiving circuit

Explanation of symbols

1 ----- Receiving antenna 2 ----- Band pass filter 4 ----- First mixer 7 ----- Multiplier circuit 10 --- First intermediate frequency filter 11 --- First intermediate Frequency amplifier 12 --- Second mixer 14 --- Second intermediate frequency filter 15 --- Second intermediate frequency amplifier 16 --- Detection circuit 17 --- AF amplifier 18 --- Speaker 19 --- Independent Reference frequency oscillator 20 --- Frequency variable means

Claims (1)

  An independent reference frequency oscillator having means for slightly varying the frequency as the second local oscillation signal, a multiplier circuit connected to the reference signal oscillator as the first local oscillation signal, and a first local oscillation signal and a second local oscillation signal; A radio receiver circuit comprising a double superheterodyne circuit configured by inputting local oscillation signals to a first mixer and a second mixer, respectively.

Images