JP2006141096A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can also sufficiently cool a control circuit together with a power circuit and besides is small-sized. <P>SOLUTION: Coolers 52, 54, 56 and 58 are stacked alternately with semiconductor element parts 42, 44 and 46, which constitute a power circuit, so as to cool the semiconductor element parts 42, 44 and 46 from both their sides. A controller 30, which constitutes the control circuit, is arranged at the side of the stack consisting of the semiconductor element parts 42, 44 and 46 and the coolers 52, 54, 56 and 58. Then, the controller 30 is connected with a heat conductive member 60 which is joined with a face not in contact with the semiconductor element part 42 of the cooler 52 on the uppermost stage of the stack, that is, a cooling face which does not serve the cooling of the semiconductor element parts 42, 44 and 46. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a semiconductor element and a cooler that cools the semiconductor element from both sides are stacked.

Japanese Patent Application Laid-Open No. 11-18429 (Patent Document 1) discloses a control module including a power circuit and a control circuit for controlling the power circuit. In this control module, an IGBT (Insulated Gate Bipolar Transistor) chip, an electrolytic capacitor chip, a micro conveyor chip and a control power circuit chip are mounted on one water-cooled heat sink. And according to this control module, control circuits, such as a micro conveyor chip and a control power supply circuit chip, are cooled by a water-cooled heat sink together with power circuits such as an IGBT chip and an electrolytic capacitor chip (see Patent Document 1).
Japanese Patent Laid-Open No. 11-18429 JP 2001-111279 A

  However, in the control module disclosed in Japanese Patent Laid-Open No. 11-18429, the control circuit and the power circuit are mounted on the same plane of one water-cooled heat sink. It is not possible to fully plan.

  Accordingly, the present invention has been made to solve such a problem, and an object of the present invention is to provide a small-sized semiconductor device that can sufficiently cool a control circuit as well as a power circuit.

  According to this invention, the semiconductor device includes a semiconductor element portion, first and second cooling bodies provided so as to sandwich the semiconductor element portion from both sides, and a control device that controls the operation of the semiconductor element portion, The control device is cooled using a second cooling surface that is a cooling surface of at least one of the first and second cooling bodies and is different from the first cooling surface in contact with the semiconductor element portion. .

  Preferably, the second cooling surface is a surface facing the first cooling surface.

  Preferably, the semiconductor device further includes a heat conducting member that is disposed between the second cooling surface and the control device and that transfers heat from the control device to the second cooling surface.

  Preferably, the control device includes a control board connected to the heat conducting member, and a control circuit mounted on the control board. The control device has a normal direction of the control board in which the semiconductor element portion and the first and first It arrange | positions along a laminated body so that it may become substantially perpendicular | vertical to the lamination direction of the laminated body which consists of 2 cooling bodies.

  Preferably, the control board includes a metal board connected to the heat conducting member and an insulating layer provided between the metal board and the control circuit.

  Preferably, the semiconductor device further includes a power terminal block to which a power terminal of the semiconductor element portion is connected, and the control device is disposed on the opposite side of the power terminal block across the stacked body.

  Preferably, the control device is mounted on the second cooling surface in the first or second cooling body.

  Preferably, the control device includes a control board mounted on the second cooling surface and a control circuit mounted on the control board, the control board being a metal substrate in close contact with the second cooling surface; It consists of an insulating layer provided between the metal substrate and the control circuit.

  Further, according to the present invention, a semiconductor device includes a plurality of semiconductor element portions and a plurality of cooling bodies that are alternately stacked with the plurality of semiconductor element portions and are provided so as to sandwich each of the plurality of semiconductor element portions from both sides. And a control device that controls the operation of the plurality of semiconductor element portions, and the control device includes at least one cooling body disposed at an end portion in the stacking direction of the plurality of semiconductor element portions and the plurality of cooling bodies. And a second cooling surface that is opposed to the first cooling surface that is in contact with the adjacent semiconductor element portion.

  According to the invention, the semiconductor device includes a plurality of stacked semiconductor modules and a control device that controls operations of the plurality of semiconductor modules, and each of the plurality of semiconductor modules includes a semiconductor element portion, a semiconductor The control device includes first and second cooling bodies provided to sandwich the element portion from both sides, and the control device cools at least one of the first and second cooling bodies in at least one of the plurality of semiconductor modules. Cooling is performed using a second cooling surface that is a surface and faces the first cooling surface in contact with the semiconductor element portion.

  In the semiconductor device according to the present invention, the first and second cooling bodies are provided so as to sandwich the semiconductor element portion from both sides. The control device cools using a second cooling surface that is a cooling surface of at least one of the first and second cooling bodies and is different from the first cooling surface in contact with the semiconductor element portion. Is done. That is, the cooling surface that is not in contact with the semiconductor element portion of the first or / and second cooling body is used for cooling the control device.

  Therefore, according to the present invention, the control device can be cooled by efficiently using the first and second cooling bodies. Further, it is not necessary to increase the size of the first and second cooling bodies in order to secure a region for heat exchange with the control device, and the semiconductor element portion and the control device can be cooled with a compact configuration.

  Further, in the semiconductor device according to the present invention, a heat conduction member is provided between the second cooling surface and the control device and transfers heat from the control device to the second cooling surface. Even if the control device is not in direct contact with the cooling body, the heat from the control device is transferred to the cooling body through the heat conducting member. Therefore, according to this invention, the freedom degree of the installation place of a control apparatus improves.

  Further, according to the semiconductor device of the present invention, the control device is configured such that the normal direction of the control substrate is substantially perpendicular to the stacking direction of the stack including the semiconductor element portion and the first and second cooling bodies. Therefore, the length of the control signal line provided between the control device and the semiconductor element portion can be shortened.

  In the semiconductor device according to the present invention, since the control board includes a metal board connected to the heat conducting member and an insulating layer provided between the metal board and the control circuit, the thermal resistance of the control board is low. . Therefore, according to the present invention, heat from the control circuit can be effectively radiated to the cooling body via the control board and the heat conducting member.

  Further, in the semiconductor device according to the present invention, the power terminal block to which the power terminal of the semiconductor element portion is connected is provided, and the control device is disposed on the opposite side of the power terminal block across the stacked body. The laminated body serves as a heat barrier for the control device against heat generated from the terminal block. Therefore, according to the present invention, the control device is not exposed to high temperatures.

  In the semiconductor device according to the present invention, the control device is mounted on the second cooling surface of the first or second cooling body and is directly cooled by the first or second cooling body. Therefore, according to the present invention, the control device can be efficiently and effectively cooled.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is an electric circuit diagram of an inverter device shown as an example of a semiconductor device according to Embodiment 1 of the present invention. Referring to FIG. 1, this inverter device 10 includes an inverter 20, a control device 30, a capacitor C, a power supply line PL, a ground line SL, and output lines UL, VL, WL. Inverter 20 is connected to battery B through power supply line PL and ground line SL. Inverter 20 is connected to motor generator MG, which is an electrical load, via output lines UL, VL, WL.

  Motor generator MG driven by inverter device 10 is, for example, a three-phase AC synchronous motor, and generates a driving force by AC power received from inverter 20 via output lines UL, VL, WL. Motor generator MG also generates AC power during regenerative braking, and outputs the generated AC power to inverter 20 via output lines UL, VL, WL.

  The battery B is a direct current power source, and is composed of, for example, a secondary battery such as nickel metal hydride or lithium ion. Battery B supplies the generated DC voltage to inverter 20 through power supply line PL, and is charged by the DC voltage from inverter 20 through power supply line PL. Capacitor C is connected between power supply line PL and ground line SL, and reduces the influence on battery B and inverter 20 due to voltage fluctuation.

  Inverter 20 includes a U-phase arm 22, a V-phase arm 24 and a W-phase arm 26. U-phase arm 22, V-phase arm 24, and W-phase arm 26 are connected in parallel between power supply line PL and ground line SL. The U-phase arm 22 is composed of npn transistors Q1 and Q2 connected in series, the V-phase arm 24 is composed of npn transistors Q3 and Q4 connected in series, and the W-phase arm 26 is connected in series. Npn transistors Q5 and Q6. Each of the npn transistors Q1 to Q6 is made of, for example, an IGBT. Also, diodes D1 to D6 that flow current from the emitter side to the collector side are connected between the collector and emitter of npn transistors Q1 to Q6, respectively.

  A connection point of each npn transistor in each phase arm is connected to an anti-neutral point side of each U, V, W phase coil of motor generator MG via output lines UL, VL, WL.

  Inverter 20 converts a DC voltage received from power supply line PL into an AC voltage based on a control signal from control device 30 and outputs the AC voltage to motor generator MG. Thereby, motor generator MG is driven to generate a desired torque. Inverter 20 also converts the AC voltage generated by motor generator MG into a DC voltage based on a control signal from control device 30, and outputs the converted DC voltage to power supply line PL.

  Control device 30 generates a control signal for driving motor generator MG based on the input voltage of inverter 20 and the motor current and torque command value of motor generator MG, and outputs the generated control signal to inverter 20. . The input voltage of inverter 20 and the motor current of motor generator MG are detected by a sensor (not shown).

  In this inverter device 10, inverter 20 receives DC power from battery B via power supply line PL and ground line SL, converts the received DC power into AC power, and passes through output lines UL, VL, WL. The AC power is output to motor generator MG. Inverter 20 receives AC power generated by motor generator MG via output lines UL, VL, WL, converts the received AC power into DC power, and passes power supply line PL and ground line SL. Battery B is charged.

  FIG. 2 is a cross-sectional view showing the structure of the inverter device 10 shown in FIG. Referring to FIG. 2, inverter device 10 includes semiconductor element portions 42, 44, 46, coolers 52, 54, 56, 58, heat conducting member 60, mold resin 62, control device 30, and control. Signal lines 64, 66, 68, power bus bars 70, 72, 74, a power terminal block 76, a capacitor C, and a case 78 are provided.

  Semiconductor element units 42, 44, and 46 constitute U-phase arm 22, V-phase arm 24, and W-phase arm 26 of inverter 20 shown in FIG. That is, the semiconductor element portion 42 includes npn transistors Q1 and Q2 and diodes D1 and D2 and a plurality of electrode plates for supplying electric power thereto, and the semiconductor element portion 44 includes npn transistors Q3 and Q4 and diodes. D3 and D4 and a plurality of electrode plates for supplying power thereto, and the semiconductor element section 46 includes npn transistors Q5 and Q6 and diodes D5 and D6 and a plurality of electrode plates for supplying power thereto. Including.

  The coolers 52, 54, 56, and 58 are made of aluminum, for example, and have a refrigerant path therein. The coolers 52, 54, 56, and 58 are alternately stacked with the semiconductor element portions 42, 44, and 46, and cool the semiconductor element portions 42, 44, and 46 from both sides. That is, the coolers 52 and 54 are provided so as to sandwich the semiconductor element portion 42 from both sides, the coolers 54 and 56 are provided so as to sandwich the semiconductor element portion 44 from both sides, and the coolers 56 and 58 are provided as semiconductors. The element portion 46 is provided so as to be sandwiched from both sides.

  The heat conducting member 60 is made of, for example, a graphite sheet having a high heat conductivity. The heat conducting member 60 is the uppermost surface of a laminated body (hereinafter simply referred to as “laminated body”) composed of the semiconductor element portions 42, 44, 46 and the coolers 52, 54, 56, 58, that is, the upper surface of the cooler 52. To be joined. And the end part of the heat conductive member 60 is connected to the control apparatus 30 arrange | positioned at the side of a laminated body.

  The mold resin 62 is, for example, an epoxy resin, and integrally fixes and seals the laminated body and the heat conducting member 60 joined to the upper surface of the cooler 52 at the top of the laminated body.

  The control device 30 is disposed on the opposite side of the power terminal block 76 along the side surface of the stacked body with the stacked body interposed therebetween. That is, the control device 30 is disposed on the side of the laminate so that the normal direction thereof is perpendicular to the lamination direction of the laminate, and the laminate is the control device for the heat generated from the power terminal block 76. It is arrange | positioned on the opposite side to the power terminal block 76 on both sides of a laminated body so that it may become 30 heat shields. The control device 30 is connected to the heat conducting member 60 as described above, and the heat generated in the control device 30 is radiated to the cooler 52 via the heat conducting member 60.

  The control signal lines 64, 66, and 68 are wired between the control device 30 and the semiconductor element units 42, 44, and 46, and control signals are exchanged between the control device 30 and the semiconductor element units 42, 44, and 46, respectively. To do. Here, since the control device 30 is disposed on the side of the laminated body so that the normal direction thereof is perpendicular to the lamination direction of the laminated body, the control signal lines 64, 66, and 68 can have any wiring length. Can also be shortened.

  The power terminal block 76 is connected to power bus bars 70, 72, 74 drawn from the semiconductor element portions 42, 44, 46, output lines UL, VL, WL connected to a motor generator MG (not shown), and a battery B (not shown). A wiring case for wiring the power supply line PL and the ground line SL in consideration of the device layout, and is disposed between the multilayer body and the capacitor C. A capacitor C is disposed on the opposite side of the stacked body with the power terminal block 76 interposed therebetween, and a power line PL and a ground line SL are disposed above the capacitor C.

  In the inverter device 10, the heat conducting member 60 is joined to a surface of the uppermost cooler 52 that is not in contact with the semiconductor element portion 42. That is, in this inverter device 10, in order to ensure the cooling performance of the semiconductor element portions 42, 44, 46, the semiconductor element portions 42, 44, 46 and the coolers 52, 54, 56, 58 are alternately stacked. Each of the semiconductor element portions 42, 44, 46 is cooled from both sides.

  Here, the middle-stage coolers 54 and 56 are in contact with the semiconductor element portion on both the upper and lower surfaces and efficiently perform the cooling function. The uppermost cooler 52 and the lowermost cooler 58 are the lower surface and the upper surface, respectively. Only in contact with the semiconductor element portion, the cooling capacity is not effectively utilized.

  Therefore, in this inverter device 10, the surface that is not in contact with the semiconductor element portion 42 of the uppermost cooler 52 is connected to the control device 30 using the heat conduction member 60, and the semiconductor element portion 42 in the uppermost cooler 52. The control device 30 is cooled using a cooling surface that is not directly used for cooling.

  FIG. 3 is a cross-sectional view showing the configuration of the substrate of the control device 30 shown in FIG. Referring to FIG. 3, the substrate of control device 30 includes a metal substrate 80, an insulating layer 82, and conductor circuits 84 and 86. The metal substrate 80 is made of, for example, aluminum, and the metal substrate 80 is connected to the heat conducting member 60 (not shown) shown in FIG. The insulating layer 82 insulates the conductor circuits 84 and 86 from the metal substrate 80 that is a conductor, and transfers heat generated from the control circuit on the conductor circuits 84 and 86 to the metal substrate 80. The conductor circuits 84 and 86 are made of, for example, copper foil, and a control circuit is mounted on the conductor circuits 84 and 86.

  Since the metal substrate 80 is used for this substrate, its thermal resistance is smaller than that of a general glass epoxy substrate or the like. Therefore, the heat generated in the control device 30 is positively dissipated to the cooler 52 through the metal substrate 80 having a low thermal resistance and the heat conducting member 60 connected thereto.

  As described above, according to the first embodiment, the control device 30 is cooled using the upper surface side of the cooler 52 at the top of the stacked body that is not used for cooling the semiconductor element portions 42, 44, 46. Therefore, the control device 30 and the laminated body can be efficiently cooled with a compact configuration.

  Further, since the control device 30 is disposed along the laminated body to the side of the laminated body, the wiring lengths of the control signal lines 64, 66, and 68 can be shortened.

  Further, since the control device 30 is disposed on the opposite side of the power terminal block 76 with the stacked body interposed therebetween, the stacked body serves as a heat shield for heat from the power terminal block 76, and the control device 30 is connected to the power terminal block 76. You will not be exposed to the heat.

  Furthermore, since the control device 30 is constituted by the metal substrate 80, the thermal resistance of the substrate can be kept low, and as a result, the heat from the control circuit can be effectively radiated to the cooling body 52.

  In the first embodiment, the heat conducting member 60 is bonded to the surface not in contact with the semiconductor element portion 42 of the uppermost cooler 52, but is in contact with the semiconductor element portion 46 of the lowermost cooler 58. The heat conducting member may be joined to the surface that is not. Further, as in the inverter device 10A shown in FIG. 4, the heat conducting member 60 is joined to a surface not in contact with the semiconductor element portion 42 of the uppermost cooler 52 and the semiconductor element portion of the lowermost cooler 58 is joined. The heat conducting member 61 may be joined to a surface not in contact with 46. Thereby, the cooling property of the control apparatus 30 can further be improved.

[Embodiment 2]
FIG. 5 is a cross sectional view showing a structure of an inverter device 10B shown as an example of a semiconductor device according to the second embodiment of the present invention. Referring to FIG. 5, inverter device 10 </ b> B includes semiconductor modules 92, 94 instead of semiconductor element units 42, 44, 46 and coolers 52, 54, 56, 58 in the structure of inverter device 10 shown in FIG. 2. , 96. The other structure of the inverter device 10B is the same as that of the inverter device 10. The circuit configuration of the inverter device 10B is the same as the circuit configuration of the inverter device 10 shown in FIG.

  Semiconductor modules 92, 94, and 96 constitute U-phase arm 22, V-phase arm 24, and W-phase arm 26 of inverter 20 shown in FIG. Each of the semiconductor modules 92, 94, and 96 is configured by mold-sealing a semiconductor element portion and a cooler provided so as to sandwich the semiconductor element portion from both sides, as will be described later.

  Here, the heat conducting member 60 is incorporated in the semiconductor module 92, and the heat conducting member 60 protruding from the semiconductor module 92 is connected to the control device 30. Then, heat from the control device 30 is radiated to a cooler provided in the semiconductor module 92 via the heat conducting member 60.

  6 to 8 are views for explaining the structure of the semiconductor module 92 shown in FIG. 6 is a perspective view of the semiconductor module 92 shown in FIG. 5, and FIG. 7 is a cross-sectional view of a vertical section VII-VII along the longitudinal direction of the semiconductor module 92 shown in FIG. 8 is a cross-sectional view taken along a section VIII-VIII of the semiconductor module 92 shown in FIG. The semiconductor modules 94 and 96 shown in FIG. 5 are the same as the configuration of the semiconductor module 92 shown in FIGS. 6 to 8 except for the heat conducting member 60. Therefore, only the configuration of the semiconductor module 92 will be described below. explain.

  6-8, the semiconductor module 92 includes npn transistors Q1 and Q2, diodes D1 and D2, a positive conductor 112, output conductors 114 and 116, a negative conductor 118, an insulating sheet 120, 122, coolers 102 and 104, heat conduction member 60, mold resin 106, power bus bars 70.1 to 70.4, and control signal lines 64.1 and 64.2.

  The npn transistor Q1 and the diode D1 are provided between the positive conductor 112 and the output conductor 114, and are fixed to the positive conductor 112 and the output conductor 114 by a conductive bonding material such as solder. The npn transistor Q2 and the diode D2 are provided between the output conductor 116 and the negative conductor 118, and are fixed to the output conductor 116 and the negative conductor 118 by a conductive bonding material such as solder.

  Each of positive electrode conductor 112, negative electrode conductor 118, and output conductors 114 and 116 is made of, for example, a copper plate. Positive conductor 112 and negative conductor 118 are connected to power bus bars 70.1, 70.2, respectively. Output conductors 114 and 116 are connected to power bus bars 70.3 and 70.4, respectively. Power bus bars 70.1 and 70.2 are connected to power line PL and ground line SL, respectively, in power terminal block 76 (not shown, the same applies hereinafter), and power bus bars 70.3 and 70.4 The terminal block 76 is connected to a common output line UL.

  Control signal lines 64.1 and 64.2 are drawn to the outside from the surface opposite to the surface from which power bus bars 70.1 to 70.4 are drawn, and connected to control device 30 (not shown, the same applies hereinafter). Is done.

  The insulating sheets 120 and 122 are npn transistors Q1 and Q2, diodes D1 and D2, a positive conductor 112, a negative conductor 118, and output conductors 114 and 116 (hereinafter collectively referred to as “semiconductor element portion”). Are provided in parallel so as to be sandwiched from both sides. The insulating sheets 120 and 122 electrically insulate the semiconductor element portion from the coolers 104 and 102. On the other hand, the insulating sheets 120 and 122 contain a filler having a high thermal conductivity such as alumina, and transfer heat generated from the semiconductor element portion to the coolers 104 and 102, respectively.

  The coolers 102 and 104 are made of aluminum, for example. The coolers 102 and 104 are provided in close contact with the surfaces of the insulating sheets 122 and 120 that face the bonding surface with the semiconductor element portion, and have a plurality of refrigerant paths therein. Grease is applied to the joint surfaces of the insulating sheets 122 and 120 and the corresponding coolers 102 and 104 to reduce the contact thermal resistance.

  The heat conductive member 60 is provided in close contact with the surface of the cooler 102 that faces the bonding surface with the insulating sheet 122. Grease is also applied to the joint surface between the heat conducting member 60 and the cooler 102 in order to reduce the contact thermal resistance. The heat conducting member 60 is drawn to the outside from the same surface from which the control signal lines 64.1 and 64.2 are drawn, and the end of the heat conducting member 60 is connected to the control device 30.

  The mold resin 106 is, for example, an epoxy resin, and integrally fixes and seals the semiconductor element portion, the insulating sheets 120 and 122, the coolers 102 and 104, and the heat conduction member 60. That is, the semiconductor element portion, the insulating sheets 120 and 122, the coolers 102 and 104, and the heat conducting member 60 are packaged by the mold resin 106. However, as described above, the heat conducting member 60 protrudes to the outside of the mold resin 106, and it is necessary to secure a refrigerant flow port on the end faces of the coolers 102 and 104 in the longitudinal direction. It is not covered with the resin 106.

  Referring to FIG. 5 again, in this inverter device 10B, semiconductor modules 92, 94, 96 are stacked, and the stacked semiconductor modules 92, 94, 96 are fixed by a housing (not shown). Therefore, this inverter device 10B is excellent in assemblability and excellent in earthquake resistance.

  In the above description, the heat conduction member 60 is bonded to the surface of the uppermost semiconductor module 92 that is not in contact with the insulating sheet 122 of the cooler 102, but the surface of the cooler 104 that is not in contact with the insulating sheet 120 is heated. The conductive member 60 may be joined. Further, a heat conducting member may be joined to both of the coolers 102 and 104 in the uppermost semiconductor module 92. Further, in the other semiconductor modules 94 and 96, similarly to the semiconductor module 92, a heat conducting member that receives heat from the control device 30 may be provided.

  As described above, according to the second embodiment, the control device 30 is cooled using the cooling surface that is not used for cooling the semiconductor element portion in the double-sided cooling type semiconductor module. Thus, the control device 30 can be efficiently cooled.

  In addition, since this semiconductor device is configured by stacking semiconductor modules, the semiconductor device is excellent in assembling property and is excellent in earthquake resistance.

[Embodiment 3]
FIG. 9 is a cross sectional view showing a structure of an inverter device 10C shown as an example of a semiconductor device according to the third embodiment of the present invention. Referring to FIG. 9, inverter device 10 </ b> C is disposed on the side of the laminated body including semiconductor element portions 42, 44, 46 and coolers 52, 54, 56, 58 in inverter device 10 shown in FIG. 2. The control device 30 that has been provided is disposed on the upper surface of the uppermost cooler 52. The other structure of the inverter device 10C is the same as that of the inverter device 10. The circuit configuration of the inverter device 10C is the same as the circuit configuration of the inverter device 10 shown in FIG.

  In the inverter device 10C, the control device 30 is mounted on the upper surface of the uppermost cooler 52 of the stacked body, that is, on the surface not in contact with the semiconductor element portion 42 of the cooler 52. In the first and second embodiments, in order to minimize the control signal lines 64, 66, 68 provided between the semiconductor element units 42, 44, 46 and the control device 30, the control device 30 is placed on the side of the stacked body. Although the control device 30 is arranged and connected to the cooler 52 by the heat conducting member 60, the control device 30 is directly mounted on the cooler 52 in the third embodiment. Therefore, in the third embodiment, the control signal lines 132, 134, and 136 are longer than those in the first and second embodiments, but the heat conducting member 60 provided in the first and second embodiments is not necessary. .

  As described above, according to the third embodiment, since the control device 30 is directly mounted on the surface of the cooler 52 that is not in contact with the semiconductor element portion 42, the control device 30 can efficiently and effectively cool the cooler. Cooled by 52.

  In the third embodiment, the control device 30 is mounted on the surface not in contact with the semiconductor element portion 42 of the uppermost cooler 52. However, the semiconductor element portion 46 of the lowermost cooler 58 is mounted. The control device 30 may be mounted on a surface that is not in contact with.

  Also in the above-described third embodiment, the semiconductor element portion and the cooler may be modularized as in the second embodiment corresponding to the first embodiment. In this case, in the semiconductor module in which the control device 30 is mounted on the cooler, the control is mounted on the semiconductor element part, the cooler that sandwiches the semiconductor element part from both sides, and the surface that is not in contact with the semiconductor element part of the cooler. The apparatus 30 is integrally fixed and sealed with a mold resin.

  In each of the above first to third embodiments, the semiconductor element portion and the cooler are fixed and sealed with mold resin. However, the laminated body composed of the semiconductor element portion and the cooler is screwed or springed from both sides in the stacking direction. You may make it fix by narrowing by.

  In the first and second embodiments, the heat conducting member 60 is made of a graphite sheet. However, a metal having high heat conductivity such as a copper plate or an aluminum plate may be used.

  In the above description, the semiconductor element portion or the semiconductor module has three stages. However, the configuration of the semiconductor element part or the semiconductor module is not limited to the three-stage structure. For example, the inverter device may include two inverters, and the semiconductor element unit or the semiconductor module may be composed of six stages.

  In the above, the case of the inverter device is shown as an example of the semiconductor device according to the present invention. However, the scope of application of the present invention is not limited to the inverter device, and the semiconductor element portion and the semiconductor element portion are cooled from both sides. Other semiconductor devices including a cooler are generally included.

  The semiconductor device according to the present invention is suitable for a hybrid vehicle and an electric vehicle. A hybrid vehicle is a vehicle that uses a battery, an inverter, and a motor driven by the inverter as a power source in addition to a conventional engine. An electric vehicle is a vehicle that uses a battery, an inverter, and a motor driven by the inverter as a power source.

  In such hybrid vehicles and electric vehicles, a large number of power semiconductor elements are used in electronic components such as inverters and converters. And in hybrid vehicles and electric vehicles, where downsizing of the device, high efficiency, high reliability, etc. are strongly required, according to the semiconductor device according to the present invention, the power semiconductor element and the cooler are laminated, In addition, the control device is cooled by effectively using the cooling surface that is not used to cool the power semiconductor element, so that the device can be downsized, the cooling efficiency can be improved, and the control device can be highly reliable due to high cooling performance. Can do.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and is intended to include meanings equivalent to the scope of claims for patent and all modifications within the scope.

1 is an electric circuit diagram of an inverter device shown as an example of a semiconductor device according to a first embodiment of the present invention. It is sectional drawing which shows the structure of the inverter apparatus shown in FIG. It is sectional drawing which shows the structure of the board | substrate of the control apparatus shown in FIG. It is sectional drawing which shows the other structure of the inverter apparatus shown in FIG. It is sectional drawing which shows the structure of the inverter apparatus shown as an example of the semiconductor device by Embodiment 2 of this invention. FIG. 6 is a perspective view of the semiconductor module shown in FIG. 5. It is sectional drawing of the vertical cross section VII-VII along the longitudinal direction of the semiconductor module shown in FIG. It is sectional drawing of the cross section VIII-VIII of the semiconductor module shown in FIG. It is sectional drawing which shows the structure of the inverter apparatus shown as an example of the semiconductor device by Embodiment 3 of this invention.

Explanation of symbols

  10, 10A to 10C Inverter device, 20 Inverter, 22 U-phase arm, 24 V-phase arm, 26 W-phase arm, 30 Control device, 42, 44, 46 Semiconductor element part, 52, 54, 56, 58, 102, 104 Cooler, 60, 61 Heat conduction member, 62, 106 Mold resin, 64, 64.1, 64.2, 66, 68, 132, 134, 136 Control signal line, 70, 70.1-70.4, 72 74 Power bus bar, 76 Power terminal block, 78 Case, 80 Metal substrate, 82 Insulating layer, 84, 86 Conductor circuit, 92, 94, 96 Semiconductor module, 112 Positive conductor, 114, 116 Output conductor, 118 Negative conductor, 120 , 122 Insulation sheet, B battery, C capacitor, MG motor generator, PL power supply line, SL ground line UL, VL, WL output line, Q1 to Q6 npn-type transistors, D1 to D6 diode.

Claims (10)

A semiconductor element section;
First and second cooling bodies provided to sandwich the semiconductor element portion from both sides;
A control device for controlling the operation of the semiconductor element unit,
The control device uses a second cooling surface that is a cooling surface of at least one of the first and second cooling bodies and is different from the first cooling surface in contact with the semiconductor element portion. A semiconductor device to be cooled.   The semiconductor device according to claim 1, wherein the second cooling surface is a surface facing the first cooling surface.   The heat conduction member which is arrange | positioned between the said 2nd cooling surface and the said control apparatus, and heat-transfers the heat from the said control apparatus to the said 2nd cooling surface is further provided in Claim 1 or Claim 2. The semiconductor device described. The controller is
A control board connected to the heat conducting member;
A control circuit mounted on the control board,
The control device is disposed along the stacked body so that a normal direction of the control substrate is substantially perpendicular to a stacking direction of the stacked body including the semiconductor element portion and the first and second cooling bodies. The semiconductor device according to claim 3. The control board is
A metal substrate connected to the heat conducting member;
The semiconductor device according to claim 4, comprising an insulating layer provided between the metal substrate and the control circuit. A power terminal block to which a power terminal of the semiconductor element unit is connected;
The semiconductor device according to claim 4, wherein the control device is disposed on the opposite side of the power terminal block with the stacked body interposed therebetween.   The semiconductor device according to claim 1, wherein the control device is mounted on the second cooling surface of the first or second cooling body. The controller is
A control board mounted on the second cooling surface;
A control circuit mounted on the control board,
The control board is
A metal substrate in intimate contact with the second cooling surface;
The semiconductor device according to claim 7, comprising an insulating layer provided between the metal substrate and the control circuit. A plurality of semiconductor element portions;
A plurality of cooling elements that are alternately stacked with the plurality of semiconductor element portions, and are provided so as to sandwich each of the plurality of semiconductor element portions from both sides;
A control device for controlling operations of the plurality of semiconductor element units,
The control device is a cooling surface of at least one cooling body of the cooling body disposed at an end portion in the stacking direction of the plurality of semiconductor element portions and the plurality of cooling bodies, and adjacent semiconductor element portions The semiconductor device is cooled using a second cooling surface facing the first cooling surface in contact with the first cooling surface. A plurality of stacked semiconductor modules; and
A control device for controlling operations of the plurality of semiconductor modules;
Each of the plurality of semiconductor modules includes:
A semiconductor element section;
Including first and second cooling bodies provided to sandwich the semiconductor element portion from both sides;
The control device is a cooling surface of at least one of the first and second cooling bodies in at least one of the plurality of semiconductor modules and is in contact with the semiconductor element portion The semiconductor device cooled using the 2nd cooling surface which opposes.

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