JP2006139524A - Printed board designing device, printed board designing method, recording medium to which program is recorded, and computer-readable program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed board designing device which precisely detects a connection state of each of a plurality of vias even if wiring is designed to interconnect layers by providing the plurality of vias in a conductive pattern. <P>SOLUTION: The printed board designing device for designing a printed board is provided with; an HDD 17 which stores information necessary for designing a printed board, the information including a circuit information file 32, a parts library 33 and a board information file 34; a RAM 13 that stores wiring processing information which includes the position information of a conductive pattern and vias, the wirings of those are designed by using a wiring function, and via connection information indicating a connection state; and a network name giving means (a CPU 11) which gives a network name for distinguishing a network from another to the conductive pattern, the wiring of which is designed by the wiring function, on the same network and to the vias based on board design information stored in the HDD 17 and the wiring processing information stored in the RAM 13. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a printed circuit board design apparatus, a printed circuit board design method, a recording medium on which a program is recorded, and a computer readable program. More specifically, the present invention relates to an interactive form with a designer using a computer such as a workstation or a personal computer. The present invention relates to a printed circuit board design apparatus for designing a printed circuit board, a printed circuit board design method, a recording medium on which a program is recorded, and a computer-readable program.

Conventionally, printed circuit boards are designed using a computer (CAD) that uses a computer.
ided Design) is used.
FIG. 8 is a flowchart showing a printed circuit board design process using a conventional printed circuit board design CAD system. First, a CAD library of new parts (for circuit diagrams and board design (database including pad shapes for each part)) is created (step 1), and then each part to be mounted on the board using the circuit diagram input CAD is created. A circuit diagram representing electrical connection is created (step 2).
Thereafter, a board file is created in which board outline data for reference such as component placement and wiring around the board is input (step 3).

In the next step 4, the net list of the circuit diagram (part number and connection information between the component terminals) created by the circuit diagram input CAD is transferred to the printed circuit board design CAD, and the net in which the component library information is assigned to the net list. Data is created and read into a board file to create a board database (step 4).

Next, with the component placement function of the printed circuit board design CAD, the operation of placing the components in the board area specified by the outline data is performed interactively according to the designer's instructions (step 5), and then the printed circuit board design CAD wiring is performed. By the function, the wiring work between the component terminals arranged in the board area is performed in an interactive manner in accordance with the instructions of the designer (step 6). In the middle of design, steps 5 and 6 are repeated as needed.

Next, using the wiring verification function of the printed circuit board design CAD, a process of checking whether the designed conductor pattern matches the netlist is executed (step 7). If an error is detected in the wiring, The correction of the wiring is repeated until there is no error, then the design process is finished, and the process proceeds to a subsequent process such as CAM processing.

By the way, in the design of a printed circuit board, there is a case where conductor patterns of the same net are interlayer-connected by a plurality of vias. For example, in order to reduce noise, a wide conductor pattern is formed on the peripheral portion of a printed circuit board, and the conductor pattern is interlayer-connected by a plurality of vias, or an inner power supply layer or ground to ensure current capacity In some cases, a layer pattern is connected by a plurality of vias.

However, in the conventional printed circuit board design CAD wiring verification function, when the wiring design is made so that the conductor patterns of the same net are interconnected by a plurality of vias, even one of the plurality of vias is connected to the conductor pattern. If it is, the net is electrically connected, so the conductor pattern matches the net list, that is, it is judged as normal, and there are unconnected vias due to oversight by the designer However, no abnormality was detected. Therefore, the designer must print out the conductor pattern of each layer and perform a visual check to inspect whether there are any unconnected vias, which reduces the efficiency of design work. there were.

In Patent Document 1 below, there is a method for creating printed circuit board pattern connection data. Specifically, when it is determined that there is an overlap between wiring elements by performing a graphic operation, there is a connection between the two. A method for creating net data is disclosed. Patent Document 2 below discloses a technique for registering a wiring pattern in units of objects and integrating the connection of objects on the same layer or the connection of objects between layers through vias to form the same net. It is disclosed. However, in the techniques described in these patent documents, when the conductor patterns of the same net are designed to be connected to each other with a plurality of vias, it is not possible to detect that unconnected vias remain, The above problem cannot be solved.
Japanese Patent Publication No. 8-23872 JP 2000-276505 A

Means for solving the problems and their effects

The present invention has been made in view of the above problems, and even when a wiring design for providing interlayer connection by providing a plurality of vias in a conductor pattern is performed, each connection state of the plurality of vias can be accurately detected. An object of the present invention is to provide a printed circuit board design apparatus, a printed circuit board design method, a recording medium on which a program is recorded, and a computer-readable program capable of improving the verification accuracy of the designed circuit board and design work. It is said.

In order to achieve the above object, a printed circuit board design apparatus (1) according to the present invention provides information relating to a circuit diagram created by a circuit diagram input means in the printed circuit board design apparatus for designing a printed circuit board. First storage means for storing information necessary for board design including shape information of included parts and outline information of boards on which these parts are mounted, and positions of conductor patterns and vias designed for wiring using the wiring function Information, and second storage means for storing wiring processing information including via connection information indicating the connection or non-connection state of each via, substrate design information stored in the first storage means, and the second Based on the wiring processing information stored in the storage means, a net name for distinguishing from other nets in each of the conductor pattern and via of the same net designed for wiring by the wiring function. It is characterized in that it comprises a net name providing means Azukasuru.

According to the printed circuit board design apparatus (1), based on the board design information and the wiring processing information, each conductor pattern or via of the same net designed by the wiring function is distinguished from other nets. Therefore, for example, the coordinate positions of the plurality of vias in the conductor pattern on the surface layer of the multilayer substrate and the plurality of vias in the conductor pattern on the inner layer are the same, and these conductor patterns are the same net. If so, each of the plurality of vias can be given a net name indicating the same net, and each of the plurality of vias provided in the conductor pattern can be recognized. It is possible to recognize which net contains an arbitrary via.

In the printed circuit board design apparatus (2) according to the present invention, in the printed circuit board design apparatus (1), the net name assigning means is provided in what layer the conductor pattern or via of the multilayer board. It is characterized by further providing information for identifying whether or not.

According to the printed circuit board design apparatus (2), since information for identifying what layer is provided is further given to the conductor pattern and via of the multilayer board, the identification information It is possible to easily identify the number of via layers from the net name assigned.

Further, the printed circuit board design apparatus (3) according to the present invention is based on the wiring processing information of the conductor pattern or via to which the net name is assigned by the net name assigning means in the printed circuit board design apparatus (1) or (2). And an unconnected via detecting means for detecting an unconnected via in the same net.

According to the printed circuit board design apparatus (3), since unconnected vias in the same net are detected based on the conductor pattern and via wiring processing information to which the net name is given by the net name giving means, For example, in the case of performing wiring design such that a conductor pattern of the same net is connected to each other using a plurality of vias, unconnected vias that have been overlooked by the designer can be detected individually, The verification accuracy of the wiring function can be increased.

In the printed circuit board design device (4) according to the present invention, in the printed circuit board design device (3), the unconnected via detection means includes a net having the same net as the conductive pattern in the conductive pattern to which the net name is assigned. When it is determined whether or not interlayer connection using vias is necessary depending on whether or not there is a connection via, and when it is determined that interlayer connection using vias is necessary, a non-connected via in the same net as the conductor pattern is not connected It is characterized in that it is detected as.

According to the printed circuit board design apparatus (4), there is a connection via having the same net name as the conductor pattern (that is, a via land having a conductor of about 0.25 mm on one side from the hole directly connected to the via hole). In this case, it can be determined that the conductor pattern needs to be interlayer-connected by vias, and the necessity of interlayer connection by vias can be easily determined. In addition, when it is determined that the interlayer connection by the via is necessary, the non-connection via of the same net as the conductor pattern (that is, the conductor is not directly connected to the via hole, and the conductor is removed about 0.5 mm on one side from the hole. Can be detected as unconnected vias, and all unconnected vias can be detected using information indicating the connection state (connected or not connected) of vias.

In the printed circuit board design apparatus (5) according to the present invention, in the printed circuit board design apparatus (3) or (4), when an unconnected via is detected in the same net by the unconnected via detection unit, A mark display means for displaying a predetermined mark on the unconnected via position is provided.

According to the printed circuit board design apparatus (5), when an unconnected via is detected in the same net by the unconnected via detection means, a predetermined mark is displayed on the unconnected via position. Therefore, for example, even when all wiring layers are displayed in a superimposed manner or when a layer other than a wiring layer with unconnected vias is displayed, the coordinate position of unconnected vias on the substrate is grasped. be able to.

In the printed circuit board design device (6) according to the present invention, in the printed circuit board design device (3) or (4), an unconnected via is detected in the same net by the unconnected via detection means, and the display layer When a layer in which the unconnected via exists is switched to a display layer via a switching unit, the display device includes an unconnected via highlighting unit that displays the unconnected via in a different form from other vias. It is a feature.

According to the printed circuit board design apparatus (6), an unconnected via is detected in the same net by the unconnected via detection means, and a layer in which the unconnected via exists via the display layer switching means. When switched to the display layer, the unconnected vias are displayed in a different form from other vias, so that the unconnected vias in the display layer where the unconnected vias are easily identified. Therefore, the correction work can be performed quickly, and the work efficiency of the design can be improved.

Moreover, the printed circuit board design apparatus (7) according to the present invention includes the printed circuit board design apparatus (3) to
In any one of (6), the unconnected via detection means functions when the wiring design completion detection means detects that the wiring design of the board using the wiring function is completed. It is said.

According to the printed circuit board design apparatus (7), the unconnected via detection means functions when the wiring design completion detection means detects that the wiring design of the board using the wiring function is completed. When the wiring design of the substrate is completed, the unconnected vias can be detected together, and the connection state of the vias can be corrected collectively.

Moreover, the printed circuit board design apparatus (8) according to the present invention includes the printed circuit board design apparatus (3) to
In any one of (6), the unconnected via detection means functions during the wiring design of the substrate using the wiring function.

According to the printed circuit board design apparatus (8), since the unconnected via detection means functions during the wiring design of the board using the wiring function, the unconnected device is in the middle of the wiring design of the board. Can be detected in real time, and the connection state of the via can be corrected each time.

Moreover, the printed circuit board design apparatus (9) according to the present invention includes the printed circuit board design apparatus (3) to
In any one of (6), the unconnected via detection means is made to function during the wiring design of the substrate using the wiring function, or the unconnected via detection is performed after the wiring design of the substrate using the wiring function is completed. It is characterized by comprising detection function setting means for setting whether or not the means functions.

According to the printed circuit board design apparatus (9), the unconnected via detection means is caused to function during the wiring design of the board using the wiring function or the wiring function is used via the detection function setting means. Whether the unconnected via detection means functions after the wiring design of the board is completed can be arbitrarily set by the designer, and settings can be made in accordance with the convenience of the designer.

The printed circuit board design apparatus (10) according to the present invention is the printed circuit board design apparatus (3).
In any one of (9) to (9), there is provided means for outputting a detection result by the unconnected via detection means.

According to the printed circuit board design apparatus (10), since the means for outputting the detection result by the unconnected via detection means is provided, the information regarding the unconnected portion of the via, for example, the net name, the wiring, is provided as the detection result. Information such as layer position (surface layer, inner layer, etc.), coordinate values, number of pieces, etc. can be output as a text file format, and information on unconnected portions of vias can be referred to.

A printed circuit board design method (1) according to the present invention is a printed circuit board design method for designing a printed circuit board using a computer, and includes information relating to the circuit diagram created by the circuit diagram input means, which is included in the circuit diagram. The step of storing in the first storage means information necessary for the board design including the shape information of the parts and the outline information of the boards on which these parts are mounted, and the positions of the conductor patterns and vias designed for wiring using the wiring function Storing wiring information including information and via connection information indicating connection or non-connection state of each via in the second storage means, board design information stored in the first storage means, and the first Based on the wiring processing information stored in the second storage means, each of the conductor patterns and vias of the same net designed by the wiring function is distinguished from other nets. It is characterized in that it contains a step of imparting a net name.

According to the printed circuit board design method (1), based on the board design information and the wiring processing information, each conductor pattern or via of the same net designed by the wiring function is distinguished from other nets. Therefore, the same effect as that of the printed circuit board design apparatus (1) can be obtained.

Moreover, the printed circuit board design method (2) according to the present invention is based on the wiring pattern processing information of the conductor pattern or via to which the net name is given in the step of assigning the net name in the printed circuit board design method (1). The method includes a step of detecting an unconnected via in the same net.

According to the printed circuit board design method (2), unconnected vias in the same net are detected based on the conductor pattern and via wiring processing information to which the net name is given in the step of giving the net name. Therefore, the same effect as the printed circuit board design apparatus (3) can be obtained.

In the printed circuit board design method (3) according to the present invention, in the printed circuit board design method (2), when an unconnected via is detected in the same net by the step of detecting the unconnected via, The method includes a step of displaying a predetermined mark on the unconnected via position.

According to the printed circuit board design method (3), when an unconnected via is detected in the same net by the step of detecting the unconnected via, a predetermined mark is displayed on the unconnected via position. Therefore, the same effect as the printed circuit board design apparatus (5) can be obtained.

In the printed circuit board design method (4) according to the present invention, in the printed circuit board design method (2), an unconnected via is detected in the same net by the step of detecting the unconnected via, and the display layer switching is performed. When the layer in which the unconnected via exists is switched to the display layer through the means, the method includes a step of displaying the unconnected via in a different form from other vias.

According to the printed circuit board design method (4), the unconnected via is detected in the same net by the step of detecting the unconnected via, and the unconnected via exists through the display layer switching means. When the layer is switched to the display layer, the unconnected vias are displayed in a different form from the other vias, so that the same effect as the printed circuit board design apparatus (6) can be obtained.

Moreover, the printed circuit board design method (5) according to the present invention includes the printed circuit board design method (2) to
In any one of (4), the method includes a step of outputting a detection result obtained by the step of detecting the unconnected via.
According to the printed circuit board design method (5), since the detection result by the step of detecting the unconnected via is output, the same effect as the printed circuit board design apparatus (10) can be obtained.

A recording medium (1) on which a program according to the present invention is recorded is a recording medium on which a computer-readable program for designing a printed circuit board is recorded, and relates to a circuit diagram created by circuit diagram input means. A function for storing information necessary for board design including information, shape information of components included in the circuit diagram, and external shape information of a board on which these components are mounted, and wiring design using the wiring function The second storage means stores the wiring processing information including the conductor pattern and via position information, and via connection information indicating the connection or non-connection state of each via, and is stored in the first storage means. Based on the printed circuit board design information and the wiring processing information stored in the second storage means, those of the conductor patterns and vias of the same net that have been designed by the wiring function. It is characterized in that to realize the function of imparting a net name to identify the other net computer les.

According to the recording medium (1) on which the program is recorded, each of the conductor pattern and the via of the same net that is designed by the wiring function based on the board design information and the wiring processing information is added to each other. A function of assigning a net name for identifying a net can be executed by the computer, and the same effect as the printed circuit board design apparatus (1) can be obtained. The printed circuit board design apparatus (1) has The function can be realized in more computer systems.

Further, the recording medium (2) on which the program according to the present invention is recorded is the same as the recording medium (1) on which the program is recorded, and the conductor pattern or via wiring to which the net name is given by the function to give the net name. It is characterized in that a computer realizes a function of detecting an unconnected via in the same net based on processing information.

According to the recording medium (2) on which the program is recorded, unconnected vias in the same net are generated based on the conductor pattern and via wiring processing information to which the net name is given by the function for giving the net name. The function to be detected can be executed by the computer, and the same effect as the printed circuit board design apparatus (3) can be obtained, and the functions of the printed circuit board design apparatus (3) can be realized in more computer systems. Can be made.

Further, the recording medium (3) on which the program according to the present invention is recorded is the recording medium (2) on which the program is recorded, wherein the unconnected via in the same net is detected by the function of detecting the unconnected via. When detected, the computer is made to realize a function of displaying a predetermined mark on the unconnected via position.

According to the recording medium (3) on which the program is recorded, when an unconnected via is detected in the same net by the function of detecting the unconnected via, a predetermined position is placed on the unconnected via position. The function of displaying a mark can be executed by the computer, and the same effect as the printed circuit board design apparatus (5) can be obtained. The printed circuit board design apparatus (5)
Can be realized in more computer systems.

In addition, the recording medium (4) on which the program according to the present invention is recorded has the function of detecting the unconnected via in the recording medium (2) on which the program is recorded. When a layer in which the unconnected via exists is switched to a display layer via the display layer switching unit, the computer is allowed to display a function of displaying the unconnected via in a form different from other vias. It is characterized by.

According to the recording medium (4) in which the program is recorded, the unconnected via is detected in the same net by the function of detecting the unconnected via, and the unconnected via is displayed via the display layer switching means. When the layer in which the current exists is switched to the display layer, it is possible to cause the computer to execute a function of displaying the unconnected via in a form different from that of the other vias, which is similar to the printed circuit board design apparatus (6). An effect can be produced and the functions of the printed circuit board design apparatus (6) can be realized in more computer systems.

Further, the recording medium (5) in which the program according to the present invention is recorded has a detection result by the function of detecting the unconnected via in any of the recording media (2) to (4) in which the program is recorded. It is characterized by having a computer realize the output function.

According to the recording medium (5) in which the program is recorded, the computer can execute a function of outputting a detection result by the function of detecting the unconnected via, and the printed circuit board design device (10) The same effect can be produced, and the functions of the printed circuit board design apparatus (10) can be realized in more computer systems.

The program (1) according to the present invention is a computer-readable program for designing a printed circuit board, and is information relating to a circuit diagram created by a circuit diagram input means, and shape information of parts included in the circuit diagram. , And a function for storing information necessary for board design including outline information of the board on which these components are mounted in the first storage means, conductor pattern and via position information for wiring design using the wiring function, and each A function of storing wiring processing information including via connection information indicating the connection or non-connection state of the via in the second storage unit, the board design information stored in the first storage unit, and the second storage unit Based on the wiring processing information stored in
The present invention is characterized in that a computer is realized with a function of assigning a net name for distinguishing from another net to each conductor pattern and via of the same net designed for wiring by the wiring function.

According to the program (1), based on the board design information and the wiring processing information, each conductor pattern or via of the same net designed by the wiring function can be distinguished from other nets. The function of assigning a net name can be executed by the computer, the same effect as the printed circuit board design apparatus (1) can be obtained, and the function of the printed circuit board design apparatus (1) can be easily changed. The computer system can be realized.

In addition, the program (2) according to the present invention is based on the conductor pattern and via wiring processing information to which the net name is given by the function for giving the net name in the program (1), and is not connected in the same net. It is characterized by having a computer realize the function of detecting vias.

According to the program (2), the computer has a function of detecting an unconnected via in the same net based on a conductor pattern to which a net name is given by the function for giving a net name or wiring processing information of vias. The same effects as those of the printed circuit board design apparatus (3) can be obtained, and the functions of the printed circuit board design apparatus (3) can be easily realized in other computer systems. .

In the program (3) according to the present invention, when an unconnected via is detected in the same net by the function for detecting the unconnected via in the program (2), the program (3) The computer is realized with a function of displaying a predetermined mark on the computer.

According to the program (3), when an unconnected via is detected in the same net by the function of detecting the unconnected via, a function of displaying a predetermined mark on the unconnected via position The computer can be executed, and the same effect as the printed circuit board design apparatus (5) can be obtained, and the functions of the printed circuit board design apparatus (5) can be easily realized in another computer system. Can do.

In the program (4) according to the present invention, in the program (2), an unconnected via is detected in the same net by the function of detecting the unconnected via, and the unconnected via is displayed via a display layer switching unit. When a layer having connected vias is switched to a display layer, a computer is provided with a function of displaying the unconnected vias in a form different from other vias.

According to the program (4), an unconnected via is detected in the same net by the function of detecting the unconnected via, and the layer where the unconnected via exists is displayed via the display layer switching means. When switched to a layer, it is possible to cause the computer to execute a function of displaying the unconnected vias in a form different from other vias, and the same effect as the printed circuit board design apparatus (6) can be achieved. The functions of the printed circuit board design apparatus (6) can be easily realized in another computer system.

The program (5) according to the present invention is characterized in that, in any one of the programs (2) to (4), the computer realizes a function of outputting a detection result by the function of detecting the unconnected via. Yes.

According to the program (5), it is possible to cause the computer to execute a function of outputting a detection result by the function of detecting the unconnected via, and the printed circuit board design apparatus (1
0) and the functions of the printed circuit board design apparatus (10) can be easily realized in another computer system.

DESCRIPTION OF EMBODIMENTS Embodiments of a printed circuit board design apparatus, a printed circuit board design method, a recording medium on which a program is recorded, and a computer-readable program will be described below with reference to the drawings. FIG. 1 is a block diagram schematically showing a main part of the printed circuit board design apparatus according to the embodiment (1).

  The printed circuit board design apparatus includes a microcomputer (hereinafter referred to as a microcomputer) 14 including a CPU 11, a ROM 12, and a RAM 13, an input unit 15 such as a keyboard 15a and a mouse 15b, and a recording medium reading unit that reads a recording medium (for example, a CD-ROM 20). A computer including a CD drive 16 as a storage device, a hard disk device (hereinafter referred to as HDD) 17 serving as a large-capacity storage unit, a display unit 18 including a display such as a CRT or LCD, and a printer 19 as a print output unit It is built as a system.

The CPU 11 executes programs stored in the ROM 12 and the HDD 17 to perform various functions of the printed circuit board design apparatus, for example, a function for assigning a net name to a wired conductor pattern and via, and an unconnected via for detecting an unconnected via. Control for realizing a detection function, a mark display function for marking a predetermined mark on a conductor pattern in which an unconnected via exists, an emphasis display function for displaying an unconnected via in different colors, and the like are performed.

The HDD 17 stores a program (board design program) 31 for realizing various functions of a printed circuit board design apparatus operating on an OS (operating system). The board design program 31 is recorded and installed in a computer-readable state on the CD-ROM 20, for example. Alternatively, it is downloaded via a communication device (not shown).

The board design program 31 includes component placement operations and conductor patterns based on design information such as component information, board outline, board material, number of wiring layers, thickness of each layer, wiring width, and wiring spacing. In addition to the component placement function and wiring function for interactively wiring parts with vias and vias on the screen, the conductor patterns and vias of the same net wired by the wiring function are distinguished from other nets. A function for assigning a net name to perform, and a function for detecting unconnected vias in the same net based on the conductor pattern and via wiring processing information to which the net name is assigned by the net name assigning function. A program to make it included.

Furthermore, when an unconnected via is detected in the same net by the unconnected via detection function, a function of displaying a predetermined mark on a conductor pattern in which the unconnected via exists, the unconnected via detection function When an unconnected via is detected in the same net and a wiring layer having an unconnected via is switched to the display layer via the display layer switching means, the unconnected via is different from other vias. A program for realizing a form, for example, a function for displaying in different colors and a function for outputting a detection result by the unconnected via detection function as a text file is included. The ROM 12 stores various basic programs for hardware control of the computer system.

The HDD 17 includes a circuit information file 32, a component library 33, a board information file 34, a design reference file 35, a board design file 36, and a wiring verification file 37. Various information necessary for board design is stored in the HDD 17. It has come to be.

The circuit information file 32 includes logical connection information of components in the circuit diagram output from the circuit diagram input means (circuit diagram CAD (not shown)), that is, which component terminal and which component terminal. Information (net list) indicating whether or not the wiring is connected is stored, and the net list includes a net name between terminals to be wired, a part number connected by the net, a part name,
Information such as the pin number to be connected and the attribute of the pin is included.

The component library 33 is a database in which circuit component shapes and attributes are described.
Information such as part number, part name, part type, part shape, pad shape suitable for the part, hole diameter, data indicating the distance between them, terminal number, silk indicating the part shape, and electrical characteristics of the part are registered. It has become so.

The substrate information file 34 is a file in which the shape and attributes of the substrate are described, and information such as the shape of the substrate, the number of layers of the substrate, the thickness of each layer, and the characteristic value of the substrate material is registered. .

The design standard file 35 is a file in which restrictions on the arrangement of components and wiring provided as standards to be observed in designing a board are described. The conductor pattern width, gap, hole diameter, land diameter, conductor thickness, Information defining the number of wiring layers, interlayer distance, hole position, conductor pattern arrangement, hole position, and the like is included.

The board design file 36 is a file in which the result of component placement and wiring processing is described.
Information such as component placement positions, wiring paths, conductor patterns forming nets and net names given to vias is stored. The component location information includes information such as the coordinate position of each component on the board, the board surface on which the component is mounted, and the mounting angle, and the wiring path information includes information on the conductors and vias that connect the components. Information such as coordinate positions on the substrate, conductor thickness, width, and hole size is included.
The wiring verification file 37 records unconnected via detection data of each net detected by the unconnected via detection function.

The RAM 13 is formed with a work memory for the OS and a work memory for the board design program. In the work memory for the board design program, the conductor pattern and via position information arranged by the wiring function and the arrangement are arranged. Via connection information indicating the connection state of each via (ie, connecting via or non-connecting via), wiring pattern information including the conductor pattern given by the net name assigning function and the via net name is temporarily stored. Thus, after the board design is completed, the wiring processing information is stored in the board design file 36 of the HDD 17.

The display unit 18 functions as means for sequentially displaying the design state of the substrate processed based on information or the like input via the input unit 15 by the substrate designer. The board design can be advanced interactively with reference to FIG. Based on the control signal input by the board designer via the input unit 15, the printer 19 prints and outputs board design information, unconnected via detection results, and the like, which are the results of component placement and wiring processing. It is designed to function as a means.

Next, the net name assignment function and the unconnected via detection function of the printed circuit board design apparatus will be described. 2A and 2B are diagrams for explaining the net name assigning function and the unconnected via detection function of the printed circuit board design apparatus, wherein FIG. 2A is a conductor pattern on the surface of the board drawn using the wiring function, and FIG. (C) has shown a part of conductor pattern (the same net | network as the conductor pattern of a board | substrate surface layer) of the board | substrate inner layer.

On the substrate surface layer, a region pattern (conductor pattern in which regions are formed) P1 is formed from lands L to which component terminals are connected, and four vias V1 to V4 (all set as connection vias) in the region pattern P1. Are arranged (FIG. 2A). Further, a region pattern P2 (power source or ground layer) in which vias V1 to V4 are arranged at the same coordinates as the four vias V1 to V4 on the substrate surface layer is formed on the inner layer of the substrate (FIGS. 2B and 2C). )). FIG. 2B shows vias V1 to V1.
FIG. 2C shows a state in which all V4 are set as connection vias. FIG. 2C shows a connection via only via V1,
The remaining vias V2 to V4 are set as non-connection vias. Such wiring design is performed, for example, when it is desired to secure a current capacity. Further, the land L, the area patterns P1, P2, the coordinate positions of the vias V1 to V4, and the connection states of the vias V1 to V4 of the respective layers (
Information on connection vias or non-connection vias) is stored in the RAM 13 at the time of wiring.

The via placement within the conductor pattern is performed by first forming a non-connection via (a via with the conductor pattern hollowed out (non-connection land)) at a desired position. Since the switching is performed, the situation as shown in FIG. 2C occurs when the designer overlooks switching to the connection via while forming the non-connection via.

The net name assignment function and the unconnected via detection function are executed at the time of the wiring verification process. In the printed circuit board design apparatus according to the present embodiment, the timing of the wiring verification process is determined according to the wiring function. The designer can arbitrarily set whether to do it at any time during the wiring design of the used board, or collectively after the wiring design of the board using the wiring function is completed, through a predetermined setting screen It has become.

When the wiring verification process is started based on the execution timing of the wiring verification process set by the designer, the net name corresponding to the land L from the net list of the circuit information file 32 (for example,
The net name of the component terminal connected to the land L is read, and the same net name as that of the land L is given to the surface layer pattern P1 and the vias V1 to V4. Further, the substrate inner layer region pattern P2 and the via V having the same coordinates that form the same net as the surface layer region pattern P1.
1 to V4 are assigned the same net name as the land L. Information for identifying the surface layer and the inner layer (that is, indicating the number of layers) is added to the area pattern and via net name of each wiring layer, and the via net name in each area pattern is further added to the via net name. Is provided with information for distinguishing from other vias.

These assigned net names are stored in the RAM 13. FIG. 3 shows the contents of the wiring information table in which the assigned net names and the like are recorded. (A) is the surface layer,
(B), (c) has shown the wiring information table of the inner layer. Note that the table in FIG.
It corresponds to the connection state shown in FIG. 2B, and the table of FIG. 3C corresponds to the connection state shown in FIG. In the wiring information table, each wiring element (land,
Information indicating the net name, coordinate position, and via connection state (connected or disconnected) of a conductor pattern, via, etc.) is recorded.

  In the printed circuit board design apparatus, processing for detecting unconnected vias that need to be connected is performed based on information recorded in the wiring information table (unconnected via detection function).

First, when the surface layer is the wiring configuration shown in FIG. 2A and the inner layer is the wiring configuration shown in FIG.
Based on the wiring information table shown in b), the necessity of interlayer connection by vias is determined based on whether or not there is a connection via for the same net as the conductor pattern in the conductor pattern to which the net name is assigned. In this case, since there are vias for connection of the same net in each layer, it is determined that interlayer connection by vias is necessary, and unconnected vias of the same net as the conductor pattern are detected as unconnected vias. In this case, since there are no non-connection vias in the same net as the conductor pattern (all connection vias), it is determined that all vias are connected, and the wiring information table data is stored in the board design file 36 of the HDD 17. To do.

In the case where the surface layer is the wiring configuration shown in FIG. 2A and the inner layer is the wiring configuration shown in FIG.
Based on the wiring information table shown in c), the necessity of interlayer connection by vias is determined based on whether or not there is a via for connecting the same net as the conductor pattern in the conductor pattern to which the net name is assigned. In this case, since there is a connection via of the same net as the conductor pattern, it is determined that interlayer connection by the via is necessary, and a non-connection via of the same net as the conductor pattern is detected as an unconnected via. In this case, it is detected that there are three unconnected vias in the inner layer of the same net, and then a display process for notifying the designer that an unconnected via has been detected in the conductor pattern displayed on the wiring work screen. Is done.

FIG. 4 is a diagram showing a display example of a conductor pattern when an unconnected via is detected. (A) is a display form when all wiring layers are overlapped or only a surface layer is displayed. (B) The display form when only the wiring layer (inner layer) in which the unconnected via is detected is displayed is shown.

When all the wiring layers are overlapped or only the surface layer is displayed, an X mark is displayed on the position of the unconnected via, and the designer grasps the unconnected part by checking the X mark. (
You can see that the surface vias are normal and the inner vias are abnormal)
When a wiring layer (inner layer) in which an unconnected via is detected is selected and displayed, three unconnected via locations are displayed in a different color from other vias (connecting vias). The unconnected via can be grasped at a glance, and the connection via can be corrected smoothly. When correction of all three unconnected vias to connection vias is completed, the wiring information table data is stored in the board design file 36 of the HDD 17.

  Further, in the printed circuit board design apparatus, the unconnected via detection result by the unconnected via detection function can be printed out by the printer 19, and FIG. 5 shows the detection result printed out. Yes.

In the detection result, information on unconnected vias, in this case, information such as net name, wiring layer position (specific number of layers), coordinate values, number of pieces, etc. are written in a text file format. By referring to the detection result, it is possible to confirm information on the unconnected via.

  Next, processing operations performed by the microcomputer 14 in the printed circuit board design apparatus according to the embodiment will be described based on the flowcharts shown in FIGS. This processing operation is executed during the wiring work or after the completion of the wiring work based on the setting of the execution timing of the wiring verification process.

First, in step S1, it is determined whether or not the setting of the wiring verification processing is real-time processing. If it is determined that the setting is to perform verification at any time during real-time processing, that is, wiring work, the process proceeds to step S2. In step S2, it is determined whether or not wiring work for the arranged component terminals has been performed. If it is determined that wiring work for the component terminals has been performed, the process proceeds to step S3.

In step S3, the net list of the circuit diagram stored in the circuit information file 32 is collated, and the net name corresponding to the component terminal on which the wiring work has been performed is read out, and then the process proceeds to step S4. In step S4, the wiring processing information (coordinate position,
Based on the wiring layer position information, etc.), the position (number of layers) of the wiring layer where the wiring work is performed and the number of vias arranged in the conductive pattern are determined, and the next In step S5, based on the net name read from the net list, the position of the determined wiring layer, and the number of vias, a process for assigning net names to the conductor patterns and vias designed for wiring is performed, and then the process proceeds to step S6. .

In step S6, a wiring information table for recording information such as the assigned net name is created and stored in the RAM 13, and then the process proceeds to step S7. In step S7, the necessity of interlayer connection by vias is determined based on whether there is a via for connecting the same net as the conductor pattern in the conductor pattern to which the net name is assigned based on the wiring information table. If it is determined that the interlayer connection is unnecessary (that is, there is no connection via for the same net), then the process proceeds to step S12, while the interlayer connection by via is necessary (there is a connection via for the same net).
If it judges, it will progress to step S8.

In step S8, based on the wiring information table, it is determined whether or not there is a non-connection via for the same net, and it is determined that there are no non-connection vias for the same net (that is, all are connection vias). In step S12, the wiring information table data is stored in the board information file 36, and then the process returns to step S2.

On the other hand, if it is determined in step S8 that there is an unconnected via in the same net, step S8 is performed.
In step S9, a display process for notifying the designer that an unconnected via has been detected in the conductor pattern displayed on the wiring work screen, for example, overlaying all wiring layers or unconnected vias is displayed. When no layer is displayed, a cross is displayed on the position of the unconnected via (see FIG. 4 (
a) (Refer to FIG. 4B) When the wiring layer in which the unconnected via is detected is selected and displayed, the unconnected via is displayed in a color different from that of the other via (connecting via). Then, the process proceeds to step S10.

In step S10, the unconnected via information (the net name where the unconnected via is detected, the position of the wiring layer, the coordinates, the number, etc.) is stored in the wiring verification file 37, and then the process proceeds to step S11. The correction process by the designer is accepted until there is no via. In the next step S12, the corrected wiring information table data is stored in the board information file 36, and then the process returns to step S2.

On the other hand, if it is determined in step S1 that the setting is not real-time processing, that is, batch processing (wiring verification is performed after wiring design is completed), the process proceeds to step S13 shown in FIG. In step S13, it is determined whether or not the wiring design is completed. If it is determined that the wiring design is completed, the process proceeds to step S14.

In step S14, the net list of the circuit diagram stored in the circuit information file 32 is collated, and a process of reading net names corresponding to all the component terminals designed for wiring is performed, and then the process proceeds to step S15. In step S15, based on the wiring processing information (coordinate position, wiring layer position information, etc.) stored in the RAM 13, all the conductor patterns designed for wiring, the positions of the wiring layers of the vias (number of layers), and the conductor patterns In the next step S16, all the conductor patterns and vias designed for wiring are determined based on the net name read from the net list, the position of the determined wiring layer and the number of vias. A process of assigning a net name to each is performed, and then the process proceeds to step S17.

In step S17, a wiring information table for recording information such as the assigned net name is created and stored in the RAM 13, and then the process proceeds to step S18. In step S18, based on the wiring information table, depending on whether or not there is a via for connecting to the same net as the conductor pattern in the conductor pattern of each net to which the net name is assigned, the interlayer connection by the via of each net is required. If NO is determined and it is determined that there is a net that requires interlayer connection by vias (the connection via of the same net exists in the conductor pattern), the process proceeds to step S19.

In step S19, based on the wiring information table, for each net that requires interlayer connection, it is determined whether or not there is a non-connection via of the same net. If it is determined that there is no unconnected via in the same net, the process proceeds to step S23, and step S23
Then, the process of storing the wiring information table data in the board information file 36 is performed, and then the process ends.

On the other hand, if it is determined in step S19 that any of the nets requiring interlayer connection has a non-connection via of the same net, the process proceeds to step S20. In step S20, the conductor pattern displayed on the wiring work screen is not yet displayed. A display process is performed to notify the designer that the connection via has been detected (see FIGS. 4A and 4B), and then the process proceeds to step S21.

In step S21, unconnected via information (all net names in which unconnected vias are detected, wiring layer positions, coordinates, number, etc.) is stored in the wiring verification file 37, and then the process proceeds to step S22. In step S22, Based on the correction instruction by the designer, correction processing is accepted until there is no unconnected portion. In the next step S23, processing for storing the corrected wiring information table data in the board information file 36 is performed, and the subsequent processing is performed. Exit.

  According to the printed circuit board design apparatus according to the above-described embodiment, the conductors of the same net that have been designed by the wiring function based on the various board design information stored in the HDD 17 and the wiring processing information stored in the RAM 13. Each pattern or via is given a net name to distinguish it from other nets. For example, the coordinates of multiple vias in the conductor pattern on the surface layer of the multilayer board and multiple vias in the conductor pattern on the inner layer If the positions are the same and these conductor patterns are the same net, each of the plurality of vias can be given a net name indicating the same net, and each of the plurality of vias provided in the conductor pattern can be recognized. It is possible to recognize which net an arbitrary via is included from the given net name.

In addition, as shown in FIG. 3, information (1 for the surface layer and 2 for the inner layer) for identifying what layer is provided in the conductor pattern or via net name of the multi-layer substrate. Further, since it is given, it is possible to easily identify the number of via layers from the net name to which the identification information is given.

In addition, since unconnected vias in the same net are detected based on the conductor pattern to which the net name is given by the net name assigning function and via wiring processing information, a large number of vias are used for the conductor pattern of the same net. In case of wiring design to connect between layers,
Unconnected vias that the designer has overlooked can be individually detected, and the verification accuracy of the wiring function can be improved.

In addition, when an unconnected via is detected in the same net by the unconnected via detection function, a predetermined mark (x mark) is displayed on the position of the unconnected via. The coordinate position of the unconnected via on the substrate can be grasped even when the layers are displayed in an overlapping manner or when a layer other than the wiring layer having the unconnected via is displayed.

In addition, when an unconnected via is detected in the same net by the unconnected via detection function and the layer in which the unconnected via exists is switched to the display layer via the display layer switching unit, the unconnected via Is displayed in a form (color) different from other vias, so that unconnected vias in the display layer where the unconnected vias exist can be easily identified, and correction work and the like can be performed quickly. It is possible to increase the work efficiency of the design.

Also, the designer can decide whether the unconnected via detection function is executed during the wiring design of the board using the wiring function or whether the unconnected via detection function is executed after the wiring design of the board using the wiring function is completed. Can be set according to the convenience of the designer. If the unconnected via detection function is set to function during the wiring design of the board using the wiring function, the unconnected via can be detected in real time during the wiring design of the board. The connection status can be corrected each time.

In addition, if the unconnected via detection function is set to function after the wiring design of the board using the wiring function is completed, the unconnected vias can be collectively detected when the wiring design of the board is completed,
It is possible to collectively correct the via connection state.

In addition, since it has a function to print out the detection result by the unconnected via detection function, the detection result includes information on the unconnected portion of the via, the net name, the position of the wiring layer (surface layer, inner layer, etc.), and coordinate value. The number of pieces of information can be output in the form of a text file, and information about unconnected portions of vias can be referred to.

Further, according to the recording medium in which the board design program 31 is recorded, the functions of the printed board design apparatus can be realized in more computer systems.

  According to the board design program 31, the function of the printed circuit board design apparatus can be executed by a computer, and the function of the printed circuit board design apparatus can be easily realized in another computer system.

It is the block diagram which showed roughly the principal part of the printed circuit board design apparatus which concerns on embodiment of this invention. It is a figure for demonstrating the net name assignment | providing function and unconnected via detection function of a printed circuit board design apparatus, (a) is the conductor pattern of the board | substrate surface layer drawn using the wiring function, (b), (c) is A part of the conductor pattern of the inner layer of the substrate (same net as the conductor pattern of the substrate surface layer) is shown. It is a figure for demonstrating the data memorize | stored in a wiring information table, (a) has shown the surface layer, (b), (c) has shown the data of the inner layer. It is the figure which showed the example of a display of the conductor pattern at the time of unconnected via detection, (a) is a display form when displaying all the wiring layers or displaying only the surface layer, (b) is an unconnected via The display form when only the detected wiring layer is displayed is shown. It is the figure which showed the printout form of the unconnected via detection result. It is the flowchart which showed the processing operation which the microcomputer in the printed circuit board design apparatus which concerns on embodiment performed. It is the flowchart which showed the processing operation which the microcomputer in the printed circuit board design apparatus which concerns on embodiment performed. It is the flowchart which showed the design process of the conventional printed circuit board.

Explanation of symbols

11 CPU
12 ROM
13 RAM
14 Microcomputer
17 Hard disk drive (HDD)
31 Board design program
32 Circuit information file
33 Parts library
34 Board information file
35 Design standard file
36 Board design file 37 Wiring verification file

Claims (25)

In a printed circuit board design apparatus for designing a printed circuit board,
First storage means for storing information related to the circuit diagram created by the circuit diagram input means, shape information of components included in the circuit diagram, and information necessary for board design including outline information of the board on which these components are mounted When,
Second storage means for storing wiring processing information including position information such as conductor patterns and vias designed for wiring using a wiring function, and via connection information indicating connection or non-connection state of each via;
Based on the board design information stored in the first storage means and the wiring processing information stored in the second storage means, each of the conductor patterns and vias of the same net that are designed for wiring by the wiring function A printed circuit board design apparatus comprising: a net name assigning means for assigning a net name for distinguishing from other nets. 2. The net name assigning means further gives information for identifying what layer the conductor pattern or the via of the multilayer substrate is provided. Printed circuit board design equipment. An unconnected via detecting means for detecting a via that needs to be connected in the same net based on the conductor pattern or via wiring processing information to which the net name is given by the net name assigning means is provided. The printed circuit board design apparatus according to claim 1. The unconnected via detection means determines whether or not an interlayer connection by a via is necessary depending on whether or not there is a connection via of the same net as the conductor pattern in the conductor pattern to which the net name is assigned. 4. The printed circuit board design apparatus according to claim 3, wherein when it is determined that a non-connected via of the same net as the conductor pattern is detected as an unconnected via. The mark display means for displaying a predetermined mark on the position of the unconnected via when the unconnected via detecting means detects the unconnected via in the same net. The printed circuit board design apparatus according to claim 3 or 4. When an unconnected via is detected in the same net by the unconnected via detection means, and the layer where the unconnected via exists is switched to the display layer via the display layer switching means, the unconnected via 5. The printed circuit board design apparatus according to claim 3, further comprising unconnected via highlighting display means for displaying in a different form from other vias. 7. The non-connected via detection means functions when the wiring design completion detection means detects that the wiring design of the board using the wiring function is completed. The printed circuit board design apparatus according to any one of the items. The printed circuit board design apparatus according to any one of claims 3 to 6, wherein the unconnected via detection unit functions during wiring design of the board using the wiring function. Sets whether the unconnected via detection means functions during the wiring design of the board using the wiring function or whether the unconnected via detection means functions after the wiring design of the board using the wiring function is completed. The printed circuit board design apparatus according to claim 3, further comprising a detection function setting unit. The printed circuit board design apparatus according to claim 3, further comprising a unit that outputs a detection result by the unconnected via detection unit. A printed circuit board design method for designing a printed circuit board using a computer,
Information necessary for board design including information on the circuit diagram created by the circuit diagram input means, shape information of the components included in the circuit diagram, and external shape information of the board on which these components are mounted is stored in the first storage means. And steps to
Storing in the second storage means wiring processing information including conductor pattern and via position information designed for wiring using a wiring function, and via connection information indicating connection or non-connection state of each via;
Based on the board design information stored in the first storage means and the wiring processing information stored in the second storage means, each of the conductor patterns and vias of the same net that are designed for wiring by the wiring function Providing a net name for distinguishing from other nets to a printed circuit board design method. 12. The method according to claim 11, further comprising a step of detecting an unconnected via in the same net based on a conductor pattern or via wiring processing information to which a net name is given in the step of giving a net name. The printed circuit board design method described. The method includes a step of displaying a predetermined mark on the position of the unconnected via when the unconnected via is detected in the same net by the step of detecting the unconnected via. Item 13. A printed circuit board design method according to Item 12. When the unconnected via is detected in the same net by the step of detecting the unconnected via, and the layer having the unconnected via is switched to the display layer via the display layer switching means, the unconnected via 13. The printed circuit board design method according to claim 12, further comprising the step of displaying the connection via in a different form from the other vias. The printed circuit board design method according to claim 12, further comprising a step of outputting a detection result obtained by detecting the unconnected via. A recording medium on which a computer-readable program for designing a printed circuit board is recorded,
Information necessary for board design including information on the circuit diagram created by the circuit diagram input means, shape information of the components included in the circuit diagram, and external shape information of the board on which these components are mounted is stored in the first storage means. Function
A function for storing in the second storage means wiring processing information including conductor pattern and via position information designed for wiring using the wiring function, and via connection information indicating connection or non-connection state of each via;
Based on the board design information stored in the first storage means and the wiring processing information stored in the second storage means, each of the conductor patterns and vias of the same net that are designed for wiring by the wiring function A recording medium on which is recorded a program for causing a computer to realize a function of assigning a net name for distinguishing it from other nets. 17. The computer according to claim 16, for causing a computer to realize a function of detecting an unconnected via in the same net based on a conductor pattern to which a net name is given by the function of giving a net name and wiring processing information of vias. A recording medium on which the program is recorded. 18. A computer for realizing a function of displaying a predetermined mark on an unconnected via position when an unconnected via is detected in the same net by the function of detecting the unconnected via. A recording medium on which the described program is recorded. An unconnected via is detected in the same net by the function of detecting the unconnected via,
When the layer where the unconnected via exists is switched to the display layer via the display layer switching means,
18. A recording medium on which a program according to claim 17 is recorded for causing a computer to realize a function of displaying the unconnected via in a form different from other vias. The recording medium on which the program according to any one of claims 17 to 19 for making a computer realize the function of outputting the detection result by the function of detecting the unconnected via. A computer readable program for designing a printed circuit board,
Information necessary for board design including information on the circuit diagram created by the circuit diagram input means, shape information of the components included in the circuit diagram, and external shape information of the board on which these components are mounted is stored in the first storage means. Function
A function for storing in the second storage means wiring processing information including conductor pattern and via position information designed for wiring using the wiring function, and via connection information indicating connection or non-connection state of each via;
Based on the board design information stored in the first storage means and the wiring processing information stored in the second storage means, each of the conductor patterns and vias of the same net that are designed for wiring by the wiring function A program for causing a computer to realize a function of assigning a net name for distinguishing from other nets. The computer-implemented function according to claim 21, wherein the computer realizes a function of detecting an unconnected via in the same net on the basis of a conductor pattern to which a net name is given by the function of giving a net name or wiring processing information of vias. program. 23. A function for causing a computer to realize a function of displaying a predetermined mark on the position of an unconnected via when an unconnected via is detected in the same net by the function of detecting the unconnected via. The program described. An unconnected via is detected in the same net by the function of detecting the unconnected via,
When the layer where the unconnected via exists is switched to the display layer via the display layer switching means,
23. The program according to claim 22, which causes a computer to realize a function of displaying the unconnected via in a form different from other vias. The program according to any one of claims 22 to 24, for causing a computer to realize a function of outputting a detection result by a function of detecting the unconnected via.

Images