JP2006135309A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a group III nitride semiconductor device in which a chip is profiled in polygon of pentagon or more, with excellent area efficiency and at low cost. <P>SOLUTION: The manufacturing method of a group III nitride semiconductor light emitting device comprises a first process of forming a semiconductor wafer on a substrate by growing a group III nitride semiconductor in epitaxial growth, a second process of forming expanding slot in the semiconductor wafer by irradiating laser beam, a third process of grinding and/or polishing a principal plane side different from a principal plane of the substrate formed by epitaxial growth, and a fourth process of dividing it into each chip by supplying stress to the expanding slot. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor element. More specifically, the present invention relates to a method for manufacturing a semiconductor chip having a pentagonal or higher chip shape (hereinafter referred to as “polygonal chip”).

  A process for manufacturing a semiconductor element by cutting a group III nitride semiconductor wafer in which an n-type layer, an active layer, and a p-type layer are stacked on an insulating substrate such as sapphire is manufactured in, for example, Patent Document 1 As shown, the n-type layer is exposed by etching to form a chip-shaped split groove, the substrate is polished and thinned, and a dicing saw diamond blade is inserted into the split groove to expose the substrate. And a step of adding a scribe line to the trace of dicing with a diamond blade of a scriber, and a step of obtaining a chip by breaking the substrate.

  Patent Document 2 discloses a step of forming a chip-shaped dividing groove by exposing an n-type layer by etching, a step of polishing and thinning the substrate, and a diamond blade of a dicing saw in the dividing groove. There is disclosed a cutting and separating step including an exposing step, a step of using a scriber to insert a scribe line at a position corresponding to a dicing line from the back side of the substrate, and a step of obtaining a chip by breaking the substrate.

  Since the sapphire substrate and the group III nitride semiconductor layer are hard and chip separation by cleavage is difficult like GaAs and GaP, it is necessary to make the substrate thin before chip separation in order to make it easy to break. It is shown that dicing or scribing processing is necessary to install a stress concentration portion or to form a locally thinner place to crack at a desired position. The diamond blade of a dicing saw is usually disk-shaped, so it is exclusively for straight line processing and cannot be used for broken line processing or curved line processing. A method of putting a ruled line on a substrate such as a group III nitride semiconductor layer or sapphire by a dicing method using a diamond blade is also substantially a straight line processing method because the hardness of the workpiece is comparable to the hardness of the workpiece. It is difficult to accurately put ruled lines in a polygonal line shape or a curved line shape. Therefore, the chip shape of the conventional group III nitride semiconductor device is a quadrangle.

  On the other hand, in the group III nitride semiconductor light emitting device, the light emitted from the active layer attempts to exit from the group III nitride semiconductor light emitting device, but is reflected without being emitted from the chip surface due to the refractive index. Some of them are absorbed by a group III nitride semiconductor or a substrate such as sapphire or an electrode metal to change into heat. The ratio of light emitted outside the chip is called light extraction efficiency. The light extraction efficiency at the end of the chip is greatest when the chip shape is a polygon rather than a quadrangle, and is maximized when the chip shape is a circle. This can be understood from the fact that, for example, the conditions that allow normal incidence from the center of the chip to the end face are four conditions for a square, six conditions for a hexagon, and normal incidence under all conditions of 360 degrees for a circle. Therefore, the hexagonal tip can improve the light extraction efficiency at the tip end face rather than the square tip.

  A hexagonal chip manufacturing method using a conventional processing technique is disclosed in Patent Document 3. In this document, as shown in FIG. 4, a chip is separated by inserting a split groove so that a triangle and a hexagon are adjacent to each other by a straight machining line. That is, in order to obtain a hexagonal chip, the triangular portion is cut off. An electrode arrangement of a hexagonal group III nitride semiconductor light-emitting device is disclosed in Patent Document 4. However, Patent Document 4 does not describe anything about a method for manufacturing a hexagonal chip.

  In recent years, an apparatus for forming a cutting groove for cutting a chip using a laser beam has been developed, and is disclosed in, for example, Patent Document 5. Laser light is a processing technique that can be used not only as a mere substitute for a dicing saw and scriber that has been used in the past, but also has an unknown possibility of realizing a processing method that has not been possible with the conventional method. For example, Patent Document 6 discloses a technique in which laser light is irradiated on the bottom of a previously formed split groove to cause local thermal expansion and cut. Laser light can form not only a heating means but also a split groove having an arbitrary depth and width by controlling the beam diameter, focal position, laser output, irradiation time, and the like. For example, as one of them, Patent Document 7 discloses a technique for forming a split groove on the surface opposite to the laser light irradiation surface.

  For example, in the case of a light emitting element, the light extraction efficiency at the chip end face is improved because the polygonal chip has more sides than the conventional rectangular chip. In the conventional hexagonal chip manufacturing method, as described above, a triangular and hexagonal chip is obtained by placing processing lines in a straight line by a dicing saw or a scribing method. In this method, the area of the triangle is lost and the area efficiency is poor. As described above, the polygon chip can be expected to have high brightness in the light emitting element, but the conventional polygon chip processing method has a problem that the processing efficiency is large and the area efficiency is low.

  The laser processing method uses a gallium nitride group III nitride semiconductor or sapphire in a portion irradiated with laser light whose beam diameter is reduced to the μm order from the semiconductor surface side or sapphire substrate side of a gallium nitride group III nitride semiconductor. By the sublimation removal method, the groove width by processing is narrower than that of the dicing method, and a deeper groove can be formed in a shorter time. However, if the substrate to be processed is warped, the focal position of the laser light is relatively changed, and the width and depth of the dividing groove are changed. Although it is conceivable to measure the warping of the substrate in advance and control the focal position according to the warping, the warping shape often changes as the laser processing progresses. The processing accuracy that forms the groove cannot be obtained. Therefore, in order to perform laser processing with high accuracy, it is necessary to reduce warpage of the sapphire substrate to be processed.

JP 05-343742 A Japanese Patent Laid-Open No. 11-354841 JP 09-082587 A JP 2000-164930 A US Pat. No. 6,413,839 Japanese Patent Laid-Open No. 10-044139 Japanese Patent Laid-Open No. 11-163403

  An object of the present invention is to solve the above-described problems in manufacturing a polygonal group III nitride semiconductor device having a chip shape of a pentagon or more, and to make the polygonal group III nitride semiconductor device area-efficient and low-cost. It is to provide a method of manufacturing.

  The inventors of the present invention have reached the present invention as a result of diligent efforts to solve the above problems. That is, the present invention provides the following inventions.

  (1) In the manufacturing method of a group III nitride semiconductor device having a chip shape of a pentagon or more polygon, a first step of forming a semiconductor wafer by epitaxially growing a group III nitride semiconductor on a substrate, and the semiconductor wafer A second step of irradiating the substrate with laser light to form a split groove, a third step of grinding and / or polishing a main surface side different from the main surface of the substrate epitaxially grown, and applying stress to the split groove And a fourth step of separating into individual chips by adding to the group III nitride semiconductor device.

  (2) The method for producing a group III nitride semiconductor device according to the above item 1, which comprises the first step, the second step, the third step and the fourth step in this order.

  (3) The method for producing a group III nitride semiconductor device according to the above item 1 or 2, further comprising a fifth step of forming a groove portion where at least the n-type layer is exposed corresponding to the split groove formation position.

  (4) The method for producing a group III nitride semiconductor device according to the above item 3, wherein the fifth step is before the second step.

  (5) The method for producing a group III nitride semiconductor device according to the above item 3, wherein the fifth step is after the second step.

  (6) The manufacturing method of the group III nitride semiconductor element as described in any one of said 1-5 with which a 2nd process irradiates a laser beam from the semiconductor side of a semiconductor wafer.

  (7) The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 6, wherein at least a part of the dividing groove reaches the substrate.

  (8) The manufacturing method of the group III nitride semiconductor element as described in any one of said 1-7 with which a 2nd process irradiates a laser beam from the board | substrate side of a semiconductor wafer.

  (9) The production of a group III nitride semiconductor device according to the above item 8, wherein the second step comprises a step of irradiating laser light from the semiconductor side of the semiconductor wafer and a step of irradiating laser light from the substrate side of the semiconductor wafer. Method.

  (10) The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 9, wherein the sectional shape of the dividing groove is V-shaped.

  (11) In the second step, a bent broken line-shaped dividing groove is provided, a plurality of bent broken line-shaped dividing grooves are provided in a form in which the bent line-shaped dividing groove is translated, and the adjacent bent line-shaped dividing grooves are then provided. The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 10, comprising providing a linear dividing groove connecting every other bending point of the dividing groove.

  (12) The second step provides a first broken-line-shaped dividing groove, a second broken-line-shaped dividing groove that intersects the first broken-line-shaped dividing groove at a first angle, and a second Providing a third broken-line-shaped dividing groove that intersects the broken-line-shaped dividing groove at a second angle and intersects the first broken-line-shaped dividing groove at a third angle with the first angle, The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 10, wherein the sum of the second angle and the third angle is 180 degrees.

  (13) The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 12, wherein the thickness of the semiconductor wafer is ground and / or polished to 150 μm or less in the third step.

  (14) The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 13, wherein the fourth step is performed by pressing the substrate against a spherical mold.

  (15) The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 14, wherein the chip shape is substantially a regular hexagon.

  (16) The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 14, wherein the chip shape is substantially a pentagon.

  (17) In the second step, a bent broken line-shaped dividing groove is provided, a plurality of bent broken line-shaped dividing grooves are provided in a form in which the bent line-shaped dividing grooves are translated, and then the adjacent bent line-shaped dividing grooves are provided. A hexagonal split groove is provided by providing a straight split groove that connects every other bending point of the split groove, and a straight split groove that connects two opposite sides of the hexagonal split groove is provided. 17. The method for producing a group III nitride semiconductor device according to 16 above.

  (18) The second step provides a first broken-line-shaped dividing groove, a second broken-line-shaped dividing groove that intersects the first broken-line-shaped dividing groove at a first angle, and a second A third broken-line dividing groove that intersects with the broken-line-shaped dividing groove at a second angle and also intersects with the first broken-line-shaped dividing groove at a third angle, the first angle The sum of the second angle and the third angle is 180 degrees, so that a hexagonal split groove is formed, and further, a straight split groove connecting two opposite sides of the hexagonal split groove is formed. 17. The method for producing a group III nitride semiconductor device according to 16 above, comprising providing the group III nitride semiconductor device.

  (19) The method for producing a group III nitride semiconductor device according to any one of the above items 1 to 10, 13, and 14, wherein the chip shape is substantially circular.

  (20) The method for producing a group III nitride semiconductor device according to any one of items 1 to 19, wherein the group III nitride semiconductor device is a light emitting device.

  (21) The III process according to the above 20, wherein the first step is to epitaxially grow an n-type layer, a light emitting layer, and a p-type layer made of a group III nitride semiconductor on the substrate in this order to form a semiconductor wafer. A method for manufacturing a group nitride semiconductor device.

  (22) A group III nitride semiconductor light-emitting device manufactured by the manufacturing method according to item 20 or 21.

(23) A lamp comprising the light emitting device as described in (22) above.
(24) The lamp as described in (23) above, wherein more light energy conversion material is arranged at the end than the center of the semiconductor chip forming the light emitting element.

  By using the present invention, a semiconductor light emitting device whose chip shape is a pentagon or more polygon, particularly a group III nitride semiconductor light emitting device with excellent light extraction efficiency at the chip end surface, can be efficiently and cost-effectively on the entire surface of the semiconductor wafer. It becomes possible to obtain.

  Hereinafter, the present invention will be described mainly using a semiconductor light emitting device as an example, but the present invention is not limited to this.

  In the present invention, the pentagon or more polygon is not limited as long as the number of corners is 5 or more, and includes, for example, a polygon of 5 to 10 polygons, and a circle that is the ultimate polygon is a pentagon of the present invention. Included in the above polygons.

  Among polygonal chips with good light extraction efficiency at the chip edge compared to conventional square chips, the shape with the least processing loss is a hexagonal shape with a honeycomb-shaped chip separation groove on the surface of the semiconductor wafer or substrate Chip shape. Further, although the light extraction efficiency is slightly lowered, the pentagonal chip obtained by further adding a split groove so as to divide the hexagonal chip into two also has a small processing loss. The circular tip that can be implemented by the present invention has a large processing loss, but the light extraction efficiency at the tip end face is maximized.

In the first step of the present invention, a sapphire substrate or a SiC substrate is preferably used as the substrate on which the group III nitride semiconductor is grown. In addition to these, a glass substrate, an oxide substrate such as MgAl ₂ O ₄ , ZnO, LiAlO ₂ , LiGaO ₂ , MgO, a silicon substrate, a GaAs substrate, and a GaN substrate can be used without any limitation. In the examples to be described later, a sapphire substrate having a very low cleaving property is described, but in order to produce a polygonal chip using a substrate having a strong cleaving property such as a silicon substrate or a GaAs substrate, cutting is also performed in a direction having a weak cleaving property. Therefore, the present invention is effective for cutting such a substrate.

  For example, an n-type layer, a light-emitting layer, and a p-type layer are epitaxially grown on a substrate by a MOCVD method or the like through a normal buffer layer to obtain a semiconductor wafer. Depending on the substrate used and the growth conditions of the epitaxial layer, the buffer layer may be unnecessary.

As the group III nitride semiconductor constituting the n-type layer, the light emitting layer, and the p-type layer, for example, the general formula Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1) Many group III nitride semiconductors represented by general formulas are known, and in the present invention, including these well-known compound semiconductors, the general formula Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1) can be used without any limitation.

The epitaxial growth method of these group III nitride semiconductors is not particularly limited, and group III nitride semiconductors such as MOCVD (metal organic chemical vapor deposition), HVPE (hydride vapor deposition), MBE (molecular beam epitaxy), etc. All methods known to grow can be applied. A preferred growth method is the MOCVD method from the viewpoint of film thickness controllability and mass productivity. In the MOCVD method, hydrogen (H ₂ ) or nitrogen (N ₂ ) is used as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) is used as a Ga source as a group III source, and trimethyl aluminum (TMA) or triethyl aluminum is used as an Al source. (TEA), trimethylindium (TMI) or triethylindium (TEI) as an In source, ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), or the like as an N source that is a group V source. In addition, as a dopant, monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as an Si raw material for n-type, germane (GeH ₄ ) or an organic germanium compound is used as a Ge raw material, and Mg raw material is used for a p-type. For example, biscyclopentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium ((EtCp) ₂ Mg) is used.

  In the semiconductor wafer formed in the first step, an n electrode and a p electrode are respectively formed on the n type layer and the p type layer. However, this electrode formation may be performed after the end of the second step. Many n-electrodes and p-electrodes having various compositions and structures are known, and any type including those known can be used in the present invention.

  In order to form the n-electrode formation surface, the p-type layer and the light emitting layer are removed by, for example, a dry etching method to expose the n-type layer. At this time, the position for chip separation (that is, the position where the split groove is formed) may be exposed at the same time by exposing the n-type layer and simultaneously forming a groove portion described later by a dry etching method.

  In the case of a hexagonal chip, the n-electrode forming surface is preferably formed at one corner. The size of the n electrode is the same as that of the conventional square chip. The p electrode may be a translucent electrode or a reflective electrode. That is, it may be a face-up structure chip or a flip-chip structure chip. In the case of a translucent electrode, the position of the bonding pad is preferably formed at the other corner opposite to the n-electrode formation surface. The n-electrode forming surface may be formed at a plurality of corners, formed by extending the n-electrode like a branch at the side of the hexagon, or may be formed along the side. In order to avoid a short circuit between the n-electrode and the p-type layer or the p-electrode, an insulating film such as a silicon oxide film may be formed on the chip surface.

  The semiconductor wafer formed in the first step is sent to the second to fourth steps for separating into individual chips.

  In the second step, laser light is irradiated to a predetermined position of the semiconductor layer (separation band that separates into individual chips), and a split groove having a depth that preferably reaches the substrate is formed. However, the dividing groove does not necessarily reach the substrate. In particular, as described later, when the dividing groove is provided also on the back surface of the substrate (the surface on which the semiconductor is not epitaxially grown), there is no necessity.

  The width of the dividing groove is not particularly limited as long as it fits in the separation zone. In the case where a groove portion to be described later is formed in advance, the groove portion is irradiated with a laser beam to form a split groove having a width narrower than that of the groove portion and preferably a depth reaching the substrate. The depth of the dividing groove is usually about 20 μm to 50 μm, although it depends on the thickness of the substrate after grinding.

  The sectional shape of the dividing groove may be any shape, but it is preferably V-shaped. If a V-shaped split groove is formed, the bottom of the split groove is likely to concentrate stress, so that chip separation is facilitated. When the dividing groove is formed by laser light, a smooth and clean chip separation surface can be obtained. This is probably because a heat-affected zone is formed by laser light from the bottom of the dividing groove to the inside of the substrate, and this heat-affected zone acts in a direction that further facilitates chip separation. The depth of the heat affected zone becomes deeper as the shape of the dividing groove by the laser beam is made sharper.

  The dividing groove can also be formed on the back surface of the substrate by irradiating laser light from the back surface side (the surface on which the semiconductor is not epitaxially grown). It may be formed only on either the semiconductor side or the back side of the substrate. However, if it is formed on both sides, chip separation is facilitated and the amount of light extracted from the dividing groove is increased, so that the light extraction efficiency is further improved. The shape of the dividing groove on the back side of the substrate is more preferably V-shaped, but it may be U-shaped.

  The shape of the dividing groove can be controlled, for example, by changing the focal position of the laser beam. In general, when the focal position is released, the width of the dividing groove is widened to change to a U shape. In order to adjust the shape of the dividing groove, multiple laser beams may be irradiated.

The laser processing apparatus that can be used in the present invention is capable of forming a split groove that can separate a semiconductor wafer into each chip, and any stage on which the semiconductor wafer is placed can be controlled by a computer. It may be a type. Specifically, a CO ₂ laser, a YAG laser, an excimer laser, or the like can be used. The laser oscillation method may be either continuous oscillation or pulse oscillation. When irradiating the laser beam from the semiconductor layer side to the groove, it is necessary to squeeze the beam as finely as possible, so that an apparatus capable of fine beam irradiation is preferable.

  The wavelength of the laser can be 355 nm, 266 nm, or the like, and may be a shorter wavelength. The frequency is preferably 1 to 100,000 Hz, more preferably 30000 to 70000 Hz. The output varies depending on the width and depth of the split groove, but is preferably the minimum output necessary to obtain a desired split groove. Since the extra laser output causes thermal damage to the substrate and the compound semiconductor, the minimum output is usually preferably 2 W or less, and more preferably 1 W or less.

  The present invention can have a fifth step of forming a groove portion that exposes the n-type layer at a position (separation band) where chips are separated in advance, that is, a position where a split groove is to be formed. By forming a split groove in this groove portion by laser processing, it is possible to prevent laser processing from damaging the active layer and the p-type layer, and a more preferable form compared to the case where the groove portion is not formed in a position where the chip is separated in advance. Become. Conversely, the groove portion can be formed after the dividing groove is formed. In this case, there is an advantage that dirt on the side surface of the split groove generated during laser processing is removed.

  For the formation of the groove, it is preferable to use an etching method such as wet etching or dry etching. This is because etching hardly damages the surface and side surfaces of the compound semiconductor. For dry etching, methods such as reactive ion etching, ion milling, focused beam etching, and ECR etching can be used. For wet etching, for example, a mixed acid of sulfuric acid and phosphoric acid can be used.

  It is preferable that at least the n-type layer is exposed at the n-type layer, and it is preferable to form the groove at the same time as the n-electrode forming surface is exposed as described above because the process is simplified. The cross-sectional shape of the groove portion may be any shape such as a rectangle, a U-shape, and a V-shape, but a rectangle is preferable for forming a split groove on the bottom surface.

  As shown in FIG. 1, the method of inserting a split groove so as to obtain a polygonal shape, for example, a regular hexagonal chip shape, has the same length of each side having a bending point that bends at an angle of 120 degrees, for example. A broken line (A1) is irradiated with a laser beam so as to cross the semiconductor wafer to form a broken line-shaped split groove. Subsequently, a new dividing groove is formed so that the broken line (A1) becomes a bent line (A2) in the form of translation, and the parallel movement is repeated to form a broken line-shaped dividing groove over the entire surface of the semiconductor wafer. Subsequently, as shown in FIG. 2, every other bending point of the broken line is selected, and a straight dividing groove (B) is formed so as to connect the adjacent bent points of the bent line. Subsequently, a straight dividing groove (C) is formed that connects between the bending points adjacent to the bent line translated from the bent point that was not previously selected to the side opposite to the previously translated bent line. Thereby, it is possible to form a split groove for obtaining a honeycomb-shaped hexagonal chip shape on the semiconductor wafer. Further, in order to obtain a pentagonal chip, a linear dividing groove may be further formed as shown by a straight line (D) in FIG.

  In addition, there is also a method for obtaining a hexagonal chip by forming a broken-line-shaped dividing groove in three directions rotated by 60 degrees to obtain a regular hexagonal dividing groove. FIG. 4 illustrates this method. A dividing groove having the same length as one side of the chip-shaped hexagon in the first direction is intermittently formed in a broken line shape to form a broken line dividing groove (E) in the first direction. Next, the stage is rotated 60 degrees. A broken groove having the same length as one side of the hexagonal shape of the chip shape is formed in a broken line shape with the end of each broken groove (E) in the first direction as the start end in the second direction. The broken-line dividing groove (F). Next, the stage is further rotated 60 degrees. A split groove having the same length as one side of the chip-shaped hexagon is formed in a broken line shape starting from the end of each split groove of the broken-line split groove (F) in the second direction as the start end, and in the third direction The broken-line dividing groove (G). Thereby, it is possible to form a split groove for obtaining a honeycomb-shaped hexagonal chip shape on the semiconductor wafer. Further, in order to obtain a pentagonal chip, a linear dividing groove may be further formed as shown by a straight line (D) in FIG. Needless to say, the procedure for forming the split grooves for obtaining the honeycomb-shaped hexagonal chip shape is not limited to the procedure or method described above. Further, the shape does not have to be a regular hexagon, and an arbitrary hexagon can be obtained by changing the angle of the polygonal line or the rotation angle of the broken line in the three directions.

  If such a complicated groove shape is not accurately placed in the entire semiconductor wafer, the groove depth and width are partially changed, which may cause chipping defects and scratch defects during chip separation. In order to accurately insert a split groove in the entire semiconductor wafer, it is necessary to reduce the warp of the semiconductor wafer and keep the focal position of the laser beam with respect to the wafer surface as constant as possible over the entire wafer. Some laser processing equipment itself incorporates an automatic focus position control function, and there is a method of using it. However, the warping shape often changes as laser processing proceeds, and basically it is important to minimize the warping of the semiconductor wafer that is irradiated with the laser. When a split groove is formed by laser processing on a semiconductor wafer having no warp, a split groove having a stable width and depth can be formed on the entire semiconductor wafer.

  A semiconductor wafer obtained by epitaxially growing a thin film on a substrate often warps more than a substrate that is not epitaxially grown. The thicker the substrate, the less the warpage after growing the epitaxial film. However, if the substrate is too thick, the cost increases. Therefore, in order to obtain a stable epitaxial film with little warpage during epitaxial growth, the substrate thickness is usually about 350 μm to 450 μm. In some cases, a thicker sapphire substrate of about 600 μm is used. However, this does not apply to the case where the same type of substrate as the epitaxial film stacked on top is used, such as a GaN substrate, or the case where the warpage of the semiconductor wafer is controlled, such as the use of a substrate in which warpage has been inserted in advance.

  In the third step of the present invention, the thickness of the semiconductor wafer is preferably about 150 μm or less by grinding and / or polishing the back side of the substrate having the above thickness. As the final thickness after grinding and / or polishing is thinner, not only the defect that the chip end face is damaged during chip separation is reduced, but also a polygonal chip can be obtained without using a special chip separation method. On the other hand, if the final thickness of the semiconductor wafer becomes too thin, the semiconductor wafer will be warped and it will be difficult to separate the chips, and cracking defects that sometimes damage the semiconductor wafer during backside processing are likely to occur. The preferred thickness is about 120 μm or less, more preferably about 100 μm or less, and still more preferably about 85 μm or less. The lower limit is preferably about 40 μm or more, more preferably about 60 μm or more.

  If the substrate is ground and / or polished so as to facilitate chip separation, the force of the substrate is weakened and warping is increased. Therefore, this step of reducing the thickness of the semiconductor wafer by grinding and / or polishing the back side of the substrate is preferably after the step of forming the split grooves. However, when the dividing groove is formed on the back surface of the substrate, it is preferable to grind the groove before forming the dividing groove because it can be accurately ground. Therefore, when providing the dividing groove from both the semiconductor side and the substrate back side of the semiconductor wafer, firstly providing the dividing groove from the semiconductor side, then grinding and / or polishing, and then providing the dividing groove from the substrate back side again. Is preferred.

  Further, it is more preferable to form the dividing groove so that the depth of the dividing groove reaches the substrate when the dividing groove is formed, because warpage of the entire semiconductor wafer can be reduced. This is because the thin film that causes warping is divided at the position of the dividing groove, and the stress applied to the substrate of the thin film is divided at the position of the dividing groove, so that the overall stress that warps the wafer is reduced. . In this way, not only can the cracking failure of the semiconductor wafer in the grinding and / or polishing process of the substrate back surface performed after this split groove forming step be reduced, but also the entire substrate back surface can be processed uniformly, A uniform semiconductor wafer can be obtained.

  If the thickness of the semiconductor wafer is not uniform, the split groove has a bending point, causing adjacent chips to rub against each other at the time of chip separation, resulting in partial chipping or flaws on the chip end face. It becomes. Therefore, it is more preferable that the dividing groove inserted before the step of thinning the substrate has a depth reaching the substrate.

  The grinding and polishing of the back surface of the substrate may be performed by any conventionally known method. Of these, grinding and polishing using abrasive grains such as diamond are preferable.

  The fourth step of separating into individual chips is to cause a crack in the substrate from the dividing groove by applying stress to the semiconductor wafer obtained by carrying out the first to third steps with a roller or the like. Done.

  If the chip shape is a quadrangle, the chip can be separated by a breaker using a notch. However, if the chip shape is a pentagon or more, chipping defects frequently occur when a notch that applies stress to a linear region of a semiconductor wafer is used. Similarly, a separation method in which a fold line is inserted in a straight line also causes chipping defects. For this reason, it is better that the semiconductor wafer for chip separation is thinner.

  When the semiconductor wafer is thick, a method of separating the chips by placing the semiconductor wafer on a spherical mold that can be separated in a direction in which the distance between adjacent chips is separated is preferable. When a spherical mold is used, it is preferable that the thickness of the semiconductor wafer is about 90 μm or more and 150 μm or less and the split groove depth is about 15 μm to 20 μm.

  When the semiconductor wafer is thin, the chip can be separated by applying stress with a roller or the like to crack the substrate. When the thickness of the semiconductor wafer is 100 μm or less and the split groove depth is 15 μm or more, chip separation is possible by applying stress with a roller or the like. In order to reduce the incidence of flaws and the like, it is necessary to take a further margin.

  When the semiconductor wafer becomes thinner, chip separation is possible even with a chip breaker using notches. By optimizing the shape of the notch tip of the chip breaker and the stress applied to the notch so that the stress can be uniformly applied to a wide area like a roller, even if the thickness of the semiconductor wafer is about 100 μm, it depends on the chip breaker. Chip separation is possible.

  The pentagonal or higher polygonal chip obtained in this way has better light extraction efficiency at the end of the chip than the conventional rectangular chip. The substrate side may be bonded to a lead frame with silver paste or epoxy resin, etc. and wire-bonded to the positive and negative electrodes to make a face-up chip that conducts electricity, or the positive and negative electrodes are lead through a conductive material such as solder. It may be a flip chip type chip that is bonded to a frame or the like and energized. The lead frame on which the chip is mounted can be used as a blue or green high-intensity lamp by sealing with a resin, or a light energy conversion material such as a phosphor can be arranged around the chip and used as a high-intensity white lamp. At this time, in order to effectively use the light emitted from the end portion of the chip, it is also beneficial to dispose more light energy conversion material near the end portion than near the center of the chip. Furthermore, various designs are possible in conjunction with the shape of the lead frame and the light distribution of the light emitted from the lamp.

  Hereinafter, although an example explains concretely, the present invention is not limited only to these examples.

Example 1
A blue light-emitting element made of a group III nitride semiconductor having a regular hexagonal chip shape was produced as follows. FIG. 5 is a plan view of the light-emitting element fabricated in this example, where 1 is a p-electrode, 2 is a p-electrode bonding pad, 3 is an n-type layer exposed surface, and 4 is an n-electrode.

An underlayer of about 4 μm thickness made of undoped GaN through a buffer layer made of AlN on a sapphire substrate having a diameter of 5.1 cm (2 inches) and a thickness of 420 μm, Ge-doped (concentration 1 × 10 ¹⁹ / cm ³ ) n-side contact layer made of GaN with a thickness of about 2 μm, Si-doped (concentration about 1 × 10 ¹⁸ / cm ³ ) n-side cladding layer with a thickness of about 12.5 nm made of In _0.1 Ga _0.9 N, made of GaN A light emitting layer having a multiple quantum well structure in which a barrier layer having a thickness of about 16 nm and a well layer having a thickness of about 2.5 nm made of In _0.2 Ga _0.8 N are alternately stacked five times, and finally provided with a barrier layer, Mg Doped (concentration 1 × 10 ²⁰ / cm ³ ) Al _0.07 Ga _0.93 N p-side cladding layer having a thickness of about 2.5 nm and Mg-doped (concentration 8 × 10 ¹⁹ / cm ³ ) Al _0.02 Ga _0.98 N About 0.16μm p The side contact layers were sequentially stacked by MOCVD to form a group III nitride semiconductor stacked structure.

  A translucent p having a structure in which Pt and Au are laminated in order from the p-side contact layer side at a predetermined position on the p-side contact layer of the group III nitride semiconductor laminated structure by using a photolithography technique and a lift-off technique. An electrode was formed. Subsequently, a p-electrode bonding pad having an Au / Ti / Al / Ti / Au layer structure was formed from the semiconductor side by using a photolithography technique.

  Next, etching was performed to expose the n-side contact layer by a photolithography technique and a reactive ion etching technique, and the n-electrode formation surface was etched into a semicircular shape. Subsequently, an n-electrode having a Cr / Ti / Au three-layer structure was formed on the n-electrode formation surface by a method known to those skilled in the art.

  The group III nitride semiconductor wafer thus obtained was passed through a cutting process. First, a water-soluble resist is uniformly applied to the entire surface of the semiconductor layer side of the wafer by a spin coater to prevent contamination at the time of cutting on the group III nitride semiconductor layer during laser processing, and then dried. Thus, a protective film having a thickness of about 0.2 μm was formed.

  Next, a UV tape was attached to the sapphire substrate side of the wafer, and then fixed on a stage of a pulse laser processing machine with a vacuum chuck. The stage can be moved in the X-axis (left and right) and Y-axis (front and rear) directions by computer control, and has a rotatable structure. After fixing to the vacuum chuck, the laser optical system is adjusted so that the focal point of the laser is tied to the surface of the protective film, and each side having an angle of 120 degrees is first irradiated with the laser as shown in FIG. A split groove was formed by irradiating with a laser beam so as to cross the semiconductor wafer so as to have the same broken line (A1). Subsequently, a split groove was formed so as to be a polygonal line (A2) obtained by translating the polygonal line (A1), and this was repeated to form a polygonal split groove on the entire surface of the semiconductor wafer. Subsequently, as shown in FIG. 2, every other bending point of the broken line was selected, and a split groove was formed so as to be a straight line (B) connecting adjacent bent points of the translated broken line. Further, the split groove was formed so as to be a straight line (C) connecting the adjacent bent points of the bent line translated in the opposite direction from the previously translated bent line from the bent point not selected earlier. As a result, split grooves for obtaining a honeycomb hexagonal chip shape having a side of 300 μm were formed on the semiconductor wafer. The formed split groove was about 30 μm deep and about 10 μm wide, exposing the sapphire substrate. At this time, the sectional shape of the dividing groove was V-shaped. After forming the split groove, the vacuum chuck was released, and the wafer was peeled off from the stage. Next, the protective film was removed by placing the wafer on a stage of a cleaning machine and flowing shower water over the surface on the semiconductor layer side while rotating the wafer.

  Next, the back surface side of the sapphire substrate of the wafer was ground and polished, so that the thickness was reduced to about 80 μm. About 7000 regular hexagonal chips were obtained by separating the wafer by applying stress with a roller. When a product having no external defect was taken out, the yield was about 80%.

  The obtained chip was placed on the lead frame with the sapphire substrate facing down, and fixed with an adhesive. The n-electrode and the first lead frame, the p-electrode bonding pad and the second lead frame were each connected by a gold wire so that an element driving current could flow through the chip. Further, the whole was sealed with a transparent epoxy resin and molded into the shape of an LED lamp. When this LED lamp was measured for an integrating sphere, it showed a light emission output of 7.3 to 8.1 mW at a current of 20 mA.

(Example 2)
A blue light-emitting element made of a group III nitride semiconductor was produced as follows. The planar shape is the same as that of the first embodiment.

On a sapphire substrate having a diameter of 5.1 cm (2 inches), a base layer made of undoped GaN with a thickness of about 4 μm through a buffer layer made of AlN, a thickness made of Ge-doped (concentration 1 × 10 ¹⁹ / cm ³ ) GaN. N-side contact layer having a thickness of about 2 μm, n-side cladding layer having a thickness of about 12.5 nm made of Ge-doped (concentration about 1 × 10 ¹⁸ / cm ³ ) In _0.1 Ga _0.9 N, and a barrier layer having a thickness of about 16 nm made of GaN And a well layer made of In _0.2 Ga _0.8 N and having a thickness of about 2.5 nm are alternately stacked five times, and finally a light emitting layer having a multiple quantum well structure provided with a barrier layer, Mg doped (concentration 1 × 10 ²⁰⁾ / Cm ³ ) p-side cladding layer made of Al _0.07 Ga _0.93 N with a thickness of about 2.5 nm and Mg-doped (concentration 8 × 10 ¹⁹ / cm ³ ) Al _0.02 Ga _0.98 N with a thickness of about 0.16 μm Side contact layer MO To form a group III nitride semiconductor multilayer structure by sequentially stacking the VD method.

  A translucent p having a structure in which Pt and Au are laminated in order from the p-side contact layer side at a predetermined position on the p-side contact layer of the group III nitride semiconductor laminated structure by using a photolithography technique and a lift-off technique. An electrode was formed. Subsequently, a p-electrode bonding pad having an Au / Ti / Al / Ti / Au layer structure was formed from the semiconductor side by using a photolithography technique.

  Next, etching was performed to expose the n-type layer by a photolithography technique and a reactive ion etching technique, and the n-electrode forming surface was formed in a semicircular shape. At the same time, a groove portion having a side length of about 300 μm and a groove width of about 18 μm was formed so as to form a regular hexagonal chip shape. The grooves were formed in the entire semiconductor wafer so as to form a regular hexagonal honeycomb pattern. Subsequently, an insulating film made of silicon oxide is formed on the exposed portion of the active layer and the p-type layer around the n-electrode forming surface, and an n-electrode having a Cr / Ti / Au three-layer structure is formed on the n-electrode forming surface. It was formed by a known method.

  The group III nitride semiconductor wafer thus obtained was passed through a cutting process. First, a water-soluble resist is uniformly applied to the entire surface of the semiconductor layer side of the wafer by a spin coater to prevent contamination at the time of cutting on the group III nitride semiconductor layer during laser processing, and then dried. Thus, a protective film having a thickness of about 0.2 μm was formed.

  Next, a UV tape was attached to the sapphire substrate side of the wafer, and then fixed on a stage of a pulse laser processing machine with a vacuum chuck. The stage can be moved in the X-axis (left and right) and Y-axis (front and rear) directions by computer control, and has a rotatable structure. After fixing to the vacuum chuck, the laser optical system is adjusted so that the focal point of the laser is tied to the surface of the protective film, and the split groove is formed by irradiating the bottom of the groove with laser light. As shown in FIG. 1, the split groove is formed so as to cross the semiconductor wafer so that the length of each side having an angle of 120 degrees first becomes the same polygonal line (A1) as shown in FIG. It was formed by irradiation with laser light. Subsequently, a split groove was formed so as to be a polygonal line (A2) obtained by translating the polygonal line (A1), and this was repeated to form a polygonal split groove on the entire surface of the semiconductor wafer. Subsequently, as shown in FIG. 2, every other bending point of the broken line was selected, and a split groove was formed so as to be a straight line (B) connecting adjacent bent points of the translated broken line. Further, the split groove was formed so as to be a straight line (C) connecting the adjacent bent points of the bent line translated in the opposite direction from the previously translated bent line from the bent point not selected earlier. As a result, a split groove for obtaining a honeycomb-shaped hexagonal chip shape having a side of 300 μm was formed on the groove portion of the semiconductor wafer. The formed split groove was about 25 μm deep and about 10 μm wide, exposing the sapphire substrate. At this time, the sectional shape of the dividing groove was V-shaped. After forming the split groove, the vacuum chuck was released, and the wafer was peeled off from the stage. Next, the protective film was removed by placing the wafer on a stage of a cleaning machine and flowing shower water over the surface on the semiconductor layer side while rotating the wafer.

  Next, by grinding the back surface side of the sapphire substrate of the wafer, the thickness was reduced to about 80 μm. The wafer was separated by applying stress with a roller to obtain about 7000 regular hexagonal chips as shown in FIG. When a product having no external defect was taken out, the yield was about 80%.

  When the obtained chip was molded into an LED lamp and evaluated in the same manner as in Example 1, a light emission output of 9.3 to 10 mW was exhibited at a current of 20 mA.

(Example 3)
The laser light irradiation method of Example 1 was performed as follows. As shown in FIG. 4, a split groove having the same length as one side of the chip-shaped hexagon in the first direction is intermittently formed in a broken line shape, and the broken groove (E) in the first direction is To do. Next, the stage is rotated 60 degrees. A broken groove having the same length as one side of the hexagonal shape of the chip shape is formed in a broken line shape with the end of each broken groove (E) in the first direction as the start end in the second direction. The broken-line dividing groove (F). Next, the stage is further rotated 60 degrees. A split groove having the same length as one side of the chip-shaped hexagon is formed in a broken line shape starting from the end of each split groove of the broken-line split groove (F) in the second direction as the start end, and in the third direction The broken-line dividing groove (G). As a result, split grooves for obtaining a honeycomb hexagonal chip shape having a side of 300 μm were formed on the semiconductor wafer. The dimensions and cross-sectional shape of the split groove were almost the same as in Example 1. When the obtained chip was molded into an LED lamp in the same manner as in Example 1 and evaluated, it showed a light emission output of 7.3 to 8.1 mW at a current of 20 mA.

Example 4
The semiconductor wafer of Example 2 was ground to a thickness of about 80 μm, and then placed on a spherical mold and pressed from above to separate into individual chips. When a product having no external defect was taken out, the yield was about 85%.

(Example 5)
About 7000 regular hexagonal chips were obtained in the same manner as in Example 2 except that a light-reflective p-electrode having a structure in which Pt and Rh were laminated in order from the p-side contact layer side was formed as the p-electrode. When a product having no external defect was taken out, the yield was about 80%.

  The n-electrode and p-electrode bonding pad of the obtained chip were respectively connected to the negative electrode and the positive electrode of a submount in which an electric circuit was previously incorporated via solder. This submount was further placed on a lead frame so that an element driving current could flow through the chip. Further, the whole was sealed with a transparent epoxy resin and molded into the shape of an LED lamp. When this LED lamp was measured for an integrating sphere, it showed a light emission output of 19 to 21 mW at a current of 20 mA.

(Example 6)
After the semiconductor wafer of Example 5 was ground and polished to a thickness of about 80 μm, a laser beam was irradiated to the position on the substrate polishing surface side corresponding to the split groove formation position to obtain a depth of about 15 μm and a width of about 20 μm. Two split grooves were formed. The shape of the dividing groove was almost V-shaped and finished with a chamfered corner of the substrate. About 7000 regular hexagonal chips were obtained by separating the wafer by applying stress with a roller. When a product having no external defect was taken out, the yield was about 90%.

  When the obtained chip was molded into the shape of an LED lamp in the same manner as in Example 5 and evaluated, it showed a light emission output of 20 to 23 mW at a current of 20 mA.

(Example 7)
After the straight groove (C) shown in FIG. 2 is formed, the straight groove (D) shown in FIG. 3 is further formed to form the split groove for obtaining the pentagonal chip shown in FIG. Except that, about 14000 pentagonal chips were obtained in the same manner as in Example 1. When a product having no external defect was taken out, the yield was about 80%.

  When the obtained chip was molded into the shape of an LED lamp in the same manner as in Example 1, the light emission output of 3.5 to 3.8 mW was exhibited at a current of 20 mA.

(Example 8)
A light emitting device was manufactured in the same procedure as in Example 1 except that the dividing groove was formed to have a circular shape with a chip shape having a radius of 275 μm. Since an area that cannot be used as a light emitting element is formed between the circles, the effective area that can be formed into chips is about 80% compared to the regular hexagonal case. As shown in FIG. 7, the electrode shape was such that the n-electrode formation surface (3) was formed at the center of the chip, and the p-electrode (1) was placed around it. According to the procedure of Example 1, about 6000 circular chips were obtained. When a product having no external defect was taken out, the yield was about 70%.

  The obtained chip was molded into the shape of an LED lamp in the same manner as in Example 1 and evaluated to show a light emission output of 8.1 to 8.3 mW at a current of 20 mA.

  The compound semiconductor light-emitting device obtained by the present invention has a good current distribution, can easily cope with a large chip, improves the light extraction efficiency on the side of the chip, and has a shape with a high degree of freedom in chip arrangement at the time of chip mounting, In particular, the utility value for the lighting industry is extremely large. Furthermore, since the yield when taking out the chips from the substrate can be improved, low-cost mass supply is possible.

It is a figure which shows an example of the split groove formation procedure of a hexagonal chip | tip. It is another figure which shows an example of the split groove formation procedure of a hexagonal chip | tip. It is a figure which shows an example of the split groove formation procedure of a pentagonal chip | tip. It is another figure which shows an example of the split groove formation procedure of a hexagonal chip | tip. 4 is a plan view of a light-emitting element manufactured in Example 1. FIG. 7 is a plan view of a light-emitting element manufactured in Example 7. FIG. FIG. 10 is a plan view of a light-emitting element manufactured in Example 8.

Explanation of symbols

1 p-electrode 2 p-electrode bonding pad 3 n-type layer exposed portion 4 n-electrode

Claims (24)

  In a method for manufacturing a group III nitride semiconductor device having a chip shape of a pentagon or more polygon, a first step of forming a semiconductor wafer by epitaxially growing a group III nitride semiconductor on a substrate, and a laser beam on the semiconductor wafer A second step of forming a split groove by irradiating the substrate, a third step of grinding and / or polishing a main surface side different from the main surface of the substrate epitaxially grown, and applying stress to the split groove And a fourth step of separating into individual chips. A method of manufacturing a group III nitride semiconductor device, comprising:   The manufacturing method of the group III nitride semiconductor element of Claim 1 which has a 1st process, a 2nd process, a 3rd process, and a 4th process in this order.   3. The method for manufacturing a group III nitride semiconductor device according to claim 1, further comprising a fifth step of forming a groove portion where at least the n-type layer is exposed corresponding to the split groove forming position.   The method for producing a group III nitride semiconductor device according to claim 3, wherein the fifth step is before the second step.   The method for producing a group III nitride semiconductor device according to claim 3, wherein the fifth step is after the second step.   The manufacturing method of the group III nitride semiconductor element as described in any one of Claims 1-5 with which a 2nd process irradiates a laser beam from the semiconductor side of a semiconductor wafer.   The method for producing a group III nitride semiconductor device according to any one of claims 1 to 6, wherein at least a part of the dividing groove reaches the substrate.   The manufacturing method of the group III nitride semiconductor element as described in any one of Claims 1-7 with which a 2nd process irradiates a laser beam from the board | substrate side of a semiconductor wafer.   9. The method for producing a group III nitride semiconductor device according to claim 8, wherein the second step comprises a step of irradiating a laser beam from the semiconductor side of the semiconductor wafer and a step of irradiating the laser beam from the substrate side of the semiconductor wafer.   The method for manufacturing a group III nitride semiconductor device according to any one of claims 1 to 9, wherein a sectional shape of the dividing groove is V-shaped.   In the second step, a bent broken line-shaped dividing groove is provided, a plurality of bent broken line-shaped dividing grooves are provided in a form in which the bent line-shaped dividing grooves are moved in parallel, and then the adjacent bent line-shaped dividing grooves are provided. The method for producing a group III nitride semiconductor device according to claim 1, further comprising providing a linear dividing groove connecting every other bending point.   The second step provides a first broken-line-shaped dividing groove, a second broken-line-shaped dividing groove that intersects the first broken-line-shaped dividing groove at a first angle, and a second broken-line shape Providing a third broken-line-shaped dividing groove that intersects the second-divided groove at a second angle and intersects with the first broken-line-shaped divided groove at a third angle. The method for producing a group III nitride semiconductor device according to any one of claims 1 to 10, wherein the sum of the angle and the third angle is 180 degrees.   The method for manufacturing a group III nitride semiconductor device according to any one of claims 1 to 12, wherein the thickness of the semiconductor wafer is ground and / or polished to 150 µm or less in the third step.   The method of manufacturing a group III nitride semiconductor device according to any one of claims 1 to 13, wherein the fourth step is performed by pressing a substrate against a spherical mold.   The method for manufacturing a group III nitride semiconductor device according to claim 1, wherein the chip shape is substantially a regular hexagon.   The method for manufacturing a group III nitride semiconductor device according to claim 1, wherein the chip shape is substantially a pentagon.   In the second step, a bent broken line-shaped dividing groove is provided, a plurality of bent broken line-shaped dividing grooves are provided in a form in which the bent line-shaped dividing grooves are moved in parallel, and then the adjacent bent line-shaped dividing grooves are provided. A hexagonal split groove is provided by connecting every other bending point, and a straight split groove connecting two opposite sides of the hexagonal split groove is provided. The method for producing a group III nitride semiconductor device according to claim 16.   The second step provides a first broken-line-shaped dividing groove, a second broken-line-shaped dividing groove that intersects the first broken-line-shaped dividing groove at a first angle, and a second broken-line shape A third broken-line dividing groove that intersects the first broken line groove at a second angle and intersects with the first broken-line-shaped groove groove at a third angle, Because the sum of the angle and the third angle is 180 degrees, a hexagonal split groove is formed, and further, a straight split groove that connects two opposite sides of the hexagonal split groove is provided. The method for producing a group III nitride semiconductor device according to claim 16.   The method for manufacturing a group III nitride semiconductor device according to any one of claims 1 to 10, 13 and 14, wherein the chip shape is substantially circular.   The group III nitride semiconductor device according to any one of claims 1 to 19, wherein the group III nitride semiconductor device is a light emitting device.   21. The group III nitride according to claim 20, wherein the first step comprises epitaxially growing an n-type layer, a light emitting layer, and a p-type layer made of a group III nitride semiconductor on the substrate in this order to form a semiconductor wafer. A method for manufacturing a semiconductor device.   A group III nitride semiconductor light-emitting device manufactured by the manufacturing method according to claim 20 or 21.   A lamp comprising the light emitting device according to claim 22.   24. The lamp according to claim 23, wherein more light energy conversion material is disposed at the end than the center of the semiconductor chip forming the light emitting element.

Images