JP2006133543A - Display apparatus, its drive method and drive method of pixel circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display apparatus which can suppress changes in the threshold voltage of a drive transistor. <P>SOLUTION: A light scanner 4 operates a sampling transistor Tr1 to sample an image signal, holds the signal in a capacitor Cs2 and applies as an input voltage to a drive transistor Tr2. A drive scanner 6 turns on a switching transistor Tr4 and supplies a power source Vcc to the drive transistor Tr2, to make light emitted by a light-emitting element EL. A controller controls the drive scanner 6 to adjust a period when the light-emitting element EL emits light, adjusts the timing of supplying the output current Id to the light-emitting element EL, and correspondently controls the light scanner 4 to adjust the timing of applying an input voltage to the drive transistor Tr2. Thus, a standby period, from the time input voltage is applied on the drive transistor until the output current is actually supplied, is shortened and changes in the threshold voltage are suppressed. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a driving method of a pixel circuit in which a light emitting element arranged for each pixel is driven by current. In addition, the pixel circuit is a display device in which the pixel circuits are arranged in a matrix (matrix), and the amount of current supplied to a light emitting element such as an organic EL is controlled by an insulated gate field effect transistor provided in each pixel circuit. The present invention relates to a so-called active matrix display device and a driving method thereof.

  In an image display device such as a liquid crystal display, an image is displayed by arranging a large number of liquid crystal pixels in a matrix and controlling the transmission intensity or reflection intensity of incident light for each pixel in accordance with image information to be displayed. This also applies to an organic EL display using an organic EL element as a pixel, but unlike a liquid crystal pixel, the organic EL element is a self-luminous element. Therefore, the organic EL display has advantages such as higher image visibility than the liquid crystal display, no backlight, and high response speed. Further, the luminance level (gradation) of each light emitting element can be controlled by the value of the current flowing therethrough, and is greatly different from a voltage control type such as a liquid crystal display in that it is a so-called current control type.

In the organic EL display, similarly to the liquid crystal display, there are a simple matrix method and an active matrix method as driving methods. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-definition display. Therefore, the active matrix method is actively developed at present. In this method, a current flowing through a light emitting element in each pixel circuit is controlled by an active element (generally a thin film transistor or TFT) provided in the pixel circuit, and is described in the following patent documents.
JP 2003-255856 A JP 2003-271095 A JP 2004-133240 A JP 2004-029791 A JP 2004-093682 A

  A conventional pixel circuit is arranged at a portion where a row scanning line supplying a control pulse and a column signal line supplying a video signal intersect, and includes at least a sampling transistor, a capacitor, a drive transistor, and a light emitting element. . The sampling transistor conducts in response to the control pulse supplied from the scanning line and samples the video signal supplied from the signal line. The capacitor unit holds an input voltage corresponding to the sampled video signal. The drive transistor supplies an output current during a predetermined light emission period in accordance with the input voltage held in the capacitor unit. The light emitting element emits light with luminance according to the video signal by the output current supplied from the drive transistor.

  The drive transistor receives the input voltage held in the capacitor portion at the gate, causes an output current to flow between the source and the drain, and energizes the light emitting element. In general, the light emission luminance of a light emitting element is proportional to the amount of current applied. Further, the output current supply amount of the drive transistor is controlled by the gate voltage, that is, the input voltage written in the capacitor. The conventional pixel circuit controls the amount of current supplied to the light emitting element by changing the input voltage applied to the gate of the drive transistor in accordance with the input video signal.

Here, the operating characteristic of the drive transistor is expressed by the following characteristic equation.
Id = (1/2) μ (W / L) Cox (Vgs−Vth)
In this transistor characteristic formula, Id represents a drain current flowing between the source and drain, and is an output current supplied to the light emitting element in the pixel circuit. Vgs represents a gate applied voltage applied to the gate with reference to the source, and is the above-described input voltage in the pixel circuit. Vth is the threshold voltage of the transistor. Μ represents the mobility of the semiconductor thin film constituting the channel of the transistor. In addition, W represents the channel width, L represents the channel length, and Cox represents the gate capacitance. As is apparent from this transistor characteristic equation, when the thin film transistor operates in the saturation region, if the gate voltage Vgs increases beyond the threshold voltage Vth, the thin film transistor is turned on and the drain current Id flows. In principle, as indicated by the above transistor characteristic equation, the same amount of drain current Id is always supplied to the light emitting element if the gate voltage Vgs is constant. Accordingly, if input video signals of the same level are supplied to all the pixels constituting the screen, all pixels should emit light with the same luminance, and the uniformity of the screen should be obtained.

  However, in reality, thin film transistors (TFTs) composed of semiconductor thin films such as amorphous silicon have variations in individual device characteristics. In particular, the threshold voltage Vth is not constant and varies from pixel to pixel. As is apparent from the transistor characteristic equation described above, if the threshold voltage Vth of each drive transistor varies, even if the gate applied voltage Vgs is constant, the drain current Id varies and the luminance varies from pixel to pixel. , Damage the screen uniformity. Conventionally, a pixel circuit incorporating a function for canceling variations in threshold voltages of drive transistors has been developed, and is disclosed in, for example, Patent Document 3 described above.

  A conventional pixel circuit incorporating a function for canceling variations in threshold voltage can improve screen uniformity to some extent. However, this type of pixel circuit simply detects the threshold voltage of the drive transistor and cancels it by feeding it back to the gate of the drive transistor. Therefore, although variation in threshold voltage can be canceled, variation in threshold voltage itself cannot be suppressed. It is known that the threshold voltage of a TFT composed of a semiconductor thin film such as amorphous silicon varies with time due to uneven operating conditions. If the threshold voltage fluctuation is left unattended, the life of the display device is shortened. The conventional pixel circuit can cancel the variation in threshold voltage, but cannot further suppress the variation in threshold voltage, which is a problem to be solved.

  SUMMARY OF THE INVENTION In view of the above-described problems of the prior art, the present invention aims to provide a display device capable of not only canceling variation in threshold voltage of a drive transistor but also suppressing variation thereof, a driving method thereof, and a driving method of a pixel circuit. And In order to achieve this purpose, the following measures were taken. That is, the present invention includes a pixel array unit, a scanner unit, a signal unit, and a control unit, and the pixel array unit is formed at a portion where the scanning lines arranged in rows and the signal lines arranged in columns intersect. The signal unit supplies a video signal to the signal line, the scanner unit scans the scanning line, and sequentially drives the pixel for each row. At least a sampling transistor, a drive transistor, a detection transistor, a switching transistor, a light emitting element, and a capacitor. The sampling transistor samples the video signal and holds it as an input voltage in the capacitor. The drive transistor A display device for supplying an output current corresponding to the input voltage to the light emitting element when receiving power supply via a transistor, The canner includes at least a correction scanner, a light scanner, and a drive scanner, and the correction scanner scans the first scanning line at a first timing to operate the detection transistor, and the threshold of the drive transistor The write scanner detects the voltage and holds it in the capacitor unit. The write scanner scans the second scanning line at the second timing and operates the sampling transistor to sample the video signal supplied to the signal line. Then, this is superposed on the threshold voltage and held in the capacitor unit and applied to the drive transistor as the input voltage, and the drive scanner scans the third scanning line at a third timing to switch the switching transistor. Is turned on, so that power is supplied to the drive transistor and the light emitting element is caused to emit light by the output current of the drive transistor. The control unit controls the drive scanner to adjust a period during which the light emitting element emits light, adjusts the timing of supplying an output current from the drive transistor to the light emitting element, and correspondingly, The write scanner is controlled to adjust the timing of applying the input voltage to the drive transistor.

  Preferably, the control unit includes the light scanner and the drive scanner so that a standby period from when the input voltage is applied to the drive transistor until the output current is supplied to the light emitting element does not become unnecessarily long. Are linked to each other. Further, the control unit fixes the timing control of the correction scanner, and makes the timing control of the write scanner and the drive scanner variable in cooperation with each other.

  The present invention also includes a pixel array section, a scanner section, and a signal section, and the pixel array section is disposed at a portion where the scanning lines arranged in rows and the signal lines arranged in columns intersect with each other. The signal unit supplies a video signal to the signal line, the scanner unit scans the scanning line and sequentially drives the pixel for each row, and each pixel is at least sampled. Including a transistor, a drive transistor, a detection transistor, a switching transistor, a light emitting element, and a capacitor. The sampling transistor samples the video signal and holds it as an input voltage in the capacitor. The drive transistor passes through the switching transistor. In the display device driving method for supplying an output current corresponding to the input voltage to the light emitting element when the power supply is received, Scanning the first scanning line to activate the detection transistor, detect the threshold voltage of the drive transistor and hold it in the capacitor, and the second timing at the second timing A video signal which scans a scanning line and operates the sampling transistor to sample a video signal supplied to the signal line, and superimposes the video signal on the threshold voltage to be held in the capacitor unit to be an input voltage of the drive transistor The third scanning line is scanned at the sampling procedure and at the third timing to turn on the switching transistor, thereby supplying power to the drive transistor and causing the light emitting element to emit light by the output current of the drive transistor. In order to adjust the light emission procedure and the period during which the light emitting element emits light, the light emission procedure is controlled to output current from the drive transistor to the light emitting element. Adjust the timing of supplying, further characterized by performing a timing control step of controlling the video signal sampling procedure for adjusting the timing of applying the input voltage to the drive transistor Correspondingly.

  Preferably, the timing control procedure includes the video signal sampling procedure so that a waiting period from when the input voltage is applied to the drive transistor until the output current is supplied to the light emitting element is not unnecessarily increased. The light emission procedures are controlled in cooperation with each other. In the timing control procedure, the timing control of the threshold voltage correction procedure is fixed, while the timing control of the video signal sampling procedure and the light emission procedure is made variable in cooperation with each other.

  Furthermore, the present invention is arranged at a portion where the row-shaped scanning line and the column-shaped signal line intersect, and includes at least a sampling transistor, a drive transistor, a detection transistor, a switching transistor, a light emitting element, and a capacitor, The video signal supplied from the signal line is sampled and held as an input voltage in the capacitor, and the drive transistor emits an output current corresponding to the input voltage when receiving power supply via the switching transistor. A pixel circuit driving method for performing a threshold voltage correction procedure, a video signal sampling procedure, a light emission procedure, and a timing control procedure for driving a pixel circuit supplied to an element, wherein the threshold voltage correction procedure includes a first timing. To scan the first scan line to activate the detection transistor and to drive the drive transistor. The threshold voltage of the star is detected and held in the capacitor unit, and the video signal sampling procedure scans the second scanning line at the second timing, operates the sampling transistor, and is supplied from the signal line. The video signal is sampled, superimposed on the threshold voltage, held in the capacitor, applied to the drive transistor as the input voltage, and the light emission procedure scans the third scanning line at the third timing. The switching transistor is turned on so that power is supplied to the drive transistor to cause the light emitting element to emit light by the output current of the drive transistor, and the timing control procedure includes a period during which the light emitting element emits light. In order to adjust, the light emission procedure is controlled to adjust the timing of supplying the output current from the drive transistor to the light emitting element, And controlling the video signal sampling procedure for adjusting the timing of applying the input voltage to the live transistor.

  Preferably, the timing control procedure includes the video signal sampling procedure so that a waiting period from when the input voltage is applied to the drive transistor until the output current is supplied to the light emitting element is not unnecessarily increased. The light emission procedures are controlled in cooperation with each other. In the timing control procedure, the timing control of the threshold voltage correction procedure is fixed, while the timing control of the video signal sampling procedure and the light emission procedure is made variable in cooperation with each other.

  In the present invention, in order to adjust the period during which the light emitting element emits light, the timing for supplying the output current from the drive transistor to the light emitting element is controlled. For example, when the brightness of the screen of the display device is set high, the light emission period is lengthened. Conversely, when it is desired to lower the screen brightness, the light emission period is shortened. The earlier the timing of supplying the output current to the light emitting element within one frame period, the longer the light emission period. In the present invention, the sampling of the video signal is controlled in order to adjust the timing of applying the input voltage to the drive transistor in response to the adjustment of the light emission period. Specifically, the video signal sampling timing and the light emission start timing are coordinated and controlled so that the standby period from when the input voltage is applied to the drive transistor until the output current is supplied to the light emitting element is not unnecessarily long. Yes. For example, if the light emission period is shortened, the light emission timing is shifted backward on the time axis, but in cooperation with this, the sampling timing is also shifted backward on the time axis. Accordingly, the standby period from when the input voltage is applied to the drive transistor to when the output current is supplied to the light emitting element can be made constant regardless of the length of the light emitting period. In other words, even if the light emission period is shortened, the standby period is not unnecessarily prolonged. During the standby period, the output current is not supplied to the light emitting element even though the input voltage is applied to the gate of the drive transistor. The threshold voltage of the drive transistor varies due to the application of the input voltage during this standby period. The longer the standby period, the larger the fluctuation range of the threshold voltage. Therefore, in the present invention, the start of application of the input voltage and the start of supply of the output current are controlled in conjunction with each other in terms of timing so as not to unnecessarily lengthen the standby period that causes the fluctuation of the threshold voltage.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of a display device according to the present invention. As shown in the figure, this display device is an active matrix type, and is composed of a pixel array 1 as a main part and a peripheral circuit part. The peripheral circuit unit includes a horizontal selector 3, a write scanner 4, a first drive scanner 5, a second drive scanner 6, a correction scanner 7, a controller 8, and the like. The pixel array 1 includes row-like scanning lines WS and column-like signal lines SL, and pixels R, G, and B arranged in a matrix at the intersection of the two. In order to enable color display, RGB three primary color pixels are prepared, but the present invention is not limited to this. Each pixel R, G, B is composed of a pixel circuit 2. The scanning line SL is driven by the horizontal selector 3. The horizontal selector 3 forms a signal unit and supplies a video signal to the signal line SL. The scanning line WS is scanned by the write scanner 4. Note that other scanning lines DS1, DS2, and AZ are also wired in parallel to the scanning line WS. The scanning line DS1 is scanned by the first drive scanner 5. The scanning line DS2 is scanned by the second drive scanner 6. These drive scanners 5 and 6 mainly control the light emission periods of the light emitting elements included in each pixel. In the present embodiment, in order to adjust the light emission period for each of the three primary colors of RGB, three scanning lines DS1 are arranged in each pixel R, G, B. Similarly, DS2 is also divided into three pixels R, G, and B and arranged. The scanning line AZ is scanned by the correction scanner 7. The write scanner 4, the first drive scanner 5, the second drive scanner 6, and the correction scanner 7 constitute a scanner unit, which sequentially scans a row of pixels every horizontal period. A scanner unit including the scanners 4 to 7 is controlled by a controller 8. The controller 8 constitutes a control unit of the display device. Each pixel circuit 2 samples a video signal from the signal line SL when selected by the scanning line WS. Further, the light emitting element included in the pixel circuit 2 is driven according to the video signal sampled when selected by the scanning line DS2. In addition, the pixel circuit 2 performs a predetermined correction operation when selected by the scanning line AZ.

  The write scanner 4 is basically composed of a shift register, operates in response to clock signals CK and CKX having opposite polarities supplied from the controller 8, and also starts a sampling start pulse WSST supplied from the controller 8. Are sequentially transferred for each horizontal period, and thus control pulses for sampling are sequentially output to the scanning lines WS of the pixels in each row. Similarly, the first drive scanner 5 is also composed of a shift register, and sequentially transfers a drive start pulse DS1ST for each horizontal period in accordance with the clock signals CK and CKX, and thereby to the scanning line DS1 of each row of pixels. Outputs drive control pulses. Similar to the first drive scanner 5, the second drive scanner 6 is also composed of a shift register, and another start pulse DS2ST for driving is sequentially transferred every horizontal period in accordance with the clock signals CK and CKX. Thus, another control pulse for driving is output to the scanning line DS2 of each row of pixels. Further, the correction scanner 7 is also composed of a shift register. The correction start pulse AZST supplied from the controller 8 is sequentially transferred in synchronization with the clock signals CK and CKX, and the control pulse for correction is supplied to each row of pixels. Output.

  The controller 8 supplies clock signals CK and CKX common to the write scanner 4, the first drive scanner 5, the second drive scanner 6, and the correction scanner 7 that constitute the scanner unit. The controller 8 supplies a start pulse to each of the scanners 4 to 7 in addition to the clock signal. These start pulses have waveforms different from those of WSST, DS1ST, DS2ST, and AZST depending on the functions of the scanners 4-7. The controller 8 controls the operation timing of each of the scanners 4 to 7 by adjusting the waveform of these start pulses according to the present invention.

  The above-described pixel array 1 is usually formed on an insulating substrate such as glass and is a flat panel. Each pixel circuit 2 is formed of an amorphous silicon thin film transistor (TFT) or a low temperature polysilicon TFT. In the case of an amorphous silicon TFT, the scanner unit and the controller unit are configured by a TAB or the like separate from the panel, and are connected to the flat panel by a flexible cable. In this case, the clock pulses CK and CKX supplied to the scanners 4 to 7 are commonly used and the number of input clocks is generally reduced.

  FIG. 2 is a circuit diagram showing a configuration example of the pixel circuit 2 shown in FIG. Note that portions related to the controller 8 are omitted for easy understanding of the drawing. The pixel circuit 2 includes a sampling transistor Tr1, a drive transistor Tr2, a switching transistor Tr3, a switching transistor Tr4, a detection transistor Tr5, a switching transistor Tr6, two capacitor elements Cs1, Cs2 and a light emitting element EL constituting a capacitor unit. Has been. In this example, each of the transistors Tr1 to Tr6 is composed of an N channel type amorphous silicon thin film transistor (TFT). As the light emitting element EL, for example, an organic EL element can be used.

  Next, the configuration of the pixel circuit 2 will be specifically described with reference to FIG. The drive transistor Tr2 includes a gate G serving as an input node, a source S serving as an output node, and a drain D serving as a power supply node. The anode of the light emitting element EL is connected to the output node (S). The cathode of the light emitting element EL is grounded. In this example, the light emitting element EL is a two-terminal type including an anode and a cathode. The power supply side node (D) of the drive transistor Tr2 is connected to the power supply Vcc via the switching transistor Tr4. The gate of the switching transistor Tr4 is connected to the scanning line DS2.

  One end of the storage capacitor Cs2 is connected to the input node (G) of the drive transistor Tr2. The other end of the storage capacitor Cs2 is connected to the output node (S) and grounded via the switching transistor Tr3. The gate of the switching transistor Tr3 is connected to the scanning line DS1. Further, the sampling transistor Tr1 is connected to the input node (G) via the coupling capacitor Cs1. The gate of the sampling transistor Tr1 is connected to the scanning line WS. The source of the sampling transistor Tr1 is connected to the signal line SL. In addition, the connection node between the coupling capacitor Cs1 and the sampling transistor Tr1 is grounded via the switching transistor Tr6. The gate of the switching transistor Tr6 is connected to the scanning line AZ. Finally, the detection transistor Tr5 is connected between the gate G and the drain D of the drive transistor Tr2. The gate of the detection transistor Tr5 is connected to the scanning line AZ.

  With reference to the timing chart of FIG. 3, the operation of the pixel circuit according to the present invention shown in FIG. 2 will be described in detail. In the illustrated timing chart, one field (f) starts at timing T1 and one field ends at timing T8. Along the time axis, waveforms of control pulses WS, AZ, DS1, and DS2 applied to the scanning lines WS, AZ, DS1, and DS2, respectively, are shown. In this specification, scanning lines and control pulses applied to the scanning lines are represented by the same reference numerals. Further, along the same time axis, the potential change of the input node (G) and the output node (S) of the drive transistor Tr2 is shown. On the timing chart, they are expressed as a gate potential (G) and a source potential (S). One field is divided into a first non-light emitting period and a second half light emitting period. The timing chart of FIG. 3 represents a case where the light emission period is longer than the non-light emission period. The screen luminance of the display device increases as the proportion of the light emission period in one field (f) increases. The screen brightness is adjusted by, for example, the volume. The control unit of the display device controls the scanner unit according to the volume input, and adjusts the light emission period so as to obtain a desired screen luminance.

  At the timing T0 before the timing T1 at which the field starts, the scanning lines WS, AZ, DS1 are at the low level, while the scanning line DS2 is at the high level. Therefore, only the switching transistor Tr4 is on, and the remaining transistors Tr1, Tr3, Tr5, and Tr6 are off. In this state, the drain D of the drive transistor Tr2 is connected to the power supply Vcc via the switching transistor Tr4 in the on state. The drive transistor Tr2 supplies an output current (drain current) Id to the light emitting element EL according to a gate voltage Vgs applied between the gate G and the source S. Thus, the light emitting element EL emits light with a predetermined luminance.

  When the field starts at timing T1, the control pulse AZ rises. As a result, the detection transistor Tr5 and the switching transistor Tr6 are turned on. When Tr6 is turned on, one end of the coupling capacitor Cs1 is fixed at the ground potential GND, and a detection voltage threshold (Vth) detection state of the drive transistor Tr2 is entered. Since the detection transistor Tr5 is also turned on, the gate G and the drain D of the drive transistor Tr2 are directly connected. At this time, since the switching transistor Tr4 is still kept on, the gate potential of the drive transistor Tr2 rises rapidly. In conjunction with this, the source potential of the drive transistor Tr2 also rises rapidly.

  Subsequently, at timing T2, the control pulse DS2 becomes low level and the switching transistor Tr4 is turned off. As a result, the drive transistor Tr2 is disconnected from the power supply Vcc and enters a non-light emitting state. At the same time, since the control pulse DS1 rises, the switching transistor Tr3 is turned on, and the source S of the drive transistor Tr2 and one end of the storage capacitor Cs2 are grounded. When the switching transistor Tr4 is turned off, the gate potential G of the drive transistor Tr2 decreases. The drain current Id stops flowing when the difference Vgs between the gate potential G and the source potential S reaches the threshold voltage Vth. As a result, the threshold voltage Vth of the drive transistor Tr2 is held in the holding capacitor Cs2 connected between the gate G and the source S.

  Thereafter, at timing T3, the control pulse AZ falls, the detection transistor Tr5 is turned off, and the Vth detection operation ends.

  Subsequently, at timing T4, the control pulse WS rises and the sampling transistor Tr1 is turned on. As a result, the video signal supplied from the signal line SL is coupled to the holding capacitor Cs2 via the coupling capacitor Cs1. As a result, the signal voltage Vin corresponding to the video signal is written to the storage capacitor Cs2 in a manner that adds to the previously written Vth. As a result, the storage capacitor Cs2 supplies the input voltage Vin + Vth to the input node (G) of the drive transistor Tr2. Since the threshold voltage Vth is always added to the input voltage, this variation can always be canceled even if the threshold voltage of the drive transistor varies from pixel to pixel.

  Thereafter, the control pulse WS falls at the timing T5 when one horizontal period (1H) assigned to the sampling of the video signal elapses, and the sampling transistor Tr1 is turned off.

  Subsequently, at timing T6, the control pulse DS1 falls and the switching transistor Tr3 is turned off. As a result, the source S of the drive transistor Tr2 and one end of the storage capacitor Cs2 are disconnected from the ground level, and the light emitting operation is ready.

  Thereafter, at timing T7, the control pulse DS2 rises and the switching transistor Tr4 is turned on. As a result, the drain D of the drive transistor Tr2 is connected to the power supply voltage Vcc, a drain current Id corresponding to the input voltage Vin + Vth flows, and the light emitting element EL emits light with a luminance corresponding to the signal voltage Vin. At the timing T7, the source S of the drive transistor Tr2 is already disconnected from the ground potential GND. Therefore, when the output current Id flows through the light emitting element EL, the anode potential (and hence the source potential of the drive transistor Tr2) rises due to the voltage drop. At this time, since the gate potential also rises as it is by the bootstrap operation, the input voltage (gate voltage Vgs) held in the holding capacitor Cs2 is kept constant. As a result, the drive transistor Tr2 operates as a constant power source.

  Finally, when the timing T8 is reached, the field is completed and the next field is entered. In the next field, the light emission period that has continued from the previous field ends at timing T9, the process proceeds to the non-light emission period, and the Vth correction operation is performed.

  As is apparent from the above description, the display device repeats the Vth correction procedure, the video signal sampling procedure, and the light emission procedure for each field. Specifically, first, a Vth correction procedure is performed from timing T2 to timing T3. This period is referred to as a correction period T2-T3. Next, a video signal sampling procedure is performed from timing T4 to timing T5. This period is referred to as a sampling period T4-T5. Thereafter, the light emission state is switched from the non-light emission state to the light emission state at timing T7, and this light emission state continues until timing T9. A period during which the light emitting element EL emits light is referred to as a light emission period T7-T9.

  The input voltage represented by the difference between the gate potential (G) and the source potential (S) is maintained at Vth until the correction period T2-T3 ends and the sampling period T4-T5 is reached. Subsequently, the input voltage is Vin + Vth from the sampling period T4-T5 to the light emission period T7-T9. In the timing chart of FIG. 3, the period from the timing T4 at which the input voltage Vin + Vth starts to be applied to the gate G of the drive transistor Tr2 to the timing T7 at which the output current Id actually starts to be supplied to the light emitting element EL is defined as a waiting period T4-T7. During this standby period, the input voltage Vin + Vth is applied to the gate G of the drive transistor, but the output current (drain current) does not yet flow. The threshold voltage of the drive transistor varies due to the influence of the input voltage applied to the gate during the standby period. However, when the light emission period is set to be relatively long as in the timing chart of FIG. 3, the waiting period T4-T7 is short because the light emission period T7-T9 is quickly shifted from the sampling period T4-T5. Therefore, the fluctuation of Vth in the waiting period T4-T7 is almost negligible.

  The timing chart of FIG. 4 represents a case where the light emission period is relatively short. As apparent from comparison with the timing chart of FIG. 3, in the timing chart of FIG. 4, the timing T7 at which the output current starts to be supplied to the drive transistor is shifted backward within one field (f). T7-T9 is shorter. For example, when the screen brightness is lowered by volume input or the like, the controller of the display device receives the input and controls the second drive scanner to shift the timing T7 backward. Such control is performed by adjusting the waveform of the start pulse supplied from the controller to the second drive scanner. In the timing chart shown in the figure, the controller controls the first drive scanner so that the timing T6 is also shifted backward as the timing T7 is shifted backward. As a feature of the present invention, in response to the start timing T7 of the light emission period being shifted backward, the controller controls the light scanner so that the sampling period T4-T5 is also shifted backward. As a result, the waiting period T4-T7 is kept constant despite the light emission period T7-T9 being shortened. That is, as in the case where the light emission period is long, the light emission period T7 is set so as to shift to the light emission period T7-T9 immediately after the sampling period T4-T5 even if the light emission period is short. Since the standby period T4-T7 is short, the fluctuation of the threshold voltage of the drive transistor is negligible.

  On the other hand, even when the light emission period T7-T9 is shortened, the Vth correction period T2-T3 remains fixed at the head of the field. As a result, if the light emission period is shortened, the interval between the correction period T2-T3 and the sampling period T4-T5 is increased accordingly. However, in this expanded period T3-T4, the input voltage applied to the gate of the drive transistor is only Vth, which does not cause any variation in the threshold voltage of the drive transistor.

  FIG. 5 is a timing chart according to the reference example, and shows a case where the light emission period is shortened as in FIG. For ease of understanding, corresponding reference numerals are used for portions corresponding to those in FIG. In the illustrated reference example, even when the light emission start timing T7 is shifted to the rear of the field, the sampling period T4-T5 is fixed to the head of the field (1f) without being interlocked. As a result, the standby period T4-T7 becomes longer by the shortening of the light emission period T7-T9. As the standby period becomes longer, the input voltage Vin + Vth is continuously applied to the gate of the drive transistor, causing a change in threshold voltage.

  As described above, when the standby period becomes longer, the threshold voltage fluctuates due to the input voltage applied to the gate of the drive transistor during that period. If the fluctuation of the threshold voltage becomes large and exceeds the power supply voltage Vcc, the panel cannot be driven. In the present invention, even when the light emission period is shortened, the standby period is prevented from becoming unnecessarily long by shifting the sampling period backward in conjunction with this. As a result, the Vth fluctuation of the drive transistor can be minimized, and the lifetime of the panel can be extended.

  As described above, the display device of the present invention basically includes the pixel array unit 1, the scanner units 4 to 7, the horizontal selector 3 that constitutes the signal unit, and the controller 8 that constitutes the controller unit. The pixel array unit 1 includes scanning lines WS, DS1, DS2, and AZ arranged in a row, signal lines SL arranged in a column, and matrix-like pixels 2 arranged at a portion where both intersect. The horizontal selector 3 constituting the signal unit supplies a video signal to the signal line SL. The scanner units 4 to 7 scan the scanning lines WS, DS1, DS2, and AZ, and sequentially drive the pixel circuits 2 for each row. Each pixel circuit 2 includes a sampling transistor Tr1, a drive transistor Tr2, a detection transistor Tr5, a switching transistor Tr4, a light emitting element EL, and capacitance units CS1 and Cs2. The sampling transistor Tr1 samples the video signal and holds it as the input voltage Vgs in the holding capacitor Cs2 constituting the capacitor unit. When the drive transistor Tr2 is supplied with the power supply Vcc via the switching transistor Tr4, the drive transistor Tr2 supplies an output current Id corresponding to the input voltage Vgs to the light emitting element EL.

  The scanner unit includes a correction scanner 7, a write scanner 4, and a drive scanner 6. The correction scanner 7 scans the first scanning line AZ at the first timing T1, operates the detection transistor Tr5, detects the threshold voltage Vth of the drive transistor Tr2, and holds it in the holding capacitor Cs2. The write scanner 4 scans the second scanning line WS at the second timing T4, operates the sampling transistor Tr1, samples the video signal supplied to the signal line SL, and superimposes this on the threshold voltage Vth to hold the storage capacitor Cs2. And applied to the drive transistor Tr2 as the input voltage Vgs. The drive scanner 6 scans the third scanning line DS2 at the third timing T7 to turn on the switching transistor Tr4, thereby supplying the power supply Vcc to the drive transistor Tr2 and emitting light by the output current Id of the drive transistor Tr2. The element EL is caused to emit light.

  The controller 8 constituting the control unit of the display device controls the drive scanner 6 to adjust the period T7-T9 during which the light emitting element EL emits light, and supplies the output current Id from the drive transistor Tr2 to the light emitting element EL. The timing T7 is adjusted, and the write scanner 4 is controlled to adjust the timing T4 for applying the input voltage Vgs to the drive transistor Tr2 correspondingly. Specifically, the controller 8 is connected to the write scanner 4 so that the standby period T4-T7 from when the input voltage Vgs is applied to the drive transistor Tr2 until the output current Id is supplied to the light emitting element EL is not unnecessarily long. The drive scanners 6 are linked to each other. Preferably, the controller 8 fixes the timing control of the correction scanner 7 while making the timing control of the write scanner 4 and the drive scanner 6 variable in cooperation with each other.

It is a block diagram of the display apparatus concerning this invention. FIG. 2 is a circuit diagram illustrating a pixel circuit of the display device illustrated in FIG. 1. 3 is a timing chart for explaining the operation of the pixel circuit shown in FIG. 2. 3 is a timing chart for explaining the operation of the pixel circuit shown in FIG. It is a timing chart concerning a reference example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pixel array, 2 ... Pixel circuit, 3 ... Horizontal selector, 4 ... Write scanner, 5 ... First drive scanner, 6 ... Second drive scanner, 7 ... Correction scanner, 8 ... controller, Tr1 ... sampling transistor, Tr2 ... drive transistor, Tr4 ... switching transistor, Tr5 ... detection transistor, EL ... light emitting element, Cs2 ... holding capacity

Claims (9)

Including a pixel array unit, a scanner unit, a signal unit and a control unit,
The pixel array section includes scanning lines arranged in rows and signal lines arranged in columns, and matrix-like pixels arranged in a portion where both intersect,
The signal unit supplies a video signal to the signal line,
The scanner unit scans the scanning line to sequentially drive pixels for each row,
Each pixel includes at least a sampling transistor, a drive transistor, a detection transistor, a switching transistor, a light emitting element, and a capacitor, and the sampling transistor samples the video signal and holds it as an input voltage in the capacitor. Is a display device that supplies an output current corresponding to the input voltage to the light emitting element when receiving power supply via the switching transistor,
The scanner unit includes at least a correction scanner, a write scanner, and a drive scanner,
The correction scanner scans the first scanning line at a first timing to operate the detection transistor, detects the threshold voltage of the drive transistor, and holds the threshold voltage in the capacitor unit.
The light scanner scans the second scanning line at a second timing, operates the sampling transistor to sample the video signal supplied to the signal line, and superimposes the video signal on the threshold voltage in the capacitor unit. Hold and apply as the input voltage to the drive transistor;
The drive scanner scans the third scanning line at a third timing to turn on the switching transistor, thereby supplying power to the drive transistor and causing the light emitting element to emit light by the output current of the drive transistor. Let
The control unit controls the drive scanner to adjust the period during which the light emitting element emits light, adjusts the timing of supplying an output current from the drive transistor to the light emitting element, and correspondingly, A display device that controls the light scanner to adjust the timing of applying an input voltage to a drive transistor.   The control unit links the light scanner and the drive scanner to each other so that a standby period from when the input voltage is applied to the drive transistor to when the output current is supplied to the light emitting element is not unnecessarily increased. The display device according to claim 1, wherein the display device is controlled.   The display device according to claim 1, wherein the control unit fixes timing control of the correction scanner, and makes timing control of the light scanner and the drive scanner variable in cooperation with each other. Including a pixel array unit, a scanner unit, and a signal unit,
The pixel array section includes scanning lines arranged in rows and signal lines arranged in columns, and matrix-like pixels arranged in a portion where both intersect,
The signal unit supplies a video signal to the signal line,
The scanner unit scans the scanning line to sequentially drive pixels for each row,
Each pixel includes at least a sampling transistor, a drive transistor, a detection transistor, a switching transistor, a light emitting element, and a capacitor, and the sampling transistor samples the video signal and holds it as an input voltage in the capacitor. In a driving method of a display device for supplying an output current corresponding to the input voltage to the light emitting element when power is supplied through the switching transistor,
A threshold voltage correction procedure for scanning the first scanning line at a first timing to activate the detection transistor, detecting a threshold voltage of the drive transistor and holding the threshold voltage in the capacitor;
The second scanning line is scanned at a second timing, and the sampling transistor is operated to sample the video signal supplied to the signal line, and this is superimposed on the threshold voltage and held in the capacitor unit to drive the drive Video signal sampling procedure to be used as transistor input voltage,
A light emission procedure of scanning the third scanning line at a third timing to turn on the switching transistor, thereby supplying power to the drive transistor and causing the light emitting element to emit light by an output current of the drive transistor;
In order to adjust the period during which the light emitting element emits light, the timing of supplying the output current from the drive transistor to the light emitting element is adjusted by controlling the light emission procedure, and the input to the drive transistor is correspondingly performed. And a timing control procedure for controlling the video signal sampling procedure in order to adjust the timing of applying the voltage.   The timing control procedure includes the video signal sampling procedure and the light emission procedure so that a standby period from when the input voltage is applied to the drive transistor to when the output current is supplied to the light emitting element is not unnecessarily increased. The display device driving method according to claim 4, wherein the two are controlled in cooperation with each other.   5. The timing control procedure according to claim 4, wherein the timing control of the threshold voltage correction procedure is fixed, while the timing control of the video signal sampling procedure and the light emission procedure is made variable in cooperation with each other. A driving method of a display device. The row-shaped scanning lines and the column-shaped signal lines are arranged at the intersections, and include at least a sampling transistor, a drive transistor, a detection transistor, a switching transistor, a light emitting element, and a capacitor, and the sampling transistor is supplied from the signal line A pixel that samples the received video signal and holds it as an input voltage in the capacitor, and the drive transistor supplies an output current corresponding to the input voltage to the light emitting element when power is supplied through the switching transistor. A driving method of a pixel circuit for performing a threshold voltage correction procedure, a video signal sampling procedure, a light emission procedure, and a timing control procedure for driving a circuit,
The threshold voltage correction procedure scans the first scanning line at a first timing to operate the detection transistor, detects the threshold voltage of the drive transistor, and holds this in the capacitor unit;
In the video signal sampling procedure, the second scanning line is scanned at a second timing, the sampling transistor is operated, the video signal supplied from the signal line is sampled, and the video signal is superimposed on the threshold voltage to form the capacitance. Is applied to the drive transistor as the input voltage,
In the light emission procedure, the third scanning line is scanned at a third timing to turn on the switching transistor, thereby supplying power to the drive transistor and emitting the light emitting element by the output current of the drive transistor. Let
The timing control procedure adjusts the timing of supplying the output current from the drive transistor to the light emitting element by controlling the light emitting procedure to adjust the period during which the light emitting element emits light, and correspondingly A method of driving a pixel circuit, characterized in that the video signal sampling procedure is controlled to adjust the timing of applying an input voltage to the drive transistor.   The timing control procedure includes the video signal sampling procedure and the light emission procedure so that a standby period from when the input voltage is applied to the drive transistor to when the output current is supplied to the light emitting element is not unnecessarily increased. The pixel circuit driving method according to claim 7, wherein the two are controlled in cooperation with each other.   8. The timing control procedure according to claim 7, wherein the timing control of the threshold voltage correction procedure is fixed, while the timing control of the video signal sampling procedure and the light emission procedure is made variable in cooperation with each other. A driving method of a pixel circuit.

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