JP2006126509A - Pixel-darkening process and liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To effectively darken defective pixels. <P>SOLUTION: An extension 34 is formed on a metal pad 26 connected to an pixel electrode, and a projection 36 is formed on the SC line SC, with both facing each other via a layer insulator film in between. The pixel electrode is short-circuited to the SC line SC by having it irradiated with laser. When subjected to such a processing, voltage will not be applied to a normally black liquid crystal; and this pixel is darkened, when the SC line SC and the common electrode are at the same potential. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to darkening of a liquid crystal display device that performs display by disposing a liquid crystal between a pixel electrode and a common electrode common to all pixels in each pixel and controlling voltage application to the pixel electrode.

  Conventionally, there is an active matrix type liquid crystal display device including a selection transistor in each pixel, which is widely used. A thin film transistor (TFT) is usually used as the selection transistor, and the data signal fetching for each pixel is controlled by turning on and off the selection TFT.

  In such an active matrix liquid crystal display device, TFT defects and wiring defects may occur during the manufacturing process. Even if the rate of occurrence of such defects is quite small, it is difficult to prevent defective pixels at all when the number of pixels of the display device increases.

  And in the case of a defect in which a pixel becomes a bright spot among the defects, if there is even one, it becomes visible to the user. On the other hand, in the case of a defect in which a pixel becomes a dark spot, if the number is small, it is almost invisible and there is no particular problem. For this reason, the process of darkening the bright spots is performed to improve the yield.

  For example, Patent Document 1 describes the process of darkening in a liquid crystal. In Patent Document 1, a dark spot is formed by short-circuiting a gate wiring that drives a gate of a selection TFT and a pixel electrode.

JP2002-341379

  Here, the liquid crystal includes a normally white liquid crystal that displays white when no voltage is applied, and a normally black liquid crystal that displays black. The above-mentioned Patent Document 1 is a normally white display device in which a gate line and a pixel electrode are short-circuited so that a voltage is constantly applied to the liquid crystal to darken it.

  On the other hand, in the case of normally black, voltage application to the pixel electrode may be prohibited. Therefore, by darkening the wiring between the pixel electrode and the data line with a laser, and also separating the wiring portion of the pixel electrode and the auxiliary capacitor, dark spots can be achieved.

  However, the pixel electrode is in an open state only by separating the pixel electrode in this way, and the potential is not fixed. Therefore, there is a problem that complete dark spots cannot be obtained when charges remain in the pixel electrodes.

  The present invention is a method for darkening a defective pixel in a liquid crystal display device in which a liquid crystal is arranged between a pixel electrode and a common electrode common to all pixels in each pixel and display is performed by controlling voltage application to the pixel electrode. Each pixel has one end connected to the data line, the selection transistor for controlling the reception of the data signal from the data line, and the other end connected to the storage capacitor line, and from one end to the data signal from the selection transistor. A storage capacitor that is supplied and charged and a metal pad that connects one end of the storage capacitor and the pixel electrode are provided, and the metal pad and the storage capacitor line are arranged at different positions in the thickness direction. At the same time, a place where both overlap is formed in each pixel, and the overlapping portion is irradiated with laser to short-circuit the metal pad and the storage capacitor line, thereby darkening the pixel. Characterized by reduction.

  Furthermore, it is preferable that the connection wiring between the one end of the storage capacitor and the metal pad is cut by a laser.

  Further, it is preferable that the connection wiring between the selection transistor and the data line is cut by a laser.

  In addition, the present invention is a liquid crystal display device that performs display by disposing a liquid crystal between a pixel electrode and a common counter electrode common to all pixels in each pixel and controlling voltage application to the pixel electrode. One end is connected to the data line, the selection transistor for controlling the reception of the data signal from the data line, and the other end is connected to the storage capacitor line, and the data signal is supplied from the selection transistor from one end and charged. A storage capacitor, and a metal pad that connects one end of the storage capacitor and the pixel electrode, and the metal pad and the storage capacitor line are arranged at different positions in the thickness direction and overlap each other. A place is formed in each pixel, and this overlapping portion includes a pixel that is darkened by being short-circuited by laser irradiation.

  As described above, according to the present invention, the metal pad connected to the pixel electrode and the storage capacitor line overlap with each other, and the overlapping portion is irradiated with the laser to short-circuit the metal pad and the storage capacitor line. To do. Therefore, in a liquid crystal panel that drives the storage capacitor line and the common electrode so as to have the same potential, the voltage applied to the liquid crystal can always be zero. Therefore, it is possible to surely darken a normally black liquid crystal panel.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram illustrating a configuration of a pixel circuit. The data lines DL extend in the column (column: vertical) direction of the liquid crystal panel, and one data line DL is provided for each column. The gate line GL extends in the row (row: horizontal) direction of the liquid crystal panel, and one gate line GL is provided in one row. Furthermore, one SC line is provided in one row in the row direction.

  The data line DL is connected to the source (or drain) of the selection transistor Q1, which is an n-channel TFT. The selection transistor Q1 is formed of a double gate type transistor composed of two n-channel transistors Q1-1 and Q1-2 connected in series. The gates of the selection transistors Q1 (Q1-1, Q1-2) are connected to the gate line GL. The drain (or source) of the selection transistor Q1 is connected to the pixel electrode 10 and one electrode of the storage capacitor C. The other electrode of the storage capacitor C is connected to the SC line. A common electrode 12 is provided across the entire pixel so as to face the pixel electrode 10, and the liquid crystal LC is disposed between the pixel electrode 10 and the common electrode 12. The common electrode 12 is connected to a predetermined power source COM.

  The plurality of gate lines GL are sequentially selected (H level) one by one for each horizontal period. For this reason, the select transistor Q1 in the corresponding row whose gate is connected to the gate line GL is turned on. On the other hand, the data voltage is supplied to the data line DL for the pixels in the row in which the selection transistor Q1 is turned on. Accordingly, the storage capacitor C of each pixel in the selected row is charged with the data voltage of that pixel. As a result, the data voltage charged in the storage capacitor C is applied to the liquid crystal LC, and display is performed. The selection of the gate lines GL is sequentially changed, but display of one pixel is continued with the written data voltage until data writing is performed in the next frame.

  Here, in the present embodiment, a counter electrode AC drive is employed in which the voltage of the common electrode 12 is periodically changed and a data voltage corresponding to the voltage of the common electrode 12 is supplied to the data line DL. In this counter electrode AC drive, the SC line SC and the common electrode 12 are at the same potential because the SC line SC changes its voltage with the same amplitude and the same phase as the common electrode 12. For example, in the case of line inversion driving, the voltage of the SC line SC and the common electrode 12 is inverted every horizontal period, and a data voltage corresponding to this voltage is applied. As a result, the direction of the voltage applied to the liquid crystal is reversed every line. Note that for one pixel, the voltage is only shifted as the liquid crystal has a capacity, and the display for one frame is maintained.

  Further, if the common electrode 12 and the SC line SC are at the same potential, the counter electrode DC drive may be employed instead of the counter electrode AC drive. In this counter electrode DC drive, the potential of the common electrode 12 is kept constant, and the polarity of the data voltage applied to the liquid crystal is periodically reversed.

  If the common electrode 12 and the SC line SC have the same potential, the metal pad 26 and the common electrode 12 can be made to have the same potential by short-circuiting the SC line SC and the metal pad 26, which will be described later. Can be fixed at the same potential.

  FIG. 2 shows a plan view of the main part of the pixel portion. In this example, the pixels are arranged in a delta arrangement so as to be slightly shifted in the vertical direction (column direction). Therefore, the data line DL meanders so that the position in the horizontal (row) direction is slightly shifted in the vertical (column) direction. On the other hand, the gate line GL and the SC line SC run straight in the row direction.

  A contact 20 is provided on the data line DL and the data line DL in the vicinity of the intersection of the SC line SC, and one end of the semiconductor layer 22 is connected to the data line DL. The semiconductor layer 22 is U-shaped and passes twice below the thickness direction of the gate line GL. This constitutes a double gate type selection transistor Q1 in which two TFTs are connected in series. That is, a region in front of the gate line GL of the semiconductor layer 22 extending from the contact 20 is a drain region, a region below the thickness direction of the gate line GL is a channel region, and a region after passing through the gate line GL is a source region. Forming. The region in the middle of the U-shape is a mere connection wiring, the region before the next gate line GL is the drain region, the region below the gate line GL in the thickness direction is the channel region, and the region after passing through the gate line GL is the source. It becomes a region and forms another TFT.

  The other end of the semiconductor layer 22 is connected to a metal pad 26 on the upper side in the thickness direction by a contact 24. This metal pad is T-shaped, and one end of the upper side is connected to the semiconductor layer 22 by a contact 24, and the other end is connected to the semiconductor layer 30 by a contact 28. The semiconductor layer 30 once extends in the vertical direction, then extends in the horizontal direction so as to overlap the SC line SC, and terminates in the thickness direction of the left and right data lines DL. Therefore, the portion where the SC line SC and the semiconductor layer 30 overlap is the storage capacitor C.

  Further, the metal pad 26 is provided with a contact 32 connected to a pixel electrode (not shown) located in the upper direction in the thickness direction, and the selection transistor Q1, the storage capacitor C and the pixel electrode are connected here.

  In this embodiment, the end of the metal pad 26 on the contact 28 side is extended to integrally form the extension 34. Further, a projecting portion 36 that projects from the SC line SC is located below the extension 34 of the metal pad 26 in the thickness direction. That is, the extension 34 and the protrusion 36 are formed so as to overlap in the thickness direction.

  FIG. 3 shows a cross-sectional view of one transistor portion of the select transistor Q1 and a metal pad 26 portion.

A buffer layer 52 composed of two layers (SiO ₂ / SiN) of SiN and SiO ₂ is disposed on the glass substrate 50, and the semiconductor layer 22 is formed at a predetermined position thereon. In this example, the semiconductor layer 22 is made of polysilicon. A gate insulating film 54 made of a laminated film of SiN / SiO ₂ is formed on the semiconductor layer 22 and the buffer layer 52. On the gate insulating film 54, above the central portion of the semiconductor layer 22, a gate is formed. An electrode 56 is formed. Here, the gate electrode 56 is a gate line GL. The lower part of the gate electrode 56 of the semiconductor layer 22 is a channel region 22c, and both sides thereof are a drain region 22d and a source region 22s. On the gate electrode 56 and the gate insulating film 54, an interlayer insulating film 60 made of a SiO ₂ / SiN laminated film is formed. A metal pad 26 is formed above the source region 22 s on the interlayer insulating film 60, and the metal pad 26 is directly connected to the source region 22 s by a contact penetrating the interlayer insulating film 60 and the gate insulating film 54. ing. That is, the metal pad 26 functions as a source electrode. Since the drain region 22d serves as the source region of the adjacent transistor, the drain electrode is not drawn in this drawing. The drain electrode of the adjacent transistor is connected to the data line DL through a contact.

  A planarizing film 62 such as an acrylic resin is formed covering the metal pad 26 and the interlayer insulating film 60. A pixel electrode 64 made of ITO, IZO or the like is formed on the planarizing film 62, and this pixel electrode is connected to the metal pad 26 by a contact 66. Although not shown, a common electrode is disposed above the pixel electrode 64, and a space between them is filled with liquid crystal.

  FIG. 4 shows a cross-sectional view of a portion corresponding to the extension 34 of the metal pad 26. An extension 34 is formed on the metal pad 26 connected to the semiconductor layer 22 by a contact. On the other hand, a protrusion 36 from the SC line SC is located below the extension 34 via the interlayer insulating film 60.

  The gate electrode 56 and the SC line SC are made of molybdenum (Mo) and are formed by the same process. The metal pad 26 and the data line DL are made of an aluminum-based material composed of three layers of molybdenum (Mo) / aluminum (Al) or aluminum alloy (Al · Nd) / molybdenum (Mo), and are formed by the same process. Is done.

  FIG. 5 is a circuit diagram similar to FIG. 1, but shows the constituent materials of each member. The contacts to the common electrode 12, the pixel electrode 10, and the metal pad 26 are formed of a transparent conductive material (for example, ITO or IZO). The data line DL and the metal pad 26 are made of an aluminum material, and the gate line GL and the SC line SC are made of molybdenum. One electrode of the drain, channel, source region, and storage capacitor of the selection transistor Q1 is formed of polysilicon.

  And the member of the same material is formed in the same layer by the same process. In the above description, the materials are only examples, and various materials can be used as appropriate.

  In the present embodiment, as shown in FIG. 6, dark spots are formed by laser irradiation at three locations. That is, (1) cutting the polysilicon wiring (source / drain region) connecting both transistors of the double gate type selection transistor Q1 (A in FIG. 2), (2) connecting the metal pad 26 and the storage capacitor C. Cutting the polysilicon wiring (B in FIG. 2) and (3) short-circuiting the extension 34 of the metal pad 26 and the protrusion 36 of the SC line SC are performed.

  A YAG laser (wavelength: 1064 nm) is used for cutting the polysilicon wiring of (1) and (2) and short-circuiting the metal wiring of (3). The YAG laser is absorbed by the polysilicon wiring, the polysilicon wiring is cut and absorbed by the metal, the metal (in this case, molybdenum and aluminum) is melted, and the metal wiring is short-circuited.

  In addition, it is also possible to employ | adopt the thing of another wavelength as a laser. For example, by irradiating a polysilicon wiring with an excimer laser or a UV-YAG laser (FHG: 266 nm), the crystallinity is deteriorated, the conductivity is lost, and the wiring can be cut.

  As the laser light, a visible light YAG laser (SHG: 532 nm) or the like can be used. In particular, since metal has a high light absorption rate, various laser beams can be used.

  The laser is irradiated from the glass substrate 50 side.

  As described above, in the present embodiment, when the liquid crystal panel is completed, the defective pixel is irradiated with the laser to perform dark spot processing. In particular, since the SC line and the pixel electrode are short-circuited, the potential of the pixel electrode can be reliably maintained at the potential of the SC line. Since the liquid crystal panel of this embodiment maintains the common electrode and the SC line at the same potential, the voltage applied to the liquid crystal can be surely reduced to 0 for the pixels subjected to the dark spot processing.

It is a figure which shows the circuit structure of a liquid crystal pixel. It is a principal part top view of a pixel part. It is principal part sectional drawing of a pixel part. It is principal part sectional drawing of a pixel part. It is a figure which shows the circuit structure of the liquid crystal pixel which showed material.

Explanation of symbols

  10 pixel electrode, 12 common electrode, 20 contact, 22, 30 semiconductor layer, 22c channel region, 22d drain region, 22s source region, 24, 28, 32, 66 contact, 26 metal pad, 34 extension, 36 protrusion, 50 glass substrate, 52 buffer layer, 54 gate insulating film, 56 gate electrode, 60 interlayer insulating film, 62 planarization film, 64 pixel electrode, C storage capacitor, DL data line, GL gate line, LC liquid crystal, Q1 selection transistor, SC SC line.

Claims (6)

A method of darkening a defective pixel in a liquid crystal display device in which a liquid crystal is arranged between a pixel electrode and a common electrode common to all pixels in each pixel and display is performed by controlling voltage application to the pixel electrode,
Each pixel is
A selection transistor connected at one end to the data line and controlling reception of a data signal from the data line;
The other end is connected to the holding capacitor line, the holding capacitor that receives the supply of the data signal from the selection transistor from one end, and is charged;
A metal pad connecting one end of the storage capacitor and the pixel electrode;
Have
The metal pad and the storage capacitor line are arranged at different positions in the thickness direction, and a place where the two overlap each other is formed in each pixel. A dark spotting method comprising darkening the pixel by short-circuiting the pixel. The method of claim 1, wherein
Further, the darkening method, wherein the connection wiring between the one end of the storage capacitor and the metal pad is cut by a laser. The method according to claim 1 or 2, wherein
Further, the darkening method, wherein the connection wiring between the selection transistor and the data line is cut by a laser. A liquid crystal display device that performs display by arranging a liquid crystal between a pixel electrode and a common counter electrode for each pixel in each pixel and controlling voltage application to the pixel electrode,
Each pixel is
A selection transistor connected at one end to the data line and controlling reception of a data signal from the data line;
The other end is connected to the holding capacitor line, the holding capacitor that receives the supply of the data signal from the selection transistor from one end, and is charged;
A metal pad connecting one end of the storage capacitor and the pixel electrode;
Have
The metal pad and the storage capacitor line are arranged at different positions in the thickness direction, and a place where both overlap each other is formed in each pixel, and this overlapping portion is short-circuited by laser irradiation to cause a dark spot. A liquid crystal display device comprising a pixel that has been formed. The apparatus according to claim 4.
In the darkened pixels,
A liquid crystal display device, wherein a connection wiring between one end of the storage capacitor and the metal pad is cut by a laser. The method according to claim 4 or 5, wherein
In the darkened pixel, a connection wiring between the selection transistor and the data line is cut by a laser.

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