JP2006108470A - Manufacturing apparatus for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing apparatus for a semiconductor device that can improve the manufacturing efficiency of the semiconductor device. <P>SOLUTION: The apparatus for manufacturing the semiconductor device, by dry-etching an inter-layer insulating film formed on a wafer, has a 2nd chamber 20 in which the wafer having the inter-layer insulating film is subjected to dry-etching the inter-layer insulating film in a plasma atmosphere, a 3rd chamber 30 for ashing a resist pattern, a 4th chamber 40 in which the wafer having been ashed is put and heat-treated under designated conditions, and a conveyance chamber 7 equipped with a conveyance arm 9 which transfers the wafer among these 2nd to 4th chambers 20, 30, and 40. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device manufacturing apparatus, and more particularly, to a multi-chamber system including an etching chamber in which dry etching using plasma is performed and a heat treatment chamber in which heat treatment for removing plasma damage is performed. The present invention relates to a dry etching apparatus.

  When a contact hole is formed in an interlayer insulating film formed on a wafer in a semiconductor device manufacturing process, only the contact hole forming region is opened on the interlayer insulating film and the other region is covered. A resist pattern is formed, and the interlayer insulating film is dry etched using the resist pattern as a mask. For this dry etching, for example, a multi-chamber single wafer processing apparatus using plasma is used (see, for example, Patent Document 1).

  However, particularly when a contact hole is formed, the wafer surface is also exposed to the plasma atmosphere due to over-etching, and plasma damage (damage of the crystal structure due to plasma) is caused. If such plasma damage is left on the wafer as it is, there is a high possibility that the threshold voltage (Vth) characteristics of the transistor formed on the wafer will fluctuate with respect to its design value.

Therefore, after forming the contact hole, the wafer is heat-treated using a batch or single-wafer type heat treatment apparatus to remove plasma damage from the wafer. Thereby, it is possible to suppress the variation of the Vth characteristic.
JP 2003-23000 A

  By the way, in the manufacturing process of the semiconductor device according to the conventional example, a dry etching (hereinafter referred to as “plasma etching”) process in a plasma atmosphere and a heat treatment process for the purpose of removing plasma damage are respectively separate apparatuses. It was done using. In order to perform these two processes, the wafer must be transferred from the dry etching apparatus to the heat treatment apparatus, but these two apparatuses are separate apparatuses, and it takes time to transfer the wafer across both apparatuses. It took. Therefore, there is a problem that the efficiency of the manufacturing process of the semiconductor device is hindered.

  Accordingly, the present invention has been made paying attention to such an unsolved problem of the conventional technology, and provides a semiconductor device manufacturing apparatus capable of improving the manufacturing efficiency of the semiconductor device. With the goal.

[Invention 1] In order to achieve the above object, an apparatus for manufacturing a semiconductor device of Invention 1 is an apparatus for manufacturing a semiconductor device by dry etching an etching target film formed on a wafer, wherein the etching target film And an etching chamber for dry-etching the film to be etched in a plasma atmosphere, and a heat treatment for containing the wafer after the dry etching and heat-treating the wafer under predetermined conditions. Common transfer chamber for delivering the wafer between the chamber for heat treatment, the heat treatment chamber and the etching chamber, and between the heat treatment chamber and the etching chamber, respectively. It is characterized by comprising.

Here, the film to be etched is an interlayer insulating film made of, for example, a silicon oxide film (SiO ₂ ) or a silicon nitride film (Si ₃ N ₄ ) film. Examples of the predetermined condition include a condition in which the processing temperature is set to 300 ° C. or higher and a mixed gas containing N ₂ , Ar and a small amount of H ₂ is used as the processing gas.
According to the semiconductor device manufacturing apparatus of the first aspect of the present invention, the etching chamber, the heat treatment chamber, and the transfer chamber constitute a manufacturing apparatus, so that a wafer between the dry etching process and the heat treatment process is formed. It is possible to carry out these processing steps continuously without taking much time for the transfer. Thereby, the manufacturing efficiency of the semiconductor device can be improved.

[Invention 2] The semiconductor device manufacturing apparatus of Invention 2 is the semiconductor device manufacturing apparatus of Invention 1, comprising an ashing chamber for ashing and removing a resist pattern, and the transfer chamber includes the ashing chamber and the ashing chamber. In order to deliver the wafer between the two, it faces the ashing chamber.

With such a configuration, the etching chamber, the heat treatment chamber, the ashing chamber, and the transfer chamber are integrated to form a manufacturing apparatus. Therefore, the dry etching step, the ashing step, and the heat treatment are performed. It is possible to carry out these processing steps continuously without taking much time to transport the wafer between the steps.
For example, when a resist pattern is formed on a film to be etched and the film to be etched is dry-etched using the resist pattern as a mask, a dry etching process, an ashing process, and a heat treatment process are continuously performed. Is possible. In addition, when a resist pattern is not formed on the film to be etched, the dry etching process and the heat treatment process can be performed continuously.

[Invention 3] The semiconductor device manufacturing apparatus of Invention 3 is characterized in that in the semiconductor device manufacturing apparatus of Invention 1 or Invention 2, the wafer is heat-treated in a lamp heating system in the heat treatment chamber. is there.

  With such a configuration, the temperature of the wafer can be raised and lowered at high speed in the heat treatment chamber, so that the processing time can be minimized.

Hereinafter, a semiconductor device manufacturing apparatus according to the present invention will be described with reference to the drawings.
FIG. 1 is a conceptual diagram showing a configuration example of a dry etching apparatus 100 according to an embodiment of the present invention.
As shown in FIG. 1, the dry etching apparatus 100 includes a load lock chamber 1, first to fourth chambers 10, 20, 30, 40, a transfer chamber 7, a transfer arm 9, and a vacuum pump (not shown). And a multi-chamber type single wafer processing apparatus in which a load lock chamber 1 and first to fourth chambers 10, 20, 30, and 40 are arranged around a transfer chamber 7.

  A load lock chamber 1 shown in FIG. 1 is a processing chamber for carrying a wafer into and out of the dry etching apparatus 100. The load lock chamber 1 is provided with a loader 3 and an unloader 5. The first chamber 10 is a processing chamber for aligning an orientation flat (hereinafter referred to as “OF”) of a wafer before dry etching. Within the first chamber 10, the OF of the wafer is directed toward the transfer chamber 7, for example.

The second chamber 20 shown in FIG. 1 is a processing chamber for dry etching (that is, plasma etching) a film to be etched formed on a wafer in a plasma atmosphere. Here, the film to be etched is an interlayer insulating film made of, for example, a silicon oxide film (SiO ₂ ) or a silicon nitride film (Si ₃ N ₄ ) film.
In this second chamber 20, for example, a resist pattern that opens only above the contact hole formation region and covers the other region (hereinafter referred to as “resist pattern for contact hole formation”) is used as a mask. An insulating film is etched. The third chamber 30 is a processing chamber for removing the resist pattern by ashing.

A fourth chamber 40 shown in FIG. 1 is a processing chamber for heat-treating a wafer that has been mainly damaged by plasma in the second chamber 20. The heat treatment method in the fourth chamber 40 is, for example, a lamp heating method (RTA). By setting the heat treatment method to RTA, the wafer can be raised and lowered at high speed, and the processing time can be minimized.
The transfer chamber 7 is a processing chamber provided with a transfer arm 9 for transferring a wafer between the load lock chamber 1 and the first to fourth chambers 10, 20, 30, and 40. Shutters (not shown) are respectively provided at portions where the transfer chamber 7 and the load lock chamber 1 and the transfer chamber 7 and the first to fourth chambers 10, 20, 30, and 40 face each other. . These shutters are opened only when the wafer is carried in and out by the transport arm 9, and are closed at other times.

In this dry etching apparatus, the load lock chamber 1, the first to fourth chambers 10, 20, 30, and 40 and the transfer chamber 7 are evacuated by a vacuum pump (not shown), and the inside of each is almost in a vacuum state. To be kept.
FIG. 2 is a flowchart showing an outline of product processing by the dry etching apparatus 100. Here, it is assumed that the dry etching apparatus 100 shown in FIG. 1 is used to form a contact hole in the interlayer insulating film on the wafer, and then this wafer is heat-treated.

First, in step (S) 1 of FIG. 2, a wafer on which a contact hole forming resist pattern is formed is placed on the loader 3 of the load lock chamber 1. Here, for example, 25 (one lot) wafers are arranged in the loader 3. After placing the wafer, the process proceeds to step (S) 2 in FIG.
In step (S) 2, one wafer is taken out from the load lock chamber 1 by the transfer arm 9, and the taken-out wafer is carried into the first chamber 10. Then, OF alignment of the wafer is performed in the first chamber 10. Next, the process proceeds to step (S) 3 in FIG.

  In step (S) 3, the wafer is unloaded from the first chamber 10 by the transfer arm 9, and the unloaded wafer is loaded into the second chamber 20. In the second chamber 20, the interlayer insulating film is plasma etched using a resist pattern for forming a contact hole as a mask to form a contact hole that reaches the surface of the wafer. Next, the process proceeds to step (S) 4 in FIG.

In step (S) 4, it is determined whether or not there is a resist pattern on the interlayer insulating film. This determination is performed by a control unit (not shown) of the dry etching apparatus 100 based on, for example, a product processing recipe input to the dry etching apparatus 100. Here, since a resist pattern for forming a contact hole is formed on the interlayer insulating film, the process proceeds to step (S) 5 in FIG. 2. In step (S) 5, the transfer arm 9 moves the inside of the second chamber 20. The wafer is unloaded and the unloaded wafer is loaded into the third chamber 30. In this third chamber 30, the resist pattern for forming the contact hole is removed by ashing with O ₂ plasma. Next, the process proceeds to step (S) 6 in FIG.

In step (S) 6, the wafer is unloaded from the third chamber 30 by the transfer arm 9, and the unloaded wafer is loaded into the fourth chamber 40. In the fourth chamber 40, the wafer is heat-treated by, for example, RTA for the purpose of removing plasma damage. The processing conditions for RTA are, for example, a processing temperature of 300 ° C. or higher, and a processing gas is a mixed gas containing N ₂ , Ar, and a trace amount of H ₂ . After performing this heat treatment, the process proceeds to step (S) 7 in FIG.

In step (S) 7, the wafer is unloaded from the fourth chamber 40 by the transfer arm 9, and the unloaded wafer is placed on the unloader 5. When wafers are successively arranged on the unloader 5 and the number of wafers reaches, for example, 25, the vacuum state of the load lock chamber 1 is released, and the 25 wafers are carried out of the dry etching apparatus 100. This completes the flowchart of FIG.

If there is no resist pattern on the interlayer insulating film in step (S) 4 of FIG. 2, the ashing process is unnecessary and the process proceeds to step (S) 6. As a case where there is no resist pattern, for example, an etch-back process of an interlayer insulating film can be considered.
By the way, since the dry etching apparatus 100 shown in FIG. 1 is a single wafer processing apparatus, it is possible to simultaneously perform the processes in the first to fourth chambers 10, 20, 30, and 40 simultaneously. For example, out of 25 wafers, No. 25 to No. No. 1 in the fourth chamber 40 when the wafers are processed in the order of 1. No. 24 in the third chamber 30 during the heat treatment of the 24 wafers. No. 23 wafer was ashed, and No. 2 in the second chamber 20. No. 22 wafer was plasma-etched, and No. 1 was obtained in the first chamber 10. 21 wafers can be OF-matched.

  As described above, according to the dry etching apparatus 100 according to the embodiment of the present invention, the second chamber 20 for plasma etching, the third chamber 30 for ashing, the fourth chamber 40 for heat treatment, and the transfer chamber 7 are used. Together form a device. Therefore, compared with the prior art, it takes less time to transfer the wafer between the plasma etching process, the ashing process, and the heat treatment process, and these processing processes can be performed continuously. Thereby, the manufacturing efficiency of the semiconductor device can be improved.

  For example, when a resist pattern is formed on an interlayer insulating film and the interlayer insulating film is plasma etched using the resist pattern as a mask, a plasma etching process, an ashing process, and a heat treatment process are continuously performed. It is possible. In addition, when a resist pattern is not formed on the interlayer insulating film, it is possible to continuously perform the plasma etching process and the heat treatment process.

  In the prior art, at least the plasma etching for the interlayer insulating film and the heat treatment for the wafer are performed using different apparatuses, but the dry etching apparatus 100 according to the embodiment of the present invention has the functions of 1 Since they are integrated in a single apparatus, the loader 3, the unloader 5, the transfer arm 9, etc. can be shared. Therefore, it is possible to reduce the occupation area of the manufacturing apparatus as compared with the prior art.

In this embodiment, the second chamber 20 corresponds to the etching chamber of the present invention, and the third chamber 30 corresponds to the ashing chamber of the present invention. The fourth chamber 40 corresponds to the heat treatment chamber of the present invention, and the dry etching apparatus 100 corresponds to the semiconductor device manufacturing apparatus of the present invention.
1 shows the case where the dry etching apparatus 100 is provided with one each of the first to fourth chambers 10, 20, 30, and 40. However, the first to fourth chambers 10, 20, 30, and 40 are provided. The number of is not limited to one. The number may be selectively increased according to the processing time in the first to fourth chambers 10, 20, 30, and 40. For example, in the dry etching apparatus 100 shown in FIG. 1, when the processing time of plasma etching in the second chamber 20 is long and the plasma etching controls the processing of the entire dry etching apparatus 100, the second chamber The number of 20 may be two. Thereby, the efficiency of product processing by the dry etching apparatus 100 can be increased.

The conceptual diagram which shows the structural example of the dry etching apparatus 100 which concerns on embodiment. 5 is a flowchart showing an outline of product processing by the dry etching apparatus 100.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Load lock chamber, 3 Loader, 5 Unloader, 7 Transfer chamber, 9 Transfer arm, 10 1st chamber, 20 2nd chamber, 30 3rd chamber, 40 4th chamber, 100 Dry etching apparatus

Claims (3)

An apparatus for manufacturing a semiconductor device by dry etching a film to be etched formed on a wafer,
An etching chamber for accommodating the wafer on which the film to be etched is formed, and dry etching the film to be etched in a plasma atmosphere;
A heat treatment chamber for accommodating the wafer after the dry etching and heat-treating the wafer under predetermined conditions;
A common transfer chamber for transferring the wafer between the heat treatment chamber and the etching chamber, both facing the heat treatment chamber and the etching chamber. An apparatus for manufacturing a semiconductor device, comprising: An ashing chamber for ashing and removing the resist pattern;
The semiconductor device manufacturing apparatus according to claim 1, wherein the transfer chamber faces the ashing chamber so as to deliver the wafer to and from the ashing chamber.   3. The apparatus for manufacturing a semiconductor device according to claim 1, wherein the wafer is heat-treated by a lamp heating method in the heat treatment chamber.

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