JP2006093597A - Method of evaluating semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of evaluating a semiconductor wafer for specifying location of a fault of a BOX film in the SOI wafer. <P>SOLUTION: The method of evaluating the semiconductor wafer evaluates the SOI wafer formed of a laminate of an embedded insulating film (BOX film) 2 and SOI layer 1 on a silicon substrate 3 with an artificial MOSFET. In this evaluation method, the drain side electrodes 6 are separately surrounded at the front surface of the SOI layer 1 and line type source side electrode 5 having the disconnected cut-away part is allocated. An ammeter 7 is connected respectively to the source side electrode 5 and drain side electrode 6. A leak point of the BOX film 2 is specified through comparison between the current values in the source side electrode 5 and drain side electrode 6 measured with the ammeter 7 by applying a voltage to the gate side electrode 4 in contact with the rear surface of the silicon substrate 3. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for evaluating a semiconductor substrate, and more particularly to a technique applied when evaluating an active layer (SOI layer) and a buried insulating film (BOX film) of a semiconductor substrate having an SOI structure.

  Examples of semiconductor wafers include silicon wafers, epitaxial (EP) wafers, and silicon on insulator (SOI) wafers, and semiconductor devices are formed on these wafers. Above all, various devices using a semiconductor silicon wafer (SOI wafer) having an SOI structure with low power consumption and excellent high-speed processing performance have been put into practical use, and quality evaluation of the SOI wafer is regarded as important.

  As a method for evaluating an SOI wafer, for example, a pseudo-MOSFET evaluation method has been reported (see, for example, Non-Patent Document 1). As shown in FIG. 1, this evaluation method uses an SOI wafer in which a buried insulating film (BOX film) 2 and an active layer (SOI layer) 1 are stacked on a silicon substrate 3 as an electrode for evaluation as an FET. The BOX film is regarded as a gate insulating film, a metal such as aluminum is coated on the back surface of the silicon substrate 3 by vapor deposition or the like to form a gate electrode, and a needle is directly contacted with the active layer 1 side, or a mercury electrode is contacted. These are referred to as a source and a drain.

  Next, a mercury electrode as a source and a drain is brought into contact with the surface of the SOI layer 1 of the SOI wafer, the gate voltage is swept while a constant drain voltage is applied, the drain current is monitored, and the electron mobility and the interface state density are determined. Ask. The electron mobility and interface state density are obtained by applying a gate voltage to the positive side. The current path at this time is an inversion layer at the interface of the SOI layer 1 / BOX film 2 generated by applying the gate voltage to the positive side, and current flows from the source to the drain side.

  Also, vacuum adsorption or a needle is brought into contact with the back surface of the wafer to form a gate electrode. Among these, as shown in FIG. 2, a pseudo MOSFET evaluation method using a ring electrode 95 and a dot electrode 96 using a mercury electrode as a source electrode and a drain electrode, respectively, has been reported in more detail (for example, see Non-Patent Document 2). .)

  Various improvements have been proposed for the pseudo MOSFET evaluation method (see, for example, Patent Documents 1 and 2).

Japanese Patent Laid-Open No. 2001-60676 JP 2001-267384 A Japanese Patent Laid-Open No. 6-140478 S. Cristoloveanu et al., "A Review of the Pseudo-MOS Transistor in SOI Wafers: Operation, Parameter Extraction, and Applications" IEEE Trans. Electron Dev, 47, 1018 (2000). H. J. Hovel, "Si film electrical characterization in SOI substrates by HgFET technique", Solid-State Electronics, 47, 1311 (2003).

  As described above, it is possible to evaluate the active layer (SOI layer) / BOX film interface of the SOI wafer without going through a complicated pre-process, but the BOX film of the SOI wafer is used as the gate insulating film of the MOSFET. In order to perform the evaluation, it is necessary that the BOX film has no defects such as pinholes and that dielectric breakdown does not occur due to application of a gate voltage during measurement.

However, when a BOX film is formed by implanting oxygen ions as in SIMOX (Separation by Implanted Oxygen), this BOX film is compared with a thermal oxide film due to the influence of particles during ion implantation. There are many defects such as pinholes, which hinders evaluation by this method.
Conventionally, in order to obtain true characteristics, there has been only a method for reducing the sample size and reducing the probability of hitting a defect such as a pinhole as much as possible. Further, when the BOX film is incomplete and leakage to the gate electrode side through the BOX film is large, there is no choice but to recreate the sample, and there is no information to be obtained any more.

  The present invention has been made in view of the above problems in the prior art, and an object of the present invention is to provide a semiconductor wafer evaluation method capable of specifying the position of a BOX film defect in an SOI wafer.

The semiconductor wafer evaluation method of the present invention provided to solve the above problems is a semiconductor wafer for evaluating an SOI wafer in which a buried insulating film (BOX film) and an SOI layer are stacked on a semiconductor substrate by a pseudo MOSFET. Evaluation method,
The drain side electrode is separated from and surrounded on the surface of the SOI layer, and a linear source side electrode having a broken notch is disposed, and an ammeter is connected to each of the source side electrode and the drain side electrode, By applying a voltage to the gate side electrode in contact with the back surface of the semiconductor substrate, the current value of the source side electrode measured by the ammeter and the current value of the drain side electrode are compared, and the leakage of the BOX film The location is specified (claim 1).
In this way, a voltage is applied to the gate side that is in contact with the back side of the SOI wafer, and a linear source side electrode having a notch is disposed on the SOI wafer surface side so as to wrap and separate the drain side electrode, By connecting an ammeter to each of the source side electrode and the drain side electrode and comparing the respective current values, increase / decrease in the current flowing to the source side according to the positional relationship between the leak location and the notch portion of the BOX film is detected. As a result, it is possible to clarify whether the leak location of the BOX film is near or far from the notch portion of the source side electrode. The shape of the linear source electrode is not particularly limited, and includes a ring shape, a polygonal shape, and a rectangular shape. In particular, the ring shape is a point of operability and accuracy of the semiconductor wafer evaluation method. To preferred. The degree of disconnection of the notch is preferably about 5 to 25% of the entire circumference of the source electrode. Whether it is smaller or larger than this range, it becomes difficult to specify the leak location of the BOX film.

In this case, the SOI wafer preferably has a MESA structure in which the SOI layer is partially removed.
As described above, the silicon island having the MESA structure from which the SOI layer of the SOI wafer is partially removed can suppress the leakage current through the side surface of the wafer. It is possible to specify the leak location.

The source side electrode and the drain side electrode are preferably mercury electrodes.
As described above, by using the mercury electrode as the source side electrode and the drain side electrode, the measurement can be easily performed efficiently.

Further, the drain side electrode has an O-shaped surface shape having a circle including dots, and the source side electrode has a C-shaped line shape having a notch portion concentric with the drain side electrode and disconnected in an outer ring shape. (Claim 4).
As described above, the source side electrode has a C-type shape having a ring-shaped notch, and the drain side electrode has an O-type shape having a circle including dots, thereby further leaking the BOX film. The configuration is suitable for specifying the location. The drain side electrode has an O-shaped surface shape having a circle including dots. The drain side electrode is formed to have a circular surface even if the drain side electrode is formed to have almost no area problem like a needle. It shows that it is good. The degree of disconnection of the notch is preferably about 5 to 25% of the entire circumference of the ring. Whether it is smaller or larger than this range, it becomes difficult to specify the leak location of the BOX film.

In this case, the notch portion of the C-type electrode that is the source side electrode is disposed so as to surround the drain side electrode, and the current value of the source side electrode and the drain side electrode are rotated while rotating about the drain side electrode. It is preferable to compare the current value with (Claim 5).
In this way, the source side electrode having a C-shaped shape is compared with the current value of the source side electrode and the current value of the drain side electrode while rotating the notch portion of the C type electrode, thereby leaking the BOX film. The increase / decrease of the current flowing on the source side according to the positional relationship between the location and the notch portion can be detected, and the leak location of the BOX film can be identified more reliably and accurately.

According to the first aspect of the present invention, at which position between the source side electrode / drain side electrode is leaked to the gate side electrode through the BOX film, that is, the incompleteness of the BOX film is detected. Can be evaluated. In the conventional pseudo MOSFET evaluation method, only a result that the gate leakage is large and measurement is impossible can be obtained, but this also enables evaluation of the quality of the BOX film.
According to the second aspect of the present invention, it is possible to suppress the current leaking through the side surface of the wafer, so that it is possible to specify the leak location of the BOX film with high accuracy.
According to the invention of claim 3, it is possible to incorporate the BOX film evaluation based on the current ratio between the source side electrode / drain side electrode into the pseudo MOSFET evaluation method using the mercury electrode.
According to the fourth and fifth aspects of the present invention, a combination of a ring-shaped (C-shaped) electrode having a notch and a circular (O-shaped) electrode including dots is more suitable, and a BOX film defect position is obtained. Can be specified.
As described above, according to the present invention, the leakage position of the BOX film can be specified in the pseudo MOSFET evaluation. Further, since it is possible to determine the position of a defect such as a BOX film pinhole, it becomes possible to clarify the details of the defect by subsequent SEM evaluation, which is an effective technique for improving the quality of the SOI wafer.

Hereinafter, the semiconductor wafer evaluation method according to the present invention will be described in detail, but the present invention is not limited thereto.
FIG. 3 is a schematic view showing a connection state in carrying out the semiconductor wafer evaluation method according to the present invention.
As shown in FIG. 3, in an SOI wafer in which a buried insulating film (BOX film) 2 that is a silicon oxide film and an SOI layer 1 made of a single crystal silicon film are stacked on a silicon substrate 3, a surface of the SOI layer 1 is formed. A drain side electrode 6 is in contact with the source side electrode 5 and a position inside thereof, and an ammeter 7 is connected to each of the source side electrode 5 and the drain side electrode 6. A gate-side electrode 4 is formed on the back side of the SOI wafer.

  Here, the SOI layer 1 is preferably a MESA structure silicon island partially etched away. Thereby, the current leaking through the wafer side surface can be suppressed.

  The source-side electrode 5 and the drain-side electrode 6 are preferably mercury electrodes. For example, a predetermined shape groove formed in the contact stage may be filled with liquid mercury. In the evaluation, the contact stage is brought close to the SOI wafer to be evaluated so that only the mercury electrode filled in the groove is brought into contact with the SOI layer 1 to obtain electrical contact.

  Further, as shown in FIG. 4, the source side electrode 5 has a ring shape (C shape) having a notch, and the drain side electrode 6 has a circular shape including dots (O shape), so that the C type of the source side electrode 5 is formed. The drain side electrode 6 may be disposed at the center of the.

  The gate side electrode 4 may be a gold thin film formed by, for example, a vacuum deposition method.

The semiconductor wafer evaluation method of the present invention is performed in the following procedure.
(S1) An HF process is performed on the SOI wafer to remove the natural oxide film on the surface.
(S2) As shown in FIG. 1, a mercury electrode as a source and a drain is brought into contact with the surface of the SOI layer 1 of the SOI wafer, a gate voltage is swept while a constant drain voltage is applied, and a drain current is monitored. Compare with the current value monitored on the side. At this time, when the drain current value is smaller than the gate-side current value, defects such as pinholes exist in the BOX film 2 and a current path between the source and the gate is generated in addition to between the source and the drain. Therefore, the process proceeds to the following steps, and a leak location in the SOI layer 1 is specified.

(S3) As shown in FIG. 3, the source side electrode 5 and the drain side electrode 6 are brought into contact with the surface of the SOI layer 1 of the SOI wafer, and an ammeter 7 is connected to each of the source side electrode 5 and the drain side electrode 6 To do.
(S4) The gate voltage is applied in the same manner as in step S1, and the current value I _S of the source side electrode 5 and the current value _ID of the drain side electrode 6 are measured.
(S5) The ratio of these current values (current ratio) is the distance L _Sd from the source side electrode 5 to the defect d of the BOX film 2 and the distance L _Dd from the drain side electrode 6 to the defect d of the BOX film 2 Inversely proportional to the ratio. Therefore, the position of the defect d in the BOX film 2 may be specified based on the positions of the source side electrode 5 and the drain side electrode 6 on the SOI wafer at the time of current measurement from the following equation (1).
I _S : I _D = L _Dd : L _Sd (1)

  When the source side electrode 5 and the drain side electrode 6 are mercury electrodes, the position of the defect d in the BOX film 2 is specified if the electrode is a combination of a ring shape and a dot shape as shown in FIG. It is difficult. In the present invention, the position of the defect d can be specified by the following procedure by making the source side electrode 5 C-shaped and the drain side electrode 6 O-shaped as shown in FIG. However, it is a premise that there is a defect d in the BOX film 2 between the source side electrode 5 and the drain side electrode 6.

(S6) With respect to the arrangement of the source side electrode 5 and the drain side electrode 6, the notch portion of the C-type electrode that is the source side electrode 5 is rotated by a predetermined angle around the drain side electrode 6 from the state of step S3. Contact.
(S7) The gate voltage is applied in the same manner as in step S1, and the current value I _S of the source side electrode 5 and the current value _ID of the drain side electrode 6 are measured.
(S8) Steps S6 to S7 are repeated several times. The number of repetitions is preferably the number of times that the cut-out portion of the C-type electrode which is the source side electrode 5 makes at least one round around the drain side electrode 6. For example, when the one rotation angle is 45 °, the number of repetitions is four or more.

Among the above measurement, between the cut-out portion of the drain-side electrode 6 and the C-type electrode when the current ratio of the current value I _D of the current I _S and the drain-side electrode 6 of the source-side electrode 5 has changed significantly The defect d of the BOX film 2 exists. Next, the position between them can be specified based on the above equation (1). The present invention is called a current division method because the current value is measured while dividing the circumference into several parts and arranging the notches of the C-shaped electrodes in the respective directions.

Incidentally, the C-type electrode is a source-side electrode 5 of cutout portions, while rotating around the drain side electrode 6, the source-side electrode 5 by applying a constant gate voltage current value I _S and the drain-side electrode 6 The current value _ID may be monitored, and the defect position of the BOX film 2 may be specified from the change in the current value of both.

Examples of the present invention will be described in detail below.
A silicon SOI wafer having a diameter of 200 mm, a boron doped conductivity type of P type, and a crystal orientation of (100) was used as a sample. Each thickness of the SOI layer (active layer) 1 / BOX film 2 is about 100/145 nm. Evaluation was performed by the following procedure using this SOI wafer sample.

(S11) After treatment with 1% HF for 1 minute, rinsing with pure water was performed, and then moisture was removed with dry air.
(S12) As shown in FIG. 3, a mercury electrode as a source and a drain is brought into contact with the surface of the SOI layer 1 of the SOI wafer, and a gate voltage is swept in a state where a constant drain voltage is applied to monitor the drain current. Mobility and interface state density were determined. At this time, a BOX film leak was observed, and the current value obtained on the drain side was smaller than the current value monitored on the gate side, and it was confirmed that a leak toward the source side occurred ( FIG. 5).

(S13) The electrodes shown in FIG. 4 are brought into contact with the surface of the SOI layer 1 of the SOI wafer as the source-side electrode 5 and the drain-side electrode 6, and an ammeter is connected to each of the source-side electrode 5 and the drain-side electrode 6 in the configuration shown in FIG. 7 was connected. Here, the drain side electrode 6 has a diameter of 0.5 mm, the line width of the source side electrode 5 is 1.75 mm, and the distance between the inner periphery of the source side electrode 5 and the outer periphery of the drain side electrode 6 is 0.5 mm. .
(S14) The gate voltage is applied in the same manner as in step S12, and the current value I _S of the source side electrode 5 and the current value _ID of the drain side electrode 6 are measured.
(S15) The position of the defect d in the BOX film 2 is estimated from the ratio of these current values (current ratio).

(S16) With respect to the arrangement of the source side electrode 5 and the drain side electrode 6, the notch portion of the C-type electrode, which is the source side electrode 5, is rotated by 45 ° around the drain side electrode 6 from the state of step S13. Contact.
(S17) The gate voltage was applied in the same manner as in step S12, and the current value I _S of the source side electrode 5 and the current value _ID of the drain side electrode 6 were measured.
(S18) Steps S16 to S17 were repeated three times, for a total of four measurements.

  As a result of the above measurement, the source side electrode 5 and the drain side electrode 6 are monitored in a state where the notch portion of the C-type electrode which is the source side electrode 5 and the position of the defect d are farthest as shown in FIG. The current values were almost equal. Thereby, it was found that the leaked portion of the BOX film 2 exists on a concentric circle at substantially the center between the source side electrode 5 and the drain side electrode 6. However, this alone cannot identify the position on the concentric circle.

  Next, as shown in FIG. 7, when the notch portion of the C-type electrode which is the source side electrode 5 and the position of the defect d are closest to each other, the current of the drain side electrode 6 with respect to the current value of the source side electrode 5. The value has increased. As a result, it can be seen that the defect d of the BOX film 2 exists between the drain side electrode 6 and the notch portion of the C-type electrode at the time of this arrangement, and the BOX film leak location can be specified in combination with the result of FIG. .

The present invention is not limited to the above embodiment. The above embodiment is merely an example, and the present invention has the same configuration as that of the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical idea of the invention.
For example, in the description of the embodiments of the present invention, an example of a C-type source-side electrode having a ring-shaped notch and an O-type drain-side electrode having a circle including dots has been shown. Needless to say, a polygonal shape such as a triangular square or a rectangular shape is also effective.

It is sectional drawing of a pseudo | simulation MOSFET evaluation sample. It is a figure which shows the shape of the mercury electrode applied to the conventional pseudo MOSFET evaluation method. It is the schematic which shows the connection state in implementing the evaluation method of the semiconductor wafer which concerns on this invention. It is a figure which shows the shape of the mercury electrode applied by this invention. It is an Id-Vg curve where leakage current to the gate side is observed (with BOX film defect). It is the electric current division method schematic when there exists a defect in the non-notch part side of the C-type electrode in an Example. It is the electric current division method schematic when there exists a defect in the notch part side of the C-type electrode in an Example.

Explanation of symbols

1 SOI layer (active layer)
2 BOX film (embedded insulating film)
3 Silicon substrate 4 Gate side electrode 5 Source side electrode 6 Drain side electrode 7 Ammeter 95 Ring electrode 96 Dot electrode d Defect

Claims (5)

A semiconductor wafer evaluation method for evaluating an SOI wafer in which a buried insulating film (BOX film) and an SOI layer are stacked on a semiconductor substrate by a pseudo MOSFET,
The drain side electrode is separated from and surrounded on the surface of the SOI layer, and a linear source side electrode having a broken notch is disposed, and an ammeter is connected to each of the source side electrode and the drain side electrode, By applying a voltage to the gate side electrode in contact with the back surface of the semiconductor substrate, the current value of the source side electrode measured by the ammeter and the current value of the drain side electrode are compared, and the leakage of the BOX film A method for evaluating a semiconductor wafer, characterized by specifying a location.   The semiconductor wafer evaluation method according to claim 1, wherein the SOI wafer has a MESA structure in which an SOI layer is partially removed.   The semiconductor wafer evaluation method according to claim 1, wherein the source side electrode and the drain side electrode are mercury electrodes.   The drain side electrode has an O-shaped surface shape having a circular shape including dots, and the source side electrode has a C-shaped line shape having a notch portion concentric with the drain side electrode and disconnected in an outer ring shape. The method for evaluating a semiconductor wafer according to claim 1, wherein the semiconductor wafer is evaluated. The notch part of the C-type electrode which is the source side electrode is arranged so as to enclose the drain side electrode, and while rotating around the drain side electrode, the current value of the source side electrode and the current value of the drain side electrode The semiconductor wafer evaluation method according to claim 4, wherein:

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