JP2006084673A - Wiring formation substrate and display apparatus using same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring formation substrate for a display apparatus capable of displaying uniform images without generating uneven luminance and a liquid crystal display apparatus having low power consumption and a large numerical aperture and formed by using the wiring formation substrate. <P>SOLUTION: A bank 2 is formed on a substrate 1 and wiring material ink 3 is dropped and applied to the bank 2 by using an ink jet unit. The maximum application amount of the wiring material ink 3 is regulated in the groove 4 of the bank 2 and the film thickness of thin film wiring 3A has a thickness H proportional to the maximum application amount of the wiring material ink 3 for forming the thin film wiring 3A in the groove 4 of the bank 2. Thereby the thickness H of the thin film wiring 3A is made different in accordance with the width W of the groove 4 of the bank 2. Even when there is differences in the film thickness of the thin film wiring 3A in pixels, the same film thickness is obtained on the same part among pixels, so that luminance differences are not generated among pixels. Since the thickness of the thin film wiring 3A can be thickened by narrowing the width of the thin film wiring 3A, a liquid crystal display apparatus having a large numerical aperture and low power consumption can be provided. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a wiring formation substrate and a display device using the substrate, and is particularly suitable for an active matrix substrate for a display device such as a liquid crystal panel having a thin film wiring formed using an ink jet method.

  In a so-called active matrix type flat panel display device that controls lighting for each pixel, a switching element (hereinafter referred to as a thin film transistor) such as a thin film transistor and a large number of pixels having pixel electrodes driven by the thin film transistor are provided on a substrate. Are arranged in a matrix in rows and columns. A plurality of gate wirings for supplying scanning signals for selecting a plurality of thin film transistors arranged in a matrix for each row, and a plurality of data wirings for supplying display data to the thin film transistors connected to the selected gate wirings And they are arranged in a matrix corresponding to the columns. These wirings are called so-called thin film wirings. A pixel is arranged at each intersection of each thin film wiring (gate wiring and data wiring). Some display devices have a thin film wiring necessary for the display method of the display device in addition to the gate wiring and the data wiring. The following description can be similarly applied to such a thin film wiring.

The gate wiring and data wiring are generally formed by photolithography (hereinafter abbreviated as photolithography), but recently, a wiring forming method using an ink jet has been proposed. The wiring technique using the ink jet is described in, for example, “Non-Patent Document 1”. Further, “Patent Document 1” discloses a film forming technique for forming a thin film by forming a groove on a substrate surface with a bank and filling the groove with a thin film material solution by an ink jet method.
“Nikkei Electronics” (issued 2002.6.17, pages 67 to 78) JP 2000-353594 A

  In the case where a thin film wiring having a narrow width is formed on a substrate constituting a display device, as described on page 78 of Non-Patent Document 1 above, the wiring forming portion is made lyophilic, or the wiring is formed. The substrate side such as providing a groove in the part is pre-processed.

  In the above-described prior art, it is difficult to form a thin film wiring having a sufficient film thickness because it is difficult to incorporate a large amount of wiring material ink if the wiring forming portion of the substrate is made lyophilic. For this reason, it is difficult to reduce the resistance of the wiring and reduce the wiring capacity, which is one of the factors that limit the expansion of the screen size. In addition, in the case where a groove is provided in the wiring formation part of the substrate, it is necessary to enlarge the groove of the wiring formation part due to the size of the ink droplet, variation in the ink dropping position, etc., so the width of the groove must be increased. The wiring occupancy rate on the substrate surface is not increased. As a result, it is difficult to obtain a display device that realizes high-definition circuit wiring and is configured with a low power consumption liquid crystal panel with a high aperture ratio.

  In particular, a thin film wiring such as a gate wiring or a data wiring for supplying a scanning signal or a data signal to the thin film transistor is widely used by patterning using a vacuum film forming apparatus or a photolithography apparatus. The film thickness of these thin film wirings is required to be uniform, for example, ± 5% in the substrate.

  One candidate for such a thin film wiring without using a vacuum film forming apparatus or a photolithography apparatus as described above, that is, a vacuum removal process, is to adopt the above-described ink jet method. The ink jet method is a film forming method suitable for forming a necessary wiring pattern where necessary. However, the thin film wiring formed by dripping and applying the wiring material ink on the substrate by the ink jet method varies depending on the coating width of the wiring material ink, and ensures the uniformity of ± 5% as described above. Difficult to do. As a result, it has become difficult to obtain a high-quality image display.

  In the present invention, it is not necessary to ensure the uniformity of the film thickness of the thin film wiring as described above over the entire surface of the substrate. An object of the present invention is to provide a substrate for a display device capable of obtaining a quality image display. Another object of the present invention is to provide a display device capable of displaying a high-quality image using this substrate.

  In order to achieve the above-described object of the present invention, the substrate for a display device of the present invention has a width defined between the side walls in contact with the thin film wiring along both sides of the thin film wiring formed on the substrate. A thin film wiring formed by dripping the wiring material ink on the substrate differs depending on the width of the bank groove, but the same portion has the same film thickness between pixels. It was.

  The maximum filling amount of the wiring material ink is defined in the groove of the bank, and the film thickness of the thin film wiring has a thickness substantially proportional to the maximum filling amount of the wiring material ink for forming the thin film wiring in the groove of the bank. As a result, the thin film wiring varies depending on the width of the bank groove.

  Further, the surface of the substrate that contacts the wiring material ink is lyophilic with respect to the wiring material ink, and the outer edge surface that is not a groove of the bank has liquid repellency with respect to the wiring material ink. The surface of the groove sidewall has liquid repellency with respect to the wiring material ink, and the maximum embedding amount is defined by the contact angle of the dropped wiring material ink at the outer edge of the groove. As a result, the thin film wiring However, the film thickness varies depending on the width of the bank groove. However, even if there is a difference in the film thickness of the thin film wiring within the pixel, the same portion has the same film thickness between the pixels, and there is no luminance difference between the pixels.

  In order to achieve another object of the present invention, a display device of the present invention is a matrix of a plurality of pixels having a plurality of gate wirings intersecting each other, thin film transistors and pixel electrodes formed at each intersection on a substrate. The thin film wiring of at least one of the gate wiring and the data wiring was formed by dropping application of wiring material ink.

  The display device of the present invention has a bank in which a groove having a width defined by the interval between the side walls is formed between the side walls in contact with the thin film wiring along both sides of the thin film wiring. A maximum amount of material ink (that is, a limit value of wiring material ink that can be accommodated in the groove of the bank) is defined. The film thickness of the thin film wiring differs depending on the width of the bank groove. Since the width of the thin film wiring 3A can be reduced and the thickness can be increased, a liquid crystal display device with a large aperture ratio and low power consumption can be provided.

  According to the present invention, a luminance difference between pixels can be eliminated, and a substrate for a display device in which a thin film wiring having a narrow line width and a large film thickness is formed. By using this substrate, a high aperture ratio can be obtained. In addition, a display device including a low power consumption liquid crystal panel can be realized.

  Hereinafter, embodiments in which a wiring forming substrate of the present invention and a display device using the substrate are applied to a liquid crystal display device will be described in detail with reference to the drawings.

  First, the wiring formation of the present invention, that is, the structure of the thin film wiring in the substrate for a display device will be described. FIG. 1 is an explanatory view of a thin film wiring formed by using a glass substrate as a substrate and dropping the wiring material ink thereon using an ink jet apparatus. In FIG. 1, reference numeral 1 denotes a glass substrate, 2 denotes a bank formed of a resin material, 3 denotes wiring material ink dropped by an ink jet apparatus, 3A denotes a thin film wiring obtained by baking the wiring material ink, and 4 denotes a groove. The groove 4 is formed according to the layout of the thin film electrode formed on the glass substrate. The bank 3 for forming the groove 4 can be formed by a photolithography process that is performed in steps such as application of a photosensitive resin, mask exposure, and development.

  A bank 2 having a side wall in contact with the thin film wiring 3 </ b> A is provided along both sides of the thin film wiring 3 </ b> A formed on the glass substrate 1, and a groove 4 is formed between the side walls of the bank 2. The bottom of the groove 4 is the glass substrate 1. The width W of the groove 4 is defined by the interval between the side walls of the bank 2. The film thickness H of the thin film wiring 3A varies depending on the width of the bank groove. Here, it is assumed that the side walls of the bank 2 are perpendicular to the surface of the glass substrate 1. Even when the side wall of the bank 2 is inclined with respect to the surface of the glass substrate 1, the maximum filling amount is defined by the contact angle of the wiring material ink 3 at the outer edge of the opening of the bank 2. By filling the wiring material ink 3 with the maximum filling amount of the groove 4, the maximum value of the film thickness H of the thin film wiring 3A is determined by the width W of the groove 4 of the bank.

  FIG. 2 is an explanatory diagram of the limit value of the wiring material ink that can be accommodated in the groove of the bank. The limit value of the wiring material ink that can be accommodated in the groove of the bank, that is, the maximum filling amount is as follows. In FIG. 2, reference numeral 1 is a glass substrate, 2 is a bank, 3 is a wiring material ink, 3A is a thin film wiring after baking the wiring material ink 3, and 4 is a groove. Symbol W is the width of the groove 4, θ is the contact angle of the wiring material ink 3 with respect to the bank 2, h is the depth of the groove 4, H is the film thickness of the thin film wiring after firing the wiring material ink 3, and R is the wiring. The radius of curvature of the surface formed by the material ink 3 with surface energy (surface tension). The symbol O indicates the intersection of the perpendicular line passing through the center of the groove 4 and the virtual diameter of the wiring material ink 3.

The maximum amount S of the wiring material ink 3 in the groove 4 in FIG. 2 can be expressed by the following equation. That is,
S = (2θ / 2π) · πR ² − (W / 2) · R cos θ + h · W
^{= (W 2/4) ·} (θ / sin 2 θ-cosθ / sinθ + 4h / W)
It becomes.

  FIG. 3 is a diagram for explaining the relationship of the film thickness of the thin film wiring due to the difference in the width of the groove. In FIG. 3, a curve A shows a case where the groove width is 5 μm, a curve B shows a case where the groove width is 10 μm, and a curve C shows a case where the groove width is 15 μm. The horizontal axis in FIG. 3 represents the contact angle θ (deg.), And the vertical axis represents the film thickness H (μm) of the obtained thin film wiring. As shown in FIG. 3, it can be seen that the film thickness H of the thin film wiring increases as the groove width increases even if the contact angles are different.

  FIG. 4 is an explanatory diagram of the results of experimentally determining the groove width and film thickness. FIG. 4 shows an experiment using a test wiring pattern simulating a gate wiring. The pattern for one pixel shown in FIG. 4A is repeatedly arranged as shown in FIG. 4B. is there. Here, the pattern widths of A, B, and C in the pattern for one pixel shown in FIG. The pattern width becomes narrower in the order of A, B, and C, and the film thickness at that time is shown in FIG. As shown in FIG. 4C, the film thickness decreases as the pattern width decreases. Further, the film thickness distribution is within ± 5% at the same pattern width.

  FIG. 5 is a partial plan view of one substrate (a first substrate, a thin film transistor substrate (also referred to as a TFT substrate, generally a glass substrate)) of a liquid crystal panel for explaining a first embodiment of a display device substrate according to the present invention. It is. FIG. 5 shows a gate wiring 8 (also referred to as a scanning signal line or a horizontal signal line), a data wiring 10 (also referred to as a video signal line or a vertical signal line), a transparent pixel electrode 40, a thin film transistor (TFT) among the components of the pixel. ) 12. The thin film transistor 12 shows only the gate electrode 8a extending from the gate wiring 8, the drain electrode 10a extending from the data wiring 10, and the source electrode 10b connected to the pixel electrode 40, and the semiconductor layer which is an active layer is not shown. Note that the drain electrode and the source electrode are interchanged during operation, but here, for convenience of explanation, the description will be made by fixing them as described above.

  One pixel is formed in a region surrounded by two adjacent gate lines 8 and 8 and data lines 10 and 10. By supplying display data from the data line 10 to the thin film transistor 12 connected to the selected gate line 8, the thin film transistor 12 is turned on to apply a potential to the pixel electrode connected to the source electrode. As a result, an electric field is formed between the counter electrode (common electrode) of the other substrate (not shown) (counter substrate, color filter substrate (CF substrate)). By this electric field, the alignment direction of the liquid crystal molecules in the liquid crystal layer sandwiched between the two substrates is changed and transmission of incident external light is controlled. An image is displayed by performing this control on a plurality of pixels arranged two-dimensionally.

  FIG. 6 is an explanatory view of the groove shape and film thickness of the bank when the thin film wiring constituting the gate wiring in FIG. 5 is formed by the ink jet method. In the gate wiring 8, a gate electrode 8a is formed on the glass substrate so as to overlap a semiconductor layer (not shown) of the thin film transistor at a position where each thin film transistor is formed. The bank groove 4 is patterned along the layout of the gate wiring 8 and the gate electrode 8a. The wiring material ink 3 is dripped discontinuously into the groove at a predetermined interval. This interval is determined according to the film thickness of the thin film wiring to be formed.

  FIG. 6A is a partial plan view of the glass substrate on which the grooves 4 are formed, and shows a state immediately after the wiring material ink 3 is dropped from the nozzles of the ink jet apparatus into the grooves 4, and the wiring material ink 3 is still in a droplet state. Shown as being. The dropped wiring material ink 3 gradually wets and spreads in the grooves 4 as indicated by arrows in FIG. Then, as shown in FIG. 6C, the groove 4 is filled in a continuous state.

  The shape and width of the groove 4 constituted by the bank for forming the gate wiring 8 and the gate electrode 8a of the thin film transistor 12 are the same in each pixel. Also, the interval and amount of the wiring material ink to be dropped are controlled to be the same in the glass substrate. Therefore, regarding the gate wiring 8 and the gate electrode 8a of each pixel, since the substantial groove width differs between the portion where the gate electrode 8a is formed and the portion where the gate electrode 8a is not formed, there is a difference in film thickness. However, the film thickness of the corresponding thin film wiring in the same portion between the pixels is as shown in FIG.

  FIG. 7 is a plan view of the main part of the thin film transistor substrate for explaining the film thickness uniformity for each pixel in the first embodiment of the present invention. In FIG. 7, the pixel electrode in the pixel configuration of FIG. 5 is omitted, and the wiring configuration and electrode configuration are the same as those in FIG. As described in FIG. 5, for example, in the pixels PX1, PX2, PX3, and PX4 shown in FIG. 7, the film thickness in each pixel is different, but the corresponding thin film wiring of the same portion between the pixels is different. There is no difference in film thickness. This means that the driving conditions such as the resistance value of the gate wiring and the stray capacitance are the same between the pixels, and there is no luminance difference in the display between the pixels with the same display data.

  In the above description, the gate wiring is considered, but the same can be said when the present invention is applied to the formation of the data wiring 10 and the formation of other thin film wirings.

  The bank is not limited to the one provided directly on the glass substrate, but a similar bank can be provided on an interlayer insulating layer or the like, and a thin film wiring can be formed by dropping wiring material ink into the groove by an ink jet apparatus.

  FIG. 8 is a plan view for explaining the configuration of one pixel of the liquid crystal panel in more detail, and is the same diagram as FIG. 5 or FIG. 7 except that the semiconductor layer 21 is displayed. In the thin film transistor 12 constituting the pixel, a semiconductor layer 21 is formed above the gate electrode 8 a extending from the gate wiring 8. A drain electrode 10 a extending from the data wiring 10 and a source connected to the pixel electrode 40 are formed on the semiconductor layer 21. Electrode 10b is formed.

  FIG. 9 is a cross-sectional view showing a cross section taken along the line H-H ′ of FIG. 8 together with a color filter substrate (second substrate, CF substrate, generally a glass substrate) as the other substrate. The liquid crystal panel has a TFT substrate 42 and a CF substrate 43. The TFT substrate 42 includes a gate wiring bank 2 formed of a transparent insulating material on the inner surface of the glass substrate 1, a gate wiring 8, a silicon nitride (SiN) film 20, a semiconductor layer 21 composed of an intrinsic semiconductor 21b and an N-type semiconductor 21a, A data wiring bank 110, a data wiring 10, a protective film 23, a data wiring bank 110 and a pixel electrode bank 120 formed on the data wiring 10 are preferably formed on the silicon nitride (SiN) film 20 with an insulating material. A transparent pixel electrode 40 and a TFT substrate alignment film 24. The thin film transistor 12 includes a gate electrode 8a extending from the gate wiring 8, a semiconductor layer 21, a drain electrode 10a extending from the data wiring 10, and a source electrode 10b. Note that the drain electrode 10a and the source electrode 10b are interchanged during the display operation, but here, in order to avoid confusion, description will be made with the notation fixed as described above.

  The CF substrate 43 has a color filter 26 partitioned by a black matrix 27 on the inner surface of the glass substrate 25, and a protective film 28, a transparent pixel electrode 41, and a CF substrate alignment film 29 on the upper layer. The CF substrate 43 is bonded to the TFT substrate 42, the liquid crystal layer 30 is sandwiched between the bonding gaps, the polarizing plate 31 is stacked on the outer surface of the TFT substrate 42, and the polarizing plate 32 is stacked on the outer surface of the CF substrate 43. Configured.

  In addition to the Ag, the wiring material ink contains Cu, Au, alloys thereof, etc. In addition to the ink, the form of the ink is a dispersion of metal fine particles in a solvent, a metal complex, or a combination thereof. Things can be used. Alternatively, the gate wiring 8 may be formed by laminating wiring material ink such as Ni or Co as a cap metal for the Ag or Cu wiring.

  Thus, in the formation of the thin film wiring using the ink jet device, the wiring material ink 3 is ejected and dropped from the nozzle and wetted and spread on the wiring forming portion, and then the glass substrate is baked and included in the wiring material ink 3. The solvent and the resin component to be evaporated are evaporated to fuse the Ag particles. If the required film thickness cannot be obtained by a single inkjet discharge and firing process, a gate wiring having a required film thickness can be obtained by repeating the ink ejection and firing processes from the nozzles of such an inkjet device. Can do.

  After forming the gate wiring 8 and the gate electrode 8a, a SiN film to be the gate insulating layer 20 is formed by a plasma CVD apparatus, and an intrinsic semiconductor (amorphous Si) 21b and an N-type semiconductor (amorphous Si) are formed thereon. ) A semiconductor layer 21 made of 21a is formed. For example, the gate insulating layer 20 has a thickness of 350 nm, and the intrinsic semiconductor and the N-type semiconductor have a thickness of 140 nm and 40 nm, respectively. Here, using the photolithography process, the semiconductor layer 21 (stack of intrinsic semiconductor and N-type semiconductor) is patterned by etching (using a fluorine-based gas).

  Subsequently, in the same manner as the gate wiring 8, in the data wiring 10, after the data wiring bank 110 is formed by photolithography, the wiring material ink 3 is dropped by an ink jet apparatus to form the drain electrode 10a and the source electrode 10b. Next, using the pattern of the formed drain electrode 10a and source electrode 10b as a mask, the N-type semiconductor 21a is patterned by dry etching. Further, a protective film 23 of SiN is formed with a thickness of 350 nm using a plasma CVD apparatus.

  Similarly to the gate wiring 8 and the data wiring 10, the transparent pixel electrode 40 is also formed in the pixel electrode bank 120 by forming tin electrode indium oxide (ITO) into an ink material after forming the pixel electrode bank 120. Apply dropwise. Thus, a TFT substrate of the liquid crystal display device is manufactured.

  On the other hand, the CF substrate 43 as the counter substrate forms a black matrix 27 through a photolithography process and an etching process after a Cr film is formed on the glass substrate 25 by sputtering. Subsequently, a resist in which a red colorant is dispersed is applied by spin coating to a thickness of 1.5 μm, and red of the color filter 26 is formed by a photolithography process. By repeating the same process for green and blue, a color filter 26 of three colors red, green and blue is formed.

  Further, after forming the protective film 28 made of acrylic resin with a thickness of 2 μm, the ITO film is sputtered to a thickness of 150 nm to form the common transparent electrode 41. In this way, a counter substrate is manufactured. The red, green, and blue color filters may be formed by an ink jet method or various printing methods regardless of the photo process. The above dimensions are merely examples.

  Further, the alignment film 24 and the alignment film 29 are applied to the TFT substrate 42 and the CF substrate 43 manufactured in the above-described steps. After the alignment control ability is imparted by rubbing or the like and the spacer beads are dispersed, the TFT substrate 42 and the CF substrate 43 are bonded. The liquid crystal layer 30 is sealed by bonding. Then, a liquid crystal panel is completed through a process of attaching the polarizing plates 31 and 32. A peripheral circuit or the like is connected to the liquid crystal panel, and a liquid crystal display device is assembled by installing a backlight and integrating with a case.

  According to this embodiment, a gate wiring and a data wiring having a narrow width and a large film thickness can be formed, a high aperture ratio of the pixel region, a low resistance and a low capacity of the gate wiring 8 can be realized, and a high aperture ratio and low consumption. A power liquid crystal display device can be provided.

  FIG. 10 is a block diagram illustrating a configuration example of a liquid crystal display device in which wiring of a TFT substrate for a liquid crystal panel to which the present invention is applied and peripheral circuits are connected. In FIG. 10, the backlight is not shown. On the TFT substrate 42, the gate lines 8 and the data lines 10 are provided in a matrix form, and constitute a display area AR. FIG. 10 also shows a common transparent electrode (counter electrode) 7 formed on the color filter substrate (CF substrate) side. The gate wiring 8 is driven by a gate wiring driving circuit (scanning signal line driving circuit) 50. The data wiring 10 is driven by a data wiring driving circuit (video signal line driving circuit) 60.

  A timing signal and a display data signal from the display control circuit 80 are supplied to the gate line driving circuit 50 and the data line driving circuit 60, and a required voltage is applied from the power supply circuit 70. The display control circuit 80 receives the display signal from the external signal source 90 and generates the timing signal and the display data signal. A common electrode voltage is supplied to the common transparent electrode 7 provided on the CF substrate via a connection terminal Vcom provided on the TFT substrate 42.

  The glass substrate described above is not only applied to the wiring formation of TFT substrates for liquid crystal panels, but can also be applied to organic EL panels, panels of other similar display devices, and wiring formation substrates of other electronic devices. is there.

It is explanatory drawing of the thin film wiring formed by dripping application | coating of the wiring material ink which used the glass substrate as a board | substrate and used the inkjet apparatus on it. It is explanatory drawing of the limit value of the wiring material ink which can be accommodated in the groove | channel of a bank. It is a figure explaining the relationship of the film thickness of the thin film wiring by the difference in the width | variety of a groove | channel. It is explanatory drawing of the result of having calculated | required the width | variety and film thickness of a groove | channel by experiment. It is a partial top view of one board | substrate of the liquid crystal panel explaining Example 1 of the board | substrate for display apparatuses by this invention. It is explanatory drawing which shows the wiring material ink dripping position at the time of forming the thin film wiring which comprises the gate wiring in FIG. 5 with an inkjet system, and the state of a flow. It is a principal part top view of the thin-film transistor substrate explaining the film thickness uniformity for every pixel in Example 1 of this invention. FIG. 2 is a plan view for explaining in more detail the configuration of one pixel of a liquid crystal panel. It is sectional drawing which shows the cross section cut | disconnected along H-H 'of FIG. 8 with the color filter board | substrate which is the other board | substrate. It is a block diagram explaining the structural example of the liquid crystal display device which connected the wiring and peripheral circuit of the TFT substrate for liquid crystal panels to which this invention was applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Glass substrate, 2 ... Gate wiring bank, 3 ... Wiring material ink, 4 ... Groove, 8 ... Gate wiring, 8a ... Gate electrode, 10 ... Data wiring, 10a ... Drain electrode, 10b ... Source electrode, 12 ... Thin film transistor (TFT), 20 ... SiN film, 21 ... Semiconductor layer, 21a ... n-type semiconductor, 21b ... intrinsic semiconductor, 23 ... protective film, 24 ... alignment film, 25 ... glass substrate, 26 ... color filter, 27 ... Black matrix 28... Protective film 29... Alignment film 30... Liquid crystal layer 31. Electrode, 41... Common electrode (counter electrode), 42... TFT substrate, 43. 110 ‥ data lines bank, 120 ‥ pixel electrode bank.

Claims (9)

A wiring forming substrate having a thin film wiring formed by dropping application of wiring material ink on a substrate,
A bank for forming a groove having a width defined by a distance between the side walls between the side walls in contact with the thin film wiring along both sides of the thin film wiring formed on the substrate;
The wiring forming substrate, wherein the film thickness of the thin film wiring is formed in accordance with a width of a groove of the bank.   A maximum embedding amount of the wiring material ink is defined in the groove of the bank, and a film thickness of the thin film wiring is substantially proportional to a maximum embedding amount of the wiring material ink for forming the thin film wiring in the groove of the bank. The wiring forming substrate according to claim 1, wherein the wiring forming substrate has a thickness.   The surface of the substrate in contact with the wiring material ink is lyophilic with respect to the wiring material ink, and the outer edge surface that is not a groove of the bank has liquid repellency with respect to the wiring material ink. The wiring forming substrate according to claim 1, wherein a surface of the groove side wall has liquid repellency with respect to the wiring material ink. A plurality of gate wirings extending in one direction and arranged in parallel in the other direction orthogonal to the one direction, and a plurality of gate wirings extending in the other direction intersecting the plurality of gate wirings and arranged in parallel in the one direction A first substrate in which a plurality of pixels each having a thin film transistor and a pixel electrode formed at each intersection of the data wiring, the plurality of gate wirings, and the plurality of data wirings are arranged in a matrix, and a gap between the first substrate and the first substrate. And a liquid crystal panel having a liquid crystal layer sealed in the bonding gap between the first substrate and the second substrate,
The thin film wiring of at least one of the plurality of gate wirings and the plurality of data wirings is formed on the substrate by dropping application of wiring material ink,
A bank for forming a groove having a width defined by a distance between the side walls between the side walls in contact with the thin film wiring along both sides of the thin film wiring formed on the substrate;
A maximum filling amount of the wiring material ink is defined in the groove of the bank,
The display device, wherein a thickness of the thin film wiring is formed in accordance with a width of a groove of the bank. The thin-film wiring formed directly on the substrate is the gate wiring,
5. The display device according to claim 4, wherein the film thickness of the thin film wiring has a thickness substantially proportional to the maximum amount of the wiring material ink for forming the thin film wiring in the groove of the bank.   The surface of the substrate that is in contact with the wiring material ink is lyophilic with respect to the wiring material ink, and the surface that is not a groove portion of the bank is lyophobic with respect to the wiring material ink. 6. The display device according to claim 4, wherein a surface of the side wall has liquid repellency with respect to the wiring material ink.   The liquid crystal display device according to claim 4, further comprising a counter electrode and a plurality of color filters on an inner surface of the second substrate.   5. The display device according to claim 4, further comprising an alignment film at an interface between the first substrate and the liquid crystal layer on the bonded inner surface of the second substrate.   The display device according to claim 4, further comprising a polarizing plate on each outer surface of the first substrate and the second substrate.

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