JP2006080561A - Circuit board and its manufacturing method - Google Patents

Circuit board and its manufacturing method Download PDF

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JP2006080561A
JP2006080561A JP2005331686A JP2005331686A JP2006080561A JP 2006080561 A JP2006080561 A JP 2006080561A JP 2005331686 A JP2005331686 A JP 2005331686A JP 2005331686 A JP2005331686 A JP 2005331686A JP 2006080561 A JP2006080561 A JP 2006080561A
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conductive
substrate
film
dielectric
conductive portion
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JP4177372B2 (en
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Shigeru Uchiumi
茂 内海
Hirofumi Fujioka
弘文 藤岡
Seiji Oka
誠次 岡
Hidenori Tsuruse
英紀 鶴瀬
Taiichi Kase
泰一 加瀬
Kenji Muraki
健志 村木
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To obtain a circuit board having an even distance between electrodes which prevents shortening between a first electrode and a second electrode and improves reliability by ensuring an operating time, and to obtain its manufacturing method and electronic equipment using the same. <P>SOLUTION: The circuit board 1 is provided with a first conductive part forming substrate 104 having a first substrate 102 and the first electrode 103, a second conductive part forming substrate 107 having a second substrate 105 and the second electrode 106, and a dielectric part 2 interposed between the substrate 104 and the substrate 107. The dielectric part 2 is provided with a dielectric film 3 which does not melt in thermocompression bonding and a bonded insulator 4 which melts in the thermocompression bonding. The surface of the film 3 is treated to improve wettability, whereby the insulator 4 that has melted in the thermocompression bonding is liable to adhere to the film 3. The distance between the electrode 103 and the electrode 106 can be made even by allowing the film 3 to interpose therebetween. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

この発明は、内部に、コンデンサ、インダクタ、あるいはその両方の機能を備えた配線基板及びその製造方法に関するものである。   The present invention relates to a wiring board having a function of a capacitor, an inductor, or both, and a manufacturing method thereof.

図11は、従来の配線基板の構成を示す断面図である。図11において、従来の配線基板101は、例えばガラスエポキシ基材である第1基板102と、この第1基板102の平面上に複数形成された第1導電部である導電性の第1電極103とを有する第1導電部形成基板104を備えている。また、配線基板101は、例えばガラスエポキシ基材である第2基板105と、この第2基板105に複数形成された第2導電部である導電性の第2電極106とを有する第2導電部形成基板107を備えている。この第1導電部形成基板104及び第2導電部形成基板107は、第1電極103と第2電極106とを互いに対向させて配置されている。また、配線基板101は、第1導電部形成基板104と第2導電部形成基板107との間に介在した誘電体の誘電部108を備えている。   FIG. 11 is a cross-sectional view showing a configuration of a conventional wiring board. In FIG. 11, a conventional wiring substrate 101 includes a first substrate 102 that is, for example, a glass epoxy base material, and a conductive first electrode 103 that is a plurality of first conductive portions formed on the plane of the first substrate 102. The first conductive portion forming substrate 104 is provided. In addition, the wiring substrate 101 includes, for example, a second conductive portion having a second substrate 105 that is a glass epoxy base material and a conductive second electrode 106 that is a plurality of second conductive portions formed on the second substrate 105. A formation substrate 107 is provided. The first conductive portion forming substrate 104 and the second conductive portion forming substrate 107 are arranged with the first electrode 103 and the second electrode 106 facing each other. In addition, the wiring substrate 101 includes a dielectric portion 108 that is interposed between the first conductive portion forming substrate 104 and the second conductive portion forming substrate 107.

このように構成された配線基板101は、この配線基板101の内部で第1電極103と第2電極106とが誘電部108を介して対向して配置されて、平行板コンデンサとしての構成をとることができるので、その分だけ配線基板101上にコンデンサを配置する必要がなくなり、配線基板101を小型化できるというメリットがある。   The wiring board 101 configured as described above has a configuration as a parallel plate capacitor in which the first electrode 103 and the second electrode 106 are arranged to face each other via the dielectric portion 108 inside the wiring board 101. Therefore, there is no need to place a capacitor on the wiring board 101, and there is an advantage that the wiring board 101 can be downsized.

また、特開平2001−077539公報に、配線基板の誘電部に透磁率の高い粉末材料を混入させることにより配線基板の内部にインダクタを形成することが示されている。即ち、配線基板101は、誘電部108に透磁率の高い粉末材料を混入することにより、コンデンサだけでなく配線基板101の内部にインダクタも形成することができ、さらに配線基板101を小型化できる。   Japanese Patent Application Laid-Open No. 2001-077539 discloses that an inductor is formed inside a wiring board by mixing a powder material having a high magnetic permeability into a dielectric portion of the wiring board. That is, the wiring board 101 can form not only a capacitor but also an inductor inside the wiring board 101 by mixing the dielectric material 108 with a powder material having a high magnetic permeability, and the wiring board 101 can be further downsized.

次に、この配線基板101の製造方法について説明する。図12乃至図14は、配線基板101を製造する手順を示す模式図である。まず、第1基板102上に複数の第1電極103を形成して第1導電部形成基板104を形成する。次に、第1導電部形成基板104の第1電極103側に誘電性シート109を重ねてから、金属箔110をその上に重ねる(図12)。誘電性シート109は、熱硬化性エポキシ樹脂であり、所定の温度で溶融しさらに温度が上昇すると硬化するものである。その後、徐々に温度を上昇させて誘電性シート109を溶融させながら、積層された第1導電部形成基板104、誘電性シート109及び金属箔110をステンレス板で挟みつけて積層方向に押圧するが、金属箔110と第1電極103との間に所定の間隔ができるように押圧力を調整する。この調整は誘電性シート109が硬化するまで続ける。このようにして、誘電性シート109は、第1導電部形成基板104及び金属箔110に密着した誘電部108として形成される(図13)。その後、金属箔110をエッチングし、第2電極106を形成する(図14)。最後に、例えばガラスエポキシ基材を加熱して溶融し誘電部108の第2電極105側に第2基板106を形成して、図11に示す配線基板101を製造する。   Next, a method for manufacturing the wiring substrate 101 will be described. 12 to 14 are schematic views showing a procedure for manufacturing the wiring board 101. FIG. First, a plurality of first electrodes 103 are formed on the first substrate 102 to form a first conductive portion formation substrate 104. Next, after the dielectric sheet 109 is overlaid on the first electrode 103 side of the first conductive portion forming substrate 104, the metal foil 110 is overlaid thereon (FIG. 12). The dielectric sheet 109 is a thermosetting epoxy resin, and is cured when it melts at a predetermined temperature and further rises in temperature. Thereafter, while gradually raising the temperature to melt the dielectric sheet 109, the laminated first conductive part forming substrate 104, dielectric sheet 109 and metal foil 110 are sandwiched between stainless plates and pressed in the laminating direction. Then, the pressing force is adjusted so that a predetermined interval is formed between the metal foil 110 and the first electrode 103. This adjustment is continued until the dielectric sheet 109 is cured. In this way, the dielectric sheet 109 is formed as the dielectric part 108 in close contact with the first conductive part forming substrate 104 and the metal foil 110 (FIG. 13). Thereafter, the metal foil 110 is etched to form the second electrode 106 (FIG. 14). Finally, for example, a glass epoxy base material is heated and melted to form the second substrate 106 on the second electrode 105 side of the dielectric portion 108, and the wiring substrate 101 shown in FIG. 11 is manufactured.

このようにして配線基板101は製造されるが、このような製造方法では、誘電性シート109全体が溶融している状態で、第1導電部形成基板104と金属箔110とが互いに近づく向きに押圧されるので、第1導電部形成基板104及び金属箔110の外周部側では誘電性シート109が外に流出しやすく内部側に近づくにつれて逃げ場が少なくなり流出しにくくなる。従って、完成した配線基板101は、第1電極103及び第2電極106間における誘電部108の厚さがその配線基板101の外周部側で小さく内部側で大きくなる傾向にある。このことから、互いに対向する第1電極103及び第2電極106の面積が同一であっても、配線基板101の外周部側と内部側とで間に介在する誘電部108の厚さが異なるので、それらのコンデンサとしての容量値も異なる。特に、このコンデンサの容量を大きくするために第1電極103と第2電極106との間の距離(以下、電極間距離という)が小さくなっていると、それだけ電極間距離の差がコンデンサの容量に大きく影響するため、この配線基板101の外周部側と内部側とでコンデンサ容量が大きく異なって、配線基板101内の各箇所で容量値のばらつきが大きくなるという問題点があった。
また、例えば第1電極103と金属箔110との間に異物が介在していたり、直接第1電極103と金属箔110とが接触したりして、配線基板101において第1電極103と第2電極106とが短絡した状態となり、コンデンサとしての機能を果たさなくなる虞もあるという問題点もあった。
さらに、第1電極103と第2電極106との距離にばらつきがあったり第1電極103と第2電極106とが短絡したりすることにより、内部にインダクタが形成されている場合であっても、そのインダクタンスも同様に配線基板101の外周部側と内部側とで大きく異なるという問題点もあった。
In this way, the wiring substrate 101 is manufactured. In such a manufacturing method, the first conductive portion forming substrate 104 and the metal foil 110 are brought closer to each other in a state where the entire dielectric sheet 109 is melted. Since it is pressed, the dielectric sheet 109 tends to flow out to the outside on the outer peripheral side of the first conductive part forming substrate 104 and the metal foil 110, and the escape place decreases as it approaches the inner side, and it becomes difficult to flow out. Therefore, in the completed wiring board 101, the thickness of the dielectric portion 108 between the first electrode 103 and the second electrode 106 tends to be smaller on the outer peripheral side of the wiring board 101 and larger on the inner side. For this reason, even if the areas of the first electrode 103 and the second electrode 106 facing each other are the same, the thickness of the dielectric portion 108 interposed between the outer peripheral side and the inner side of the wiring substrate 101 is different. The capacitance values of these capacitors are also different. In particular, if the distance between the first electrode 103 and the second electrode 106 (hereinafter referred to as the interelectrode distance) is reduced in order to increase the capacity of the capacitor, the difference in the interelectrode distance is the corresponding difference in the capacity of the capacitor. Therefore, there is a problem in that the capacitance of the wiring board 101 is greatly different between the outer peripheral side and the inner side of the wiring board 101, and the variation of the capacitance value is increased at each location in the wiring board 101.
Further, for example, foreign matter is present between the first electrode 103 and the metal foil 110, or the first electrode 103 and the metal foil 110 are in direct contact with each other, so that the first electrode 103 and the second foil are connected to the wiring board 101. There has also been a problem that the electrode 106 may be short-circuited and may not function as a capacitor.
Further, even when the distance between the first electrode 103 and the second electrode 106 varies or the first electrode 103 and the second electrode 106 are short-circuited, an inductor is formed inside. Similarly, there is a problem that the inductance is greatly different between the outer peripheral side and the inner side of the wiring board 101.

また、実際の使用において、配線基板は内部での剥離によって寿命が決定されることも多く、この剥離の発生を抑制して配線基板の寿命を確保する必要があるという問題点もあった。   Further, in actual use, the life of the wiring board is often determined by internal peeling, and there is a problem that it is necessary to ensure the life of the wiring board by suppressing the occurrence of this peeling.

そこでこの発明は、上記のような問題点を解決することを課題とするもので、内部の電極間距離が一定で第1電極と第2電極との短絡を防止するとともに、内部での剥離の発生を抑制して寿命を確保し信頼性を向上させた配線基板及びその製造方法を得ることを目的とする。   Therefore, the present invention aims to solve the above-described problems. The distance between the internal electrodes is constant, and a short circuit between the first electrode and the second electrode is prevented. It is an object of the present invention to obtain a wiring board and a method for manufacturing the same that suppress generation and secure life and improve reliability.

この発明に係る配線基板は、第1基板、及び前記第1基板の平面上に形成された渦状の第1導電部を有する第1導電部形成基板と、第2基板、及び前記第2基板に形成された渦状の第2導電部を有し、前記第2導電部を前記第1導電部に対向させて配置された第2導電部形成基板と、前記第1導電部形成基板及び前記第2導電部形成基板の間に介在した誘電部とを備え、熱圧着により少なくとも前記誘電部が形成された配線基板であって、前記誘電部は、前記熱圧着時に溶融する接着絶縁部と、前記熱圧着時に厚さが保たれる誘電体膜とを有しており、前記接着絶縁部は、前記誘電体膜の前記第1導電部形成基板側及び前記第2導電部形成基板側のいずれにも設けられ、前記誘電体膜は、前記第1導電部と前記第2導電部との間に介在する複数の電極間部と、各前記電極間部の間を渡って撓んで設けられた可撓性の渡り部とを有し、前記第1導電部と、前記第2導電部と、前記誘電部に形成された貫通孔に設けられ、巻き方向が同一となるように前記第1導電部及び前記第2導電部を電気的に接続する電気接続部とから内部インダクタが構成されている。   The wiring board according to the present invention includes a first substrate, a first conductive portion forming substrate having a spiral first conductive portion formed on a plane of the first substrate, a second substrate, and the second substrate. A second conductive part forming substrate having a spiral second conductive part formed, the second conductive part being disposed opposite to the first conductive part, the first conductive part forming substrate, and the second conductive part A wiring board having at least the dielectric part formed by thermocompression bonding, the dielectric part comprising an adhesive insulating part that melts during the thermocompression bonding, and the heat insulating part. A dielectric film whose thickness is maintained during crimping, and the adhesive insulating portion is provided on either the first conductive portion forming substrate side or the second conductive portion forming substrate side of the dielectric film. The dielectric film is provided between the first conductive portion and the second conductive portion. Between the electrodes, and a flexible crossover provided between the electrodes, and the first conductive portion, the second conductive portion, and the dielectric portion. An internal inductor is configured by an electrical connection portion that is provided in the formed through hole and electrically connects the first conductive portion and the second conductive portion so that the winding direction is the same.

また、前記貫通孔は、レーザーにより形成されており、前記第1導電部は、前記誘電部側の面に前記レーザーの反射率を低下させる処理がなされている。   In addition, the through hole is formed by a laser, and the first conductive portion is subjected to a process for reducing the reflectance of the laser on the surface on the dielectric portion side.

また、前記誘電体膜の表面には、前記溶融した前記接着絶縁部との濡れ性を向上させる処理がなされている。   Further, the surface of the dielectric film is subjected to a treatment for improving wettability with the melted adhesive insulating portion.

また、前記誘電体膜は、少なくとも、誘電性の母材と、前記母材内に混入された前記母材よりも透磁率の高い粉末とからなる。   The dielectric film includes at least a dielectric base material and a powder having a higher magnetic permeability than the base material mixed in the base material.

また、この発明に係る配線基板の製造方法は、前記第1導電部を前記第1基板上に設けて前記第1導電部形成基板を形成する第1導電部形成基板工程と、前記第1導電部の表面に前記レーザーの反射率を低下させる処理をする第1導電部処理工程と、接着用絶縁膜を前記第1導電部形成基板の前記第1導電部側に重ねる第1絶縁膜積層工程と、前記誘電体膜に前記濡れ性を向上させる処理をする誘電体膜処理工程と、前記誘電体膜を前記接着用絶縁膜に重ねる誘電体膜積層工程と、前記誘電体膜積層工程の後に、接着用絶縁膜を前記誘電体膜に重ねる第2絶縁膜積層工程と、面状の導電体膜を前記第2絶縁膜積層工程において重ねられた前記接着用絶縁膜に設ける導電体膜積層工程と、前記熱圧着で前記接着用絶縁膜を溶融させるとともに互いに近づく向きに前記第1導電部及び前記導電体膜を押圧する熱圧着工程と、前記誘電体膜上に前記導電体膜を複数の前記第2導電部として形成する第2導電部形成工程と、前記第2導電部形成基板工程の前に、前記レーザーを前記第1導電部の表面に向けて照射して前記貫通孔を形成する貫通孔形成工程と、前記貫通孔を通じて前記第1導電部及び前記第2導電部の間に前記電気接続部を形成して前記第1導電部及び前記第2導電部を電気的に接続する電気的接続工程と、前記第2導電部を前記第2基板で覆って前記第2導電部形成基板を形成する第2導電部形成基板工程とを備え、前記熱圧着工程では、前記接着用絶縁膜は、それぞれ前記第1導電部及び前記誘電体膜の間、前記第1導電部に対向する前記導電体膜及び前記誘電体膜の間から前記誘電体膜が撓みつつ押し出されて前記接着絶縁部として形成され、前記誘電体膜及び前記接着誘電部により前記誘電部が形成されるようになっている。   The wiring board manufacturing method according to the present invention includes a first conductive part forming substrate step of forming the first conductive part forming substrate by providing the first conductive part on the first substrate, and the first conductive part. A first conductive part processing step for reducing the reflectance of the laser on the surface of the part, and a first insulating film laminating step for superimposing an adhesive insulating film on the first conductive part side of the first conductive part forming substrate A dielectric film processing step for performing a process for improving the wettability of the dielectric film, a dielectric film stacking step for stacking the dielectric film on the adhesive insulating film, and a step after the dielectric film stacking step A second insulating film laminating step of overlaying an adhesive insulating film on the dielectric film; and a conductor film laminating step of providing a planar conductor film on the adhesive insulating film stacked in the second insulating film laminating step And melting the adhesive insulating film by the thermocompression bonding. A thermocompression bonding step of pressing the first conductive portion and the conductive film in a direction approaching to a second conductive portion forming step of forming the conductive film on the dielectric film as a plurality of the second conductive portions; A through hole forming step of forming the through hole by irradiating the surface of the first conductive portion with the laser before the second conductive portion forming substrate step; and the first conductive portion through the through hole. And an electrical connection step of electrically connecting the first conductive part and the second conductive part by forming the electrical connection part between the second conductive part, and the second conductive part as the second substrate. And a second conductive part forming substrate step of forming the second conductive part forming substrate, and in the thermocompression bonding step, the bonding insulating film is between the first conductive part and the dielectric film, respectively. , Between the conductor film and the dielectric film facing the first conductive part Et the dielectric film is formed as the adhesive insulating portion extruded and while bending, so that the dielectric portion is formed by the dielectric film and the adhesive dielectric portion.

第1基板、及び前記第1基板の平面上に間隔を置いて形成された渦状の第1導電部を有する第1導電部形成基板と、第2基板、及び前記第2基板に形成された渦状の第2導電部を有し、前記第2導電部を前記第1導電部に対向させて配置された第2導電部形成基板と、前記第1導電部形成基板及び前記第2導電部形成基板の間に介在するとともに、少なくとも熱圧着により形成され、前記熱圧着時に溶融する接着絶縁部と、前記第1導電部と前記第2導電部との間に介在するとともに、表面に前記溶融した前記接着絶縁部との濡れ性を向上させる処理がなされ、前記熱圧着時に厚さが保たれる誘電体膜とを有する誘電部とを備え、かつ前記第1導電部と、前記第2導電部と、前記誘電部に形成された貫通孔に設けられ、巻き方向が同一となるように前記第1導電部及び前記第2導電部を電気的に接続する電気接続部とから内部インダクタが構成されている配線基板を製造するための配線基板の製造方法であって、前記第1導電部を前記第1基板上に設けて前記第1導電部形成基板を形成する第1導電部形成基板工程と、前記第1導電部の表面に前記レーザーの反射率を低下させる処理をする第1導電部処理工程と、接着用絶縁膜を前記第1導電部形成基板の前記第1導電部側に重ねる第1絶縁膜積層工程と、前記誘電体膜の一面に前記濡れ性を向上させる処理をし、他面に前記第2導電部との密着力を向上させる処理をする誘電体膜処理工程と、前記一面を前記接着用絶縁膜に向けて前記誘電体膜を前記接着用絶縁膜に重ねる誘電体膜積層工程と、導電体膜を前記誘電体膜の前記他面に設ける導電体膜積層工程と、前記熱圧着で前記接着用絶縁膜を溶融させるとともに互いに近づく向きに前記第1導電部及び前記導電体膜を押圧する熱圧着工程と、前記誘電体膜上に前記導電体膜を前記第2導電部として形成する第2導電部形成工程と、前記第2導電部形成基板工程の前に、前記レーザーを前記第1導電部の表面に向けて照射して前記貫通孔を形成する貫通孔形成工程と、前記貫通孔を通じて前記第1導電部及び前記第2導電部の間に前記電気接続部を形成して前記第1導電部及び前記第2導電部を電気的に接続する電気的接続工程と、前記第2導電部を前記第2基板で覆って前記第2導電部形成基板を形成する第2導電部形成基板工程とを備え、前記熱圧着工程では、前記接着用絶縁膜は前記第1導電部及び前記誘電体膜の間から押し出されて前記接着絶縁部として形成され、前記誘電体膜及び前記接着絶縁部により前記誘電部が形成されるようになっている。   A first conductive part forming substrate having a first substrate and a spiral first conductive part formed on the plane of the first substrate at an interval, a second substrate, and a vortex formed on the second substrate A second conductive part forming substrate, the second conductive part forming substrate being disposed so as to face the first conductive part, the first conductive part forming substrate, and the second conductive part forming substrate. Between the adhesive insulating portion that is formed by at least thermocompression bonding and melts at the time of the thermocompression bonding, and between the first conductive portion and the second conductive portion, and on the surface, the molten A dielectric part having a dielectric film that is treated to improve wettability with the adhesive insulating part and has a thickness that is maintained during the thermocompression bonding; and the first conductive part, the second conductive part, , Provided in the through-hole formed in the dielectric part, and the winding direction is the same A wiring board manufacturing method for manufacturing a wiring board in which an internal inductor is configured from an electrical connection part for electrically connecting the first conductive part and the second conductive part, wherein the first conductive part A first conductive part forming substrate step of providing a part on the first substrate to form the first conductive part forming substrate, and a first process of reducing the reflectance of the laser on the surface of the first conductive part A conductive portion processing step, a first insulating film laminating step of stacking an adhesive insulating film on the first conductive portion side of the first conductive portion forming substrate, and a treatment for improving the wettability on one surface of the dielectric film. And a dielectric film processing step for performing a process for improving adhesion to the second conductive portion on the other surface, and the dielectric film is overlaid on the adhesive insulating film with the one surface facing the insulating film for bonding. A dielectric film stacking step, and a conductive film as the other of the dielectric film. A conductive film laminating step, a thermocompression bonding step of melting the adhesive insulating film by the thermocompression bonding and pressing the first conductive portion and the conductive film toward each other; and on the dielectric film Before the second conductive part forming step of forming the conductive film as the second conductive part and the second conductive part forming substrate step, the laser is irradiated toward the surface of the first conductive part, and A through hole forming step of forming a through hole; and forming the electrical connection portion between the first conductive portion and the second conductive portion through the through hole to electrically connect the first conductive portion and the second conductive portion. An electrical connection step of connecting the second conductive portion and a second conductive portion formation substrate step of covering the second conductive portion with the second substrate to form the second conductive portion formation substrate, and in the thermocompression bonding step, The bonding insulating film includes the first conductive portion and the dielectric film. The dielectric part is formed by the dielectric film and the adhesive insulating part.

以上の説明から明らかなように、この発明に係る配線基板は、第1基板、及び前記第1基板の平面上に形成された渦状の第1導電部を有する第1導電部形成基板と、第2基板、及び前記第2基板に形成された渦状の第2導電部を有し、前記第2導電部を前記第1導電部に対向させて配置された第2導電部形成基板と、前記第1導電部形成基板及び前記第2導電部形成基板の間に介在した誘電部とを備え、熱圧着により少なくとも前記誘電部が形成された配線基板であって、前記誘電部は、前記熱圧着時に溶融する接着絶縁部と、前記熱圧着時に厚さが保たれる誘電体膜とを有しており、前記接着絶縁部は、前記誘電体膜の前記第1導電部形成基板側及び前記第2導電部形成基板側のいずれにも設けられ、前記誘電体膜は、前記第1導電部と前記第2導電部との間に介在する複数の電極間部と、各前記電極間部の間を渡って撓んで設けられた可撓性の渡り部とを有し、前記第1導電部と、前記第2導電部と、前記誘電部に形成された貫通孔に設けられ、巻き方向が同一となるように前記第1導電部及び前記第2導電部を電気的に接続する電気接続部とから内部インダクタが構成されているので、前記第1導電部及び前記第2導電部の間の距離の場所による差が小さくなるとともに、前記配線基板上にインダクタを配置するスペースが不要になり、前記配線基板を小型化できる。   As is clear from the above description, the wiring board according to the present invention includes a first substrate, a first conductive portion formation substrate having a spiral first conductive portion formed on a plane of the first substrate, A second conductive portion forming substrate having two substrates and a spiral second conductive portion formed on the second substrate, the second conductive portion being disposed so as to face the first conductive portion; And a dielectric part interposed between the first conductive part forming substrate and the second conductive part forming substrate, wherein at least the dielectric part is formed by thermocompression bonding. An adhesive insulating portion that melts; and a dielectric film that maintains a thickness during the thermocompression bonding. The adhesive insulating portion includes the first conductive portion forming substrate side of the dielectric film and the second conductive film. The dielectric film is provided on either side of the conductive part forming substrate side, and the dielectric film is connected to the first conductive part. A plurality of interelectrode portions interposed between the second conductive portions, and a flexible crossover portion provided to bend across each of the interelectrode portions, the first conductive portion; From the second conductive portion and an electrical connection portion that is provided in a through hole formed in the dielectric portion and electrically connects the first conductive portion and the second conductive portion so that the winding direction is the same. Since the internal inductor is configured, the difference due to the location of the distance between the first conductive portion and the second conductive portion is reduced, and a space for arranging the inductor on the wiring board becomes unnecessary, and the wiring The board can be miniaturized.

また、前記貫通孔は、レーザーにより形成されており、前記第1導電部は、前記誘電部側の面に前記レーザーの反射率を低下させる処理がなされているので、前記レーザーによる前記貫通孔の形成時に、前記レーザーのエネルギを前記第1導電部が容易に吸収でき、その吸収による温度上昇により容易に前記貫通孔が形成できる。   Further, the through hole is formed by a laser, and the first conductive portion is subjected to a process for reducing the reflectance of the laser on the surface on the dielectric portion side. At the time of formation, the first conductive part can easily absorb the energy of the laser, and the through hole can be easily formed by a temperature rise due to the absorption.

また、前記誘電体膜の表面には、前記溶融した前記接着絶縁部との濡れ性を向上させる処理がなされているので、前記誘電体膜と前記接着絶縁部との密着力が大きくなって前記誘電体膜と前記接着絶縁部との間で剥離しにくくなる。   Further, since the surface of the dielectric film has been subjected to a treatment for improving the wettability with the melted adhesive insulating portion, the adhesion force between the dielectric film and the adhesive insulating portion is increased. It becomes difficult to peel between the dielectric film and the adhesive insulating portion.

また、前記誘電体膜は、少なくとも、誘電性の母材と、前記母材内に混入された前記母材よりも透磁率の高い粉末とからなるので、前記内部インダクタが形成された場合に、そのインダクタンスを大きくすることができる。   Further, since the dielectric film is composed of at least a dielectric base material and a powder having a higher magnetic permeability than the base material mixed in the base material, when the internal inductor is formed, The inductance can be increased.

また、この発明に係る配線基板の製造方法は、前記第1導電部を前記第1基板上に設けて前記第1導電部形成基板を形成する第1導電部形成基板工程と、前記第1導電部の表面に前記レーザーの反射率を低下させる処理をする第1導電部処理工程と、接着用絶縁膜を前記第1導電部形成基板の前記第1導電部側に重ねる第1絶縁膜積層工程と、前記誘電体膜に前記濡れ性を向上させる処理をする誘電体膜処理工程と、前記誘電体膜を前記接着用絶縁膜に重ねる誘電体膜積層工程と、前記誘電体膜積層工程の後に、接着用絶縁膜を前記誘電体膜に重ねる第2絶縁膜積層工程と、面状の導電体膜を前記第2絶縁膜積層工程において重ねられた前記接着用絶縁膜に設ける導電体膜積層工程と、前記熱圧着で前記接着用絶縁膜を溶融させるとともに互いに近づく向きに前記第1導電部及び前記導電体膜を押圧する熱圧着工程と、前記誘電体膜上に前記導電体膜を複数の前記第2導電部として形成する第2導電部形成工程と、前記第2導電部形成基板工程の前に、前記レーザーを前記第1導電部の表面に向けて照射して前記貫通孔を形成する貫通孔形成工程と、前記貫通孔を通じて前記第1導電部及び前記第2導電部の間に前記電気接続部を形成して前記第1導電部及び前記第2導電部を電気的に接続する電気的接続工程と、前記第2導電部を前記第2基板で覆って前記第2導電部形成基板を形成する第2導電部形成基板工程とを備え、前記熱圧着工程では、前記接着用絶縁膜は、それぞれ前記第1導電部及び前記誘電体膜の間、前記第1導電部に対向する前記導電体膜及び前記誘電体膜の間から前記誘電体膜が撓みつつ押し出されて前記接着絶縁部として形成され、前記誘電体膜及び前記接着誘電部により前記誘電部が形成されるようになっているので、短時間でしかも容易に前記配線基板が製造される。また、前記レーザーによる前記貫通孔の形成が容易に、かつ、短時間ででき、前記配線基板の製造時間を短縮できる。   The wiring board manufacturing method according to the present invention includes a first conductive part forming substrate step of forming the first conductive part forming substrate by providing the first conductive part on the first substrate, and the first conductive part. A first conductive part processing step for reducing the reflectance of the laser on the surface of the part, and a first insulating film laminating step for superimposing an adhesive insulating film on the first conductive part side of the first conductive part forming substrate A dielectric film processing step for performing a process for improving the wettability of the dielectric film, a dielectric film stacking step for stacking the dielectric film on the adhesive insulating film, and a step after the dielectric film stacking step A second insulating film laminating step of overlaying an adhesive insulating film on the dielectric film; and a conductor film laminating step of providing a planar conductor film on the adhesive insulating film stacked in the second insulating film laminating step And melting the adhesive insulating film by the thermocompression bonding. A thermocompression bonding step of pressing the first conductive portion and the conductive film in a direction approaching to a second conductive portion forming step of forming the conductive film on the dielectric film as a plurality of the second conductive portions; A through hole forming step of forming the through hole by irradiating the surface of the first conductive portion with the laser before the second conductive portion forming substrate step; and the first conductive portion through the through hole. And an electrical connection step of electrically connecting the first conductive part and the second conductive part by forming the electrical connection part between the second conductive part, and the second conductive part as the second substrate. And a second conductive part forming substrate step of forming the second conductive part forming substrate, and in the thermocompression bonding step, the bonding insulating film is between the first conductive part and the dielectric film, respectively. , Between the conductor film and the dielectric film facing the first conductive part The dielectric film is pushed out while being bent and formed as the adhesive insulating part, and the dielectric part is formed by the dielectric film and the adhesive dielectric part. A wiring board is manufactured. Moreover, the formation of the through hole by the laser can be easily performed in a short time, and the manufacturing time of the wiring board can be shortened.

第1基板、及び前記第1基板の平面上に間隔を置いて形成された渦状の第1導電部を有する第1導電部形成基板と、第2基板、及び前記第2基板に形成された渦状の第2導電部を有し、前記第2導電部を前記第1導電部に対向させて配置された第2導電部形成基板と、前記第1導電部形成基板及び前記第2導電部形成基板の間に介在するとともに、少なくとも熱圧着により形成され、前記熱圧着時に溶融する接着絶縁部と、前記第1導電部と前記第2導電部との間に介在するとともに、表面に前記溶融した前記接着絶縁部との濡れ性を向上させる処理がなされ、前記熱圧着時に厚さが保たれる誘電体膜とを有する誘電部とを備え、かつ前記第1導電部と、前記第2導電部と、前記誘電部に形成された貫通孔に設けられ、巻き方向が同一となるように前記第1導電部及び前記第2導電部を電気的に接続する電気接続部とから内部インダクタが構成されている配線基板を製造するための配線基板の製造方法であって、前記第1導電部を前記第1基板上に設けて前記第1導電部形成基板を形成する第1導電部形成基板工程と、前記第1導電部の表面に前記レーザーの反射率を低下させる処理をする第1導電部処理工程と、接着用絶縁膜を前記第1導電部形成基板の前記第1導電部側に重ねる第1絶縁膜積層工程と、前記誘電体膜の一面に前記濡れ性を向上させる処理をし、他面に前記第2導電部との密着力を向上させる処理をする誘電体膜処理工程と、前記一面を前記接着用絶縁膜に向けて前記誘電体膜を前記接着用絶縁膜に重ねる誘電体膜積層工程と、導電体膜を前記誘電体膜の前記他面に設ける導電体膜積層工程と、前記熱圧着で前記接着用絶縁膜を溶融させるとともに互いに近づく向きに前記第1導電部及び前記導電体膜を押圧する熱圧着工程と、前記誘電体膜上に前記導電体膜を前記第2導電部として形成する第2導電部形成工程と、前記第2導電部形成基板工程の前に、前記レーザーを前記第1導電部の表面に向けて照射して前記貫通孔を形成する貫通孔形成工程と、前記貫通孔を通じて前記第1導電部及び前記第2導電部の間に前記電気接続部を形成して前記第1導電部及び前記第2導電部を電気的に接続する電気的接続工程と、前記第2導電部を前記第2基板で覆って前記第2導電部形成基板を形成する第2導電部形成基板工程とを備え、前記熱圧着工程では、前記接着用絶縁膜は前記第1導電部及び前記誘電体膜の間から押し出されて前記接着絶縁部として形成され、前記誘電体膜及び前記接着絶縁部により前記誘電部が形成されるようになっているので、短時間でしかも容易に前記配線基板が製造される。また、前記レーザーによる前記貫通孔の形成が容易に、かつ、短時間ででき、前記配線基板の製造時間を短縮できる。   A first conductive part forming substrate having a first substrate and a spiral first conductive part formed on the plane of the first substrate at an interval, a second substrate, and a vortex formed on the second substrate A second conductive part forming substrate, the second conductive part forming substrate being disposed so as to face the first conductive part, the first conductive part forming substrate, and the second conductive part forming substrate. Between the adhesive insulating portion that is formed by at least thermocompression bonding and melts at the time of the thermocompression bonding, and between the first conductive portion and the second conductive portion, and on the surface, the molten A dielectric part having a dielectric film that is treated to improve wettability with the adhesive insulating part and has a thickness that is maintained during the thermocompression bonding; and the first conductive part, the second conductive part, , Provided in the through-hole formed in the dielectric part, and the winding direction is the same A wiring board manufacturing method for manufacturing a wiring board in which an internal inductor is configured from an electrical connection part for electrically connecting the first conductive part and the second conductive part, wherein the first conductive part A first conductive part forming substrate step of providing a part on the first substrate to form the first conductive part forming substrate, and a first process of reducing the reflectance of the laser on the surface of the first conductive part A conductive portion processing step, a first insulating film laminating step of stacking an adhesive insulating film on the first conductive portion side of the first conductive portion forming substrate, and a treatment for improving the wettability on one surface of the dielectric film. And a dielectric film processing step for performing a process for improving adhesion to the second conductive portion on the other surface, and the dielectric film is overlaid on the adhesive insulating film with the one surface facing the insulating film for bonding. A dielectric film stacking step, and a conductive film as the other of the dielectric film. A conductive film laminating step, a thermocompression bonding step of melting the adhesive insulating film by the thermocompression bonding and pressing the first conductive portion and the conductive film toward each other; and on the dielectric film Before the second conductive part forming step of forming the conductive film as the second conductive part and the second conductive part forming substrate step, the laser is irradiated toward the surface of the first conductive part, and A through hole forming step of forming a through hole; and forming the electrical connection portion between the first conductive portion and the second conductive portion through the through hole to electrically connect the first conductive portion and the second conductive portion. An electrical connection step of connecting the second conductive portion and a second conductive portion formation substrate step of covering the second conductive portion with the second substrate to form the second conductive portion formation substrate, and in the thermocompression bonding step, The bonding insulating film includes the first conductive portion and the dielectric film. Since the dielectric part is formed by the dielectric film and the adhesive insulating part, the wiring board is manufactured easily in a short time. The In addition, the through hole can be easily formed in a short time by the laser, and the manufacturing time of the wiring board can be shortened.

以下にこの発明の実施の形態について説明するが、従来例のものと同一又は同等部材、部位は、同一符号を付して説明する。
実施の形態1.
図1は、この発明の実施の形態1に係る配線基板の構成を示す断面図である。図1において、配線基板1は、例えばガラスエポキシ基材である第1基板102と、この第1基板102の平面上に形成された第1導電部である板状の第1電極103とを有する第1導電部形成基板104を備えている。また、配線基板1は、例えばガラスエポキシ基材である第2基板105と、この第2基板105に複数形成された第2導電部である板状の第2電極106とを有する第2導電部形成基板107を備えている。この第1導電部形成基板104及び第2導電部形成基板107は、第1電極103と第2電極106とを互いに対向させて配置されている。また、配線基板1は、第1導電部形成基板104と第2導電部形成基板107との間に介在した誘電性材料の誘電部2を備えている。誘電部2は、融点の異なる誘電体膜3と接着絶縁部4とを有している。
Embodiments of the present invention will be described below, but the same or equivalent members and parts as those of the conventional example will be described with the same reference numerals.
Embodiment 1 FIG.
1 is a cross-sectional view showing a configuration of a wiring board according to Embodiment 1 of the present invention. In FIG. 1, a wiring board 1 includes a first substrate 102 that is, for example, a glass epoxy base material, and a plate-like first electrode 103 that is a first conductive portion formed on the plane of the first substrate 102. A first conductive portion forming substrate 104 is provided. Further, the wiring board 1 includes a second conductive part having a second substrate 105 that is, for example, a glass epoxy base material and a plate-like second electrode 106 that is a plurality of second conductive parts formed on the second substrate 105. A formation substrate 107 is provided. The first conductive portion forming substrate 104 and the second conductive portion forming substrate 107 are arranged with the first electrode 103 and the second electrode 106 facing each other. In addition, the wiring substrate 1 includes a dielectric portion 2 made of a dielectric material interposed between the first conductive portion forming substrate 104 and the second conductive portion forming substrate 107. The dielectric part 2 has a dielectric film 3 and an adhesive insulating part 4 having different melting points.

第1導電部形成基板104において、第1電極103は、例えば厚さ18μmで、第1基板102の平面上にその厚さの分だけ突出して形成されている。また、第1電極103は、間隔を置いて複数形成されており、各第1電極103間に凹部5が形成されている。   In the first conductive portion formation substrate 104, the first electrode 103 has a thickness of 18 μm, for example, and is formed on the plane of the first substrate 102 so as to protrude by the thickness. A plurality of first electrodes 103 are formed at intervals, and a recess 5 is formed between each first electrode 103.

第2導電部形成基板107において、第2電極106は、例えば厚さ18μmで、第1導電部形成基板104側の面を露出させて第2基板105に埋め込まれている。   In the second conductive portion formation substrate 107, the second electrode 106 is, for example, 18 μm thick and is embedded in the second substrate 105 with the surface on the first conductive portion formation substrate 104 side exposed.

誘電体膜3は、例えば、6μmの一定の厚さで形成された誘電率3の例えばポリフェニレンサルファイド膜であり、第1電極103及び第2電極106の間に介在する電極間部6と、各電極間部6の間を渡って設けられた渡り部7とから構成されている。この誘電体膜3は、可撓性であり、渡り部7が凹部5側に撓んで設けられている。また、誘電体膜3の接着絶縁部4に接触している表面には、例えばコロナ放電処理がなされている。   The dielectric film 3 is, for example, a polyphenylene sulfide film having a dielectric constant of 3 formed with a constant thickness of 6 μm, for example, and includes an interelectrode portion 6 interposed between the first electrode 103 and the second electrode 106, It is comprised from the transition part 7 provided across the part 6 between electrodes. The dielectric film 3 is flexible, and the transition portion 7 is provided to be bent toward the concave portion 5. The surface of the dielectric film 3 that is in contact with the adhesive insulating portion 4 is subjected to, for example, corona discharge treatment.

接着絶縁部4は、誘電体膜3の第1導電部形成基板104側に設けられた第1接着絶縁部4aと、誘電体膜3の第2導電部形成基板107側に設けられた第2接着絶縁部4bとから構成されている。この接着絶縁部4の材質は、約180℃で硬化する熱硬化性エポキシ樹脂であり、誘電体膜3と第1導電部形成基板104とを接着し、及び誘電体膜3と第2導電部形成基板107とを接着している。第1接着絶縁部4aは、渡り部7と凹部5とで囲まれた空間を満たすとともに、電極間距離に影響を与えない程度に第1電極103と電極間部6との間に薄く介在して、誘電体膜3を第1導電部形成基板104に接着している。第2接着絶縁部4bは、撓んでいる渡り部7と第2基板105との間に形成された空間を満たすとともに、電極間距離に影響を与えない程度に第2電極106と電極間部6との間に薄く介在して、誘電体膜3を第2導電部形成基板107に接着している。   The adhesive insulating part 4 includes a first adhesive insulating part 4 a provided on the first conductive part forming substrate 104 side of the dielectric film 3 and a second adhesive part provided on the second conductive part forming substrate 107 side of the dielectric film 3. It is comprised from the adhesive insulation part 4b. The material of the adhesive insulating portion 4 is a thermosetting epoxy resin that is cured at about 180 ° C., and adheres the dielectric film 3 and the first conductive portion forming substrate 104, and the dielectric film 3 and the second conductive portion. The formation substrate 107 is bonded. The first adhesive insulating portion 4a fills the space surrounded by the crossover portion 7 and the concave portion 5, and is thinly interposed between the first electrode 103 and the interelectrode portion 6 so as not to affect the interelectrode distance. Thus, the dielectric film 3 is bonded to the first conductive part forming substrate 104. The second adhesive insulating portion 4b fills the space formed between the bent transition portion 7 and the second substrate 105, and does not affect the inter-electrode distance. The dielectric film 3 is bonded to the second conductive portion forming substrate 107 with a thin intervening space therebetween.

このような構成の配線基板1は、厚さが一定の電極間部6が第1電極103と第2電極106との間に介在し、しかも接着絶縁部4は、第1電極103と第2電極106との間に、電極間距離に影響を与えない程度に薄くしか介在していないので、電極間距離が電極間部6の厚さで決定され、従来例に比べて電極間距離が場所によって大きく異なることがなく、内部に構成されているコンデンサの容量のばらつきが抑制されている。   In the wiring substrate 1 having such a configuration, the inter-electrode portion 6 having a constant thickness is interposed between the first electrode 103 and the second electrode 106, and the adhesive insulating portion 4 is connected to the first electrode 103 and the second electrode 106. The distance between the electrodes is determined by the thickness of the inter-electrode portion 6 because the inter-electrode distance is so thin as not to affect the inter-electrode distance. Therefore, variation in the capacitance of the capacitors formed inside is suppressed.

また、異なる材質である誘電体膜3と接着絶縁部4とは、通常、互いに密着しにくいが、誘電体膜3の表面に例えばコロナ放電処理がなされていることから、密着力が向上して剥離が発生しにくくなっている。   In addition, the dielectric film 3 and the adhesive insulating portion 4 which are different materials are usually difficult to adhere to each other. However, since the surface of the dielectric film 3 is subjected to, for example, corona discharge treatment, the adhesion is improved. Peeling is less likely to occur.

次に、このような配線基板1の製造方法について説明する。図2乃至図5は、配線基板1の製造工程でのそれぞれの状態を示す模式図である。これら図2乃至図5に示すように、まず、第1基板102の例えば縦横340mmの平面上に例えば厚さ18μmの第1電極103を例えば第1基板102の平面の周囲部30mmを除き10mmおきにマトリックス状に784個従来と同様に形成して、第1導電部形成基板104を形成する(第1導電部形成基板工程、図2)。次に、例えば約150℃で溶融粘度が10P、約180℃で硬化する熱硬化性エポキシ樹脂の接着用絶縁膜である第1接着用絶縁膜10を第1導電部形成基板104の第1電極103側に重ね(第1絶縁膜積層工程)、誘電体膜3をこの第1接着用絶縁膜10の上に重ねる(誘電体膜積層工程)。この誘電体膜3はこの誘電体膜積層工程までに、表面にコロナ放電処理をして溶融した接着用絶縁膜との濡れ性を向上させる処理を行っている。この濡れ性を向上させる処理は、オゾン処理あるいは酸素プラズマ処理であっても構わない(誘電体膜処理工程)。そして、さらにその上に第1接着用絶縁膜10と同様の材質の接着用絶縁膜である第2接着用絶縁膜11を重ねる(第2絶縁膜積層工程)。ここで、第1接着用絶縁膜10の厚さは、第1電極103の厚さよりも小さい例えば10μmとなっており、第2接着用絶縁膜11の厚さは、例えば5μmとなっている。また、誘電体膜3の厚さは、上述のように例えば6μmとなっている。
その後、この第2接着用絶縁膜11の上に例えば厚さ18μmの銅箔である導電性の導電体膜12を重ねて(導電体膜積層工程)、図3に示す状態とする。
Next, a method for manufacturing such a wiring board 1 will be described. 2 to 5 are schematic views showing respective states in the manufacturing process of the wiring board 1. As shown in FIGS. 2 to 5, first, for example, a first electrode 103 having a thickness of 18 μm, for example, is formed on a plane of 340 mm in length and width of the first substrate 102, for example, every 10 mm except for a peripheral portion 30 mm on the plane of the first substrate 102. The first conductive part forming substrate 104 is formed in a matrix in the same manner as in the conventional case (first conductive part forming substrate step, FIG. 2). Next, for example, the first adhesive insulating film 10, which is a thermosetting epoxy resin adhesive insulating film that cures at about 150 ° C. at a melt viscosity of 10 5 P and about 180 ° C., is formed on the first conductive portion forming substrate 104. The dielectric film 3 is overlaid on the first bonding insulating film 10 (dielectric film laminating process). The dielectric film 3 has been subjected to a treatment for improving the wettability with the fused insulating film by the corona discharge treatment on the surface until the dielectric film laminating step. The treatment for improving the wettability may be ozone treatment or oxygen plasma treatment (dielectric film treatment step). Further, a second adhesive insulating film 11 which is an adhesive insulating film made of the same material as the first adhesive insulating film 10 is further stacked thereon (second insulating film laminating step). Here, the thickness of the first bonding insulating film 10 is, for example, 10 μm, which is smaller than the thickness of the first electrode 103, and the thickness of the second bonding insulating film 11 is, for example, 5 μm. Further, the thickness of the dielectric film 3 is, for example, 6 μm as described above.
Thereafter, a conductive conductor film 12 made of, for example, 18 μm thick copper foil is overlaid on the second adhesive insulating film 11 (conductor film lamination step) to obtain the state shown in FIG.

その後、これら第1導電部形成基板104、第1接着用絶縁膜10、誘電体膜3、第2接着用絶縁膜11及び導電体膜12を第1導電部形成基板104側と導電体膜12側とから圧着板であるステンレス板で挟んで互いに近づく向きに押圧する。このとき、押圧するとともに、昇温速度6℃/minで、約180℃即ち熱硬化性エポキシ樹脂が硬化する温度まで加熱している(熱圧着工程)。ここで、誘電体膜3の材質は、この熱圧着工程における最高温度でも溶融しない可撓性の材質となっており、例えば接着用絶縁膜が硬化する約180℃でも溶融しないポリフェニレンサルファイドである。これに対して、第1接着用絶縁膜10及び第2接着用絶縁膜の材質は、この熱圧着工程において溶融し硬化する熱硬化性エポキシ樹脂である。従って、熱圧着工程において昇温していくと、第1接着用絶縁膜10及び第2接着用絶縁膜11のみが溶融する。   Thereafter, the first conductive part forming substrate 104, the first bonding insulating film 10, the dielectric film 3, the second bonding insulating film 11 and the conductive film 12 are connected to the first conductive part forming substrate 104 side and the conductive film 12. It is pressed from the side in a direction approaching each other with a stainless steel plate as a crimping plate. At this time, it is pressed and heated to a temperature of about 180 ° C., that is, a temperature at which the thermosetting epoxy resin is cured at a temperature rising rate of 6 ° C./min (thermocompression bonding step). Here, the material of the dielectric film 3 is a flexible material that does not melt even at the highest temperature in the thermocompression bonding process, and is, for example, polyphenylene sulfide that does not melt even at about 180 ° C. where the adhesive insulating film is cured. On the other hand, the material of the first bonding insulating film 10 and the second bonding insulating film is a thermosetting epoxy resin that melts and cures in this thermocompression bonding step. Therefore, when the temperature is increased in the thermocompression bonding process, only the first bonding insulating film 10 and the second bonding insulating film 11 are melted.

また、第1電極103は、第1基板102にその厚さの分だけ突出して形成されているので、ステンレス板の挟み付ける押圧力は第1電極103と導電体膜12との間に存在する第1接着用絶縁膜10、誘電体膜3及び第2接着用絶縁膜11に直接働く。このことから、第1接着用絶縁膜10及び第2接着用絶縁膜11は、昇温により溶融するとこの押圧力により第1電極103と導電体膜12との間から押し出される。このとき、第1接着用絶縁膜10は凹部5に流れ込み、第2接着用絶縁膜11は押し出される圧力により誘電体膜3が撓んで形成された空間に流れ込む。そして、約180℃まで昇温されて硬化し、第1接着用絶縁膜10は第1接着絶縁部4aとして形成され、第2接着用絶縁膜11は第2接着絶縁部4bとして形成される。この流れ込むスペースを確保するために、第1接着用絶縁膜10と第2接着用絶縁膜11との厚さの合計が第1電極103の厚さ、即ち凹部5の深さよりも小さくなるようにしている。即ち、第1接着用絶縁膜10及び第2接着用絶縁膜11が第1電極103と導電体膜12との間からそれぞれ凹部5に流れ込み、誘電体膜3を撓ませて形成された空間に流れ込むことで増加する厚さの分だけ第1接着用絶縁膜10及び第2接着用絶縁膜11の厚さの合計が第1電極103の厚さより小さくなっている。従って、第1電極103の第1基板102の平面に占める面積率が大きいと第1接着用絶縁膜10及び第2接着用絶縁膜11の厚さの合計は第1電極103の厚さに比べて大きく差をつける必要があり、逆に面積率が小さいとその差を小さくする必要がある。また、第2接着用絶縁膜11は、その厚さが大きいほど誘電体膜3を大きく撓ませることとなり、誘電体膜3に負担をかけて寿命等に影響を及ぼす可能性があるので、誘電体膜3を大きく撓ませない適切な厚さとする。導電体膜12この第1接着用絶縁膜10及び第2接着用絶縁膜11は、第1電極103と導電体膜12との間からすべて押し出されるわけではなく、接着のために必要な極めて薄い層だけは残っている。   Further, since the first electrode 103 is formed on the first substrate 102 so as to protrude by the thickness, the pressing force sandwiched by the stainless steel plate exists between the first electrode 103 and the conductor film 12. It acts directly on the first bonding insulating film 10, the dielectric film 3, and the second bonding insulating film 11. Therefore, when the first bonding insulating film 10 and the second bonding insulating film 11 are melted by the temperature rise, they are pushed out from between the first electrode 103 and the conductor film 12 by this pressing force. At this time, the first bonding insulating film 10 flows into the recess 5, and the second bonding insulating film 11 flows into the space formed by the dielectric film 3 being bent by the pressure to be pushed out. Then, the temperature is raised to about 180 ° C. and cured, and the first adhesive insulating film 10 is formed as the first adhesive insulating portion 4a, and the second adhesive insulating film 11 is formed as the second adhesive insulating portion 4b. In order to secure this space for flowing in, the total thickness of the first adhesive insulating film 10 and the second adhesive insulating film 11 is made smaller than the thickness of the first electrode 103, that is, the depth of the recess 5. ing. That is, the first adhesive insulating film 10 and the second adhesive insulating film 11 flow into the recess 5 from between the first electrode 103 and the conductor film 12, respectively, and are formed in the space formed by bending the dielectric film 3. The sum of the thicknesses of the first adhesive insulating film 10 and the second adhesive insulating film 11 is smaller than the thickness of the first electrode 103 by an amount corresponding to the thickness that increases by flowing. Accordingly, when the area ratio of the first electrode 103 to the plane of the first substrate 102 is large, the total thickness of the first bonding insulating film 10 and the second bonding insulating film 11 is larger than the thickness of the first electrode 103. However, if the area ratio is small, it is necessary to reduce the difference. Further, as the thickness of the second adhesive insulating film 11 is increased, the dielectric film 3 is greatly deflected, and there is a possibility that the dielectric film 3 is burdened and the life and the like are affected. The body film 3 is set to an appropriate thickness that does not greatly bend. Conductive film 12 The first bonding insulating film 10 and the second bonding insulating film 11 are not all extruded from between the first electrode 103 and the conductive film 12, but are extremely thin necessary for bonding. Only the layer remains.

誘電体膜3は、この熱圧着工程においては溶融しないので、第1電極103と導電体膜12との間には厚さを一定に保ったまま電極間部6として残り、溶融した第2接着用絶縁膜11の圧力で撓んで各電極間部6の間で渡り部7として形成され、図4に示す状態となる。   Since the dielectric film 3 is not melted in this thermocompression bonding step, it remains as the inter-electrode portion 6 while keeping the thickness constant between the first electrode 103 and the conductor film 12, and the melted second adhesion The insulating film 11 is bent by the pressure of the insulating film 11 and is formed as a crossing portion 7 between the inter-electrode portions 6 to be in the state shown in FIG.

その後、導電体膜12をエッチング等により第1電極103に対向する箇所に残して第2電極106として形成して(第2導電部形成工程)、図5に示す状態とする。最後に、誘電体膜3の第2電極106側に従来例と同様にして第2基板105を形成して、第2導電部形成基板107を形成し(第2導電部形成基板工程)、図1に示す配線基板1を製造する。   Thereafter, the conductor film 12 is left as a second electrode 106 by etching or the like so as to face the first electrode 103 (second conductive part forming step), and the state shown in FIG. 5 is obtained. Finally, the second substrate 105 is formed on the second electrode 106 side of the dielectric film 3 in the same manner as the conventional example, and the second conductive portion forming substrate 107 is formed (second conductive portion forming substrate step). 1 is manufactured.

従って、上記のような構成の配線基板1を容易に製造することができ、しかも例えば第1電極103と第2電極106との間に異物が混入しても第1電極103と第2電極106とが短絡する可能性も極端に小さくなる。   Therefore, the wiring substrate 1 having the above-described configuration can be easily manufactured. Further, for example, even if foreign matter is mixed between the first electrode 103 and the second electrode 106, the first electrode 103 and the second electrode 106 are used. The possibility of short-circuiting and becomes extremely small.

なお、第1導電部形成基板工程及び導電体膜積層工程において、第1電極103及び導電体膜12は、当然のことながら、銅以外の金属、例えば亜鉛、ニッケル、金、銀、アルミニウムあるいはそれらの合金、又はポリチオフェンに代表される導電性高分子等、導電性があれば何でも構わない。また、第1電極103及び導電体膜12の形成方法も、気相法あるいは導電性のペーストを塗布して焼成する方法等、どのような方法でも構わない。   In the first conductive part forming substrate process and the conductor film stacking process, the first electrode 103 and the conductor film 12 are naturally made of a metal other than copper, such as zinc, nickel, gold, silver, aluminum, or the like. Any material may be used as long as it has conductivity, such as an alloy of the above, or a conductive polymer represented by polythiophene. The first electrode 103 and the conductor film 12 may be formed by any method such as a vapor phase method or a method of applying and baking a conductive paste.

また、誘電体膜3の材質は、ポリフェニレンサルファイドである必要はなく、熱圧着工程において溶融、分解しないものであればよいので、ポリフェニルスルホン、ポリイミド、ポリエーテルイミド、ポリフェニルオキサイド、ポリアミド、ポリカーボネート、ポリエステル、ポリ塩化ビニル、ポリシラン、ポリエチルエーテルケトン、アセテート、ポリプロピレン等であっても構わない。
さらに、誘電体膜3は、熱圧着工程における温度でヤング率が低くなると押圧力により変形しやすくなって直接電極間距離のばらつきに影響することから、誘電体膜3は、熱圧着工程における温度でもこの押圧力で容易に厚さが変化しない程度のヤング率、例えば1GPa以上を確保できるものであることが望ましい。
The material of the dielectric film 3 does not need to be polyphenylene sulfide, and may be any material that does not melt or decompose in the thermocompression bonding process. Therefore, polyphenylsulfone, polyimide, polyetherimide, polyphenyl oxide, polyamide, polycarbonate Polyester, polyvinyl chloride, polysilane, polyethyl ether ketone, acetate, polypropylene and the like may be used.
Furthermore, since the dielectric film 3 is easily deformed by the pressing force when the Young's modulus becomes low at the temperature in the thermocompression bonding process and directly affects the variation in the distance between the electrodes, the dielectric film 3 has a temperature in the thermocompression bonding process. However, it is desirable that the Young's modulus, such as 1 GPa or more, that does not easily change the thickness by this pressing force can be secured.

また、誘電体膜3は、上記のポリフェニレンサルファイド等の母材内にこの母材よりも誘電率の高い例えばチタン酸バリウム等の粉末が例えば母材に対して20%練り込まれて構成されていると、完成した配線基板1の誘電部2の誘電率がさらに高くなり内部コンデンサの容量を大きくできる。また、誘電体膜3にこのような粉末を混入する比率を変化させて、内部コンデンサの容量密度の大きさを調整することもできる。なお、練り込まれる粉末は、チタン酸バリウムに限定されず、ペロブスカイト構造の無機結晶等であっても構わない。   In addition, the dielectric film 3 is configured by mixing, for example, 20% of a powder such as barium titanate having a dielectric constant higher than that of the base material such as polyphenylene sulfide into the base material. If so, the dielectric constant of the dielectric portion 2 of the completed wiring board 1 is further increased, and the capacity of the internal capacitor can be increased. In addition, it is possible to adjust the size of the capacitance density of the internal capacitor by changing the mixing ratio of such powder into the dielectric film 3. The powder to be kneaded is not limited to barium titanate, and may be an inorganic crystal having a perovskite structure.

また、第1基板102は、ガラスエポキシ基材に限定する必要はなく、ガラスビスマレイミドトリアジン、ガラスポリフェニレンオキサイド、ポリイミド、紙フェノール、アルミナ等であっても構わない。   The first substrate 102 need not be limited to a glass epoxy base material, and may be glass bismaleimide triazine, glass polyphenylene oxide, polyimide, paper phenol, alumina, or the like.

また、第2導電部形成工程において、第1電極103と第2電極106とが互いに対向している部分でしか内部コンデンサとしての機能を果たさないことから、各第1電極103間の凹部5に対向する導電体膜12は、そのまま残しても除去してもどちらでも構わない。   In the second conductive portion forming step, the first electrode 103 and the second electrode 106 function as an internal capacitor only in a portion where the first electrode 103 and the second electrode 106 face each other. The opposing conductor film 12 may be left as it is or removed.

また、熱圧着工程において、第1接着用絶縁膜10及び第2接着用絶縁膜11が溶融して第1導電部形成基板104、誘電体膜3及び導電体膜12が圧着されればよいので、真空熱プレスあるいはラミネータ等のどのような方法を用いても構わない。   In the thermocompression bonding process, the first bonding insulating film 10 and the second bonding insulating film 11 may be melted and the first conductive portion forming substrate 104, the dielectric film 3, and the conductive film 12 may be pressure bonded. Any method such as a vacuum heat press or a laminator may be used.

また、各工程の順番は、配線基板1が形成できるのであれば、どのように入れ替えてもよく、例えば誘電体膜積層工程及び第2絶縁膜積層工程の後に第1絶縁膜積層工程を行ってもよい。   The order of each process may be changed as long as the wiring substrate 1 can be formed. For example, the first insulating film stacking process is performed after the dielectric film stacking process and the second insulating film stacking process. Also good.

この実施の形態における配線基板1の内部コンデンサは、1kHzにおける容量密度が平均値で理論値に近い4.3pF/mmで、この容量密度の標準偏差が0.2pF/mmであった。比較例として、従来例の方法で誘電性シート109を溶融して誘電部108が形成された配線基板101は、784個の第1電極103のうち21個が第2電極106と短絡してコンデンサとしての機能を果たさず、残りの内部コンデンサの1kHzにおける容量密度が平均値で4.0pF/mmで、この容量密度の標準偏差が2.3pF/mmであった。従って、配線基板1は、内部コンデンサを確実に形成し、その容量値も従来例よりも所望の値により近づけることができることが確認された。また、配線基板1は、内部コンデンサの容量密度のばらつきも従来例よりも小さいことが確認された。 The internal capacitor of the wiring board 1 in this embodiment had an average capacitance density at 1 kHz of 4.3 pF / mm 2 close to the theoretical value, and the standard deviation of this capacitance density was 0.2 pF / mm 2 . As a comparative example, the wiring board 101 in which the dielectric portion 109 is formed by melting the dielectric sheet 109 by the method of the conventional example, 21 of the 784 first electrodes 103 are short-circuited to the second electrode 106 and the capacitor The capacity density at 1 kHz of the remaining internal capacitors was 4.0 pF / mm 2 on average, and the standard deviation of this capacity density was 2.3 pF / mm 2 . Therefore, it was confirmed that the wiring board 1 can reliably form the internal capacitor, and its capacitance value can be closer to a desired value than the conventional example. Moreover, it was confirmed that the wiring board 1 has a smaller variation in the capacitance density of the internal capacitor than in the conventional example.

また、この実施の形態1での配線基板1をそれぞれ雰囲気温度30℃、相対湿度70%の環境下に500時間あるいは1000時間放置した。その後、はんだ付け状態を仮想して280℃のはんだ浴槽に10秒間浸し、絶縁膜が溶融して形成された接着絶縁部4が配線基板1に及ぼす影響を調べた。比較例として、構成は実施の形態1の配線基板1と同様であるが、誘電体膜3の表面処理がなされていない配線基板を用いた。
その結果、500時間の放置ではどちらの配線基板も剥離箇所は見つからなかったが、1000時間の放置では、実施の形態1の配線基板1、即ち誘電体膜3に表面処理を行った配線基板1はどの箇所にも剥離は発生しなかったが、比較例の放線基板は誘電体膜3と接着絶縁部4との間に剥離が発生していた。従って、誘電体膜処理工程において、コロナ放電処理、オゾン処理あるいは酸素プラズマ処理等の表面処理をすることにより、誘電体膜3と接着絶縁部4との密着力が向上することが確認され、完成した配線基板の信頼性が向上することが確認された。
In addition, the wiring substrate 1 in the first embodiment was left in an environment of an ambient temperature of 30 ° C. and a relative humidity of 70% for 500 hours or 1000 hours, respectively. Then, assuming the soldering state, it was immersed in a solder bath at 280 ° C. for 10 seconds, and the influence of the adhesive insulating portion 4 formed by melting the insulating film on the wiring board 1 was examined. As a comparative example, the configuration is the same as that of the wiring substrate 1 of the first embodiment, but a wiring substrate in which the surface treatment of the dielectric film 3 is not performed is used.
As a result, no peeling site was found on either wiring board when left for 500 hours, but when left for 1000 hours, wiring board 1 of the first embodiment, that is, wiring board 1 obtained by subjecting dielectric film 3 to surface treatment. No peeling occurred at any location, but peeling occurred between the dielectric film 3 and the adhesive insulating portion 4 in the comparative board. Accordingly, in the dielectric film processing step, it is confirmed that the adhesion between the dielectric film 3 and the adhesive insulating portion 4 is improved by performing surface treatment such as corona discharge treatment, ozone treatment or oxygen plasma treatment. It was confirmed that the reliability of the printed wiring board was improved.

実施の形態2.
図6は、この発明の実施の形態2に係る配線基板の構成を示す断面図である。図6において、配線基板21は、第1導電部形成基板104及び第2導電部形成基板107の間に介在した誘電部22を備えている。誘電部22は、第1導電部形成基板104及び第2導電部形成基板107の間に介在した誘電体膜23と、この誘電体膜23及び第1導電部形成基板104の間にのみ存在する接着絶縁部24とから構成されている。接着絶縁部24は、実施の形態1の接着絶縁部4と同一材質である。また、接着絶縁部24は、誘電体膜23と凹部5との間に形成された空間を満たすとともに、電極間距離に影響を与えない程度に第1電極103と誘電体膜23との間に薄く介在して、誘電体膜23を第1導電部形成基板104に接着している。即ち、配線基板21は、誘電部22が実施の形態1における配線基板1の第2接着絶縁部4bが存在しない構成となっているものである。また、誘電体膜23は、接着絶縁部24側の表面に例えばコロナ放電処理がなされ、第2電極106側の表面に例えば同様にコロナ放電処理がなされている。
他の構成は実施の形態1と同様である。
Embodiment 2. FIG.
FIG. 6 is a cross-sectional view showing a configuration of a wiring board according to Embodiment 2 of the present invention. In FIG. 6, the wiring substrate 21 includes a dielectric portion 22 interposed between the first conductive portion forming substrate 104 and the second conductive portion forming substrate 107. The dielectric part 22 exists only between the dielectric film 23 interposed between the first conductive part formation substrate 104 and the second conductive part formation substrate 107 and between the dielectric film 23 and the first conductive part formation substrate 104. It is comprised from the adhesive insulation part 24. FIG. The adhesive insulating part 24 is made of the same material as the adhesive insulating part 4 of the first embodiment. In addition, the adhesive insulating portion 24 fills the space formed between the dielectric film 23 and the recess 5, and between the first electrode 103 and the dielectric film 23 to the extent that the distance between the electrodes is not affected. The dielectric film 23 is bonded to the first conductive portion forming substrate 104 with a thin interposition. That is, the wiring board 21 is configured such that the dielectric portion 22 does not include the second adhesive insulating portion 4b of the wiring board 1 in the first embodiment. In addition, the dielectric film 23 is subjected to, for example, corona discharge treatment on the surface on the adhesive insulating portion 24 side, and similarly subjected to, for example, corona discharge treatment on the surface on the second electrode 106 side.
Other configurations are the same as those in the first embodiment.

このような構成の配線基板21は、実施の形態1と同様の効果を奏するとともに、誘電体膜23の撓みが無くなるので、誘電体膜23の撓みによる負担が小さくなり寿命等が長くなる。   The wiring board 21 having such a configuration has the same effects as those of the first embodiment, and since the dielectric film 23 is not bent, the burden due to the bending of the dielectric film 23 is reduced, and the life and the like are increased.

また、誘電体膜23の表面に例えばコロナ放電処理がなされているので、誘電体膜23と接着絶縁部24との密着力、及び誘電体膜23と第2電極106との密着力が向上し、配線基板21の信頼性が向上する。   In addition, since the surface of the dielectric film 23 is subjected to, for example, corona discharge treatment, the adhesion between the dielectric film 23 and the adhesive insulating portion 24 and the adhesion between the dielectric film 23 and the second electrode 106 are improved. The reliability of the wiring board 21 is improved.

次に、このような配線基板21の製造方法について説明する。まず、実施の形態1と同様にして、第1導電部形成基板工程及び第1絶縁膜積層工程を経て、第1導電部形成基板104に第1接着用絶縁膜10と同様の接着用絶縁膜を重ねた状態とする。この接着用絶縁膜の厚さは、後の熱圧着工程において凹部5に流れ込む分だけ第1電極103の厚さよりも小さくなっている。一方、あらかじめ誘電体膜3と同様の材質である例えば厚さ6μmの誘電体膜23の両表面に例えばコロナ放電処理をし(誘電体膜処理工程)、その一方の面に図3における導電体膜12と同様の厚さ18μmの導電体膜を蒸着により形成しておく。このとき、導電体膜の厚さの調整等のため蒸着後に電気メッキにより導電体膜を形成してもよい(導電体膜積層工程)。この導電体膜を積層した誘電体膜23を上記の第1導電部形成基板104に重ねられた接着用絶縁膜に他方の面を向けて重ねて(誘電体膜積層工程)、実施の形態1と同様の熱圧着工程において、接着用絶縁膜が第1電極103と導電体膜との間から押し出されて接着絶縁部24として形成され、この接着絶縁部24及び誘電体膜23により誘電部22が形成される。
その後、実施の形態1と同様に、第2導電部形成工程及び第2導電部形成基板工程を経て、配線基板21が製造される。
Next, a method for manufacturing such a wiring board 21 will be described. First, in the same manner as in the first embodiment, an adhesive insulating film similar to the first adhesive insulating film 10 is formed on the first conductive part forming substrate 104 through the first conductive part forming substrate step and the first insulating film laminating step. Are overlaid. The thickness of the bonding insulating film is smaller than the thickness of the first electrode 103 by the amount that flows into the recess 5 in the subsequent thermocompression bonding step. On the other hand, for example, corona discharge treatment is performed on both surfaces of a dielectric film 23 having a thickness of 6 μm, for example, which is the same material as that of the dielectric film 3 (dielectric film processing step), and the conductor shown in FIG. A conductor film having a thickness of 18 μm similar to that of the film 12 is formed by vapor deposition. At this time, the conductor film may be formed by electroplating after vapor deposition in order to adjust the thickness of the conductor film (conductor film lamination step). The dielectric film 23 obtained by laminating this conductive film is superposed on the adhesive insulating film superposed on the first conductive portion forming substrate 104 with the other surface facing (dielectric film laminating step), and the first embodiment In the same thermocompression bonding step, an adhesive insulating film is extruded from between the first electrode 103 and the conductor film to form an adhesive insulating portion 24, and the dielectric insulating portion 24 and the dielectric film 23 form the dielectric portion 22. Is formed.
Thereafter, similarly to the first embodiment, the wiring substrate 21 is manufactured through the second conductive portion forming step and the second conductive portion forming substrate step.

なお、誘電体膜処理工程においては、誘電体膜23の両表面にコロナ放電処理を行っているが、実施の形態1と同様にオゾン処理あるいは酸素プラズマ処理であってもよく、また、一方の面と他方の面とが異なる表面処理であっても構わない。例えば、一方の面にコロナ放電処理を行い、他方の面にオゾン処理を行っても構わない。   In the dielectric film treatment process, both surfaces of the dielectric film 23 are subjected to corona discharge treatment, but may be ozone treatment or oxygen plasma treatment as in the first embodiment. The surface treatment may be different from the other surface. For example, corona discharge treatment may be performed on one surface and ozone treatment may be performed on the other surface.

また、導電体膜積層工程において、導電体膜は、銅以外にも例えばニッケル、亜鉛あるいはクロムによる蒸着により形成されていてもよく、溶媒に溶かしたポリチオフェンに代表される導電性ポリマーあるいは導電性ペーストの印刷により形成されたものであってもよい。この導電体膜の材質は、第2導電部形成工程においてエッチングしやすい材質、例えば銅、ニッケルあるいは亜鉛等を主成分とする材質であることが望ましい。   In the conductor film laminating step, the conductor film may be formed by vapor deposition using nickel, zinc or chromium other than copper, and a conductive polymer or conductive paste represented by polythiophene dissolved in a solvent. It may be formed by printing. The conductor film is preferably made of a material that is easily etched in the second conductive portion forming step, for example, a material mainly composed of copper, nickel, zinc, or the like.

ここで、誘電体膜処理工程における表面処理によって、誘電体膜23が導電体膜及び接着絶縁部24との密着力が向上していることを確認するために、実施の形態1と同様にして配線基板21をそれぞれ雰囲気温度30℃、相対湿度70%の環境下に500時間あるいは1000時間放置し、はんだ付け状態を仮想して280℃のはんだ浴槽に10秒間浸すことにより配線基板21内の剥離状態を調べた。
その結果、この配線基板21は、500時間及び1000時間のどちらの放置でも、どの箇所にも剥離は発生しなかった。従って、誘電体膜処理工程において、コロナ放電処理、オゾン処理あるいは酸素プラズマ処理等の表面処理をすることにより、誘電体膜23と接着絶縁部24との密着力だけでなく、誘電体膜23と導電体膜との密着力も向上することが確認され、配線基板21の信頼性が向上していることが確認された。
Here, in order to confirm that the adhesion between the dielectric film 23 and the conductive film and the adhesive insulating portion 24 is improved by the surface treatment in the dielectric film processing step, the same as in the first embodiment. The wiring substrate 21 is left for 500 hours or 1000 hours in an environment of an ambient temperature of 30 ° C. and a relative humidity of 70%, respectively, and the soldering state is virtually immersed in a solder bath at 280 ° C. for 10 seconds to peel off the wiring substrate 21. I checked the condition.
As a result, the wiring substrate 21 was not peeled off at any position when left for 500 hours or 1000 hours. Therefore, in the dielectric film processing step, by performing surface treatment such as corona discharge treatment, ozone treatment, or oxygen plasma treatment, not only the adhesion between the dielectric film 23 and the adhesive insulating portion 24 but also the dielectric film 23 and It was confirmed that the adhesion with the conductor film was also improved, and it was confirmed that the reliability of the wiring board 21 was improved.

実施の形態3.
図7は、この発明の実施の形態3に係る配線基板の構成を示す断面図、図8は、図7のVIII-VIII線に沿った矢視断面図、図9は、図7のIX-IX線に沿った矢視断面図である。なお、図7は、図8あるいは図9のVII-VII線に沿った矢視断面図となっている。図7乃至図9において、配線基板31は、互いに誘電部2を介して一部が対向する第1導電部である第1導電線32及び第2導電部である第2導電線33を備えている。第1導電線32及び第2導電線33の材質は、実施の形態1の第1電極103及び第2電極106の材質と同一である。この第1導電線32及び第2導電線33は、図8及び図9に示すように、それぞれの内側端部32a及び33aからそれぞれ外側端部32b及び33bに向かって互いに逆周りとなるように渦状に形成されている。また、誘電部2には、第1導電線32の内側端部32aから第2導電線33の内側端部33aに通じる貫通孔34が設けられており、この貫通孔34内、内側端部32a及び内側端部33aに例えば銅メッキされて電気接続部35が形成され、第1導電線32と第2導電線33との電気的接続がなされている。なお、図8及び図9において、第1導電線32及び第2導電線33が誘電部2を介して互いに対向する部分を編み目模様で示している。
他の構成は実施の形態1と同様である。
Embodiment 3 FIG.
7 is a cross-sectional view showing a configuration of a wiring board according to Embodiment 3 of the present invention, FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 7, and FIG. It is arrow sectional drawing along the IX line. 7 is a cross-sectional view taken along the line VII-VII in FIG. 8 or FIG. 7 to 9, the wiring board 31 includes a first conductive line 32 that is a first conductive part and a second conductive line 33 that is a second conductive part, which are partially opposed to each other via the dielectric part 2. Yes. The material of the first conductive line 32 and the second conductive line 33 is the same as the material of the first electrode 103 and the second electrode 106 of the first embodiment. As shown in FIGS. 8 and 9, the first conductive line 32 and the second conductive line 33 are opposite to each other from the inner end portions 32 a and 33 a toward the outer end portions 32 b and 33 b, respectively. It is formed in a spiral. In addition, the dielectric portion 2 is provided with a through hole 34 leading from the inner end portion 32a of the first conductive wire 32 to the inner end portion 33a of the second conductive wire 33, and the inner end portion 32a in the through hole 34. The inner end portion 33 a is, for example, plated with copper to form an electrical connection portion 35, and the first conductive wire 32 and the second conductive wire 33 are electrically connected. 8 and 9, a portion where the first conductive line 32 and the second conductive line 33 face each other with the dielectric portion 2 interposed therebetween is shown by a stitch pattern.
Other configurations are the same as those in the first embodiment.

このような構成の配線基板31は、実施の形態1と同様の効果を奏するとともに、内部で第1導電線32及び第2導電線33が巻き方向が同一となるように電気接続部35により電気的に接続されているので、第1導電線32、第2導電線33及び電気接続部35によりスパイラルインダクタを内部に形成することができ、その分だけ配線基板31上のインダクタ配置スペースを削減することができる。また、第1導電線32と第2導電線33との間隔が誘電体膜3の厚さで決定されることから、配線基板31内のどの箇所でも内部インダクタのインダクタンスが大きく異なるようなことは抑制できる。   The wiring board 31 having such a configuration has the same effect as that of the first embodiment, and is electrically connected by the electric connecting portion 35 so that the first conductive wire 32 and the second conductive wire 33 have the same winding direction inside. Therefore, the spiral inductor can be formed inside by the first conductive line 32, the second conductive line 33, and the electrical connecting portion 35, and the inductor arrangement space on the wiring board 31 is reduced accordingly. be able to. In addition, since the distance between the first conductive line 32 and the second conductive line 33 is determined by the thickness of the dielectric film 3, the inductance of the internal inductor is greatly different everywhere in the wiring board 31. Can be suppressed.

次に、このような配線基板31の製造方法について説明する。この配線基板31の製造方法は、第2導電部形成基板工程の手前までほぼ実施の形態1と同様であるが、第1導電部形成基板工程において第1導電部を第1電極103ではなく第1導電線32として形成し、第2導電部形成工程においてエッチング等により第2導電部を第2電極106ではなく第2導電線33として形成しているところが実施の形態1と異なる。このようにして、実施の形態1とほぼ同様の製造工程を辿って第2導電部形成基板工程の手前の図10に示すような状態とする。その後、誘電部2の第2導電線33側から第1導電線32に向けて、即ち矢印40の向きに例えば炭酸ガスレーザーを照射し、誘電部2に貫通孔34を形成する。このとき、炭酸ガスレーザーは、第2導電線33の内側端部33aを接するとともに誘電部2を介して第1導電線32の内側端部32aに当たるような経路で照射される(貫通孔形成工程)。それから、貫通孔形成工程において形成された貫通孔34内、内側端部32a及び内側端部33aに化学銅メッキを行って電気接続部35を形成し、第1導電線32と第2導電線33との電気的接続を行う(電気的接続工程)。
その後、実施の形態1と同様の第2導電部形成基板工程を経て、配線基板31が完成する。
Next, a method for manufacturing such a wiring board 31 will be described. The manufacturing method of this wiring substrate 31 is almost the same as that of the first embodiment until the second conductive portion forming substrate step, but the first conductive portion is not the first electrode 103 but the first conductive portion forming step in the first conductive portion forming substrate step. The first conductive line 32 is different from the first embodiment in that the second conductive part is formed as the second conductive line 33 instead of the second electrode 106 by etching or the like in the second conductive part forming step. In this manner, the manufacturing process substantially similar to that of the first embodiment is followed to obtain a state as shown in FIG. 10 before the second conductive portion forming substrate process. Thereafter, for example, a carbon dioxide laser is irradiated from the second conductive line 33 side of the dielectric part 2 toward the first conductive line 32, that is, in the direction of the arrow 40, thereby forming the through hole 34 in the dielectric part 2. At this time, the carbon dioxide laser is irradiated through a path that contacts the inner end portion 33a of the second conductive wire 33 and hits the inner end portion 32a of the first conductive wire 32 via the dielectric portion 2 (through hole forming step). ). Then, the electrical connection portion 35 is formed by performing chemical copper plating on the inner end portion 32a and the inner end portion 33a in the through hole 34 formed in the through hole forming step, and the first conductive line 32 and the second conductive line 33 are formed. Is electrically connected (electrical connection step).
Thereafter, the wiring substrate 31 is completed through the second conductive portion formation substrate step similar to that of the first embodiment.

この実施の形態における配線基板31の内部インダクタは、1kHzにおけるインダクタンスが平均値で6.3nHであり、このインダクタンスの標準偏差が0.17nHであった。比較例として、従来例の方法で誘電性シート109を溶融して誘電部108が形成されていることを除き、この実施の形態3と同様にして製造された配線基板を用いたところ、その内部インダクタは1kHzにおけるインダクタンスが平均値で2.1nHで、このインダクタンスの標準偏差が1.9nHであった。従って、配線基板31は、内部コンデンサと同様に内部インダクタも従来例に比べて確実に形成され、そのインダクタンスのばらつきも比較例に比べて小さいことが確認された。   The internal inductor of the wiring board 31 in this embodiment has an average inductance at 1 kHz of 6.3 nH, and the standard deviation of this inductance is 0.17 nH. As a comparative example, when a wiring board manufactured in the same manner as in the third embodiment is used except that the dielectric portion 108 is formed by melting the dielectric sheet 109 by the conventional method, The inductor had an average inductance of 2.1 nH at 1 kHz, and the standard deviation of the inductance was 1.9 nH. Therefore, it was confirmed that the wiring board 31 was formed more reliably than the conventional example, as was the case with the internal capacitor, and that the variation in inductance was smaller than that of the comparative example.

なお、貫通孔形成工程において、貫通孔34の形成は炭酸ガスレーザーに限定する必要はなく、貫通孔34が形成できればよいので、例えばエキシマレーザー、YAGレーザーあるいはドリル等によっても構わない。   In the through hole forming step, the formation of the through hole 34 is not limited to the carbon dioxide laser, and it is sufficient that the through hole 34 can be formed. For example, an excimer laser, a YAG laser, or a drill may be used.

また、電気的接続工程において、電気接続部35の形成は貫通孔34内に化学銅メッキをすることに限定することはなく、例えば上記のような導電性ポリマー等を貫通孔34内に充填してもよいし、亜鉛、ニッケル等のメッキでも構わない。また、化学メッキ後、電気メッキを行ってメッキ層の厚さを増加させても構わない。   In the electrical connection step, the formation of the electrical connection portion 35 is not limited to chemical copper plating in the through hole 34. For example, the conductive polymer as described above is filled in the through hole 34. Alternatively, plating with zinc, nickel or the like may be used. Further, after chemical plating, electroplating may be performed to increase the thickness of the plating layer.

また、誘電体膜3は、実施の形態1と同様なポリフェニレンサルファイド等の母材にこの母材よりも透磁率の高い例えばNi−Zn系フェライトの粉末が母材に対して例えば20%練り込まれて構成されていると、さらに誘電部2の透磁率が高くなり内部インダクタのインダクタンスが大きくなる。また、この粉末を誘電部2内で第1導電線32及び第2導電線33に近づけて配置することにより、さらに内部インダクタのインダクタンスを大きくすることができる。さらに、このような透磁率の高い材質の粉末を誘電体膜3に混入する比率あるいは配置位置を変化させて、内部インダクタのインダクタンスの大きさを調整することもできる。なお、練り込まれる粉末はNi−Zn系フェライトに限定されず、パーマロイ、Mn−Zn系フェライトあるいはカルボニル鉄等であっても構わない。   The dielectric film 3 is made of, for example, a Ni-Zn ferrite powder having a higher magnetic permeability than that of a base material such as polyphenylene sulfide as in the first embodiment, for example, 20% into the base material. If it is rarely configured, the permeability of the dielectric portion 2 is further increased, and the inductance of the internal inductor is increased. Further, by arranging this powder close to the first conductive line 32 and the second conductive line 33 in the dielectric portion 2, the inductance of the internal inductor can be further increased. Further, the inductance of the internal inductor can be adjusted by changing the ratio or arrangement position of the powder of the material having high magnetic permeability mixed in the dielectric film 3. The powder to be kneaded is not limited to Ni—Zn ferrite, but may be permalloy, Mn—Zn ferrite, carbonyl iron or the like.

ここで、貫通孔形成工程における貫通孔34形成のメカニズムを説明する。炭酸ガスレーザー等が誘電部2に照射されると、そのエネルギは一部が誘電部2に吸収されるがその大半が誘電部2を透過して第1導電線32の内側端部32aにまで到達する。内側端部32aは、この到達した炭酸ガスレーザーのエネルギを吸収することにより温度が上昇する。この温度上昇により内側端部32aに密着している誘電部2が溶融、気化して貫通孔34が形成される。従って、貫通孔34は、内側端部32aの温度上昇速度が大きければそれだけ速く形成される。このことから、内側端部32aが炭酸ガスレーザーのエネルギを効率良く吸収できれば、貫通孔34を速く形成することができる。   Here, the mechanism of forming the through hole 34 in the through hole forming step will be described. When a carbon dioxide laser or the like is applied to the dielectric part 2, a part of the energy is absorbed by the dielectric part 2, but most of the energy passes through the dielectric part 2 and reaches the inner end part 32 a of the first conductive line 32. To reach. The inner end portion 32a rises in temperature by absorbing the energy of the reached carbon dioxide laser. Due to this temperature rise, the dielectric portion 2 in close contact with the inner end portion 32a is melted and vaporized to form the through hole 34. Therefore, the through hole 34 is formed faster as the temperature increase rate of the inner end portion 32a is larger. Therefore, if the inner end portion 32a can efficiently absorb the energy of the carbon dioxide laser, the through hole 34 can be formed quickly.

そこで、第1導電部形成基板工程の後に第1導電線32の表面に炭酸ガスレーザー等のエネルギを効率良く吸収させるようにする処理、例えば無水酢酸等の有機酸に第1導電線32の表面を浸漬する有機酸処理を行う(第1導電部処理工程)ことにより、第1導電線32の表面の反射率が低下し、炭酸ガスレーザーのエネルギの吸収率を良くすることができる。なお、例えば水酸化ナトリウム水溶液あるいは水酸化カリウム水溶液に第1導電線32の表面を浸漬するアルカリ処理を行っても同様に第1導電線32の表面の反射率を低下させることができる。実際に有機酸処理及びアルカリ処理のどちらの処理によっても、第1導電線32の表面の炭酸ガスレーザーに対する反射率は、20%以下とすることができた。   Therefore, after the first conductive part forming substrate step, the surface of the first conductive line 32 is treated with an organic acid such as acetic anhydride, for example, so that the surface of the first conductive line 32 efficiently absorbs energy such as a carbon dioxide laser. By performing the organic acid treatment soaking the substrate (first conductive part treatment step), the reflectance of the surface of the first conductive wire 32 is lowered, and the energy absorption rate of the carbon dioxide laser can be improved. For example, the reflectance of the surface of the first conductive wire 32 can be similarly lowered by performing an alkali treatment in which the surface of the first conductive wire 32 is immersed in a sodium hydroxide aqueous solution or a potassium hydroxide aqueous solution. Actually, the reflectance of the surface of the first conductive wire 32 with respect to the carbon dioxide laser can be reduced to 20% or less by both the organic acid treatment and the alkali treatment.

実際には、炭酸ガスレーザーのパルスを誘電部2に当てて貫通孔34を形成していることから、全く表面処理を行っていない第1導電線32を用いたものと、表面に有機酸処理あるいはアルカリ処理を行った第1導電線32を用いたものとで、貫通孔34が形成されるまでのパルスの回数を調べて貫通孔34の形成速度を比較した。その結果、全く表面処理が行われていない第1導電線32を用いたものでは、貫通孔34が形成されるまでのパルスの回数が7回であったのに対して、表面に有機酸処理あるいはアルカリ処理を行った第1導電線32を用いたものでは、1回で貫通孔34が形成された。
このことから、配線基板31の製造工程中に第1導電部処理工程が挿入されることにより、誘電部2に貫通孔34を容易に形成することができ、配線基板31の製造時間も短くなる。また、炭酸ガスレーザーを発生するレーザー加工機の負担も小さくなり、この加工機の寿命も長くなる。
Actually, since the through hole 34 is formed by applying the pulse of the carbon dioxide laser to the dielectric portion 2, the surface using the first conductive wire 32 that has not been subjected to any surface treatment and the organic acid treatment on the surface are used. Alternatively, the formation speed of the through hole 34 was compared by examining the number of pulses until the through hole 34 was formed using the first conductive wire 32 subjected to the alkali treatment. As a result, in the case of using the first conductive wire 32 that has not been subjected to surface treatment at all, the number of pulses until the through-hole 34 is formed is seven, whereas the surface is treated with organic acid. Or in the thing using the 1st conductive wire 32 which performed the alkali treatment, the through-hole 34 was formed at once.
Therefore, by inserting the first conductive portion processing step during the manufacturing process of the wiring substrate 31, the through hole 34 can be easily formed in the dielectric portion 2, and the manufacturing time of the wiring substrate 31 is shortened. . In addition, the burden on the laser processing machine that generates the carbon dioxide laser is reduced, and the life of the processing machine is extended.

なお、当然のことながら、有機酸処理あるいはアルカリ処理は、エキシマレーザーあるいはYAGレーザー等に対する反射率も効率的に低下させることができる。また、第1導電線32の表面処理は、貫通孔34を形成するために照射されるレーザーに対する反射率を低下させる処理であればよいので、有機酸処理あるいはアルカリ処理に限ることなく、例えばカーボンフィラーを混ぜたインクを第1導電線32の表面に塗布する処理をしても構わない。   As a matter of course, the organic acid treatment or alkali treatment can also efficiently reduce the reflectivity with respect to an excimer laser, a YAG laser, or the like. Further, the surface treatment of the first conductive wire 32 may be any treatment that lowers the reflectivity with respect to the laser irradiated to form the through-hole 34, and is not limited to organic acid treatment or alkali treatment. You may perform the process which apply | coats the ink which mixed the filler on the surface of the 1st conductive wire 32. FIG.

なお、この実施の形態3においては、第2接着絶縁部4bを有している実施の形態1の配線基板1の製造方法を基本として内部インダクタを有した配線基板31が製造されているが、当然のことながら、第2接着絶縁部4bを有していない実施の形態2の配線基板21の製造方法を基本として内部インダクタを有した配線基板を製造しても構わない。   In the third embodiment, the wiring board 31 having the internal inductor is manufactured based on the manufacturing method of the wiring board 1 of the first embodiment having the second adhesive insulating portion 4b. As a matter of course, a wiring board having an internal inductor may be manufactured based on the manufacturing method of the wiring board 21 of the second embodiment that does not have the second adhesive insulating portion 4b.

また、同一層に内部コンデンサ及び内部インダクタを同時に形成された配線基板であっても構わない。この場合、誘電体膜3の母材に透磁率の高い粉末及び誘電率の高い粉末の両方を練り込んでいれば、内部コンデンサが形成された部分では、誘電率の高い粉末により容量密度が大きくなり、内部インダクタが形成された部分では、透磁率の高い粉末によりインダクタンス密度が大きくなる。
このように1つの配線基板内に内部コンデンサ及び内部インダクタが形成されることから、例えば内部インダクタを内部コンデンサに電気的に接続してLCフィルタ及びバイパスコンデンサとして機能する回路を形成することができる。従って、配線基板表面にチップコンデンサあるいはフィルタ素子を配置する必要がなくなり、従来例の配線基板101よりもさらに小型化した配線基板を得ることができる。その結果、携帯電話あるいはデジタルカメラ等の電子機器への適用も容易になる。
Further, it may be a wiring board in which an internal capacitor and an internal inductor are simultaneously formed in the same layer. In this case, if both the high magnetic permeability powder and the high dielectric constant powder are kneaded into the base material of the dielectric film 3, the capacitance density is increased by the high dielectric constant powder in the portion where the internal capacitor is formed. Thus, in the portion where the internal inductor is formed, the inductance density is increased by the powder having high magnetic permeability.
As described above, since the internal capacitor and the internal inductor are formed in one wiring board, for example, a circuit that functions as an LC filter and a bypass capacitor can be formed by electrically connecting the internal inductor to the internal capacitor. Therefore, it is not necessary to dispose a chip capacitor or a filter element on the surface of the wiring board, and a wiring board that is further downsized than the wiring board 101 of the conventional example can be obtained. As a result, application to an electronic device such as a mobile phone or a digital camera becomes easy.

この発明の実施の形態1に係る配線基板の構成を示す断面図である。It is sectional drawing which shows the structure of the wiring board which concerns on Embodiment 1 of this invention. 第1導電部形成基板工程後の状態を示す模式図である。It is a schematic diagram which shows the state after a 1st electroconductive part formation board | substrate process. 第1絶縁膜積層工程、誘電体膜処理工程、誘電体膜積層工程、第2絶縁膜積層工程、及び導電体膜積層工程後の状態を示す模式図である。It is a schematic diagram which shows the state after a 1st insulating film lamination process, a dielectric film processing process, a dielectric film lamination process, a 2nd insulating film lamination process, and a conductor film lamination process. 熱圧着工程後の状態を示す模式図である。It is a schematic diagram which shows the state after a thermocompression bonding process. 第2導電部形成工程後の状態を示す模式図である。It is a schematic diagram which shows the state after a 2nd electroconductive part formation process. この発明の実施の形態2に係る配線基板の構成を示す断面図である。It is sectional drawing which shows the structure of the wiring board which concerns on Embodiment 2 of this invention. この発明の実施の形態3に係る配線基板の構成を示す断面図である。It is sectional drawing which shows the structure of the wiring board which concerns on Embodiment 3 of this invention. 図7のVIII-VIII線に沿った矢視断面図である。FIG. 8 is a cross-sectional view taken along the line VIII-VIII in FIG. 7. 図7のIX-IX線に沿った矢視断面図である。It is arrow sectional drawing along the IX-IX line of FIG. 貫通孔形成工程の前の状態を示す模式図である。It is a schematic diagram which shows the state before a through-hole formation process. 従来の配線基板の構成を示す断面図である。It is sectional drawing which shows the structure of the conventional wiring board. 第1導電部形成基板に誘電性シート及び金属箔を重ねた状態を示す模式図である。It is a schematic diagram which shows the state which accumulated the dielectric sheet and metal foil on the 1st electroconductive part formation board | substrate. 図12の状態のものを熱圧着した後の状態を示す模式図である。It is a schematic diagram which shows the state after carrying out the thermocompression bonding of the thing of the state of FIG. 図13の状態の金属箔を第2電極として形成した後の状態を示す模式図である。It is a schematic diagram which shows the state after forming the metal foil of the state of FIG. 13 as a 2nd electrode.

符号の説明Explanation of symbols

1,21,31 配線基板、2,22 誘電部、3,23 誘電体膜、4,24 接着絶縁部、4a 第1接着絶縁部、4b 第2接着絶縁部、10 第1接着用絶縁膜、11 第2接着用絶縁膜、12 導電体膜、32 第1導電線(第1導電部)、33 第2導電線(第2導電部)、34 貫通孔、35 電気接続部、102 第1基板、103 第1電極(第1導電部)、104 第1導電部形成基板、105 第2基板、106 第2電極(第2導電部)、107 第2導電部形成基板。   1,21,31 Wiring substrate, 2,22 Dielectric part, 3,23 Dielectric film, 4,24 Adhesive insulating part, 4a First adhesive insulating part, 4b Second adhesive insulating part, 10 First adhesive insulating film, 11 Second Insulating Film, 12 Conductor Film, 32 First Conductive Line (First Conductive Part), 33 Second Conductive Line (Second Conductive Part), 34 Through-hole, 35 Electrical Connection Part, 102 First Substrate , 103 First electrode (first conductive part), 104 First conductive part forming substrate, 105 Second substrate, 106 Second electrode (second conductive part), 107 Second conductive part forming substrate.

Claims (6)

第1基板、及び前記第1基板の平面上に形成された渦状の第1導電部を有する第1導電部形成基板と、
第2基板、及び前記第2基板に形成された渦状の第2導電部を有し、前記第2導電部を前記第1導電部に対向させて配置された第2導電部形成基板と、
前記第1導電部形成基板及び前記第2導電部形成基板の間に介在した誘電部と
を備え、
熱圧着により少なくとも前記誘電部が形成された配線基板であって、
前記誘電部は、前記熱圧着時に溶融する接着絶縁部と、前記熱圧着時に厚さが保たれる誘電体膜とを有しており、
前記接着絶縁部は、前記誘電体膜の前記第1導電部形成基板側及び前記第2導電部形成基板側のいずれにも設けられ、
前記誘電体膜は、前記第1導電部と前記第2導電部との間に介在する複数の電極間部と、各前記電極間部の間を渡って撓んで設けられた可撓性の渡り部とを有し、
前記第1導電部と、前記第2導電部と、前記誘電部に形成された貫通孔に設けられ、巻き方向が同一となるように前記第1導電部及び前記第2導電部を電気的に接続する電気接続部とから内部インダクタが構成されていることを特徴とする配線基板。
A first conductive part forming substrate having a first substrate and a spiral first conductive part formed on a plane of the first substrate;
A second conductive part forming substrate having a second substrate and a spiral second conductive part formed on the second substrate, the second conductive part being disposed to face the first conductive part;
A dielectric part interposed between the first conductive part forming substrate and the second conductive part forming substrate,
A wiring board on which at least the dielectric part is formed by thermocompression bonding,
The dielectric part has an adhesive insulating part that melts during the thermocompression bonding, and a dielectric film that maintains a thickness during the thermocompression bonding,
The adhesive insulating part is provided on both the first conductive part forming substrate side and the second conductive part forming substrate side of the dielectric film,
The dielectric film includes a plurality of interelectrode portions interposed between the first conductive portion and the second conductive portion, and a flexible crossover provided between each of the interelectrode portions. And
The first conductive portion and the second conductive portion are provided in through holes formed in the first conductive portion, the second conductive portion, and the dielectric portion, and the first conductive portion and the second conductive portion are electrically connected so that the winding directions are the same. An internal inductor is constituted by an electrical connection portion to be connected.
前記貫通孔は、レーザーにより形成されており、
前記第1導電部は、前記誘電部側の面に前記レーザーの反射率を低下させる処理がなされていることを特徴とする請求項1に記載の配線基板。
The through hole is formed by a laser,
The wiring board according to claim 1, wherein the first conductive portion is subjected to a process of reducing the reflectance of the laser on a surface on the dielectric portion side.
前記誘電体膜の表面には、前記溶融した前記接着絶縁部との濡れ性を向上させる処理がなされていることを特徴とする請求項1又は請求項2に記載の配線基板。   The wiring board according to claim 1, wherein the surface of the dielectric film is subjected to a treatment for improving wettability with the melted adhesive insulating portion. 前記誘電体膜は、少なくとも、誘電性の母材と、前記母材内に混入された前記母材よりも透磁率の高い粉末とからなることを特徴とする請求項1乃至請求項3の何れかに記載の配線基板。   4. The dielectric film according to claim 1, wherein the dielectric film includes at least a dielectric base material and a powder having a higher magnetic permeability than the base material mixed in the base material. A wiring board according to the above. 請求項2に記載の配線基板の製造方法であって、
前記第1導電部を前記第1基板上に設けて前記第1導電部形成基板を形成する第1導電部形成基板工程と、
前記第1導電部の表面に前記レーザーの反射率を低下させる処理をする第1導電部処理工程と、
接着用絶縁膜を前記第1導電部形成基板の前記第1導電部側に重ねる第1絶縁膜積層工程と、
前記誘電体膜に前記濡れ性を向上させる処理をする誘電体膜処理工程と、
前記誘電体膜を前記接着用絶縁膜に重ねる誘電体膜積層工程と、
前記誘電体膜積層工程の後に、接着用絶縁膜を前記誘電体膜に重ねる第2絶縁膜積層工程と、
面状の導電体膜を前記第2絶縁膜積層工程において重ねられた前記接着用絶縁膜に設ける導電体膜積層工程と、
前記熱圧着で前記接着用絶縁膜を溶融させるとともに互いに近づく向きに前記第1導電部及び前記導電体膜を押圧する熱圧着工程と、
前記誘電体膜上に前記導電体膜を複数の前記第2導電部として形成する第2導電部形成工程と、
前記第2導電部形成基板工程の前に、前記レーザーを前記第1導電部の表面に向けて照射して前記貫通孔を形成する貫通孔形成工程と、
前記貫通孔を通じて前記第1導電部及び前記第2導電部の間に前記電気接続部を形成して前記第1導電部及び前記第2導電部を電気的に接続する電気的接続工程と、
前記第2導電部を前記第2基板で覆って前記第2導電部形成基板を形成する第2導電部形成基板工程とを備え、
前記熱圧着工程では、前記接着用絶縁膜は、それぞれ前記第1導電部及び前記誘電体膜の間、前記第1導電部に対向する前記導電体膜及び前記誘電体膜の間から前記誘電体膜が撓みつつ押し出されて前記接着絶縁部として形成され、前記誘電体膜及び前記接着誘電部により前記誘電部が形成されるようになっていることを特徴とする配線基板の製造方法。
It is a manufacturing method of the wiring board according to claim 2,
A first conductive portion forming substrate step of forming the first conductive portion forming substrate by providing the first conductive portion on the first substrate;
A first conductive part treatment step for treating the surface of the first conductive part to reduce the reflectance of the laser;
A first insulating film laminating step of overlapping an adhesive insulating film on the first conductive portion side of the first conductive portion forming substrate;
A dielectric film treatment process for treating the dielectric film to improve the wettability;
A dielectric film laminating step of overlapping the dielectric film on the adhesive insulating film;
A second insulating film laminating step of superposing an adhesive insulating film on the dielectric film after the dielectric film laminating step;
A conductor film laminating step of providing a planar conductor film on the adhesive insulating film stacked in the second insulating film laminating step;
A thermocompression bonding step of melting the adhesive insulating film by the thermocompression bonding and pressing the first conductive portion and the conductor film in a direction approaching each other;
A second conductive part forming step of forming the conductive film as the plurality of second conductive parts on the dielectric film;
A through hole forming step of forming the through hole by irradiating the surface of the first conductive portion with the laser before the second conductive portion forming substrate step;
An electrical connection step of electrically connecting the first conductive part and the second conductive part by forming the electrical connection part between the first conductive part and the second conductive part through the through hole;
A second conductive part forming substrate step of covering the second conductive part with the second substrate and forming the second conductive part forming substrate;
In the thermocompression bonding step, the bonding insulating film is formed between the first conductive portion and the dielectric film, and between the conductive film and the dielectric film facing the first conductive portion, respectively. A method of manufacturing a wiring board, wherein a film is extruded while being bent to form the adhesive insulating portion, and the dielectric portion is formed by the dielectric film and the adhesive dielectric portion.
第1基板、及び前記第1基板の平面上に間隔を置いて形成された渦状の第1導電部を有する第1導電部形成基板と、
第2基板、及び前記第2基板に形成された渦状の第2導電部を有し、前記第2導電部を前記第1導電部に対向させて配置された第2導電部形成基板と、
前記第1導電部形成基板及び前記第2導電部形成基板の間に介在するとともに、少なくとも熱圧着により形成され、前記熱圧着時に溶融する接着絶縁部と、前記第1導電部と前記第2導電部との間に介在するとともに、表面に前記溶融した前記接着絶縁部との濡れ性を向上させる処理がなされ、前記熱圧着時に厚さが保たれる誘電体膜とを有する誘電部と
を備え、かつ前記第1導電部と、前記第2導電部と、前記誘電部に形成された貫通孔に設けられ、巻き方向が同一となるように前記第1導電部及び前記第2導電部を電気的に接続する電気接続部とから内部インダクタが構成されている配線基板を製造するための配線基板の製造方法であって、
前記第1導電部を前記第1基板上に設けて前記第1導電部形成基板を形成する第1導電部形成基板工程と、
前記第1導電部の表面に前記レーザーの反射率を低下させる処理をする第1導電部処理工程と、
接着用絶縁膜を前記第1導電部形成基板の前記第1導電部側に重ねる第1絶縁膜積層工程と、
前記誘電体膜の一面に前記濡れ性を向上させる処理をし、他面に前記第2導電部との密着力を向上させる処理をする誘電体膜処理工程と、
前記一面を前記接着用絶縁膜に向けて前記誘電体膜を前記接着用絶縁膜に重ねる誘電体膜積層工程と、
導電体膜を前記誘電体膜の前記他面に設ける導電体膜積層工程と、
前記熱圧着で前記接着用絶縁膜を溶融させるとともに互いに近づく向きに前記第1導電部及び前記導電体膜を押圧する熱圧着工程と、
前記誘電体膜上に前記導電体膜を前記第2導電部として形成する第2導電部形成工程と、
前記第2導電部形成基板工程の前に、前記レーザーを前記第1導電部の表面に向けて照射して前記貫通孔を形成する貫通孔形成工程と、
前記貫通孔を通じて前記第1導電部及び前記第2導電部の間に前記電気接続部を形成して前記第1導電部及び前記第2導電部を電気的に接続する電気的接続工程と、
前記第2導電部を前記第2基板で覆って前記第2導電部形成基板を形成する第2導電部形成基板工程とを備え、
前記熱圧着工程では、前記接着用絶縁膜は前記第1導電部及び前記誘電体膜の間から押し出されて前記接着絶縁部として形成され、前記誘電体膜及び前記接着絶縁部により前記誘電部が形成されるようになっていることを特徴とする配線基板の製造方法。
A first conductive portion forming substrate having a first substrate and a spiral first conductive portion formed on the plane of the first substrate at an interval;
A second conductive part forming substrate having a second substrate and a spiral second conductive part formed on the second substrate, the second conductive part being disposed to face the first conductive part;
An adhesive insulating portion that is interposed between the first conductive portion forming substrate and the second conductive portion forming substrate, is formed by at least thermocompression bonding, and melts during the thermocompression bonding, the first conductive portion, and the second conductive portion. And a dielectric part having a dielectric film that has a surface that is treated to improve wettability with the melted adhesive insulating part and that maintains a thickness during the thermocompression bonding. And the first conductive portion and the second conductive portion are provided in through holes formed in the first conductive portion, the second conductive portion, and the dielectric portion, and the first conductive portion and the second conductive portion are electrically connected so as to have the same winding direction. A wiring board manufacturing method for manufacturing a wiring board in which an internal inductor is configured from an electrical connection portion to be connected electrically,
A first conductive portion forming substrate step of forming the first conductive portion forming substrate by providing the first conductive portion on the first substrate;
A first conductive part treatment step for treating the surface of the first conductive part to reduce the reflectance of the laser;
A first insulating film laminating step of overlapping an adhesive insulating film on the first conductive portion side of the first conductive portion forming substrate;
A dielectric film processing step of performing a process of improving the wettability on one surface of the dielectric film and performing a process of improving adhesion to the second conductive portion on the other surface;
A dielectric film laminating step of superposing the dielectric film on the adhesive insulating film with the one surface facing the adhesive insulating film;
A conductor film laminating step of providing a conductor film on the other surface of the dielectric film;
A thermocompression bonding step of melting the adhesive insulating film by the thermocompression bonding and pressing the first conductive portion and the conductor film in a direction approaching each other;
A second conductive part forming step of forming the conductive film as the second conductive part on the dielectric film;
A through hole forming step of forming the through hole by irradiating the surface of the first conductive portion with the laser before the second conductive portion forming substrate step;
An electrical connection step of electrically connecting the first conductive part and the second conductive part by forming the electrical connection part between the first conductive part and the second conductive part through the through hole;
A second conductive part forming substrate step of covering the second conductive part with the second substrate and forming the second conductive part forming substrate;
In the thermocompression bonding step, the adhesive insulating film is extruded from between the first conductive portion and the dielectric film to form the adhesive insulating portion, and the dielectric portion is formed by the dielectric film and the adhesive insulating portion. A method of manufacturing a wiring board, wherein the wiring board is formed.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114126205A (en) * 2020-08-28 2022-03-01 铠侠股份有限公司 Printed wiring board, memory system, and method for manufacturing printed wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114126205A (en) * 2020-08-28 2022-03-01 铠侠股份有限公司 Printed wiring board, memory system, and method for manufacturing printed wiring board
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