JP2006080200A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of increasing its withstanding voltage regarding the semiconductor device with a buried oxide film between a supporting layer and an element forming layer. <P>SOLUTION: A conductive plate 26 is brought to a floating potential in a DC, and a trench plate 24 is formed between a source electrode 28 and the buried oxide film 21, thus connecting the conductive plate 26 on the source electrode 28 side through the trench plate 24. Consequently, since the electrostatic capacity of the buried oxide film 21 to the source electrode 28 is reduced, the same effect as the electrostatic capacity is reduced by thickening the buried oxide film 21 can be obtained substantially. The conductive plate 26 can also be stabilized electrically because the trench plate 24 takes a GND potential by a connection to a ground for the external circuit of the source electrode 28. Accordingly, the breakdown strength of a high withstanding voltage transistor 20 can be increased. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device including a buried oxide film between a support layer and an element formation layer, and is suitable for, for example, a high voltage transistor formed on an SOI (Silicon on Insulator) substrate.

For example, as shown in FIG. 5A, there is a high breakdown voltage transistor 100 formed on an SOI substrate as a configuration of a semiconductor device that level shifts or switches a voltage difference of about several hundred volts. In the high breakdown voltage transistor 100, an N ⁻ layer 122 is formed on one side of the buried oxide film 121, that is, an element formation layer, and a P ⁻ layer 123 is formed on the N ⁻ layer 122. On the other hand, a conductive plate 126 is disposed on the other side of the buried oxide film 121, that is, on the support layer via a support substrate 125. The conductive plate 126 is provided with a GND electrode 129 and functions to stabilize the potential of the support substrate 125. The support substrate 125 is usually formed longer in the thickness direction than the N ^- layer 122. However, the configuration example shown in FIG. 5A shows the potential distribution at the time of breakdown shown in FIG. Since this is a structural model for computer simulation, the thickness of the support substrate 125 is expressed thinner than the element formation layer.

In the high breakdown voltage transistor 100 as shown in FIG. 5A, the conductive plate 126 is disposed on the other side of the buried oxide film 121. For this reason, for example, when the potential difference between the drain and the source reaches 600 V or more, the breakdown voltage is reached, so that the potential distribution as shown in FIG. That is, all the electric lines of force between the N ⁻ layers 122 (γ shown in FIG. 5B) are concentrated in the thickness direction of the buried oxide film 121 (γ ′ shown in FIG. 5B), and the drain electrode A high voltage potential difference is generated between both surfaces of the buried oxide film 121 close to 127. Therefore, in order to enable level shift and switching of a potential difference of 600 V or more by the high breakdown voltage transistor 100 having the SOI structure, generally, the thickness of the N ⁻ layer 122 or the buried oxide film 121 on the drain electrode 127 side is set as much as possible. It is thought that it is necessary to increase the breakdown voltage by forming a thick layer.

  Thus, for example, in the “dielectric isolation semiconductor device” disclosed in Patent Document 1 below, the thickness of the dielectric layer (3) functioning as the buried oxide film 121 is compared with the relatively thick first region (3a). By constructing the second region (3b) that is thin enough, the first region (3a) where the withstand voltage is determined bears a large voltage drop, thereby improving the withstand voltage. The numbers in parentheses correspond to the symbols described in the following Patent Document 1 (the same applies to [Background Art] and [Problems to be Solved by the Invention]).

That is, in order to improve the breakdown voltage of the high breakdown voltage transistor 100 having the SOI structure, it is necessary to configure the N ⁻ layer 122 or the buried oxide film 121 to be thick. However, if the N ⁻ layer 122 is thickened, it becomes difficult to form the buried oxide film 121. If the buried oxide film 121 is thickened, the SOI substrate is different from the difference in thermal expansion coefficient between the N ⁻ layer 122 and the buried oxide film 121. Warping occurs. Therefore, in the disclosed technique disclosed in Patent Document 1, the breakdown voltage is improved by forming the dielectric layer (3) from the relatively thick first region (3a) and the relatively thin second region (3b). Makes it possible.
JP-A-6-188438 (pages 6 to 9, FIG. 2, FIG. 53)

  However, according to the technique disclosed in Patent Document 1, the dielectric layer (3) is composed of a relatively thick first region (3a) and a relatively thin second region (3b). When the layer (3) is realized by a buried oxide film, it is necessary to use an SOI technique with a complicated manufacturing process. For this reason, in order to increase the thickness of only a part of the buried oxide film, the manufacturing process of SOI can be further complicated. Therefore, it is difficult to say that it is practical in view of an increase in manufacturing cost.

Even if it is technically possible to thicken both the buried oxide film 121 and the N ⁻ layer 122, it takes several hours to form the buried oxide film 121 thick. Therefore, there is a technical problem that even if the number of manufacturing steps does not increase, an increase in manufacturing cost is caused in terms of time cost.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor device capable of improving the breakdown voltage.

  In order to achieve the above object, the means of claim 1 described in claims is adopted. According to this means, the semiconductor device [20] includes the buried oxide film [21] between the support layer [25] and the element formation layer, and the first conductivity type first formed in the element formation layer. Semiconductor layer [22], a drain electrode [27] provided in the first semiconductor layer [22], and a second conductivity type second semiconductor layer [2] formed on the first semiconductor layer [22]. 23], a trench [24] formed to reach the buried oxide film [21] from a predetermined position on the second semiconductor layer [23] away from the drain electrode [27], and the trench [24] The source electrode [28] provided in the second semiconductor layer [23] and the buried oxide film [21] are arranged so as to be opposed to each other via the support layer [25], and are configured so as not to be connected to the outside in terms of DC. A conductive plate [26]. The numbers in [] can correspond to the symbols described in the [Best Mode for Carrying Out the Invention] column (the same applies hereinafter).

  As a result, the conductive plate [26] disposed so as to be opposed to the buried oxide film [21] via the support layer [25] has a floating potential in direct current, while the support layer [25] and the buried oxide film are provided. It is capacitively coupled to the first semiconductor layer [22] via [21] (hereinafter referred to as “capacitive coupling”). The source electrode [28] and the buried oxide film [21] are capacitively coupled through the trench [24]. Therefore, between the source electrode [28] and the conductive plate [26], for example, as an equivalent circuit, the source electrode [28] capacitively coupled through the trench [24] and the buried oxide film [21] are formed. A first capacitor C1 and a second capacitor C2 composed of a first semiconductor layer [22] and a conductive plate [26] capacitively coupled via a support layer [25] and a buried oxide film [21] are connected in series. Since the circuit is configured so as to be connected to, the equivalent circuit between the source electrode [28] and the conductive plate [26], which includes only the second capacitor C2 when the trench [24] is not formed, is formed. In comparison, the capacitance can be reduced.

  Further, by adopting the means of claim 2 according to the claims, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is set to 2: 1 to 3: 1. For example, as shown in FIG. 2, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is preferably 2: 1 or more and 3: 1 or less. Is known from computer simulations. Here, the characteristics of k1 shown in FIG. 2 are those when the thickness of the first semiconductor layer [22] is 20 μm and the thickness of the buried oxide film [21] is 4 μm, and the thickness of the trench [24]. When the length is around 2 μm, the withstand voltage reaches the maximum value (900 V). Thus, in the case of the characteristic k1, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is 4 μm: 2 μm = 2: 1. The characteristics of k2 shown in FIG. 2 are those when the thickness [tc] of the first semiconductor layer [22] is 20 μm and the thickness [ta] of the buried oxide film [21] is 3 μm. When the thickness [tb] of [24] is around 1 μm, the withstand voltage reaches the maximum value (600 V). Thus, in the case of the characteristic k2, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is 3 μm: 1 μm = 3: 1. That is, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is preferably 2: 1 or more and 3: 1 or less.

  Furthermore, a plurality of trenches [24] are formed by adopting the means of claim 3 described in the claims. For example, when the thickness [ta] of the buried oxide film [21] is 4 μm, it has been found from computer simulation or the like that the thickness [tb] of the trench [24] is preferably 2 μm ( 2), it takes a long time to form the buried oxide film [21] thickly. Therefore, for example, by forming two trenches [24] having a thickness [tb] of 1 μm, substantially the same effect as in the case of forming one trench [24] having a thickness [tb] of 2 μm is obtained. be able to. That is, by forming a plurality of trenches [24], a plurality of first capacitors C1 each including a source electrode [28] and a buried oxide film [21] that are capacitively coupled via the trenches [24] are formed. Are connected in parallel, the capacitance of the first capacitor C1 can be increased, which is substantially equivalent to the case where one thick trench [24] is formed. Thus, by forming a plurality of thin trenches [24], the same effect as that obtained when one thick trench [24] is formed can be obtained without taking a long time in the manufacturing process of the trench [24]. be able to.

  Further, by adopting the means of claim 4 described in claims, the thickness [tc] of the first semiconductor layer [22] is set to 30 μm or more. For example, as shown in FIG. 3, it has been found from computer simulations and the like that the effect of the present invention appears remarkably when the thickness [tc] of the first semiconductor layer [22] is 30 μm or more. Note that FIG. 3 is an explanatory diagram showing a distribution state of a depletion layer of a semiconductor device (high breakdown voltage transistor), showing that a lighter color (close to white) region is depleted, and a darker color (close to black). This indicates that the region is not as depleted.

  For example, when the thickness [tc] of the first semiconductor layer [22, 122] is set to 30 μm or more (for example, 45 μm), as shown in FIG. 3A, a semiconductor device provided with a trench [24] [ 20] is occupied by a depleted region. On the other hand, in the semiconductor device [100] without the trench [24], as shown in FIG. 3B, the semiconductor device [100] is surrounded by a thick broken line extending from the drain electrode side toward the source electrode and the support substrate [125] side. In the range X, the region where depletion has not progressed occupies. For this reason, in the semiconductor device [100] shown in FIG. 3B, the first semiconductor layer [122] functions effectively only in a range (width 95 μm, thickness 30 μm) surrounded by the rectangle in FIG. Therefore, the pressure resistance is significantly reduced. In the computer simulation shown in this example, the breakdown voltage of the semiconductor device [20] shown in FIG. 3A is 950 V, whereas the breakdown voltage of the semiconductor device [100] shown in FIG. It turns out. As a result, when the thickness [tc] of the first semiconductor layer [22] is 30 μm or more and the trench [24] is not provided, the first semiconductor layer [22] is directed from the drain electrode side toward the source electrode and the support substrate [125] side. As the region that has not been depleted increases, the substantially functioning first semiconductor layer [122] decreases in the width direction and the thickness direction. For this reason, the breakdown voltage between the drain and the source is lowered. Therefore, since the same effect as that obtained when the buried oxide film [21] is thickened is obtained, the breakdown voltage between the drain and the source can be improved.

  According to the first aspect of the present invention, the conductive plate [26] disposed so as to be opposed to the buried oxide film [21] through the support layer [25] has a direct current floating potential, while the support layer [25]. And, it is capacitively coupled to the first semiconductor layer [22] via the buried oxide film [21] (hereinafter referred to as “capacitive coupling”). The source electrode [28] and the buried oxide film [21] are capacitively coupled through the trench [24]. Therefore, between the source electrode [28] and the conductive plate [26], for example, as an equivalent circuit, the source electrode [28] capacitively coupled through the trench [24] and the buried oxide film [21] are formed. A first capacitor C1 and a second capacitor C2 composed of a first semiconductor layer [22] and a conductive plate [26] capacitively coupled via a support layer [25] and a buried oxide film [21] are connected in series. Since the circuit is configured so as to be connected to, the equivalent circuit between the source electrode [28] and the conductive plate [26], which includes only the second capacitor C2 when the trench [24] is not formed, is formed. In comparison, the capacitance can be reduced. Therefore, since the same effect as that obtained when the buried oxide film [21] is thickened is obtained, the breakdown voltage between the drain and the source can be improved.

  In the invention of claim 2, as shown in FIG. 2, in the case of the characteristic k1, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is 4 μm: 2 μm. = 2: 1. In the case of the characteristic k2, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is 3 μm: 1 μm = 3: 1. That is, the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is preferably 2: 1 or more and 3: 1 or less. Therefore, when the ratio of the thickness [ta] of the buried oxide film [21] to the thickness [tb] of the trench [24] is such a value, the breakdown voltage between the drain and the source can be further improved. It becomes.

  In the invention of claim 3, by forming a plurality of thin trenches [24], the same effect as when one thick trench [24] is formed without requiring a long time in the manufacturing process of the trench [24]. Can be substantially obtained. Therefore, since the trench [24] can be set to a suitable thickness while suppressing an increase in manufacturing cost, the breakdown voltage between the drain and the source can be further improved.

  In the invention of claim 4, as shown in FIG. 3B, when the thickness [tc] of the first semiconductor layer [22] is 30 μm or more and the trench [24] is not provided, the drain electrode Since the region not depleted proceeds from the side toward the source electrode and the support substrate [125] side, the substantially functioning first semiconductor layer [22] decreases in the width direction and the thickness direction. . For this reason, the breakdown voltage between the drain and the source is lowered. Therefore, when the thickness [tc] of the first semiconductor layer [22] is 30 μm or more, it is possible to effectively improve the drain-source breakdown voltage.

  Hereinafter, embodiments of a semiconductor device of the present invention will be described with reference to the drawings. 1 to 3 relate to the first embodiment, and FIG. 4 relates to the second embodiment.

[First Embodiment]
As shown in FIG. 1A, the high breakdown voltage transistor 20 according to the first embodiment is a P-channel MOS transistor formed on an SOI substrate, and an embedded oxide film 21 made of a silicon oxide film SiO ₂ is formed as an element. Between the layer and the support substrate 25 (support layer). The thickness ta of the buried oxide film 21 is set to 4 μm, for example. The element formation layer and the support substrate 25 (support layer) are silicon substrates. The configuration example shown in FIG. 1 (A) is a configuration model used when the potential distribution at the time of breakdown shown in FIG. 1 (C) is computer-simulated. Therefore, the thickness of the support substrate 25 is determined as the element formation. It is expressed thinner than the layer.

An N ⁻ layer 22 in which N-type low-concentration impurities are diffused is formed in the element formation layer of the high breakdown voltage transistor 20, and a drain electrode 27 is provided on the N ⁻ layer 22. Also on the N ^- layer 22, P P-type low-concentration impurity is diffused ^- P of the utmost distance from the drain electrode 27 with the layer 23 is formed (a predetermined position) ^- the source on the layer 23 An electrode 28 is provided. The thickness tc of the N ⁻ layer 22 is set to 20 μm, for example.

On the other hand, a conductive plate 26 is arranged on the support substrate 25 of the high breakdown voltage transistor 20 on the surface opposite to the buried oxide film 21. The conductive plate 26 has a flat structure, and is in close contact with, for example, the surface of the support substrate 25 so as to face the N ⁻ layer 22 with the support substrate 25 and the buried oxide film 21 interposed therebetween. As a result, the conductive plate 26 can be capacitively coupled to the N ⁻ layer 22 via the support substrate 25 and the buried oxide film 21. Normally, such a conductive plate 26 is provided with a GND electrode so as to be electrically (direct current) connectable to the outside, thereby stabilizing the potential of the support substrate 25. In the present embodiment, Such a GND electrode is not provided on the conductive plate 26. This is to make the conductive plate 26 have a floating potential in a direct current.

Thus, since the conductive plate 26 is configured so as not to be connected to the outside in a direct current, it can take a floating potential in a direct current, but it is difficult to electrically stabilize the conductive plate 26 as it is. Therefore, in the present embodiment, a trench plate 24 reaching the buried oxide film 21 from the source electrode 28 provided on the P ⁻ layer 23 at a position as far as possible from the drain electrode 27 is provided. This trench plate 24 digs a groove extending in the thickness direction of an element formation layer composed of an N ⁻ layer 22 and a P ⁻ layer 23 and then grows a long plate-like silicon oxide film SiO _{2 in} the groove. Formed by a known trench technique. The thickness tb of the trench plate 24 is set to 2 μm, for example.

By forming the trench plate 24 between the source electrode 28 and the buried oxide film 21, the source electrode 28 and the buried oxide film 21 can be capacitively coupled via the trench plate 24. Here, the capacitive coupling by the trench plate 24 is defined as the first capacitor C1, and the capacitive coupling between the conductive plate 26 and the N ⁻ layer 22 through the support substrate 25 and the buried oxide film 21 is defined as the second capacitor C2. Then, a circuit shown in FIG. 1B is equivalently formed between the source electrode 28 and the conductive plate 26.

That is, between the source electrode 28 and the conductive plate 26, the first capacitor C 1 including the source electrode 28 and the buried oxide film 21 that are capacitively coupled via the trench plate 24, and the support substrate 25 and the buried oxide film 21. The second capacitor C2 composed of the N ^- layer 22 and the conductive plate 26, which are capacitively coupled via the first and second electrodes, constitutes a circuit such that they are connected in series. On the other hand, when the trench plate 24 is not formed, the first capacitor C1 in the circuit shown in FIG. 1B does not exist, so the circuit formed between the source electrode 28 and the conductive plate 26 is equivalent. The second capacitor C2 alone.

  Therefore, by providing the trench plate 24, an equivalent circuit in which the first capacitor C1 is connected in series to the second capacitor C2 is formed. Therefore, the source electrode 28 and the conductive plate are compared with the case where the trench plate 24 is not provided. The capacitance of the capacitor formed between the capacitor 26 and the capacitor 26 can be reduced. That is, by connecting the conductive plate 26 to the source electrode 28 side through the trench plate 24, the capacitance of the buried oxide film 21 with respect to the source electrode 28 is reduced, so that the buried oxide film 21 is made thicker and electrostatic. An effect equivalent to that obtained when the capacity is reduced can be substantially obtained. In addition, since the source electrode 28 is connected to the ground of the external circuit, the trench plate 24 takes the GND potential, so that the conductive plate 26 can be electrically stabilized. Therefore, the breakdown voltage between the drain and the source can be improved.

Here, the result of computer simulation of the potential distribution of the high voltage transistor 20 during breakdown will be described with reference to FIG. In the high breakdown voltage transistor 20, as described above, the conductive plate 26 is set to a floating potential in a DC manner, and the trench plate 24 reaches the buried oxide film 21 from the source electrode 28 on the P ⁻ layer 23 as far as possible from the drain electrode 27. Is provided. For this reason, among the lines of electric force between the N ⁻ layers 122, those passing through the vicinity where the trench plate 24 is formed (α1 shown in FIG. 1 (C)) do not go in the direction of the drain electrode 27, but are buried oxide. The film 21 is directed in the direction of the trench plate 24, that is, in the direction of the source electrode 28 (α1 ′ shown in FIG. 1C). The other electric lines of force (β1 shown in FIG. 1C) are directed toward the drain electrode 27 (β1 ′ shown in FIG. 1C).

Thus, as described with reference to FIG. 5B, in the conventional high breakdown voltage transistor 100, all the lines of electric force between the N ⁻ layers 122 are formed in the thickness of the buried oxide film 121 toward the drain electrode 127. Although concentrated in the vertical direction, in the high breakdown voltage transistor 20 of the present embodiment, a part of the lines of electric force (α1 shown in FIG. 1C) is dispersed on the source electrode 28 side, and the remainder ( Β1) shown in FIG. 1C is collected on the drain electrode 27 side.

  For example, in the example of the potential distribution shown in FIG. 1C, of the 30 electric lines of force, 8 electric lines of force gather on the source electrode 28 side, and the remaining 22 electric lines of force are the drain electrode 27. Gathered to the side. On the other hand, in the example of the potential distribution by the conventional high voltage transistor 100 shown in FIG. 5B, all 30 electric lines of force are gathered on the drain electrode 27 side. That is, as compared with the high voltage transistor 100, in the high voltage transistor 20, the number of electric lines of force gathered on the drain electrode 27 side is reduced to about 70%. For this reason, according to the computer simulation, the breakdown voltage which was 640 V in the high voltage transistor 100 can be increased to about 900 V in the high voltage transistor 20. Therefore, the breakdown voltage can be improved from 640V to 900V.

Next, the relationship between the thickness tb of the trench plate 24 and the breakdown voltage will be described with reference to FIG. As described above, in this embodiment, by providing the trench plate 24 that connects the source electrode 28 and the buried oxide film 21, the source electrode 28 and the buried oxide film 21 are capacitively coupled via the trench plate 24. Although it was configured, it has been found by computer simulation that an optimum value exists for the thickness tb of the trench plate 24. The example of the optimum values described below, N ^- is a case where the width direction of the length of the layer 22 are respectively set to 150 [mu] m ^- thickness tc of the layer 22 is 20 [mu] m, also N.

  For example, in the example described above, the thickness ta of the buried oxide film 21 is set to 4 μm. In this case, the curve of k1 shown in FIG. 2 is obtained as the breakdown voltage characteristic with respect to the thickness tb of the trench plate 24. It is done. That is, when the thickness ta of the buried oxide film 21 is 4 μm, 900 V can be obtained as the maximum value of the breakdown voltage when the thickness tb of the trench plate 24 is 2 μm, as indicated by the characteristic k1. Incidentally, when the thickness tb of the trench plate 24 is 1 μm, the breakdown voltage is 750 V, when the thickness tb of the trench plate 24 is 3 μm, the breakdown voltage is 710 V, and when the thickness tb of the trench plate 24 is 4 μm, the breakdown voltage is 630 V. When the thickness tb is 8 μm, a withstand voltage of 670 V is obtained.

  As another example, when the thickness ta of the buried oxide film 21 is set to 3 μm, the curve of k2 shown in FIG. 2 is obtained as the breakdown voltage characteristic with respect to the thickness tb of the trench plate 24. In this case, as indicated by the characteristic k2, 600V can be obtained as the maximum value of the breakdown voltage when the thickness tb of the trench plate 24 is 1 μm. Incidentally, when the thickness tb of the trench plate 24 is 0.5 μm, the breakdown voltage is 460 V, when the thickness tb of the trench plate 24 is 1.5 μm, the breakdown voltage is 580 V, and when the thickness tb of the trench plate 24 is 2 μm, the breakdown voltage is 570 V. When the thickness tb of the trench plate 24 is 3 μm, a withstand voltage of 480 V is obtained.

  Thus, the thickness tb of the trench plate 24 formed between the source electrode 28 and the buried oxide film 21 is varied so as to be thinner than the thickness ta of the buried oxide film 21. The maximum value can be obtained. For example, when the ratio of the thickness ta of the buried oxide film 21 and the thickness tb of the trench plate 24 is 2: 1 (= 4 μm: 2 μm), a maximum withstand voltage of 900 V can be obtained. Similarly, when the ratio of the thickness ta of the buried oxide film 21 to the thickness tb of the trench plate 24 is 3: 1 (= 3 μm: 1 μm), a maximum withstand voltage of 600 V can be obtained. Therefore, when the ratio between the thickness ta of the buried oxide film 21 and the thickness tb of the trench plate 24 is 2: 1 or more and 3: 1 or less, the breakdown voltage between the drain and the source can be further improved.

Then, N ^- thickness tc is 30μm or more layers 22 will be described with reference to FIG. 3 a depletion layer distribution in the case of being set to, for example, 45 [mu] m. 3 (A) and 3 (B) show the distribution of the depletion layer obtained by computer simulation, indicating that the lighter (closer to white) regions are depleted. This indicates that the darker (closer to black) region is not depleted. 3A shows the depletion layer distribution state of the high breakdown voltage transistor 20 set as described above, and FIG. 3B shows the distribution state of the depletion layer of the conventional high breakdown voltage transistor 100 set similarly. It is shown.

When the thickness tc of the N ⁻ layer 122 is set to 45 μm, in the high breakdown voltage transistor 100 in which the trench plate 24 is not provided between the source electrode S (128) and the buried oxide film 121, from the drain electrode D (127) side. The existence of a non-depleted region (range X surrounded by a thick broken line) extending toward the source electrode S and the support substrate 125 is confirmed from FIG. On the other hand, as shown in FIG. 3A, the high breakdown voltage transistor 20 does not confirm the expansion of the non-depleted region as shown in FIG. ^It can be seen that it occupies almost the entire layer 22.

That is, if the thickness of the N ⁻ layer is set thick, the breakdown voltage in the thickness direction of the high breakdown voltage transistor can be improved. On the other hand, as shown in FIG. ^Since depletion of the ⁻ layer becomes difficult, the potential distribution of the N ⁻ layer becomes non-uniform. For this reason, since the region not depleted proceeds from the drain electrode D side toward the source electrode S and the support substrate 125 side, the substantially functioning N ⁻ layer 122 decreases in the width direction and the thickness direction. To do.

Specifically, when the thickness tc of the N ⁻ layer is 30 μm or more, the N ⁻ layer functions effectively only in the range of 95 μm in width and 30 μm in thickness (the solid line rectangular range shown in FIG. 3B). As long as the trench plate 24 is not provided, the breakdown voltage can be secured by an N ⁻ layer having a width of 95 μm and a thickness of 30 μm. For example, if the thickness tc of the N ⁻ layer 122 is set to 45 μm, the breakdown voltage is lowered to 450V, and the breakdown voltage is reduced by 190V from 640V when the thickness tc of the N ⁻ layer 122 is set to 20 μm. It is found by simulation.

Such depletion of the N ⁻ layer can be prevented by setting the P ⁻ layer to be thick, but setting the thickness (depth) of the P ⁻ layer to more than 10 μm It is generally considered impractical for reasons of manufacturing costs. Therefore, as in the high breakdown voltage transistor 20 according to the present embodiment, the trench plate 24 is provided between the source electrode S (28) and the buried oxide film 21, and the source electrode 28 (28) is connected to the ground of the external circuit. Thus, the trench plate 24 is set to take the GND potential. Thereby, since the buried oxide film 21 also takes the GND potential, depletion progresses from the buried oxide film 21, and the range is expanded, whereby the breakdown voltage can be improved.

In the example shown in FIG. 3A, even if the thickness tc of the N ⁻ layer 22 is set to 45 μm, the trench plate 24 can promote depletion in almost the entire area of the N ⁻ layer 22. As a result, it is possible to improve the breakdown voltage of the high breakdown voltage transistor 20 more than twice as compared with the breakdown voltage 450V when the trench plate 24 is not provided (FIG. 3B), and to ensure a breakdown voltage of 950V. It turns out.

Therefore, when the thickness tc of the N ⁻ layer 22 is 30 μm or more, the conductive plate 26 is set to a direct floating potential, and the trench plate 24 is provided between the source electrode 28 and the buried oxide film 21, so that N ⁻ Almost the entire region in the layer 22 can be depleted, so that the breakdown voltage in the width direction of the N ⁻ layer 22 can be improved, and the breakdown voltage between the drain and the source can be improved. That, N ^- when thickness tc of the layer 22 is not less than 30 [mu] m, the effect of the present invention is remarkable.

[Second Embodiment]
In the first embodiment described above, one trench plate 24 is provided between the source electrode 28 and the buried oxide film 21. In the second embodiment, a plurality of trench plates 24 are provided. This is the difference between the high voltage transistor 20 according to the first embodiment and the high voltage transistor 30 according to the second embodiment. For this reason, substantially the same components are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIG. 4A, in the high breakdown voltage transistor 30 of the second embodiment, two trench plates 34 a and 34 b are provided between the source electrode 28 and the buried oxide film 21. The thickness of these trench plates 34a and 34b is set to be thinner than that of the above-described trench plate 24. Other shapes, formation methods, and the like are the same as those of the trench plate 24.

  That is, as described with reference to FIG. 2, the relationship between the thickness tb of the trench plate 24 and the breakdown voltage has an optimum thickness tb of the trench plate 24 for improving the breakdown voltage. When the thickness ta of the oxide film 21 is 4 μm, a breakdown voltage of 900 V at the maximum is obtained when the thickness tb of the trench plate 24 is 2 μm. However, it takes a long time to form the buried oxide film 21 thick. Therefore, in the second embodiment, two first capacitor C1 shown in FIG. 1B are connected in parallel by forming two thin (eg, 1 μm) trench plates 34a and 34b. Take. As a result, the capacitance of the first capacitor C1 can be increased, so that the capacitance of the first capacitor is substantially the same as the case where one thick trench 24 (for example, 2 μm) is formed. It can be obtained as C1.

  For example, as in the case of FIG. 1C described above, from the result of computer simulation of the potential distribution of the high breakdown voltage transistor 30 at the time of breakdown, the high breakdown voltage transistor 30 is the same as that of the high breakdown voltage transistor 20 shown in FIG. It can be seen that almost the same potential distribution is obtained. That is, in the example of the potential distribution shown in FIG. 4B, 10 electric lines of force gather on the source electrode 28 side among the 30 electric lines of force (α2 → α2 ′), and the remaining 20 electric lines. The force lines are gathered on the drain electrode 27 side (β2 → β2 ′). For this reason, according to the computer simulation, the breakdown voltage which was 640 V in the high breakdown voltage transistor 100 can be increased to about 940 V in the high breakdown voltage transistor 30. Therefore, the breakdown voltage can be improved from 640V to 940V.

  As described above, in the second embodiment, since the plurality of trench plates 34a and 34b are provided between the source electrode 28 and the buried oxide film 21, the number of the trench plates 34a and 34b is reduced even if the thickness is small. By adjusting, an optimum value can be set as the capacitance of the first capacitor C1 obtained by parallel connection. Therefore, it is possible to further improve the drain-source breakdown voltage while suppressing an increase in manufacturing cost.

  In the second embodiment, two trench plates 34a and 34b are provided. For example, by providing three or more trench plates having a thickness of 1 μm, the breakdown voltage between the drain and the source can be further improved. Is possible. Further, even if the trench plate having a thickness of less than 1 μm (for example, 0.5 μm) is provided with three or more (for example, four) trench plates, the same effect as the high breakdown voltage transistor 30 can be expected.

  In each of the embodiments described above, a P-channel type MOS transistor has been described as an example. However, the present invention is not limited to this, and the first conductivity type is P-type, and the second conductivity type is N-type. The present invention can also be applied to the case where an N-channel MOS transistor can be formed by using impurities. Even in this case, the same operations and effects as described above can be obtained.

FIG. 1A is a structural model used in the computer simulation of the potential distribution of the high voltage transistor according to the first embodiment of the present invention, and shows the main structure of the high voltage transistor in a sectional view. . FIG. 1B equivalently shows a circuit formed between the source electrode and the conductive plate. FIG. 1C is an explanatory diagram showing a potential distribution at the time of breakdown obtained by computer simulation of the configuration model shown in FIG. The relationship of the breakdown voltage with respect to the thickness of the trench plate of the high breakdown voltage transistor according to the first embodiment is expressed by the difference in the thickness of the buried oxide film. FIG. 3 (A) is an explanatory diagram showing the distribution of the depletion layer when the N ⁻ layer of the high voltage transistor of the first embodiment is set to 45 μm, and FIG. 3 (B) is a diagram of the conventional high voltage transistor. It is explanatory drawing which shows the distribution state of a depletion layer when an N < ^- > layer is set to 45 micrometers. FIG. 4A is a structural model used in the computer simulation of the potential distribution of the high voltage transistor according to the second embodiment of the present invention, and shows the main configuration of the high voltage transistor in a cross-sectional view. . FIG. 4B is an explanatory diagram showing a potential distribution at the time of breakdown obtained by computer simulation of the configuration model shown in FIG. FIG. 5A is a structural model used in the computer simulation of the potential distribution of the conventional high voltage transistor, and shows the main structure of the high voltage transistor in a sectional view. FIG. 5B is an explanatory diagram showing a potential distribution at the time of breakdown obtained by computer simulation of the configuration model shown in FIG.

Explanation of symbols

20, 30 ... High voltage transistor (semiconductor device)
21 ... Embedded oxide film 22 ... N ^- layer (element forming layer, first semiconductor layer)
23... P ⁻ layer (element formation layer, second semiconductor layer)
24 ... trench plate (trench)
25. Support substrate (support layer)
26 ... Conductive plate (conductive plate)
27 ... Drain electrode 28 ... Source electrode 34a ... First trench plate (trench)
34b ... Second trench plate (trench)
ta: thickness of buried oxide film
tb ... Thickness of trench plate
tc ... N ^- layer thickness

Claims (4)

A semiconductor device including a buried oxide film between a support layer and an element formation layer,
A first semiconductor layer of a first conductivity type formed in the element formation layer;
A drain electrode provided in the first semiconductor layer;
A second semiconductor layer of a second conductivity type formed on the first semiconductor layer;
A trench formed to reach the buried oxide film from a predetermined position on the second semiconductor layer away from the drain electrode;
A source electrode connected to the trench and provided in the second semiconductor layer;
A conductive plate arranged to be opposed to the buried oxide film through the support layer and configured to be unable to be connected to the outside in a direct current manner;
A semiconductor device comprising:   2. The semiconductor device according to claim 1, wherein a ratio between the thickness of the buried oxide film and the thickness of the trench is 2: 1 or more and 3: 1 or less.   The semiconductor device according to claim 1, wherein a plurality of the trenches are formed.   The thickness of the said 1st semiconductor layer is 30 micrometers or more, The semiconductor device as described in any one of Claims 1-3 characterized by the above-mentioned.