JP2006079229A - Method and device for maintaining data integrity for flash memory microcomputer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and a device for maintaining data integrity in a flash-memory microcomputer so as to enable control even if such a data defect as disappearance occurs in a program stored in a flash memory in the microcomputer. <P>SOLUTION: The microcomputer performs a sum check for flash ROM data according to error correction codes during startup. When the sum check indicates no matches, the microcomputer starts an error control program. The error control program detects any defective part of the flash ROM data and rewrites the defective part with normal data. Data in all the areas of the flash ROM are normally rewritten and made normally controllable even if the data disappear or if defects occur. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a control device in which the sequence of a control device and various sensor input processes are controlled using a flash memory microcomputer, and a data abnormality such as disappearance occurs in a program stored in the flash memory in the microcomputer. Even so, the present invention relates to a data security method and a security device of a flash memory microcomputer for enabling control.

For example, Japanese Patent Application No. 2004-77359 (filed on Mar. 18, 2004) is known as a conventional control method for control equipment. In the control method of the control device, the program ROM data of the CPU that operates the control device is normally copied to the RAM when the power is turned on. The CPU operates on the program copied to the RAM. Thereafter, the standby power supply connected to the flash ROM is shut off. The program ROM data copied to the RAM is sum-checked at the part that always passes while operating. The CPU resets the microcomputer when a failure occurs in checking the program ROM data copied to the RAM in the operating state.
Japanese Patent Application No. 2004-77359 (filed on March 18, 2004)

  The control method of the control device performs a sum check, and if it does not match, it only resets the microcomputer. In the control method of the control device, if the program is rewritten while the microcomputer is stopped after resetting the microcomputer, the load becomes unstable during the rewriting and the control is in progress. It is dangerous to return.

  In order to solve the above-described problems, the present invention rewrites data in a rewrite mode before resetting the microcomputer, and then resets the microcomputer so that the load becomes unstable during the rewrite operation. It is an object of the present invention to provide a data security method and a maintenance device for a flash memory microcomputer in which return during control is not performed.

(First invention)
According to a first aspect of the present invention, there is provided a data maintenance method for a flash microcomputer that performs sequence control of electronic equipment and various sensor input processes, divides all areas of the flash ROM into fixed data units, and corrects errors in the data units. A code is provided, and the data in the flash ROM is preserved by checking the error correction code.

(Second invention)
According to a second aspect of the present invention, there is provided a data maintenance method for a flash microcomputer, which performs sequence control of electronic equipment and various sensor input processes, divides all areas of the flash ROM into fixed data units, and corrects errors in the data units. When the microcomputer starts up, the flash ROM data is sum-checked. If the sum check does not match, an error control program is started. An abnormal portion of ROM data is determined, and the abnormal portion is rewritten to normal data.

(Third invention)
According to a third aspect of the present invention, there is provided a data security method for a flash memory microcomputer in which the flash ROM is checked at a portion where the sum check of the second aspect always passes while performing a normal control operation.

(Fourth invention)
A data security method for a flash memory microcomputer according to a fourth aspect of the invention is characterized in that the sum check according to the second aspect is performed by an interrupt program having a fixed period.

(Fifth invention)
According to a fifth aspect of the present invention, there is provided a data security method for a flash memory microcomputer, which performs sequence control of electronic equipment and various sensor input processes, and divides all areas of the flash ROM into fixed data units, and causes errors in the data units. A correction code is provided, and based on the error correction code, the flash ROM data is sum-checked.If the sum check does not match, an error control program is started, and the error control program Characterizing an abnormal part of flash ROM data, operating the microcomputer in a flash memory rewrite mode, rewriting the abnormal part of the data to normal data, and then resetting the microcomputer and starting control again To do.

(Sixth invention)
A data security method for a flash memory microcomputer according to a sixth aspect of the invention is characterized in that, when rewriting to the same area of the second to fifth aspects of the invention is a predetermined number of times or more, data is written to another area.

(Seventh invention)
According to a seventh aspect of the present invention, there is provided a data security method for a flash memory microcomputer comprising a plurality of error control programs according to the second to sixth aspects.

(Eighth invention)
According to an eighth aspect of the present invention, there is provided a data security device for a flash memory microcomputer which performs sequence control of electronic equipment and various sensor input processes, divides all areas into fixed data units, and sets error correction codes for the data units. The flash ROM data is summed in at least one of the following cases: a flash ROM provided with a microcomputer, a normal control operation when the microcomputer is started, and a fixed-cycle interrupt program. Check means for performing a check, an error control program to be activated when a sum check is performed by the check means, and the error control program to determine an abnormal portion of the flash ROM data, and to convert the abnormal portion into normal data Data rewriting means to rewrite Characterized in that it comprises even without.

(9th invention)
According to a ninth aspect of the present invention, there is provided a data security device for a flash memory microcomputer comprising a microcomputer resetting means for causing the microcomputer of the eighth invention to rewrite normal data by means of the data rewriting means, resetting, and starting control again. It is characterized by.

(10th invention)
According to a tenth aspect of the present invention, there is provided a data security device for a flash memory microcomputer according to the eighth or ninth aspect, wherein the data rewrite count calculating means for calculating the number of rewrites to the same area and the data rewrite count calculating means are a predetermined number of times or more. In this case, at least an error control program for writing in another area is provided.

  According to the present invention, since the microcomputer is reset after rewriting the flash memory data in the rewrite mode, the load becomes unstable during the rewrite operation, and the return of the control halfway is not in danger.

  According to the present invention, even if flash memory data is destroyed for some reason and cannot be rewritten, data can be rewritten by limiting the number of rewrites to the same area.

  According to the present invention, even when the error control program stored in the ROM itself becomes abnormal, by providing a plurality of error control programs, the error control program itself can be rewritten when the ROM data is abnormal. It is.

  According to the present invention, data can be restored and controlled even when a change occurs in ROM data in the operating state, and even when the sum check program itself disappears from the ROM.

(First invention)
According to a first aspect of the present invention, there is provided a data security method for a flash memory microcomputer equipped with a flash ROM. When performing a sequence control of electronic equipment and various sensor input processes using a program stored in the flash ROM, Even if the stored program disappears or an abnormality occurs, the control can be performed.

  All areas in the flash ROM are divided into fixed data units, and an error correction code is provided for each data unit. The microcomputer can maintain the data of all areas in the flash ROM by checking the error correction code. The error correction code check is not particularly limited as long as it is a known method.

(Second invention)
The data security method of the flash memory microcomputer in the second invention enables the control even when the program stored in the flash ROM has disappeared or an abnormality has occurred, as in the first invention. The entire area in the flash ROM is divided into fixed data units, and an error correction code is provided for each data unit.

  When the microcomputer is activated, it performs a sum check of the flash ROM data based on the error correction code. If the microcomputer performs the sum check and does not agree, the microcomputer starts an error control program. The error control program determines an abnormal location of the flash ROM data and rewrites the abnormal location with normal data. The data in all areas in the flash ROM is normally rewritten even if the data disappears or an abnormality occurs, and correct control becomes possible.

(Third invention)
In the data security method of the flash memory microcomputer in the third invention, the sum check of the flash ROM is performed in the part that always passes while performing the normal control operation. Since the data check method for the flash microcomputer according to the third aspect of the invention performs the sum check even during the normal operation, the data check can be more reliably performed.

(Fourth invention)
According to a fourth aspect of the present invention, there is provided a data preservation method for a flash memory microcomputer in which a flash ROM sum check is performed by an interrupt program having a fixed period. In the data security method of the flash microcomputer according to the fourth aspect of the present invention, since the sum check is performed by periodically interrupting, the data security can be more reliably performed.

(Fifth invention)
According to a fifth aspect of the present invention, there is provided a data storage method for a flash memory microcomputer, wherein the program stored in the flash ROM disappears or becomes abnormal when the flash memory microcomputer is used to perform sequence control of electronic equipment and various sensor input processes. Even if it occurs, the control can be performed.

  All areas in the flash ROM are divided into fixed data units, and an error correction code is provided for each data unit. The microcomputer performs a sum check using the error correction code. The microcomputer performs the sum check, and if it does not match, activates an error control program.

  The error control program determines an abnormal portion of the flash ROM data, operates the microcomputer in a flash memory rewrite mode, and rewrites the abnormal portion of the data to normal data. Since the microcomputer is rewritten while the processing of the microcomputer is stopped, the load does not become unstable during the rewriting operation. Thereafter, the microcomputer is reset and then controlled.

(Sixth invention)
In the flash memory microcomputer data security method according to the sixth aspect of the present invention, when the flash ROM data is rewritten to the same area a predetermined number of times or more, then the data is written to another area. The flash ROM data can be rewritten by limiting the number of rewrites to the same area.

(Seventh invention)
In the data security method for the flash memory microcomputer according to the seventh aspect of the present invention, by providing a plurality of error control programs, even if the error control program itself is abnormal, it can be normally rewritten.

(Eighth invention)
According to an eighth aspect of the present invention, there is provided a data security device for a flash memory microcomputer. When a flash memory microcomputer is used to perform sequence control of electronic equipment and various sensor input processes, the program stored in the flash ROM disappears or is abnormal. Even if it occurs, the control can be performed.

  In the flash ROM, all areas are divided into fixed data units, and an error correction code is provided for each data unit. The check means performs a sum check of the flash ROM data in at least one of the case where the microcomputer is activated, during normal control operation, or when executed by a fixed-cycle interrupt program.

  The error control program is activated when the check means performs a sum check and does not agree. The data rewriting means determines an abnormal portion of the flash ROM data by the error control program, and rewrites the abnormal portion to normal data.

(9th invention)
In the data security device for a flash memory microcomputer according to the ninth aspect of the present invention, after rewriting to normal data by the data rewriting means, the microcomputer is reset by the microcomputer resetting means. Since the microcomputer performs normal operation after being reset by the microcomputer resetting means, there is no risk of returning during the control.

(10th invention)
In the data security device of the flash memory microcomputer according to the tenth aspect of the invention, the number of rewrites to the same area is calculated by the data rewrite number calculation means. The error control program controls to write to another area when the data rewrite count calculating means reaches a predetermined count or more. The flash ROM data can be rewritten by limiting the number of rewrites to the same area.

  FIG. 1 is a diagram for explaining a control circuit and a remote controller for controlling a controlled part in the first embodiment of the present invention. In FIG. 1, the control circuit 11 controls the controlled unit 13 together with the remote controller 12. The control circuit 11 is composed of, for example, a microcomputer, and includes a CPU 111, a check unit 112, a flash ROM 113, an error control program starting unit 114, a data rewriting unit 115, a microcomputer reset unit 116, a RAM 117, data And at least communication means 118.

  The CPU 111 controls each block in FIG. The check unit 112 checks data abnormality of the flash ROM 113 by, for example, a sum check. The flash ROM 113 stores a program for controlling the controlled unit 13, an error control program, and the like, divides the area into fixed data units, and is provided with a correction code for each data unit. The error control program starter 114 starts the error control program and checks the entire area of the flash ROM 113.

  The data rewriting means 115 determines the abnormal part of the flash ROM 113 by the activated error control program and rewrites the part. The microcomputer resetting means 116 resets the microcomputer upon completion of rewriting of the data rewriting means 115. The RAM 117 is an area for storing data of each unit in the controlled unit 13 and performing control based on a program from the flash ROM 113.

  The data communication unit 118 transmits and receives data between the remote controller 12 and the controlled unit 13. The remote controller 12 includes data setting means 121 and a clock display unit 122, and controls the controlled unit 13, sets data, displays a clock, and the like. The controlled unit 13 includes at least a combustion component 131 such as an internal combustion engine, a heating device, or a hot water supply device, a fan motor unit 132, and various sensors 133 for obtaining these data.

  FIG. 2 is a diagram for explaining the configuration of the flash ROM and RAM of the present invention. In FIG. 2, the flash ROM 113 divides all areas into fixed data block units, and an error correction code is provided for each data unit block. The check is, for example, a parity check. In the RAM 117, the entire area is divided into fixed data units (for example, 1 kilobyte).

  FIG. 3 is a flowchart for checking data in the flash ROM according to the first embodiment of the present invention. 1 and 3, the microcomputer 11 is set (step 311). The CPU 111 of the microcomputer 11 checks the flash ROM 113 by the check means 112 (step 312). The CPU 111 checks whether the check means 112 is normal by checking the flash ROM 113 (step 313).

  When the checking means 112 determines that the flash ROM 113 is not normal, the CPU 111 activates an error control program and checks whether it is activated (step 314). When the error control program is activated, the CPU 111 checks whether or not the abnormal location of the flash ROM 113 has been specified (step 315). When the CPU 111 determines that an abnormal part of the flash ROM 113 has been specified, the CPU 111 calculates normal data of the abnormal part (step 316).

  The abnormal part is rewritten to normal data by the data rewriting means 115 (step 317). The data rewriting means 115 resets the microcomputer 11 by the microcomputer resetting means 116 when the rewriting to normal data is completed (step 318). In step 315, if the abnormal part of the flash ROM data is not specified, the CPU 111 continues to specify the abnormal part of the flash ROM data.

  In step 313, when the CPU 111 determines that the flash ROM 113 is normal, the CPU 111 continues normal processing (step 319). The CPU 111 checks whether normal processing has passed for a predetermined time (step 320). When the CPU 111 determines that the normal processing has been performed for a predetermined time, it checks the flash ROM 113 again (step 312). In step 320, if the CPU 111 determines that the predetermined time has not elapsed, it continues normal processing.

  Note that the check means 112 can perform a sum check of the flash ROM data while the microcomputer 11 is activated, while performing a normal control operation, and while being executed by a fixed-cycle interrupt program. Further, the check means 112 can perform a sum check of the flash ROM data at the time of activation, during a normal control operation period, during an interrupt period, or at least one of these.

  FIG. 4 is a flowchart for checking data in the flash ROM according to the second embodiment of the present invention. 4 is different from the flowchart of FIG. 3 in that step 314 ′ is added. That is, in the second embodiment, a plurality of error control programs are provided in consideration of a case where the error control program becomes abnormal.

  FIG. 5 is a diagram for explaining a control circuit and a remote controller for controlling a controlled part in a third embodiment of the present invention. 5 is different from the first embodiment shown in FIG. 1 in that a data rewrite frequency calculation means 411 is provided. The third embodiment is for preventing the flash ROM 113 from being destroyed for some reason and being unable to be rewritten when rewriting is repeated a predetermined number of times in the same area.

  FIG. 6 is a flowchart for checking data in the flash ROM according to the third embodiment of the present invention. In FIG. 6, the third embodiment is the same as the second embodiment until step 316, and thus the description thereof is omitted. In step 316, when the CPU 111 determines that the abnormal part of the flash ROM 113 has been specified, after calculating the normal data of the abnormal part, the data rewrite frequency calculating means 411 calculates the number of abnormal occurrences occurring in the same area. Store (step 611).

  The CPU 111 checks whether or not the occurrence of abnormality has exceeded a predetermined number of times (step 612). If the CPU 111 determines that the number of occurrences of abnormality does not exceed the predetermined number of times, the CPU 111 rewrites the abnormal part to normal data in the same area as the previous time (step 317). If the CPU 111 determines that the occurrence of abnormality exceeds the predetermined number of times, Normal data is rewritten in another area (step 613).

  In the third embodiment, even if the flash memory is destroyed and cannot be rewritten, if the number of times of rewriting to the same area is limited, if rewriting more than the specified number of times continues, Data can be restored by rewriting normal data.

  FIG. 7 is a flowchart for checking data in the flash ROM according to the fourth embodiment of the present invention. The fourth embodiment is a mixture of the second embodiment and the third embodiment. In FIG. 7, the fourth embodiment has a first error control program and a second error control program, and records the number of occurrences of abnormalities. When the number of occurrences of abnormalities exceeds a predetermined number, normal data is stored in other locations. Has been rewritten.

  As mentioned above, although the Example of this invention was explained in full detail, this invention is not limited to the said Example. The present invention can be modified in various ways without departing from the scope of the claims. The block diagram shown in the embodiments of the present invention can be achieved by known or well-known techniques.

  The present invention can be used in an internal combustion engine, a heating device, a hot water supply device, and the like. Further, although the interior of the block shown in FIG. 1 is not described in detail, it is of a level that can be achieved by known or well-known techniques.

FIG. 3 is a diagram for explaining a control circuit and a remote controller for controlling a controlled part in the first embodiment of the present invention. (Example 1) It is a figure for demonstrating the structure of the flash ROM of this invention, and RAM. 5 is a flowchart for checking data in a flash ROM in the first embodiment of the present invention. It is a flowchart at the time of checking the data of flash ROM in 2nd Example of this invention. (Example 2) It is a figure for demonstrating the control circuit and remote controller which control a to-be-controlled part in 3rd Example of this invention. Example 3 It is a flowchart at the time of checking the data of flash ROM in 3rd Example of this invention. It is a flowchart at the time of checking the data of flash ROM in 4th Example of this invention. Example 4

Explanation of symbols

11. Control circuit (microcomputer)
111 ... CPU
112 ... Check means 113 ... Flash ROM
114: Error control program starting means 115 ... Data rewriting means 116 ... Microcomputer reset means 117 ... RAM
118: Data communication means 12 ... Remote controller 121 ... Data setting means 122 ... Clock display part 13 ... Controlled part 131 ... Combustion component part 132 ... Fan motor part 133 ..Various sensors 411 ... Data rewrite count calculation means

Claims (10)

In a data security method of a flash memory microcomputer that performs sequence control of electronic equipment and various sensor input processes,
The entire area of the flash ROM is divided into fixed data units, and an error correction code is provided for each data unit,
A data preservation method for a flash memory microcomputer, wherein the data in the flash ROM is preserved by checking the error correction code. In a data storage method of a flash memory microcomputer that performs sequence control of electronic devices and various sensor input processes,
The entire area of the flash ROM is divided into fixed data units, and an error correction code is provided for each data unit,
When the microcomputer starts up, it performs a sum check of the flash ROM data,
If the sum check does not match, start the error control program,
A data maintenance method for a flash memory microcomputer, characterized by determining an abnormal portion of the flash ROM data by the error control program and rewriting the abnormal portion with normal data.   3. The data preservation method for a flash memory microcomputer according to claim 2, wherein the sum check performs a check of the flash ROM at a portion that always passes while performing a normal control operation.   3. The data preservation method for a flash memory microcomputer according to claim 2, wherein the sum check is performed by a fixed-cycle interrupt program. In a data security method of a flash memory microcomputer that performs sequence control of electronic equipment and various sensor input processes,
The entire area of the flash ROM is divided into fixed data units, and an error correction code is provided for each data unit,
Based on the error correction code, perform a sum check of the flash ROM data,
If the sum check does not match, start the error control program,
By the error control program, the abnormal location of the flash ROM data is determined,
Operate the microcomputer as a flash memory rewrite mode, rewrite abnormal portions of the data to normal data,
Then, after resetting the microcomputer, the control is started again, and the data preservation method of the flash memory microcomputer is characterized.   6. The data security method for a flash memory microcomputer according to any one of claims 2 to 5, wherein rewriting to the same area is performed in another area when a predetermined number of times or more are written.   7. The data security method for a flash memory microcomputer according to claim 2, wherein a plurality of the error control programs are provided. In a data security device of a flash memory microcomputer that performs sequence control of electronic equipment and various sensor input processes,
A flash ROM in which all areas are divided into fixed data units and an error correction code is provided for each data unit;
A check means for performing a sum check of the flash ROM data in at least one of the cases where the microcomputer is started, performing a normal control operation, and performed by a fixed-cycle interrupt program;
An error control program that is activated when the check means performs a sum check and does not match;
By the error control program, data rewriting means for determining an abnormal portion of the flash ROM data and rewriting the abnormal portion with normal data;
A data security device for a flash memory microcomputer characterized by comprising:   9. The flash memory microcomputer according to claim 8, wherein the microcomputer comprises microcomputer reset means for starting control again after resetting to normal data by data rewriting means. Data integrity device. Data rewrite count calculating means for calculating the number of rewrites to the same area;
An error control program for writing in another area when the data rewrite count calculating means is equal to or greater than a predetermined count;
10. The data security device for a flash memory microcomputer according to claim 8 or 9, characterized by comprising:

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