JP2006078795A - Manufacturing method for grating, and grating - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for grating by which the diffraction efficiency of a grating is improved. <P>SOLUTION: The manufacturing method for a grating comprises the steps of: (b) causing a first semiconductor layer 2a to grow up to a thickness, corresponding to the depth of recessed parts of the object grating, on a substrate 1; then (c) forming a second semiconductor layer 3a on the first semiconductor layer 2a; then (e) removing second semiconductor parts, corresponding to the position where the recessed parts of the grating are to be formed; and after the removal, (g) etching the first semiconductor layer 2c for a time according to duty ratio of the object grating by using an etchant having a quicker etching rate for the first semiconductor layer 2c, as compared to the second semiconductor layer 3c and a substrate 1. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a grating used for an optical element, and more particularly to a technique for improving the diffraction efficiency of a grating.

  The grating is a so-called diffraction grating, and is typically used for a distributed feedback (DFB) laser element that is frequently used in the field of optical communication. From the viewpoint of improving the luminous efficiency of the DFB laser element, it is desired to improve the diffraction efficiency of the grating. For this purpose, the depth of the concave portion of the grating and the duty ratio (ratio of the concave portion in one pitch of the concave and convex portions) are optimized. It needs to be adjusted.

FIG. 5 is a view showing a cross section in the manufacturing process of the grating disclosed in the prior art (Patent Document 1).
First, an InGaAsP layer 22 is grown on the InP substrate 21, and a photoresist 23 is formed on the InGaAsP layer 22 (FIG. 5A). Next, the InGaAsP layer 22 is selectively etched using the photoresist 23 as a mask (FIG. 5B).

Thereafter, the photoresist 23 is removed (FIG. 5C), and the InP substrate 21 is selectively etched using the InGaAsP layer 22 as a mask (FIG. 5D). Here, since the crystal orientation of the InP substrate 21 is used for etching, the groove 25 is a V-shaped groove whose apex angle θ is determined by the crystal orientation.
Finally, the InGaAsP layer 22 is removed (FIG. 5E), and the groove 25 is filled with a member 26 different from the substrate 21 (FIG. 5F). The groove 25 embedded by the member 26 becomes a concave portion of the grating.

Thus, since the etching is performed according to the crystal orientation in forming the recess, the depth d of the recess of the grating is determined according to the opening width w of the InGaAsP layer 22. Therefore, a recess having a desired depth can be formed by adjusting the opening width w.
Japanese Patent Laid-Open No. 10-107388

  By the way, according to the light emission principle of the DFB laser element, the uneven pitch p of the grating is inevitably determined by the wavelength of the laser beam to be output. In the above grating manufacturing method, under the condition that the concave / convex pitch p is determined, there is a proportional relationship between the depth d of the concave portion and the duty ratio D, and they cannot be individually adjusted to the optimum values. As a result, there is a problem that the diffraction efficiency of the grating cannot be improved.

  Therefore, an object of the present invention is to provide a method for manufacturing a grating that can improve the diffraction efficiency of the grating.

  A method for manufacturing a grating according to the present invention is a method for manufacturing a grating, and includes a growth step of growing a first semiconductor layer on a substrate to a thickness corresponding to a depth of a concave portion of a target grating, Forming a second semiconductor layer on one semiconductor layer, removing a second semiconductor layer portion corresponding to a position where a grating recess is to be formed, and after removing the second semiconductor layer and An etching step of etching the first semiconductor layer for a time corresponding to a duty ratio of a target grating using an etchant having a higher etching rate with respect to the first semiconductor layer than the substrate.

According to the above configuration, the second semiconductor layer functions as a mask and the substrate functions as an etching stopper, and as a result, a grating is formed in the first semiconductor layer.
Since the substrate serves as an etching stopper, the depth of the concave portion of the grating is defined by the thickness of the first semiconductor layer. Therefore, the depth of the recess can be adjusted by adjusting the thickness for growing the first semiconductor layer.

On the other hand, the duty ratio of the grating is defined by the etching time. Therefore, the duty ratio can be adjusted by adjusting the etching time.
As described above, the manufacturing method according to the present invention can individually adjust the depth of the concave portion of the grating and the duty ratio, so that they can be individually adjusted to the optimum values. Therefore, the diffraction efficiency of the grating can be improved.

The duty ratio in the etching process may be approximately 50%.
It has been found that good diffraction efficiency can be obtained when the duty ratio is 50 percent. According to the above configuration, since the duty ratio is 50%, a grating with good diffraction efficiency can be manufactured.

In the forming step, the second semiconductor layer may be formed by crystal growth.
According to the above configuration, since the second semiconductor layer is formed by crystal growth, the adhesion between the second semiconductor layer and the first semiconductor layer is high and uniform. Therefore, side etching does not occur in the etching process. Here, side etching refers to a phenomenon in which an etchant enters nonuniformly at the interface between a mask body and an object to be etched when the adhesion between the mask body and the object to be etched is low and non-uniform. If side etching occurs, the object to be etched cannot be etched accurately. A typical mask body in which side etching occurs is a photoresist.

According to the manufacturing method of the present invention, since side etching does not occur, it is possible to accurately manufacture a recess having a desired duty ratio.
In addition, the etchant used in the removing step may be an etchant having the same etching rate with respect to the second semiconductor layer and the first semiconductor layer.
According to the above configuration, the second semiconductor layer portion can be removed according to the etching mask pattern. Further, according to the above configuration, non-selective etching is performed. Therefore, not only the second semiconductor layer portion but also the first semiconductor layer directly thereunder is removed to some extent. That is, a groove that penetrates the second semiconductor layer and reaches a part of the first semiconductor layer is formed. At this time, side etching may occur near the upper surface of the second semiconductor layer, but even if side etching occurs at the bottom of the groove, it is considered that there is almost no influence. Therefore, the pitch of the bottoms of the adjacent grooves can be matched with the etching mask pattern with high accuracy.

By using the groove formed with such high accuracy as the starting point of etching in the etching process, the pitch of the concave portions of the grating can be manufactured as intended by the manufacturer.
In addition, the first semiconductor layer is made of indium / gallium / arsenic / phosphorus compound semiconductor, the second semiconductor layer is made of indium / phosphorus compound semiconductor, and the etchant used in the removing step is saturated bromine water and It may be a mixed solution with phosphoric acid.

According to the above configuration, the second semiconductor layer and the first semiconductor layer can be etched equally.
The method for manufacturing a grating further includes an embedding step after the etching step, and this step leaves a residual portion of the second semiconductor layer that has not been removed by the process in the removing step. In this state, a semiconductor having the same composition as that of the second semiconductor layer may be embedded in an etching groove formed by the processing in the etching step.

According to the above configuration, at the time of embedding, the upper surface of the first semiconductor layer is not exposed because the remaining portion remains. This remaining portion functions as a protective layer that protects the upper surface of the first semiconductor layer from being exposed to a high-temperature atmosphere in the embedding step. Therefore, the manufacturing error of the grating shape due to thermal deformation can be suppressed.
The substrate and the second semiconductor layer may be made of a semiconductor having the same composition.

According to the above configuration, when the etching groove formed in the first semiconductor layer is embedded with a semiconductor, the crystallinity of the embedded semiconductor is affected by the crystallinity of the substrate that is the bottom of the etching groove. Good crystallinity. Furthermore, since the composition of the buried semiconductor is affected by the second semiconductor layer, the composition variation of the buried layer can be suppressed.
The substrate and the second semiconductor layer are made of an indium / phosphorus compound semiconductor, the first semiconductor layer is made of an indium / gallium / arsenic / phosphorus compound semiconductor, and the etching step includes sulfuric acid as an etchant. It is good also as using a liquid mixture with hydrogen peroxide water.

  According to the above configuration, in the etching step, the first semiconductor layer can be etched using the second semiconductor layer as a mask and the substrate as an etching stopper.

The best mode for carrying out the present invention will be described in detail with reference to the drawings.
FIG. 1 is a view showing a cross section in the manufacturing process of a grating according to the present invention.
<First semiconductor layer growth process>
First, a first semiconductor layer 2a made of InGaAsP is crystal-grown with a substantially uniform thickness on a substrate 1 made of InP (FIG. 1A) (FIG. 1B).

The first semiconductor layer 2a is a layer in which a grating is formed in the future. The thickness t is adjusted to a thickness corresponding to the depth of the concave portion of the target grating. According to the MOCVD (Metal Organic Chemical Vapor Deposition) method, the thickness t can be arbitrarily adjusted by adjusting the growth conditions. Here, for example, the first semiconductor layer 2a is formed to have a thickness of 70 nm. In raw materials such as trimethylindium (TMIn), Ga raw materials such as triethylgallium (TEGa), As raw materials such as arsine (Arsine: AsH ₃ ), P raw materials such as phosphine (Phosphine: PH ₃ ), carrier gas Hydrogen is used as
<Second semiconductor layer forming step>
Next, a second semiconductor layer 3a made of InP is formed on the upper surface of the first semiconductor layer 2a (FIG. 1C). The second semiconductor layer 3a is crystal-grown so as to have a thickness of 20 nm to 60 nm by, for example, the MOCVD method.
<Removal process>
Next, a portion of the second semiconductor layer 3a corresponding to the planned formation position of the concave portion of the grating is removed. In the present embodiment, it is carried out as follows.

First, after applying a photoresist on the upper surface of the second semiconductor layer 3a, the photoresist layer 4 is exposed and developed using an electron beam drawing apparatus, and a portion corresponding to a position where a grating recess is to be formed is removed. Is formed (FIG. 1D). At this time, the removal portion 5 of the photoresist layer 4 is formed to be a stripe parallel to the (011) direction of the substrate 1. Here, a photoresist is used as a mask for the second semiconductor layer 3a, but an SiO ₂ film may be used as a mask.

Further, the second semiconductor layer 3a and the first semiconductor layer 2a are non-selectively etched using the photoresist layer 4 as a mask (FIG. 1E). Here, as the etchant, a solution obtained by diluting a mixed solution of saturated bromine water and phosphoric acid with water is used.
FIG. 2 is an enlarged view of FIG.
According to this etchant, the etching rate is the same for both InP and InGaAsP, and the etching proceeds so that the (111) plane and the (1-1-1) plane appear. Etching conditions (etching time, etchant concentration, and etchant temperature) are adjusted so that the trench 6 penetrates the first semiconductor layer 2 and reaches a part of the second semiconductor layer 3b.

After the trench 6 is formed, the photoresist layer 4 is removed (FIG. 1 (f)).
As a result, the second semiconductor layer 3a is removed at the portion corresponding to the position where the concave portion of the grating is to be formed, leaving the second semiconductor layer 3b. The first semiconductor layer 2a is removed immediately below the portion, leaving the first semiconductor layer 2b.
<First semiconductor layer etching step>
Next, by using an etchant having a higher etching rate with respect to the first semiconductor layer 2b than the second semiconductor layer 3b and the substrate 1, the first semiconductor layer 2b is formed for a time corresponding to the duty ratio of the target grating. Etch. Thus, the first semiconductor layer 2b is removed by an etching amount corresponding to the duty ratio, and the first semiconductor layer 2c remains (FIG. 1G). This etching proceeds starting from the groove 6 formed in the first semiconductor layer 2b.

In this embodiment, as an etchant, a mixture of sulfuric acid and hydrogen peroxide is diluted with water.
FIG. 3 is an enlarged view of FIG.
According to this etchant, for InP, etching hardly progresses on the (100) plane, and etching progresses on the (n11) plane. That is, the substrate 1 functions as an etching stopper. Further, according to the etchant, etching proceeds so that the (111) plane and the (1-1-1) plane appear for InGaAsP.

According to the present embodiment, since the second semiconductor layer 3c is formed by crystal growth, the adhesion between the first semiconductor layer 2c and the second semiconductor layer 3c is high and uniform. Therefore, the width of the groove 7 can be expanded uniformly and the etching amount can be accurately controlled.
As will be described later, the etching time corresponding to the duty ratio of the grating is obtained by calculating back from the desired duty ratio.

It has been found that good diffraction efficiency can be obtained if the grating duty ratio is 50%. In this embodiment, the etching time is adjusted so that the duty ratio is approximately 50%.
<Embedding process>
Next, the groove 7 is filled with the second semiconductor layer 3c left, and InP having the same composition as the second semiconductor layer 3c is grown so as to cover the entire grating (FIG. 1 (h)). Thereby, the buried layer 8 is formed.

Through the above steps, a grating having a plurality of elongated protrusions (first semiconductor layer 2c) and recesses (parts sandwiched between adjacent protrusions in the embedded layer 8) parallel to each other can be manufactured. it can.
Note that the embedding of the groove 7 with the second semiconductor layer 3c left has the following advantages.

  When the buried layer 8 is crystal-grown by the MOCVD method, the substrate 1 is placed in a reaction chamber and is usually exposed to an atmosphere of about 600 ° C. If it does so, thermal deformation will arise in the 1st semiconductor layer 2c used as the convex part of a grating, and as a result, a manufacturing error will arise. However, according to the present embodiment, since the second semiconductor layer 3c remains on at least the upper surface of the first semiconductor layer 2c, it is not exposed to a high-temperature atmosphere and thermal deformation of the upper surface can be suppressed. . In order to carry out such an embedding process, the second semiconductor layer 3c and the embedding layer 8 must be designed in advance to have the same composition.

FIG. 4 is an enlarged view of FIG. 1 (h), and shows the shape of the grating manufactured by the manufacturing method according to the present invention.
In the present embodiment, the substrate 1 and the buried layer 8 are made of InP, and the first semiconductor layer 2c is made of InGaAsP. In this way, the grating is configured by periodically arranging materials having different compositions. In the present embodiment, the first semiconductor layer 2c is referred to as a grating protrusion, and a portion 9 of the buried layer 8 sandwiched between adjacent grating protrusions is referred to as a grating recess.

As shown in FIG. 4, the duty ratio D is represented by the following equation when the cross-sectional area of the convex portion is S1 and the cross-sectional area of the concave portion is S2 in the cross section orthogonal to the longitudinal direction of the concave portion.
D = S2 / (S1 + S2)
The duty ratio D depends on the uneven pitch p and the width w of the recess. The uneven pitch p is uniquely determined by the wavelength of the laser beam to be output, and the width w of the recess is determined by the etching amount etched in the first semiconductor layer etching step. The etching amount is determined by the etching rate and the etching time. Here, the etching rate is uniquely determined by various conditions such as the composition of the object to be etched, the concentration of the etchant, and the temperature of the etchant. Therefore, the etching time can be obtained by calculating backward from the desired duty ratio D.

As described above, in the grating manufacturing process according to the present invention, the depth of the concave portion of the grating is defined by the thickness of the first semiconductor layer, and the duty ratio of the grating is defined by the etching time. Therefore, the depth of the concave portion of the grating and the duty ratio can be individually adjusted.
<Discussion>
(1) According to the manufacturing method of Patent Document 1, the depth d of the concave portion of the grating depends on the width w (FIG. 5F), and the width w of the concave portion is a groove using the photoresist 23 as a mask. This is based on the exposed width at which the InP substrate 21 is exposed when 24 is formed (FIG. 5B).

However, in general, the adhesion between the photoresist 23 and the InGaAsP layer 22 is poor and is not necessarily uniform throughout. Therefore, the exposed width cannot be made uniform due to side etching, and as a result, the depth of the concave portion of the grating becomes non-uniform.
On the other hand, in the present embodiment, in the first semiconductor layer growth step, the first semiconductor layer 2a is crystal-grown with a substantially uniform thickness. Therefore, the depth of the concave portion of the grating can be made substantially uniform over the entire grating.

Therefore, the grating manufacturing method according to the present invention can manufacture the grating with respect to the depth of the recess with higher accuracy than the manufacturing method according to Patent Document 1.
(2) In the present embodiment, the removing step forms the groove 6 reaching a part of the first semiconductor layer 2a, and the first semiconductor layer etching step performs etching using the groove 6 as a starting point.
The groove 6 is formed by etching the second semiconductor layer 3a. At this time, side etching may occur near the interface between the photoresist layer 4 and the second semiconductor layer 3, but there is almost no influence of side etching at the bottom of the groove 6 (that is, the top of the V-shaped groove). it is conceivable that. Therefore, the pitch between the bottoms of the adjacent grooves 6 can be made to coincide with the pitch determined by the removed portion 5 of the photoresist layer 4 with high accuracy.

By using the groove 6 formed with such high accuracy as the starting point of etching in the etching process, the pitch of the concave portions of the grating can be manufactured as intended by the manufacturer.
(3) In the present embodiment, the removal step is non-selectively etched with one kind of etchant. Therefore, the manufacturing process can be simplified as compared with the case of using two or more kinds of etchants.

(4) In the present embodiment, since the width of the groove 7 is expanded by etching whose etching amount can be controlled, the width of the groove 7 is uniformly expanded. Therefore, the width of the concave portion of the grating (w1, w2, w3 in FIG. 4) can be manufactured with high accuracy.
(5) In this embodiment, since the buried layer 8 is formed of a semiconductor having the same composition as the substrate 1 and the second semiconductor layer 3 c in the filling step, the crystallinity of the buried semiconductor is the bottom of the groove 7. Since the crystallinity of the substrate 1 is affected, the crystallinity of the buried layer 8 is improved. Furthermore, since the composition of the embedded semiconductor is affected by the second semiconductor layer 3c, the composition variation of the embedded layer 8 can be suppressed. As a result, the strength (coupling coefficient) of the coupling between the light generated in the active layer and the grating is stabilized, and a large light output and high frequency characteristics can be obtained.
(Modification)
As mentioned above, although the manufacturing method of the grating based on this invention was demonstrated based on embodiment, this invention is not limited to this embodiment. For example, the following modifications can be considered.

  (1) In the removing step, the etchant used is a mixture of saturated bromine water and phosphoric acid diluted with water, but the second semiconductor layer 3a and the first semiconductor layer 2a are not selected selectively. If it etches, it will not be restricted to this. For example, the present invention can also be applied to AlGaInAs / InP systems, and as an etchant, hydrobromic acid and hydrogen peroxide solution diluted with water may be used.

  (2) In the first semiconductor etching step, a mixture of sulfuric acid and hydrogen peroxide solution diluted with water is used as an etchant, but the second semiconductor layer 3b serves as a mask and the substrate 1 If it becomes what becomes an etching stopper, it will not restrict to this. For example, the present invention can be applied to AlGaInAs / InP systems, and an etchant obtained by diluting sulfuric acid and hydrogen peroxide with water may be used.

  The present invention can be used for an optical element having a grating as a component, for example, a DFB laser element.

It is a figure which shows the cross section in the manufacture process of the grating which concerns on this invention. It is an enlarged view of FIG.1 (e). It is an enlarged view of FIG.1 (g). FIG. 2 is an enlarged view of FIG. It is a figure which shows the cross section in the manufacture process of the grating disclosed by the prior art (patent document 1).

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate 2 1st semiconductor layer 3 2nd semiconductor layer 4 Photoresist layer 5 Removal part 6 Groove 7 Groove 8 Embedded layer 9 Recessed part

Claims (8)

A method of manufacturing a grating,
A growth step of growing the first semiconductor layer on the substrate to a thickness corresponding to the depth of the concave portion of the target grating;
Forming a second semiconductor layer on the first semiconductor layer; and
A removing step of removing the second semiconductor layer portion corresponding to the formation position of the concave portion of the grating;
Etching for etching the first semiconductor layer after removal for a time corresponding to the duty ratio of the target grating using an etchant having a higher etching rate for the first semiconductor layer than the second semiconductor layer and the substrate. A process for producing a grating, comprising the steps of: The method of manufacturing a grating according to claim 1, wherein a duty ratio in the etching step is approximately 50%. The method for manufacturing a grating according to claim 1, wherein in the forming step, the second semiconductor layer is formed by crystal growth. The method for manufacturing a grating according to claim 1, wherein the etchant used in the removing step is an etchant having the same etching rate with respect to the second semiconductor layer and the first semiconductor layer. The first semiconductor layer is made of indium / gallium / arsenic / phosphorus compound semiconductor,
The second semiconductor layer is made of an indium / phosphorus compound semiconductor,
The method for producing a grating according to claim 4, wherein the etchant used in the removing step is a mixed solution of saturated bromine water and phosphoric acid. The method for manufacturing the grating further includes:
After the etching step, an embedding step is included. This step is a process in the etching step in a state where a remaining portion of the second semiconductor layer that has not been removed in the removal step is left. The method for manufacturing a grating according to claim 1, wherein a semiconductor having the same composition as that of the second semiconductor layer is embedded in the formed etching groove. The method for manufacturing a grating according to claim 6, wherein the substrate and the second semiconductor layer are made of a semiconductor having the same composition. The substrate and the second semiconductor layer are made of an indium / phosphorus compound semiconductor,
The first semiconductor layer is made of indium / gallium / arsenic / phosphorus compound semiconductor,
The etching step includes
The method for producing a grating according to claim 1, wherein a mixed liquid of sulfuric acid and hydrogen peroxide is used as the etchant.

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