JP2006076216A - Image forming device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image forming device capable of suppressing the deterioration by enabling the correspondence depending on the change of temperature of a laser beam source for forming a latent image in a latent-image carrier to prevent an excessive luminescence of a laser beam source. <P>SOLUTION: The laser beam source and the latent image carrier are arranged inside the device. The laser beam modulated by the image data is scanned on the latent image carrier from the laser beam source, and an electrostatic latent image is formed on the latent image carrier. The electrostatic image formed on the carrier is developed with a developer to form an image. At that time a capacitor is charged and discharge using the monitor current of a light-quantity monitoring element for detecting the light-quantity of the laser beam irradiated from the laser beam source. An automatic adjustment of light-quantity is performed utilizing the charge and discharge of the capacitor. The temperature of the inside of the device is measured, and the limit value of the current impressed to the laser beam source at the time of automatically adjusting the light-quantity is changed according to the temperature measured. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an image forming apparatus that automatically adjusts the light amount of a laser light source that forms an electrostatic latent image on a latent image carrier such as a photoconductor.

  In an image forming apparatus such as a digital copying machine, a digital printer, and a digital facsimile apparatus, an electrophotographic system that forms an image using a laser beam emitted from a laser light source such as a semiconductor laser in order to record a high-quality image at high speed. Image forming apparatuses are widely used.

  In such an electrophotographic image forming apparatus, it is necessary to keep the output of the laser light source constant in order to improve the image quality. Conventionally, an APC (Auto Power Control) circuit has been used. Is used to keep the output of the laser light source constant.

  In other words, a laser light source such as a semiconductor laser has a light output characteristic that is sensitive to changes in ambient temperature. The output fluctuates. In order to keep this light output fluctuation constant, a monitor diode that monitors the light output of the laser light source is incorporated in the package of the laser light source, and the drive current of the laser light source is controlled based on the detection result of the monitor diode. An APC circuit is used as a semiconductor laser drive circuit having a feedback mechanism for keeping the light output constant.

  Also, in an electrophotographic image forming apparatus, a laser light source is turned on / off according to image data. In such an image forming apparatus, since the lighting time of the laser light source is irregular, In general, the APC operation is performed by turning on the laser light source for a certain time outside the image area. In this case, the capacitor is charged and discharged using the monitor current of the light amount monitor element for detecting the light amount of the laser, and the APC operation is performed using the charging and discharging of the capacitor.

In an image forming apparatus that performs an APC operation by charging and discharging such a capacitor, the APC operation may not be performed properly, and an image density may be abnormal. On the other hand, in Patent Document 1, a capacitor is charged / discharged using a monitor current of a light amount monitor element that detects a light amount of laser light emitted from a laser light source, and a laser is charged using the charge and discharge of this capacitor. There is described an image forming apparatus that, when performing automatic light amount adjustment of a light source, determines the control state of automatic light amount adjustment based on the potentials of two capacitors to improve image quality.
JP 2003-25624 A

In general, during the APC operation, unless a limit value is provided for the current supplied to the laser light source, the laser light source is excessively emitted due to a failure in the power-on sequence or the like. In addition to this, since the laser light source has a characteristic that the current flowing according to the temperature changes, it is necessary to adjust the limit value according to the temperature.
Since the structure of Patent Document 1 described above cannot cope with temperature changes, the limit value corresponding to such a temperature cannot be adjusted, and there is a problem that the laser light source is deteriorated due to excessive light emission. .

  The present invention has been made in consideration of such problems, and can cope with changes in temperature, thereby preventing over-emission of the laser light source and suppressing deterioration. An object of the present invention is to provide a simple image forming apparatus.

  In the image forming apparatus according to the first aspect of the present invention, the laser light source and the latent image carrier are disposed inside the apparatus main body, and the laser light modulated by the image data is scanned from the laser light source onto the latent image carrier. When the electrostatic latent image is formed on the latent image carrier, and the electrostatic latent image on the latent image carrier is developed with a developer to form an image, the amount of laser light emitted from the laser light source is detected. An image forming apparatus that charges and discharges a capacitor by using a monitor current of a light intensity monitor element and performs automatic light amount adjustment of a laser light source by using charging and discharging of the capacitor, and measures the temperature inside the apparatus body, The limit value of the current supplied to the laser light source at the time of automatic light quantity adjustment is changed according to the measured temperature.

  A second aspect of the present invention is the image forming apparatus according to the first aspect, wherein the capacitor sample time and hold time can be changed.

  According to a third aspect of the present invention, in the image forming apparatus according to the first aspect, the current supplied to the laser light source is detected, and when the detected value is equal to or greater than a specified value, an abnormality of the laser light source is warned. Features.

  A fourth aspect of the present invention is the image forming apparatus according to the first aspect, wherein the capacitance value of the capacitor can be switched.

  A fifth aspect of the present invention is the image forming apparatus according to the first aspect, wherein the variable resistance value for light amount adjustment during automatic light amount adjustment can be switched.

  According to the image forming apparatus of the present invention, in order to change the limit value of the current supplied to the laser light source at the time of automatic light quantity adjustment according to the temperature inside the apparatus body storing the laser light source, the limit value is set in the apparatus body. It is possible to cope with a change in temperature, and it is possible to prevent excessive light emission of the laser light source and suppress deterioration of the laser light source.

  Hereinafter, the present invention will be specifically described with reference to embodiments shown in the drawings. FIG. 1 is a plan view of the main scanning optical system of the image forming apparatus 1 in this embodiment.

  As shown in FIG. 1, an image forming apparatus 1 includes an LD 3 as a laser light source attached to an LD (laser diode) substrate 2, a collimating lens 4, a polygon scanner 5, an fθ lens 6, and a photosensitive member as a latent image carrier. 7 and the synchronous detection element part 8 etc., and these members are arrange | positioned inside the apparatus main body (illustration omitted).

  The LD 3 emits a divergent laser beam, and the collimating lens 4 converts the divergent laser beam emitted from the LD 3 into a parallel laser beam and irradiates the polygon scanner 5 with it.

  The polygon scanner 5 is driven to rotate at a high speed at an angular velocity corresponding to the image density of the image forming apparatus 1, deflects the laser light incident from the polygon scanner 5 in the main scanning direction and reflects it to the fθ lens 6.

  The fθ lens 6 forms an image of the laser beam reflected and deflected by the polygon scanner 5 on the photosensitive member (latent image carrier) 7 and is also at a position on the scanning line of the laser beam that is out of the image forming area. It also irradiates the synchronous detection element unit 8 disposed in the vicinity of the body 7. The photoconductor 7 is driven to rotate and uniformly charged by a charging unit (not shown), and then the laser beam is irradiated to form an electrostatic latent image. Thereafter, a toner ( A developer image is applied to form a toner image. The image forming apparatus 1 forms an image by transferring the toner image on the photoreceptor 7 onto a recording sheet and fixing the toner image on the recording sheet with a fixing unit. Then, after cleaning the photoreceptor 7 to which the toner image has been transferred, it is uniformly charged by the charging unit, and image formation is performed again.

  As shown in FIG. 2, the synchronization detection element unit (synchronization detection means) 8 includes a synchronization detection element 10 such as a photodiode, a resistor R <b> 1, a comparator 11, and the like, and laser light is incident on the synchronization detection element 10. . When laser light is incident on the synchronization detection element 10, a current Id flows through the synchronization detection element 10 and the resistor R <b> 1, and the voltage Vd is input to the input of the comparator 11. When the input voltage Vd becomes larger than the comparison voltage Vrefa, the comparator 11 outputs a synchronization detection signal XDETP that is a pulse output. As shown in FIG. 3, the synchronization detection signal XDETP is a signal that is output once during the width T1 and becomes low only during the width T1 in one line period T2.

  The image forming apparatus 1 includes an APC circuit 20 shown in FIG. The APC circuit 20 includes a PD (photodiode) 21, a switch circuit 22, variable resistors VR1 and VR2, a comparator 23, a switch circuit 24, a control circuit 25, switches SW1 and SW2, a charging constant current source 26, and a discharging constant current. A source 27, a switch circuit 28, capacitors C1 and C2, an error amplifier 29, a transistor Tr1, a resistor R2, a bias power source 30, a resistor R3, an A / D converter 31 and the like are provided, although not shown, S / H signal control The S / H signal (sample / hold signal) is input to the control circuit 25 from the S / H signal control circuit.

  The PD (light quantity monitor element) 21 is incorporated in the package of the LD 3, and the monitor current Im flows when the laser beam emitted from the LD 3 is incident. The PD 21 is connected to the switch circuit 22 and to the input of the comparator 23. The switch circuit 22 includes a switch SW21 and a switch SW22, and selectively connects the switch SW21 and the switch SW22 to the PD 21 by a switching signal IN1. In the switch circuit 22, a variable resistor VR1 for setting the light amount of the LD3 is connected to the switch SW21, and a variable resistor VR2 for setting the light amount of the LD3 is connected to the switch SW22. When the switching signal IN1 is low, the switch circuit 22 turns on the switch SW21, turns off the switch SW22, connects the PD21 to the variable resistor VR1 through the switch SW21, and the switching signal IN is high (High). ), The switch SW21 is turned off, the switch SW22 is turned on, and the PD 21 is connected to the variable resistor VR2 via the switch SW22.

  As will be described later, the image forming apparatus 1 switches the variable resistor VR1 and the variable resistor VR2 connected to the PD 21 by changing the switching signal IN1 from high to low or from low to high when switching the light amount. Switch. Therefore, the variable resistor VR1 and the variable resistor VR2 function as a light amount setting resistor.

  The monitor current Im of PD1 is switched between the line flowing through the variable resistor VR1 and the line flowing through the variable resistor VR2 by the switching signal IN1 signal. When the switch circuit 22 is connected to the variable resistor VR1, the monitor current Im The potential of the input voltage V1 is V1 = Im * VR1, and when the switch circuit 22 is connected to the variable resistor VR2, the potential of the input voltage V1 of the comparator 23 is V1 = Im * VR2.

  The reference voltage Vref1 and the reference voltage Vref2 are selectively input to the comparison input of the comparator 23 via the switch circuit 24. The switch circuit 24 selects the input reference voltage Vref1 and the reference voltage Vref2 by the switching signal IN2. The reference voltage Vrefb is output to the comparison input of the comparator 23. The comparator 23 outputs a high comparison output V2 to the control circuit 25 when the input voltage V1 is smaller than the reference voltage Vrefb, and compares it low when the input voltage V1 is larger than the reference voltage Vrefb. The output V2 is output to the control circuit 25.

  The control circuit 25 receives the comparison output V2 from the comparator 23 and the S / H signal from an S / H signal control circuit (not shown). The control circuit 25 outputs the output to the switch SW1 and the switch SW2. It is connected. The control circuit 25 switches between the sampling mode and the hold mode according to the S / H signal. The S / H signal is low, the sampling mode is high, and the hold mode is high. That is, when the S / H signal is low, the control circuit 25 enters a sampling mode in which the switch SW1 and the switch SW2 are selectively closed according to the high / low of the comparison output V2 from the comparator 23, and the S / H signal When HI is high, a hold mode in which both the switch SW1 and the switch SW2 are opened is set. In the sampling mode in which the S / H signal is low, the control circuit 25 turns off the switch SW2 and turns off the switch SW1 when the input voltage V1 of the comparator 23 is smaller than the reference voltage Vrefb and the comparison output V2 of the comparator 23 is high. When the input voltage V of the comparator 23 is larger than the reference voltage Vrefb and the comparison output V2 of the comparator 23 is low, the switch SW1 is turned off and the switch SW2 is turned on.

  The switch SW1 and the switch SW2 are connected in series between the charging constant current source 26 and the discharging constant current source 27, and the switch SW1 and the switch SW2 are connected to the switch circuit 28, and The input terminal of the error amplifier 29 and the A / D converter 31 are connected.

  The switch circuit 28 further has a capacitor C1 and a capacitor C2 connected to its switch terminals. The switch circuit 28 is connected between the switch SW1 and the switch SW2 and between the input terminal of the error amplifier 29 and the A / The D converter 31 is selectively connected to the capacitor C1 or the capacitor C2.

  That is, when the control circuit 25 is in the hold mode in which both the switch SW1 and the switch SW2 are open, the voltage (output voltage) charged in the capacitor C1 or the capacitor C2 selected by the switching signal IN3 is The input voltage V3 is input to the input terminal of the error amplifier 29 and the A / D converter 31 through the circuit 28.

  As described above, the error amplifier 29 receives the input voltage V3 at its input terminal and the reference voltage Vref3 at its reference input terminal, and amplifies the potential of the input voltage V3 with the reference voltage Vref3 to perform error amplification. Increase or decrease the collector current of Tr1. The LD3 is connected to the collector of the transistor Tr1, and when the collector current of the transistor Tr1 increases or decreases, the drive current (LD current) of the LD3 increases or decreases, and the light amount of the LD3 is adjusted and held at the set value. . That is, the APC circuit 20 increases the LD current when the light amount of the LD 3 is smaller than the set light amount, and decreases the LD current when the light amount of the LD 3 is larger than the set light amount.

  Further, two limit values 1 and 2 are input to the base of the transistor Tr1. These limit values are supplied by a current limit circuit (not shown) and are changed according to the temperature inside the apparatus main body at the time of automatic light quantity adjustment. The temperature inside the apparatus main body is measured by the temperature measuring element 37, and the measured value is input to an A / D converter and A / D converted, and then output to a CPU (Central Processing Unit).

  A bias current flows through LD3 by the bias current source 30, and the value of this bias current can be changed by changing the value of the fixed resistor R3. By flowing a bias current, the speed of LD modulation can be increased.

  When the capacitance values of the capacitors C1 and C2 are large, the input voltage V3 of the error amplifier 29 is held constant for a long time, and when the capacitance values of the capacitors C1 and C2 are small, the input voltage of the error amplifier 29 is V3 is held constant for a short period of time. However, the APC circuit 20 has an advantage that when the capacitance values of the capacitors C1 and C2 are small, it takes a short time to charge the potential of the input voltage V3 of the error amplifier 29 to the set value. For example, when the capacitor C1 is 1 uF, the capacitor C2 is 0.1 uF, and the synchronization detection signal XDETP is used as the sample signal of the control circuit 25, the capacitor C1 is selected when the cycle of the synchronization detection signal XDETP is long. When the cycle of the synchronization detection signal XDETP is short, it is preferable to select the capacitor C2.

  As described above, when the capacitance value of the capacitor C1 is large and the capacitance value of the capacitor C2 is small, when the switch circuit 28 selects the capacitor C2 with the switching signal IN3, the set light amount is reached in a short time. When the capacitor C1 is selected, it takes a long time to reach the set light amount, but it takes a long time to hold the light amount constant.

  As described above, when the S / H signal is low and the control circuit 25 is in the sampling mode, when the input voltage V1 of the comparator 23 is smaller than the reference voltage Vrefb and the comparison output V2 of the comparator 23 is high, the switch SW2 Is turned off, the switch SW1 is turned on, the capacitor C1 or the capacitor C2 is charged by the constant current source 26 for charging through the switch SW1 according to the selection of the switch circuit 28, and the input voltage V of the error amplifier 29 is increased. When the input voltage V1 of the comparator 23 is larger than the reference voltage Vrefb and the comparison output V2 of the comparator 23 is low, the switch SW1 is turned off, the switch SW2 is turned on, and through the switch SW2, according to the selection of the switch circuit 28, Discharge the capacitor C1 or the capacitor C2, By lowering the input voltage V3 of the differential amplifier 29, based on the detection result of the amount of LD3 by PD 21, is charged by sampling the amount of charge corresponding to the amount of the LD3 to the capacitor C1 or capacitor C2. A voltage corresponding to the amount of charge sampled and charged in the capacitor C1 or the capacitor C2 is output as an input voltage V3 to the input terminal of the error amplifier 29 in the sampling mode, and the light amount is automatically adjusted.

  As described above, the input voltage V3 is input to the A / D converter 31, and the A / D converter 31 performs A / D (analog / digital) conversion on the input voltage V3 and outputs it to a CPU (not shown). .

  XDATA is video data. When XDATA is LOW, ISW (collector current of transistor Tr1) + IB flows through LD3. When XDATA is high (H), the current of LD3 is only IB, and only the offset emission occurs, and no image is formed. Even when the APC operation is performed, the current of the LD3 is the sum of the collector current of the transistor Tr1 and the bias current.

  In this embodiment, the current supplied to the LD 3 is detected. For this reason, a potential difference measuring circuit 35 is inserted between the LD 3 and the transistor Tr1. The potential difference measuring circuit 35 measures the potential applied to the LD 3 and outputs this potential difference data to the CPU. The CPU detects the current supplied to the LD 3 based on the inputted potential difference.

  In the image forming apparatus as described above, as shown in FIG. 1, the divergent laser light emitted from the LD 3 is converted into parallel laser light by the collimator lens 3 and irradiated to the polygon scanner 5. An image is formed by deflecting in the main scanning direction and irradiating the photoconductor 7 with the fθ lens 6 and irradiating the irradiation light to the synchronization detection element 10 of the synchronization detection element unit 8. Based on the output synchronization detection signal XDETP, synchronization adjustment in the main scanning direction is performed.

  In the APC circuit 20 shown in FIG. 4, in the sampling mode in which the synchronization detection signal XDETP is low and the low S / H signal is input to the control circuit 25, the light quantity of the LD3 is obtained by the PD 21 incorporated in the LD3 package. The input voltage V1 generated by the variable resistor VR1 or the variable resistor VR2 set according to the image resolution (pixel density) at that time is sampled and the reference voltage Vref1 according to the variable resistors VR1 and VR2 by the comparator 23. Alternatively, the control circuit 25 selectively turns on the switch SW1 and the switch SW2 depending on whether or not the input voltage V1 is larger than the reference voltage Vrefb as compared with the reference voltage Vrefb selected from the reference voltage Vref2. When the switch SW1 or the switch SW2 is selectively turned on, the capacitor C1 or the capacitor C2 selected by the switch circuit 28 is charged or discharged according to the cycle of the synchronization detection signal XDETP, and the capacitor C1 or the capacitor C2 As the potential of C2 rises or falls, the potential of the capacitor C1 or C2 is input to the input terminal of the error amplifier 29 as the input voltage V3.

  At the time of image formation, in the hold mode in which the synchronization detection signal XDETP is high and a high S / H signal is input to the control circuit 25, the control circuit 25 turns off both the switch SW1 and the switch SW2 and selects by the switch circuit 28 The potential of the capacitor C1 or the capacitor C2 being held is held constant for a time corresponding to the capacitance value of the capacitor C1 or the capacitor C2, and is input to the input terminal of the error amplifier 29 as the input voltage V3.

  The error amplifier 29 amplifies the potential of the input voltage V3 with the reference voltage Vref3 to increase / decrease the collector current of the transistor Tr1, and the collector current of the transistor Tr1 increases / decreases, whereby the drive current (LD current) of the LD3 is increased. Increase / decrease to keep the light quantity of LD3 at a constant value.

  When switching the pixel density (for example, when switching between 600 dpi and 1200 dpi), at 1200 dpi, the polygon motor rotation speed for rotationally driving the polygon scanner 5 becomes high, and the video clock frequency becomes high. The speed may be halved to 600 dpi. In such a case, the light amount of the LD 3 is ½ when it is 1200 dpi and 600 dpi.

  Therefore, the light quantity of the LD 3 is adjusted by switching the variable resistor VR1 and the variable resistor VR2. For example, if the variable resistor VR1 is 1 KΩ and the variable resistor VR2 is 2 KΩ, the switching signal IN1 is set so that the variable resistor VR1 is selected at 600 dpi and the variable resistor VR2 is selected at 1200 dpi. When controlled, the APC circuit 20 controls the input voltage V1 of the comparator 23 to be the same value as the reference voltage Vrefb (input voltage V1 = reference voltage Vrefb). Therefore, the light amount of the LD3 at 1200 dpi is 600 dpi. It becomes 1/2 of the light quantity of LD3.

  The LD 3 emits laser light when supplied with a current, but has a characteristic that the flowing current changes depending on the temperature. FIG. 5 is a flow for preventing this, and the temperature inside the apparatus main body during the APC operation measured by the temperature measuring element 37 (FIG. 4) is input to the CPU via the A / D converter 31. The CPU compares this temperature with the set value HK1 (step S10). As a result of the comparison, the limit value of the current supplied to the LD 3 is selected. When the temperature in the apparatus main body is smaller than the set value HK1, the limit value 1 is selected (step S11), and the set value HK1. If it is larger, limit value 2 is selected (step S12). In this case, the limit value 2 is set to a value larger than the limit value 1. Thus, by selecting the limit value of the current supplied to the LD 3 according to the temperature in the apparatus main body, it is possible to prevent the LD 3 from over-emitting. For this reason, deterioration of LD3 can be suppressed.

  FIG. 6 shows a configuration in which the sampling time and hold time of the two capacitors C1 and C2 are changed using the synchronization detection signal XDETP. When a signal XDETP having a pulse width T1a is input, the pulse width conversion circuit 40 outputs a signal XDETP1 having a larger width T1b. By using this signal XDETP1 as the S / H signal, the sample time and hold time of the capacitors C1 and C2 that perform APC can be changed. Thereby, it is possible to cope with a case where the line periods are different.

  FIG. 7 is a flowchart showing the operation of the potential difference measuring circuit 35 in FIG. The potential difference measuring circuit 35 measures the potential difference between both ends of the resistor R5 in series with the LD 3, and outputs the potential difference to the CPU. The potential difference data corresponds to the current supplied to the LD 3, and the CPU compares the potential difference data with a set specified value (step S20). If the potential difference data exceeds the specified value as a result of the comparison, a warning to that effect is given because LD3 has deteriorated (step S21). The warning can be performed by appropriate means such as a display or sound. Thereby, since degradation of LD3 can be discovered early, it can prevent that image quality falls.

  In this embodiment, as shown in FIG. 4, when the signal IN3 from the switches SW1 and SW2 is input to the switch circuit 28, the capacitors C1 and C2 are switched. By switching the capacitors C1 and C2 as described above, it is possible to select a capacitor having a capacity necessary for operation. Thereby, for example, it is possible to cope with the case where the printing speed of the image forming apparatus 1 is different.

  Furthermore, in this embodiment, the variable resistors VR1 and VR2 are selected by the input signal IN1 to the switch circuit 22. The variable resistors VR1 and VR2 have different capacitance values. By selecting the variable resistors VR1 and VR2, the light emission amount of the LD 3 can be switched. For example, it is possible to cope with a case where the printing speed is different.

It is a top view of the scanning optical system in one embodiment of the present invention. It is a circuit diagram of a synchronous detection element part. It is a wave form diagram of a synchronous detection signal. It is a circuit diagram which shows an APC circuit. It is a flowchart which selects a limit value according to the internal temperature of an apparatus main body. It is explanatory drawing which shows the effect | action of a pulse width conversion circuit. It is a flowchart in the case of detecting the electric current to LD.

Explanation of symbols

1 Image forming device 3 LD
5 Polygon Scanner 7 Photoconductor 8 Synchronization Detection Element Unit 10 Synchronization Detection Element 11 Comparator 20 APC Circuit 21 PD
22 switch circuit 23 comparator 24 switch circuit 25 control circuit 28 switch circuit 29 error amplifier 30 bias power supply 31 A / D converter R1, R2, R3, R5 resistor VR1, VR2 variable resistor SW1, SW2 switch C1, C2 capacitor Tr1 transistor

Claims (5)

A laser light source and a latent image carrier are disposed inside the apparatus main body, and a laser beam modulated by image data is scanned from the laser light source onto the latent image carrier and electrostatic latent images are formed on the latent image carrier. When forming an image and developing the electrostatic latent image on the latent image carrier with a developer, the monitor current of the light amount monitor element that detects the amount of laser light emitted from the laser light source is used. An image forming apparatus that charges and discharges a capacitor and performs automatic light amount adjustment of the laser light source using charging and discharging of the capacitor,
An image forming apparatus, comprising: measuring an internal temperature of an apparatus main body; and changing a limit value of a current supplied to the laser light source during automatic light quantity adjustment according to the measured temperature.   2. The image forming apparatus according to claim 1, wherein the capacitor sample time and hold time can be changed.   2. The image forming apparatus according to claim 1, wherein a current supplied to the laser light source is detected, and an abnormality of the laser light source is warned when the detected value is equal to or greater than a specified value.   The image forming apparatus according to claim 1, wherein the capacitance value of the capacitor can be switched.   The image forming apparatus according to claim 1, wherein a variable resistance value for light amount adjustment during the automatic light amount adjustment can be switched.

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