JP2006053373A - Electrooptical device, its manufacturing method, and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a high-definition display image on a TFD (Thin Film Diode) liquid crystal panel. <P>SOLUTION: In the manufacturing method, when a pixel electrode is amorphous, annealing treatment C is performed under the conditions of heating temperature 220°C and retention time 30 minutes to reduce the resistance of the pixel electrode 10. Then, other components are attached to produce an element substrate, a color filter substrate 91 is produced, and the electrooptical device 100 is manufactured by sticking them together. Thus, contact resistance is made 500 kΩ or less, and the high-definition display image without causing uneven horizontal streaks, uneven pixels or the like can be obtained. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an electro-optical device suitable for use in displaying various information.

  Conventionally, various electro-optical devices such as a liquid crystal display device, an organic electroluminescence display device, a plasma display device, and a field emission display device are known. In a two-terminal element type active matrix as an example of an electro-optical device or a liquid crystal panel called TFD (Thin Film Diode), a scanning line is provided on one of two substrates facing each other, and a scanning line is provided on the other substrate. A signal line (data line) and a pixel electrode are formed, and liquid crystal is sealed between both substrates. The other substrate is provided with an element having non-linear current-voltage characteristics, such as a thin film diode, and the element is connected to the pixel electrode and the signal line, respectively.

  As another form of this type of TFD liquid crystal panel, for example, a diode element formed on a resin substrate via a silicon dioxide film and a pixel electrode formed on an interlayer insulating film are connected via a contact hole. There is known a transmissive liquid crystal display device including an active matrix substrate connected to each other (see, for example, Patent Document 1). In particular, according to Patent Document 1, when an active matrix substrate is manufactured, an annealing process is performed to improve contact resistance.

  However, in the TFD liquid crystal panel having the structure in which the diode element and the pixel electrode are connected through the contact hole as described above, the aperture ratio is lowered when the diameter of the contact hole is too large, whereas the diameter of the contact hole is too small. As a result, the resistance of the connection portion between the diode and the ITO increases, and a good display image cannot be obtained. Further, when such a TFD liquid crystal panel is manufactured, depending on the annealing conditions and the ITO film forming conditions, a phenomenon may occur in which the resistance of the connection portion increases or the transmittance decreases. There is.

JP 2002-303879 A

  The present invention has been made in view of the above points. The contact hole diameter, the resistance value of the connection portion between the pixel electrode and the two-terminal element, the heat treatment for the two-terminal element, the pixel electrode (ITO), etc. It is an object of the present invention to provide an electro-optical device, a manufacturing method thereof, and an electronic apparatus that can obtain a high-quality display image by optimizing the conditions and the film formation conditions of the pixel electrode.

  In one aspect of the present invention, a data line, a two-terminal element having a first electrode, an insulating film, and a second electrode, connected to the data line, and formed on the data line and the two-terminal element. An electro-optical device comprising a substrate having an insulating film, a pixel electrode formed on the insulating film, a contact hole connecting the second electrode and the pixel electrode, and holding an electro-optical material The resistance of the contact hole connection portion is set to 500 KΩ or less when a voltage of 0.1 V is applied.

The electro-optical device includes a data line, a first electrode made of tantalum tungsten or the like mainly containing tantalum, an insulating film made of Ta ₂ O ₅ or the like, and a second electrode made of chromium, molybdenum, or the like. A two-terminal element such as a thin film diode connected to the line, an insulating film covering the data line and the two-terminal element (referred to as “overlayer” in the embodiments described later), and a pixel electrode formed on the insulating film And a substrate having a contact hole for connecting the second electrode and the pixel electrode and holding an electro-optic material.

  In this electro-optical device, when the resistance of the connection portion between the second electrode and the pixel electrode (hereinafter also referred to as “contact resistance”) is greater than 500 KΩ, lateral unevenness, pixel unevenness, etc. occur on the display image, and the display is adversely affected. . That is, when the contact resistance exceeds 500 KΩ, the contact resistance is added to the resistance of the entire wiring such as the electrodes of the two-terminal elements and the data lines, and the time constant RC (resistance The product of the component R and the component C), and the waveform is rounded. Then, due to the influence of the waveform rounding, phenomena such as horizontal stripe unevenness and pixel unevenness occur, and the display is adversely affected. In this respect, in this electro-optical device, the resistance of the connection portion between the second electrode and the pixel electrode is set to 500 KΩ or less, more desirably 50 KΩ or less when a voltage of 0.1 V is applied to the connection portion. Yes. Accordingly, horizontal stripes, pixel unevenness, and the like do not occur on the display image during driving. Thereby, a favorable display can be obtained with the resistance required to drive the two-terminal element.

  In a preferred example, the pixel electrode can be ITO, and the second electrode can be Cr. In a preferred example, the diameter of the contact hole can be set to 5 to 20 μm. Thus, by reducing the diameter of the contact hole as much as possible, it is possible to prevent the aperture ratio from being lowered.

  In addition, an electronic apparatus including the electro-optical device as a display unit can be configured.

  In another aspect of the present invention, a method of manufacturing an electro-optical device having a substrate having a two-terminal element and holding an electro-optical material is formed on the substrate in the order of a first electrode, an insulating film, and a second electrode. Forming the two-terminal element, forming an insulating film on the second electrode, and forming a pixel electrode on the insulating film, and forming the second electrode Thereafter, before forming the pixel electrode, the process includes a step of performing an annealing process on the two-terminal element under conditions of a heating temperature of 230 to 280 ° C. and a holding time of 60 minutes or less. An element substrate is formed.

According to the above method for manufacturing an electro-optical device, in the first step, for example, in the pixel region on the substrate, the first electrode made of tantalum tungsten containing tantalum as a main component, the insulating film made of Ta ₂ O _5, etc. A two-terminal element can be formed by forming the second electrodes made of chromium, molybdenum, or the like in this order. By the next step, an insulating film can be formed on the second electrode that is a component of the two-terminal element. Further, in the next step, that is, after forming the second electrode and before forming the pixel electrode, the two-terminal element is used under the conditions of a heating temperature of 230 to 280 ° C. and a holding time of 60 minutes or less, desirably 30 minutes or less. Annealing processing can be performed on the. As a preferred example in this case, the annealing process can be performed on the two-terminal element under the conditions of a heating temperature of 250 ° C. and a holding time of such a temperature of 5 minutes. The effect of the annealing treatment is exhibited in proportion to the integrated value of the target heating temperature and holding time. Therefore, when the target heating temperature is set to be higher than 250 ° C. within the temperature range of 230 to 280 ° C., the holding time is shortened to less than 5 minutes, while the target heating temperature is set to be lower than 250 ° C. within the temperature range. In this case, it is preferable to carry out the annealing process with the holding time longer than 5 minutes. Thereby, a two-terminal element can be made into a fixed element characteristic. Further, the annealing temperature after the second electrode is formed can be reduced by slightly lowering the set temperature of the annealing process immediately after forming the insulating film made of Ta ₂ O ₅ or the like before forming the second electrode made of chromium or molybdenum. It can be omitted. In particular, by setting the annealing treatment time after the formation of the second electrode to be short, when the pixel electrode and the two-terminal element are connected in a later process, the resistance of those connection portions can be further reduced. A pixel electrode can be formed on the insulating film by the following process. The element substrate of the electro-optical device can be manufactured through the steps including the above steps.

  According to one aspect of the method of manufacturing the electro-optical device, in the step of forming the insulating film, the insulating film is formed after the annealing process and before the pixel electrode is formed. Forming a contact hole having a diameter of 5 to 20 μm on the second electrode.

  According to this aspect, in the step of forming the insulating film, the second electrode is formed by forming the insulating film after performing the annealing process and before forming the pixel electrode, and patterning the insulating film. A contact hole having a diameter of 5 to 20 μm can be formed on the substrate. As the material for the insulating film, an acrylic resin having photosensitivity and transparency is suitable. The contact hole can be formed with a stepper or a batch exposure machine. Generally, a stepper can form a contact hole in the range of 5 to 6 μm. For this reason, when a contact hole is formed by a stepper, it is preferable to form the contact hole with a diameter of 5 μm in order to further improve the aperture ratio. On the other hand, the collective exposure machine can form contact holes in the range of 6 to 8 μm. For this reason, when forming a contact hole with a batch exposure machine, it is preferable to form the contact hole with a diameter of 7 μm. Thereby, an aperture ratio can be improved. In addition, by performing batch exposure, a plurality of contact holes can be formed at the same time, so that the contact holes can be formed at low cost.

  In another aspect of the method of manufacturing the electro-optical device, the flow rate ratio of the inert gas to the oxygen gas is set to 10: 0 to 10: 2 after forming the insulating film and before forming the pixel electrode. A cleaning step of cleaning a surface of the second electrode located in the insulating film and the contact hole in the apparatus that has flowed in in In a preferred example, the cleaning process may use argon gas as the inert gas.

For example, as a cleaning process after patterning an insulating film and before forming a pixel electrode, argon gas is supplied as an inert gas at 340 sccm and oxygen gas is supplied at 35 sccm, and the power density is increased in an apparatus having an internal pressure of 3 to 4 Pa. The surface of the insulating film and the second electrode located in the contact hole can be cleaned by treating with ² KW / m ² for 30 seconds. Thereby, organic components such as resin remaining on the surface of the insulating film and the second electrode located in the contact hole can be effectively removed, and the resistance of the connection portion between the second electrode and the pixel electrode is reduced. be able to. In addition, the adhesion between the insulating film and the pixel electrode can be improved.

  In another aspect of the method for manufacturing the electro-optical device, the step of forming the pixel electrode is performed at a film formation rate of 2 to 4 liters / second by a sputtering apparatus after the cleaning step. Forming in the contact hole.

  According to this aspect, in the step of forming the pixel electrode, after the cleaning step is performed, the transparent conductive film is formed at a rate of 2 to 4 liters / second by the sputtering apparatus, and is located in the insulating film and the contact hole. A pixel electrode can be formed on the two electrodes.

  For example, argon gas and oxygen gas flow rates of 80 sccm and 1 sccm are set to 0.6 Pa, a temperature setting is set to 210 ° C., a power is set to 2.5 kW, and the anode rod is scanned four times by a sputtering apparatus, and the insulating film and contact 500 pixel electrodes can be formed on the second electrode located in the hole. The film forming speed at this time is about 3 liters / second. Thereby, the sheet resistance of the pixel electrode can be reduced. Further, the transmittance of the pixel electrode can be increased. Furthermore, the amount of side etching during pattern formation and the resistance of the connection portion of the pixel electrode can be reduced. Specifically, side etching of 1.9 μm (0.95 μm on one side) occurred on both sides under the above conditions, but this level is sufficiently controllable.

  In another aspect of the method for manufacturing the electro-optical device, after the pixel electrode is formed, the pixel electrode is annealed under a condition of a heating temperature of 200 to 230 ° C. and a holding time of 30 to 60 minutes. A step of executing the process.

  According to this aspect, after the pixel electrode is formed by the following process, as a preferred example, the heating temperature is 220 ° C., and the temperature holding time is 30 minutes. -Processing can be executed. The effect of the annealing treatment is exhibited in proportion to the integrated value of the target heating temperature and holding time. Therefore, when the target heating temperature is made higher or lower than 220 ° C. within the temperature range of 200 to 230 ° C., the holding time can be adjusted so that the same effect as 220 ° C. (holding time 30 minutes) can be obtained. To do. Thereby, particularly in the case of an amorphous pixel electrode, the resistance of the pixel electrode can be reduced.

  The best mode for carrying out the present invention will be described below with reference to the drawings. In the following embodiments, the present invention is applied to a liquid crystal display device as an example of an electro-optical device. In the present embodiment, the size of the contact hole, the resistance value of the connection portion between the pixel electrode and the second metal film that is a constituent element of the TFD element, the heat treatment for the TFD element and the pixel electrode (hereinafter referred to as “anneal treatment”). In this case, a high-quality display image is obtained.

[Configuration of Liquid Crystal Display Device 100]
First, the configuration of the liquid crystal display device according to the embodiment of the present invention will be described. FIG. 1 is a plan view schematically showing a schematic configuration of a liquid crystal display device 100 of the present invention. In FIG. 1, the configuration of electrodes and wirings of the liquid crystal display device 100 is mainly shown as a plan view. Here, the liquid crystal display device 100 of the present invention is an active matrix driving method using a TFD element, and is a transflective liquid crystal display device. FIG. 2 is a schematic cross-sectional view along the cutting line AA ′ in the liquid crystal display device 100 of FIG.

  First, the cross-sectional configuration of the liquid crystal display device 100 taken along the cutting line A-A ′ will be described with reference to FIG.

  In FIG. 2, the liquid crystal display device 100 includes an element substrate 92 and a color filter substrate 91 disposed so as to face the element substrate 92 with a frame-shaped seal member 3 interposed therebetween, and liquid crystal is sealed inside. Thus, the liquid crystal layer 4 is formed. The frame-shaped seal member 3 is mixed with a conductive member 7 such as a plurality of metal particles.

  On the inner surface of the lower substrate 2, a scattering layer 9 having fine irregularities formed on the surface is formed. On the inner surface of the scattering layer 9, a reflective layer 5 having a predetermined thickness is formed for each subpixel SG. Each reflective layer 5 is formed with a rectangular opening 20 (hereinafter also referred to as “transmission opening region”). Each reflective layer 5 can be formed of a thin film such as aluminum, an aluminum alloy, or a silver alloy. The opening 20 is formed so as to have an area of a predetermined ratio with respect to the total area of the sub-pixel SG for each sub-pixel SG arranged in a matrix in the vertical and horizontal directions on the inner surface of the color filter substrate 91.

  On the reflective layer 5 and between the sub-pixels SG, a black light-shielding layer BM is provided between the adjacent sub-pixels SG to prevent light from entering from one sub-pixel to the other sub-pixel. Is formed. The black light shielding layer BM can be made of a black resin material, for example, a black pigment dispersed in a resin. In the present invention, instead of this, an overlapping light shielding layer (not shown) formed by overlapping R, G, and B colored layers may be used.

  On the reflective layer 5 and the opening 20, colored layers 6R, 6G, and 6B made of any of the three colors R, G, and B are formed for each subpixel SG. A color filter is constituted by the colored layers 6R, 6G, and 6B. A pixel G indicates a region for one color pixel composed of R, G, and B sub-pixels SG. In the following description, when referring to a colored layer regardless of color, it is simply referred to as “colored layer 6”, and when referring to a colored layer by distinguishing colors, it is referred to as “colored layer 6R” or the like. Further, as shown in FIG. 2, the thickness of the colored layer 6 formed on the opening 20 is formed to be thicker than the thickness of the colored layer 6 formed on the reflective layer 5. Thus, the colored layer 6 is designed to exhibit a desired hue and brightness in the reflective display mode and the transmissive display mode, respectively.

  A protective layer 18 made of a transparent resin or the like is formed on the colored layer 6 and the black light shielding layer BM. The protective layer 18 has a function of protecting the colored layer 6 from corrosion and contamination caused by chemicals used during the manufacturing process of the color filter substrate 91 and the liquid crystal display device 100. On the surface of the protective layer 18, a transparent electrode (scanning electrode) 8 such as striped ITO (Indium-Tin Oxide) is formed. One end of the transparent electrode 8 extends into the seal member 3 and is electrically connected to the conducting member 7 in the seal member 3.

On the other hand, a Ta ₂ O ₅ film 70 serving as a base layer is formed on the inner surface of the upper substrate 1. On the inner surface of the Ta ₂ O ₅ film 70, the data line 32 and the TFD element 21 are formed. On the inner surfaces of the Ta ₂ O ₅ film 70, the data line 32, and the TFD element 21, an insulating overlayer 25 is formed. On the inner surface of the overlayer 25, the pixel electrode 10 is formed for each sub-pixel region SG. Scanning lines 31 are formed on the left and right peripheral edge portions on the inner surface of the upper substrate 1, and one end of the scanning line 31 extends into the seal member 3. The conductive member 7 is electrically connected.

  An alignment film (not shown) is formed on the inner surface of the transparent electrode 8 of the lower substrate 2 and the inner surface of the pixel electrode 10 of the upper substrate 1. In order to keep the thickness of the liquid crystal layer 4 uniform between these alignment films, particulate spacers (not shown) are randomly arranged. As a material for the spacer, a material mainly composed of silica or resin is preferable.

  A retardation plate (¼ wavelength plate) 11 and a polarizing plate 12 are arranged on the outer surface of the lower substrate 2, and a retardation plate (¼ wavelength plate) on the outer surface of the upper substrate 1. 13 and a polarizing plate 14 are arranged. A backlight 15 is disposed below the polarizing plate 12. The backlight 15 is preferably a point light source such as an LED (Light Emitting Diode) or a combination of a linear light source such as a cold cathode fluorescent tube and a light guide plate.

  The transparent electrode 8 of the lower substrate 2, that is, the scanning line of the lower substrate 2, and the scanning line 31 of the upper substrate 1 are vertically connected via the conductive member 7 mixed in the seal member 3.

  Now, when reflective display is performed in the liquid crystal display device 100 of the present embodiment, the external light incident on the liquid crystal display device 100 travels along the path R shown in FIG. That is, the external light incident on the liquid crystal display device 100 is reflected by the reflective layer 5 and reaches the observer. In this case, the external light passes through the region where the colored layer 6 is formed, is reflected by the reflective layer 5 below the colored layer 6, and passes through the colored layer 6 again to have a predetermined hue. And brightness. Thus, a desired color display image is visually recognized by the observer.

  On the other hand, when transmissive display is performed, the illumination light emitted from the backlight 15 travels along the path T shown in FIG. 2 and passes through the transmissive region, that is, the colored layer 6 on the opening 20 for observation. To the person. In this case, the illumination light has a predetermined hue and brightness by passing through the colored layer 6. Thus, a desired color display image is visually recognized by the observer.

  Next, with reference to FIG. 1, FIG. 3, and FIG. 4, the configuration of the electrodes and wirings of the element substrate 92 and the color filter substrate 91 of the present invention will be described. FIG. 3 is a plan view showing a configuration of electrodes, wirings, and the like of the element substrate 92 when the element substrate 92 is observed from the front direction (that is, the lower side in FIG. 2). FIG. 4 is a plan view showing the configuration of the electrodes of the color filter substrate 91 when the color filter substrate 91 is observed from the front direction (that is, the upper side in FIG. 2). In FIG. 3 and FIG. 4, other elements other than the electrodes and wiring are not shown for convenience of explanation.

  In FIG. 1, a region where the pixel electrode 10 of the element substrate 92 and the transparent electrode 8 of the color filter substrate 91 intersect constitute a sub-pixel SG which is the minimum unit of display. An area in which a plurality of subpixels SG are arranged in a matrix in the vertical direction and the horizontal direction of the drawing is an effective display area V (area surrounded by a two-dot chain line). In the effective display area V, images such as letters, numbers, and figures are displayed. 1 and 3, a region defined by the outer periphery of the liquid crystal display device 100 and the effective display region V is a frame region 38 that does not contribute to image display.

(Electrode and wiring configuration)
First, with reference to FIG. 3, the structure of the electrode and wiring of the element substrate 92 will be described. The element substrate 92 includes a TFD element 21, a pixel electrode 10, a plurality of scanning lines 31, a plurality of data lines 32, a Y driver IC 33, an X driver IC 34, and a plurality of external connection terminals 35.

  On the projecting region 36 of the element substrate 92, a Y driver IC 33 and an X driver IC 34 are mounted, for example, via an ACF (Anisotropic Conductive Film). In FIG. 3, the direction from the side 92a on the projecting region 36 side of the element substrate 92 to the side 92c on the opposite side is defined as the X direction, and the direction from the side 92d to the side 92b is defined as the Y direction.

  A plurality of external connection terminals 35 are formed on the overhang region 36. Each input terminal (not shown) of the Y driver IC 33 and the X driver IC 34 is connected to the plurality of external connection terminals 35 through conductive bumps. The external connection terminal 35 is connected to a wiring board (not shown) such as a flexible printed board via ACF or solder. Thereby, for example, signals and power are supplied to the liquid crystal display device 100 from an electronic device such as a mobile phone or an information terminal.

  The output terminal (not shown) of the X driver IC 34 is connected to the plurality of data lines 32 through conductive bumps. On the other hand, the output terminal (not shown) of each Y driver IC 33 is connected to the plurality of scanning lines 31 via conductive bumps. Accordingly, each Y driver IC 33 outputs a scanning signal to the plurality of scanning lines 31, and the X driver IC 34 outputs a data signal to the plurality of data lines 32.

  The plurality of data lines 32 are linear wirings extending in the vertical direction on the paper surface, and are formed in the X direction from the overhang area 36 to the effective display area V. Each data line 32 is formed at a constant interval. Each data line 32 is connected to a plurality of TFD elements 21 at appropriate intervals, and each TFD element 21 is connected to a corresponding pixel electrode 10.

  The plurality of scanning lines 31 includes a main line portion 31a and a bent portion 31b that bends at substantially right angles to the main line portion 31a. Each main line portion 31 a is formed in the X direction from the overhanging region 36 in the frame region 38. Each main line portion 31a is formed substantially parallel to each data line 32 and at a predetermined interval. Each bent portion 31b extends in the Y direction to the inside of the seal member 3 located on the left and right in the frame region 38. The end portion of the bent portion 31 b is connected to the conductive member 7 in the seal member 3.

  Next, the configuration of the electrodes of the color filter substrate 91 will be described. As shown in FIG. 4, the color filter substrate 91 has stripe-shaped transparent electrodes (scanning electrodes) 8 formed in the Y direction. As shown in FIGS. 1 and 4, the left end portion or the right end portion of each transparent electrode 8 extends into the seal member 3 and is connected to the conduction member 7 in the seal member 3.

  FIG. 1 shows a state where the color filter substrate 91 and the element substrate 92 are bonded together via the seal member 3 as described above. As shown in the figure, each transparent electrode 8 of the color filter substrate 91 is orthogonal to each data line 32 of the element substrate 92 and overlaps the plurality of pixel electrodes 10 in a row in a plane. Thus, the region where the transparent electrode 8 and the pixel electrode 10 overlap constitutes the sub-pixel SG.

  Further, the transparent electrode 8 (that is, the scanning line on the color filter substrate 91 side) of the color filter substrate 91 and the scanning line 31 of the element substrate 92 alternately overlap between the left side and the right side as shown in the figure. The transparent electrode 8 and the scanning line 31 are vertically connected via the conductive member 7 in the seal member 3. That is, conduction between each scanning line of the color filter substrate 91 as the transparent electrode 8 and each scanning line 31 of the element substrate 92 is alternately realized between the left side and the right side as shown in the figure. Thereby, the transparent electrode 8 of the color filter substrate 91 is electrically connected to the Y driver ICs 33 located on the left and right sides of the paper via the scanning lines 31 of the element substrate 92.

(Overlayer structure)
Next, the structure of the element substrate 92 in the liquid crystal display device 100, that is, the overlayer structure will be described with reference to FIGS. FIG. 5 is a plan view showing a layout of the plurality of pixel electrodes 10 and the like on the element substrate 92. FIG. 6 is a partial cross-sectional view taken along a cutting line BB ′ in FIG. 5 shows a configuration when the observation side is viewed from the back side, so that the near side in FIG. 5 is the back side and the upper side in FIG. 6 is the back side.

A phase difference plate 13 and a polarizing plate 14 are disposed on the outer surface of the upper substrate 1. On the other hand, a Ta ₂ O ₅ film 70 is formed on the inner surface of the upper substrate 1. On the inner surface of the Ta ₂ O ₅ film 70, the TFD element 21 and the data line 32 are formed.

The TFD element 21 includes a first TFD element 21a and a second TFD element 21b. The first TFD element 21a and the second TFD element 21b are made of an island-shaped first metal film 322 made of TaW (tantalum tungsten) containing tantalum as a main component, and the surface of the first metal film 322 is anodized. And an insulating film 323 made of Ta ₂ O ₅ or the like, and second metal films 316 and 336 formed on the surface and spaced apart from each other. Among these, the second metal films 316 and 336 are formed by patterning the same conductive film such as chromium or molybdenum, and the former second metal film 316 is branched from the data line 32 in a T shape. On the other hand, the latter second metal film 336 is used for connection to a connection portion 10Z of the pixel electrode 10 such as ITO described later.

  Here, among the TFD elements 21, the first TFD element 21 a becomes the second metal film 316 / insulating film 323 / first metal film 322 in order when viewed from the data line 32 side. Due to the body / metal structure, the current-voltage characteristics are nonlinear in both positive and negative directions. On the other hand, when viewed from the data line 32 side, the second TFD element 21b becomes a first metal film 322 / insulating film 323 / second metal film 336 in the order opposite to the first TFD element 21a. The structure of For this reason, the current-voltage characteristics of the second TFD element 21b are obtained by making the current-voltage characteristics of the first TFD element 21a point-symmetric with respect to the origin. As a result, the TFD element 21 has a shape in which two TFDs are connected in series in opposite directions. Therefore, the current-voltage nonlinear characteristic is symmetric in both positive and negative directions compared to the case of using one element. become.

Further, as shown in FIG. 6, a first metal film 312 and an insulating film 313 are formed below the data line 32 in this order from the Ta ₂ O ₅ film 70 side.

An overlayer 25 is formed on the inner surface of the Ta ₂ O ₅ film 70, and the TFD element 21 and the data line 32 are covered with the overlayer 25. The overlayer 25 has an opening, that is, a contact hole 25a having a shape obtained by reversing the substantially truncated cone shape in a cross-sectional view. A pixel electrode 10 is formed on the inner surface of the overlayer 25.

  As shown in FIG. 5, the pixel electrodes 10 are arranged in a matrix on the inner surface of the overlayer 25. The pixel electrodes 10a, 10b, and 10c are opposed to the colored layers 6 corresponding to B (blue), R (red), and G (green) colors, respectively. Each pixel electrode 10 has a connection portion 10 </ b> Z that extends into the contact hole 25 a and is electrically connected to the TFD element 21. The connection portion 10Z of each pixel electrode 10 is connected to the second metal film 336 of the corresponding TFD element 21 through the contact hole 25a. The pixel electrodes 10 belonging to the same column are commonly connected to one data line 32 via the TFD elements 21. In addition, the pixel electrodes 10 belonging to the same row face one transparent electrode 8 (scanning line).

(Method of defining contact hole diameter and contact resistance)
Next, a method for defining the contact hole diameter and the contact resistance, which characterize the present invention, will be described with reference to FIGS. FIG. 7 is a graph showing the relationship between contact resistance and contact hole diameter. In FIG. 7, “contact resistance” refers to resistance when a voltage of 0.1 V is applied to the connection portion E <b> 1 (see FIG. 6) between the pixel electrode 10 and the second metal film 336. The “contact hole diameter” refers to the diameter D1 of the contact hole 25a corresponding to the position of the connection portion E1 between the pixel electrode 10 and the second metal film 336 in FIG.

In the manufacturing process of the element substrate 92, after the second metal film 336 and the like are formed on the Ta ₂ O ₅ film 70 and before the pixel electrode 10 and the like are formed, the TFD element 21 and the like are constant. Under the conditions, heat treatment B described later, that is, annealing treatment B is performed. This annealing process B is performed to make the element characteristics of the TFD element 21 constant characteristics determined by specifications. In particular, the contact resistance can be reduced by performing the annealing process B under certain conditions. In FIG. 7, a graph W1 shows the relationship between the contact resistance and the contact hole diameter when the annealing process B is performed under a certain condition, specifically, at 250 ° C. and a holding time of 5 minutes. It is a graph. The “holding time” is the time for holding the target temperature (250 ° C. in the graph W1). On the other hand, the graph W2 is a graph showing the relationship between the contact resistance and the contact hole diameter when the annealing process B is not executed. Graphs W1 and W2 show the relationship between the resistance value when a voltage of 0.1 (V) is applied to the connection portion E1 between the pixel electrode 10 and the second metal film 336 and the diameter D1 of the contact hole 25a. It is a graph.

  From the graphs W1 and W2 in FIG. 7, it is understood that the contact resistance decreases as the diameter D1 of the contact hole 25a increases, whereas the contact resistance increases as the diameter D1 of the contact hole 25a decreases. This is because the area of the connection portion E1 between the pixel electrode 10 and the second metal film 336 changes according to the size of the diameter D1 of the contact hole 25a.

  In the liquid crystal display device 100, when the contact resistance is greater than about 500 KΩ, horizontal stripes, pixel unevenness, and the like occur on the display image, which adversely affects the display. The cause will be briefly described. When the contact resistance is larger than about 500 KΩ, the contact resistance is added to the resistance of the entire wiring such as the electrodes of the TFD element 21 and the data line 32, and the time constant RC (resistance The product of the component R and the component C), and the waveform is rounded. Then, due to the influence of the waveform rounding, phenomena such as horizontal stripe unevenness and pixel unevenness occur, and the display is adversely affected.

Therefore, in order to avoid such a problem, it is necessary to regulate the diameter D1 of the contact hole 25a to a certain size so that the contact resistance is 500 KΩ or less when a voltage of 0.1 V is applied to the connection portion E1. There is. From the graphs W1 and W2, it is understood that if the diameter D1 of the contact hole 25a is specified to be 5 μm or more, the contact resistance can be made smaller than 500 KΩ. In particular, in the case of the graph W2, that is, when the annealing process B is not performed, it is estimated that the contact resistance can be made smaller than 500 KΩ even if the diameter D1 of the contact hole 25a is smaller than 5 μm. By slightly lowering the set temperature of the annealing treatment (annealing A) immediately after forming the insulating film 323 made of Ta ₂ O ₅ or the like before forming the second metal film 336 (second electrode) made of chromium, molybdenum or the like The annealing process (annealing B) after the formation of the second metal film 336 (second electrode) can be omitted.

  Therefore, in the present invention, the diameter D1 of the contact hole 25a is defined to be a constant size. In order to reduce the contact resistance to 500 KΩ or less, the diameter D1 of the contact hole 25a may be specified to be 5 μm or more as described above. However, if the diameter D1 of the contact hole 25a is excessively increased, the aperture ratio of the pixel electrode 10 is reduced accordingly.

  That is, as can be understood with reference to the cross-sectional view of FIG. 6, when the diameter D1 of the contact hole 25a is increased, the diameter D2 of the contact hole 25a located near the surface of the overlayer 27 is increased accordingly. In general, light leakage may occur in the contact hole 25a, which may adversely affect the display. Therefore, in order to prevent such light leakage, the contact hole 25a on the color filter substrate 91 serving as a counter substrate is supported. A black light shielding layer BM is formed at the position. As described above, when the diameter D2 of the contact hole 25a is increased, the area of the black light-shielding layer BM is increased correspondingly, so that the aperture ratio of the pixel electrode 10 is decreased. For this reason, it is necessary to regulate the upper limit value of the diameter D1 of the contact hole 25a to a certain size. Therefore, in the present invention, the upper limit value of the diameter D1 of the contact hole 25a is set to 20 μm from the relationship with the aperture ratio.

  Based on the above examination results, in the liquid crystal display device 100 of the present invention, when the diameter D1 of the contact hole 25a is specified to be 5 μm to 20 μm and a voltage of 0.1 V is applied to the connection portion E1, the contact resistance is 500 KΩ or less. To be. As a result, horizontal stripes, pixel irregularities, and the like do not occur on the display image during driving. Therefore, a good display can be obtained with the resistance necessary for driving the TFD element 21. Moreover, the fall of an aperture ratio can be prevented by prescribing | regulating the diameter D1 of the contact hole 25a to 5 micrometers-20 micrometers.

[Method for Manufacturing Liquid Crystal Display Device 100]
Next, a method for manufacturing the liquid crystal display device 100 will be described with reference to FIGS. FIG. 8 is a flowchart showing a method for manufacturing the liquid crystal display device 100. FIG. 9 is a flowchart corresponding to step S <b> 1 in FIG. 8, specifically a flowchart showing a method for manufacturing the element substrate 92. In particular, the present invention is characterized by steps P9 to P11 and step P13 in the flowchart of FIG. 10 and 11 show a partial cross-sectional view corresponding to each step of the flowchart of FIG. 9 and a partial plan view corresponding to the partial cross-sectional view. In the partial plan views of FIGS. 10 and 11, the rectangular broken line area indicates one sub-pixel area SG.

First, the element substrate 92 is manufactured (step S1). Here, a method for manufacturing the element substrate 92 will be described in detail with reference to FIGS. First, as shown in FIG. 10A, a Ta ₂ O ₅ film 70 serving as a base layer is formed on the upper substrate 1 to a thickness of about 0.1 μm (step P1). Subsequently, the Ta ₂ O ₅ film 70 is formed. A TaW film 350 containing about 0.2% by weight of W (tungsten) is formed on the ₂ O ₅ film 70 to a thickness of about 0.1 μm (process P2). In FIG. 10A, the alternate long and short dash line indicates the Ta ₂ O ₅ film 70 and the alternate long and two short dashes line indicates the TaW film 350.

Next, as shown in FIG. 10B, the TaW film 350 is patterned by dry etching (process P3), and is a first metal film 322 that is a component of the TFD element 21, and a component of the data line 32. A first metal film 312 is formed. Next, as shown in FIG. 10C, a Ta ₂ O ₅ film, that is, an insulating film 323 is formed on the first metal film 322 to a thickness of about 0.02 μm by the anodic oxidation method ( Step P4). At this time, a Ta ₂ O ₅ film, that is, an insulating film 313 is also formed on the first metal film 312 with a predetermined thickness by the anodic oxidation method (step P4).
Subsequently, the heat treatment A, that is, the annealing process A, is performed on the insulating film 323 and the like covering the first metal film 322 (process P5). The annealing process A is performed, for example, in an atmosphere such as nitrogen gas in an annealing apparatus under conditions of about 320 ° C. and a holding time of 30 minutes. By performing the annealing process A, the Ta ₂ O ₅ film as the insulating film 323 becomes a denser film, and the insulating film 323 that satisfies the design specifications can be formed.

Next, a chromium film is formed to a thickness of about 0.3 μm on the Ta ₂ O ₅ film 70 and the insulating films 323 and 313 (process P6, not shown), and subsequently, FIG. As shown in FIG. 5, the chromium film is patterned to form second metal films 336 and 316 (process P7). Thereby, the data line 32 is formed. Next, as shown in FIG. 11A, an extra TaW film used for anodizing in the above-described step, strictly speaking, an extra first metal having an insulating film 323 formed on the surface. The film 322 is separated from the Ta ₂ O ₅ film 70 (process P8). Thereby, the TFD element 21 including the first TFD element 21a and the second TFD element 21b is formed.

  Next, the annealing process B characterizing the present invention is performed (step P9). That is, after the second electrode films 336 and 316 are formed, the annealing process B is performed before the overlayer 25 and the pixel electrode (ITO) are formed. The annealing process B is performed in order to make the characteristics of the TFD element 21 constant as determined in the specification as described above. In particular, in the present invention, the annealing process B is performed under a certain condition, so that the insulating film 323 and the second metal films 336 and 316 are adjusted to reduce the contact resistance. This point will be described with reference to FIG. 7, FIG. 12, and FIG. FIG. 12 is a graph showing the relationship between the contact resistance and the voltage applied to the connection portion E1 when the conditions of the annealing treatment B are changed, that is, when the holding time is changed under a heating temperature of 250 ° C. . In FIG. 12, the horizontal axis indicates an applied voltage (within a range of 0 to 1.0 (V)) applied to the connection portion E1, and the vertical axis indicates contact resistance.

  A graph W10 is a graph when the holding time of the annealing process B is 50 minutes, a graph W11 is a graph when the holding time of the annealing process B is 25 minutes, and a graph W12 is the annealing process B. Is a graph when the holding time of annealing process B is 5 minutes, graph W13 is a graph when the holding time of annealing process B is 5 minutes, and graph W14 is when the holding time of annealing process B is 0 minute It is a graph of. FIG. 13 is a graph showing the relationship between the holding time of the annealing process B (heating temperature 250 ° C.) and the contact resistance when the applied voltage to the connection portion E1 is 0.1 V in the graph of FIG. Note that the contact resistance in FIGS. 12 and 13 is the resistance of the connection portion E1 between the pixel electrode (ITO) and the second metal film 336 when the contact hole diameter is 7 μm by the collective exposure machine.

  It can be understood from the graphs W10 to W14 shown in FIG. 12 and the graph W20 shown in FIG. 13 that the contact resistance increases as the holding time of the annealing process B increases. Note that, when the applied voltage to the connection portion E1 shown in FIG. 12 is in the range of 0 to 1.0 V, the contact resistance changes linearly regardless of the holding time of the annealing process B. Therefore, the contact resistance varies. There are few. This is mainly because the rate at which the second metal film 336 of the TFD element 21 is oxidized increases as the holding time of the annealing process B becomes longer. Therefore, in order to reduce the contact resistance, it is necessary to limit the holding time of the annealing process B to a certain condition.

  Therefore, in the present invention, in order to reduce the contact resistance, the annealing treatment B is performed under certain conditions, specifically 230 to 280 ° C. (holding time 60 minutes or less, desirably 30 minutes or less), preferably 250 Run under ℃ (holding time 5 minutes). Here, the effect of the annealing treatment B is exhibited in proportion to the integrated value of the target heating temperature and holding time. For this reason, when the target heating temperature is set to be higher than 250 ° C. within the temperature range of 230 to 280 ° C., the holding time is shortened to less than 5 minutes, while the target heating temperature is set within 250 ° C. In order to make it smaller, the annealing process B is executed with the holding time longer than 5 minutes. By performing the annealing process B under such conditions, when the diameter D1 of the contact hole 25a is 5 μm, the contact resistance can be reduced to 500 KΩ or less when the voltage applied to the connection portion E1 is 0.1V. (See graph W1 in FIG. 7).

Returning to FIG. 9, next, overlayer patterning is executed (step P10). Specifically, as shown in FIG. 11B, an overlayer 25 that is an insulating film is formed on the Ta ₂ O ₅ film 70, the TFD element 21, and the data line 32 to a thickness of about 2.0 μm. . As an overlayer material, an acrylic resin having photosensitivity and transparency is suitable. At the same time, a contact hole 25a having a shape obtained by reversing the truncated cone shape in a cross-sectional view is formed in a part on the second metal film 336 by a stepper or a batch exposure machine. In particular, in the present invention, the diameter D1 of the contact hole 25a corresponding to the position on the second metal film 336 is formed to be 5 to 20 μm in order to make the contact resistance 500 KΩ or less. The stepper can form contact holes in the range of 5 to 6 μm. For this reason, when using a stepper, it is preferable to form the diameter D1 of the contact hole 25a to 5 μm in order to improve the aperture ratio. On the other hand, the batch exposure machine can form contact holes in the range of 6 to 8 μm. For this reason, when a batch exposure machine is used, it is preferable to form the diameter D1 of the contact hole 25a to 7 μm. Thereby, an aperture ratio can be improved. Further, by performing batch exposure, a plurality of contact holes 25a can be formed simultaneously, so that the contact holes 25a can be formed at low cost.

  Next, a pixel electrode (ITO) is formed (process P11). Specifically, a pixel electrode (ITO) is formed on the overlayer 25 and the second metal film 336 in the contact hole 25a by a sputtering apparatus. Thereby, the pixel electrode 10 and the second metal film 336 are electrically connected in the contact hole 25a. Note that, depending on the film formation conditions of the pixel electrode 10 at this time, the contact resistance may increase or vice versa. For this reason, in order to reduce the contact resistance, it is necessary to define the film formation conditions of the pixel electrode. Therefore, in the present invention, in order to reduce the contact resistance, a cleaning process (hereinafter simply referred to as “plasma ashing”) is first performed before forming the pixel electrode (ITO) in the process P11, and then the pixel electrode is formed. (ITO) is formed at a predetermined film forming power and speed.

  Here, “plasma ashing” refers to cleaning the surface of the substrate by exposing the substrate manufactured in the process P10 to oxygen gas plasma-activated in an inert gas atmosphere such as argon to which oxygen gas is added. Refers to a process. By performing this process, organic components such as resin remaining on the substrate, particularly in the connection portion E1, can be removed, and the contact resistance can be reduced. In addition, the adhesion between the overlayer and the pixel electrode (ITO) can be improved.

  Here, with reference to FIG. 14, the optimum film-forming conditions of the pixel electrode which characterize the present invention will be examined. FIG. 14 is a chart showing the film forming conditions of the pixel electrode.

  The meaning of each item in the chart of FIG. 14 is as follows. “Level” means each standard when the conditions of “flow rate of oxygen during plasma ashing (sccm)” and “deposition power and speed of pixel electrode (Power / Scan)” are changed. In FIG. 14, nine standards of level 1 to level 9 are shown. “Oxygen flow rate during ashing (sccm)” means the flow rate of oxygen gas that is added to and introduced into argon gas when performing plasma ashing. In order to keep the internal pressure constant (approximately 3.5 Pa), the sum of the argon gas and oxygen gas flow rates is set to 375 sccm. Therefore, 35 sccm and 70 sccm without oxygen gas flow during the ashing process correspond to argon gas: oxygen gas of 375 sccm: 0 sccm, 340 sccm: 35 sccm, and 305 sccm: 70 sccm, respectively.

  “Film formation of pixel electrode (ITO)” means power and speed for forming a pixel electrode by a sputtering apparatus. For example, when the thickness of the pixel electrode is set to 0.05 μm (= 500 mm), “2.5 kW (4 Scan)” means that the power for forming the pixel electrode by the sputtering apparatus is 2.5 kW, In addition, it means that the pixel electrode is formed at a speed of 125 Å / Scan. “Sheet resistance (Ω / □)” means an electrical resistance from one side to the opposite side of a square pixel electrode film. The “transmission rate (%) of the pixel electrode (ITO)” literally means a ratio of transmitting light. Therefore, a brighter display can be obtained as the transmittance is higher. “Side etch amount” refers to, for example, an amount by which a side edge (width) of a patterned pixel electrode is removed. For example, when the width of the pixel electrode is 4.1 μm, “a side etch amount is 4.1 μm” means that the pattern of the pixel electrode does not remain at all. Therefore, it can be said that the side etch amount is preferably as small as possible. “Contact resistance” refers to resistance when a voltage of 0.1 V is applied to the connection portion E1 between the pixel electrode (ITO) and the second metal film 336 as described above.

  In FIG. 14, the level having the optimum film formation condition for the pixel electrode is a level where the items of sheet resistance, pixel electrode transmittance, side etch amount, and contact resistance may be combined. Therefore, it is examined which of the levels 1 to 9 is better. First, the levels 1 to 3, 5 and 6 are not preferable because the side etch amount is 4.1 μm or more and the pattern of the pixel electrode does not remain. Therefore, all of these levels are indicated by “x” in the comprehensive judgment. Next, considering Level 4, Level 4 has a better side etch amount than Levels 1-3, 5, and 6, but it is as large as 3.4 μm. ing.

  Next, when the levels 7 to 9 are examined, it can be said that the levels 7 and 8 are preferable among these levels. In particular, these levels 7 and 8 both have a small side etch amount and good contact resistance. Level 9 has a side etch amount and contact resistance larger than levels 7 and 8, and therefore, “x” is indicated in the overall judgment. Here, when comparing whether level 7 or level 8 is finally better, level 7 has a smaller amount of side etch than level 8, but on the contrary, contact resistance is large and variation is large. Therefore, in the comprehensive determination, level 8 represents “◎” and level 7 represents “◯”.

Summarizing the above examination results, the optimum film formation conditions for the pixel electrode are as follows. First, “plasma ashing” is performed under the conditions of a flow rate of argon gas: oxygen gas = 340 (sccm): 35 (sccm). This corresponds to a flow ratio of inert gas to oxygen gas of approximately 10: 1. More specifically, the internal pressure at this time is 3.5 Pa, and the treatment is performed at a power density of ² kW / m ² for 30 seconds. Next, the film formation of the pixel electrode (ITO) is performed for 500 mm under the condition of 2.5 KW (4 Scan) by a sputtering apparatus or the like. More specifically, the argon gas and oxygen gas flow rates are 80 sccm, 1 sccm, the internal pressure is 0.6 Pa, and the temperature setting is 210 ° C. The film formation speed at this time is about 3 liters / second. Thereby, sheet resistance, the transmittance | permeability of a pixel electrode (ITO), the amount of side etching, and contact resistance can be made favorable.

  Next, patterning of the pixel electrode is performed (process P12). Specifically, as shown in FIG. 11C, the pixel electrode 10 is formed by patterning the pixel electrode (ITO) into a substantially rectangular shape in the sub-pixel SG region (process P12).

  Next, a heat treatment C, that is, an annealing process C is selectively performed (process P13). The purpose of the annealing process C is to reduce the resistance of the pixel electrode 10 by firing the pixel electrode 10 under certain conditions. However, in the case of a poly-type pixel electrode, since the film is formed at a high temperature, the resistance of the pixel electrode is already small, and it is not necessary to perform the annealing process C. On the other hand, in the case of an amorphous pixel electrode, since the resistance of the pixel electrode is high, the annealing treatment C is performed under certain conditions, specifically 200 to 230 ° C. (retention time 30 to 30). 60 minutes), preferably 220 ° C. (holding time 30 minutes). The effect of the annealing C is exhibited in proportion to the target heating temperature and the integrated value of the holding time. For this reason, when the target heating temperature of annealing treatment C is set to be higher or lower than 220 ° C. within the range of 200 to 230 ° C., the same effect as 220 ° C. (retention time 30 minutes) can be obtained. It is necessary to adjust the holding time as possible.

  Next, other components are attached (process P14). Specifically, as shown in FIG. 11 (d), a retardation plate (¼ wavelength plate) 13 and a polarizing plate 14 are attached to the lower side of the upper substrate 1. Thus, the element substrate 92 shown in FIG. 6 is manufactured.

  Returning to FIG. 8, next, the color filter substrate shown in FIG. 2 is manufactured by a known method (step S2), and the element substrate 92 and the color filter substrate 91 are bonded together via the seal member 3 (step S3). . Next, liquid crystal is injected into an opening (not shown) formed between the element substrate 92 and the color filter substrate 91 to seal the opening (step S4). Next, the liquid crystal display device 100 shown in FIG. 2 is manufactured by mounting other components.

  In the liquid crystal display device 100 of the present invention thus manufactured, the diameter D1 of the contact hole 25a is regulated to 5 μm to 20 μm, and a voltage of 0.1 V is applied to the connection portion E1 between the pixel electrode 10 and the second metal film 336. The contact resistance when applied is 500 KΩ or less. Thereby, an above-mentioned effect can be acquired.

[Modification]
In the above embodiment, the present invention is applied to the transflective liquid crystal display device 100. However, the present invention is not limited to this, and the present invention can also be applied to a reflective or transmissive liquid crystal display device. In the above embodiment, the TN liquid crystal is applied to the liquid crystal display device 100. However, the liquid crystal display device 100 is not limited thereto, and the liquid crystal having negative dielectric anisotropy is applied to the liquid crystal display device 100. Also good.

[Electronics]
Next, an embodiment in which the liquid crystal display device 100 according to the present invention is used as a display device of an electronic apparatus will be described.

  FIG. 15 is a schematic configuration diagram showing the overall configuration of the present embodiment. The electronic apparatus shown here includes the liquid crystal display device 100 and a control unit 410 that controls the liquid crystal display device 100. Here, the liquid crystal display device 100 is conceptually divided into a panel structure 403 and a drive circuit 402 composed of a semiconductor IC or the like. Further, the control means 410 includes a display information output source 411, a display information processing circuit 412, a power supply circuit 413, and a timing generator 414.

  The display information output source 411 includes a memory such as a ROM (Read Only Memory) or a RAM (Random Access Memory), a storage unit such as a magnetic recording disk or an optical recording disk, and a tuning circuit that tunes and outputs a digital image signal. The display information is supplied to the display information processing circuit 412 in the form of an image signal of a predetermined format based on various clock signals generated by the timing generator 414.

  The display information processing circuit 412 includes various well-known circuits such as a serial-parallel conversion circuit, an amplification / inversion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and executes processing of input display information to obtain image information. Are supplied to the drive circuit 402 together with the clock signal CLK. The driving circuit 402 includes a scanning line driving circuit, a data line driving circuit, and an inspection circuit. The power supply circuit 413 supplies a predetermined voltage to each of the above-described components.

  Next, specific examples of electronic devices to which the liquid crystal display device 100 according to the present invention can be applied will be described with reference to FIG.

  First, an example in which the liquid crystal display device 100 according to the present invention is applied to a display unit of a portable personal computer (so-called notebook personal computer) will be described. FIG. 16A is a perspective view showing the configuration of this personal computer. As shown in the figure, the personal computer 710 includes a main body 712 having a keyboard 711 and a display 713 to which the liquid crystal display panel according to the present invention is applied.

  Next, an example in which the liquid crystal display device 100 according to the present invention is applied to a display unit of a mobile phone will be described. FIG. 16B is a perspective view showing the configuration of this mobile phone. As shown in the figure, the cellular phone 720 includes a plurality of operation buttons 721, a reception port 722, a transmission port 723, and a display unit 724 to which the liquid crystal display device 100 according to the present invention is applied.

  Electronic devices to which the liquid crystal display device 100 according to the present invention can be applied include a liquid crystal television and a viewfinder in addition to the personal computer shown in FIG. 16A and the mobile phone shown in FIG. Type / monitor direct-view type video tape recorder, car navigation device, pager, electronic notebook, calculator, word processor, workstation, videophone, POS terminal, digital still camera, etc.

  Further, the present invention is not limited to a liquid crystal display device, but also an electroluminescence device, an organic electroluminescence device, a plasma display device, an electrophoretic display device, and a device using an electron-emitting device (Field Emission Display and Surface-Conduction Electron-Emitter Display). The present invention can be similarly applied to various electro-optical devices such as the above.

The top view which shows the structure of the electrode and wiring of the liquid crystal display device which concern on this embodiment. The cross-sectional structure of a liquid crystal display device is shown. The top view which shows the structure of the electrode of an element substrate, wiring, etc. FIG. The top view which shows the structure of the electrode of a color filter board | substrate. The partial top view which shows the layout of the two terminal elements etc. in an element substrate. FIG. 6 is a partial cross-sectional view near a contact hole in FIG. 5. The graph which shows the relationship between a contact hole diameter and contact resistance. 6 is a flowchart showing a method for manufacturing the liquid crystal display device according to the embodiment. The flowchart which shows the manufacturing method of an element substrate. The fragmentary sectional view and partial plan view which show the manufacturing process of an element substrate. The fragmentary sectional view and partial plan view which show the manufacturing process of an element substrate. The graph which shows the relationship with contact resistance, an applied voltage, etc. The graph which shows the relationship between the retention time of annealing process B, and contact resistance. The chart which shows the film-forming conditions of a pixel electrode (ITO). 1 is a circuit block diagram of an electronic apparatus to which a liquid crystal display device according to an embodiment is applied. An example of an electronic apparatus to which the liquid crystal display device according to the embodiment is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Upper substrate, 2 Lower substrate, 3 Seal member, 6 Colored layer, 7 Conductive member, 8 Scan electrode, 10 Pixel electrode, 25 Overlayer, 25a Contact hole, 31 Scan line, 32 Data line, 21 TFD element, 91 Color filter substrate, 92 element substrate, E1 connection part, 100 liquid crystal display device

Claims (10)

A data line, a two-terminal element having a first electrode, an insulating film and a second electrode and connected to the data line, an insulating film formed on the data line and the two-terminal element, and the insulating film An electro-optical device comprising a substrate having a pixel electrode formed thereon, a contact hole connecting the second electrode and the pixel electrode, and holding an electro-optical material,
The electro-optical device according to claim 1, wherein a resistance of a connection portion of the contact hole is set to 500 KΩ or less when a voltage of 0.1 V is applied.   The electro-optical device according to claim 1, wherein the pixel electrode is ITO, and the second electrode is Cr.   The electro-optical device according to claim 2, wherein a diameter of the contact hole is set to a size of 5 to 20 μm.   An electronic apparatus comprising the electro-optical device according to claim 1 as a display unit. A method of manufacturing an electro-optical device having a substrate having a two-terminal element and holding an electro-optical material,
Forming the two-terminal element by sequentially forming a first electrode, an insulating film, and a second electrode on the substrate;
Forming an insulating film on the second electrode;
Forming a pixel electrode on the insulating film, and
After forming the second electrode and before forming the pixel electrode, annealing is performed on the two-terminal element under the conditions of a heating temperature of 230 to 280 ° C. and a holding time of 60 minutes or less. A method for manufacturing an electro-optical device, comprising: forming an element substrate by a process including a process for performing the process. In the step of forming the insulating film, the insulating film is formed after the annealing process and before the pixel electrode is formed,
6. The method of manufacturing an electro-optical device according to claim 5, further comprising a step of forming a contact hole having a diameter of 5 to 20 [mu] m on the second electrode.   After forming the insulating film and before forming the pixel electrode, the insulating film and the contact are formed in a device in which the flow ratio of inert gas to oxygen gas is flowed at 10: 0 to 10: 2. The method of manufacturing an electro-optical device according to claim 6, further comprising a cleaning step of cleaning the surface of the second electrode located in the hole.   8. The method of manufacturing an electro-optical device according to claim 7, wherein the cleaning step uses argon gas as the inert gas.   The step of forming the pixel electrode includes a step of forming the pixel electrode at a rate of 2 to 4 liters / second by a sputtering apparatus after the cleaning step and forming the pixel electrode positioned in the insulating film and the contact hole. The method for manufacturing an electro-optical device according to claim 7 or 8. The method comprising performing an annealing process on the pixel electrode under the conditions of a heating temperature of 200 to 230 ° C. and a holding time of 30 to 60 minutes after the pixel electrode is formed. 10. A method for manufacturing the electro-optical device according to 9.

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