JP2006049848A - n-TYPE GROUP III NITRIDE SEMICONDUCTOR LAMINATED STRUCTURE - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a low-resistance n-type Group III nitride semiconductor layer having excellent flatness and few cracks and pits, and also to provide a Group III nitride semiconductor light emitting element having excellent light emitting efficiency with low forward voltage using the n-type Group III nitride semiconductor layer. <P>SOLUTION: An n-type Group III nitride semiconductor laminated structure is formed by laminating an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer alternately. Further, the Group III nitride semiconductor light emitting element is constituted by providing the n-type Group III nitride semiconductor laminated structure between a substrate and a light emitting layer of Group III nitride semiconductor. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an n-type group III nitride semiconductor multilayer structure and a group III nitride semiconductor light emitting device using the same.

Conventionally, a group III nitride semiconductor formed on a substrate is a group III nitride semiconductor light emitting device having a pn junction structure such as a light emitting diode (LED) or a laser diode (LD) that emits visible light having a short wavelength. It is used as a functional material for constituting (see, for example, Patent Document 1). For example, when an LED that emits light in the near ultraviolet band, the blue band, or the green band is formed, an n-type or p-type aluminum gallium nitride (compositional formula Al _X Ga _Y N: 0 ≦ X, Y ≦ 1, X + Y = 1) is used to construct a cladding layer (see, for example, Patent Document 2). Further, gallium indium nitride (compositional formula _{Ga Y In Z N: 0 ≦} Y, Z ≦ 1, Y + Z = 1) is used to configure the light-emitting layer (for example, see Patent Document 3).

In a conventional group III nitride semiconductor light-emitting device, an n-type or p-type group III nitride semiconductor layer is generally bonded to the light emitting layer as a cladding layer. This is because a light-emitting portion having a heterojunction structure is formed in order to obtain high-intensity light emission. For example, in order to construct a light emitting portion having a double heterojunction structure, the light emitting layer is made of Ga _Y In _ZN (0 ≦ Y, Z ≦ 1, Y + Z = 1) or the like, and the n-type or p-type cladding layer is used. The group III nitride semiconductor layer is joined (for example, refer nonpatent literature 1).

For example, an n-type group III nitride semiconductor layer disposed between a substrate and a light emitting layer has heretofore been exclusively composed of a group III nitride semiconductor doped with silicon (Si). For example, Si-doped n-type Al _x Ga _Y N (0 ≦ X, Y ≦ 1, X + Y = 1) layers having controlled resistivity by adjusting the doping amount of silicon are utilized (for example, (See Patent Document 4).

  Si is often used as an n-type impurity because it provides stable crystallinity and electrical characteristics up to a relatively high concentration. However, there is a problem that cracks occur when doped in large amounts. On the other hand, germanium (Ge), sulfur (S), tin (Sn), selenium (Se), and tellurium (Te) are known as n-type impurities other than silicon (see, for example, Patent Documents 5 and 6). However, compared with the case of Si, the doping efficiency is low, which is disadvantageous for obtaining a low-resistance n-type group III nitride semiconductor layer. For example, when Ge is doped at a high concentration in order to obtain a low-resistance n-type group III nitride semiconductor layer, small holes (pits) that impair flatness are generated on the surface of the n-type group III nitride semiconductor layer. There were drawbacks.

JP 2000-332364 A JP 2003-229645 A Japanese Patent Publication No.55-3834 Japanese Patent No. 3383242 Japanese Patent Laid-Open No. 4-170397 Japanese Patent No. 3504976 Akazaki Isamu, "III-V group compound semiconductor", Baifukan Co., Ltd., published on May 20, 1995, see Chapter 13.

  An object of the present invention is to provide a low-resistance n-type group III nitride semiconductor layer having excellent flatness with few occurrences of cracks and pits, and using it, a forward voltage is low and a light emitting efficiency is excellent. A group nitride semiconductor light emitting device is provided.

The present invention provides the following inventions.
(1) An n-type III comprising an n-type impurity atom high-concentration layer and an n-type impurity atom low-concentration layer laminated on a substrate, wherein the low-concentration layer is laminated on the high-concentration layer Group nitride semiconductor multilayer structure.

(2) The n-type group III nitride semiconductor multilayer structure according to the above item (1), wherein the high concentration layer and the low concentration layer are alternately present periodically.

(3) The n-type group III nitride semiconductor multilayer structure according to the above item 1 or 2, wherein the high-concentration layer and the low-concentration layer each have a thickness of 0.5 to 500 nm.

(4) The n-type group III according to any one of the above items 1 to 3, wherein the thickness of the low concentration layer is equal to or greater than the thickness of the high concentration layer Nitride semiconductor multilayer structure.

(5) The n-type group III nitride semiconductor multilayer structure according to any one of the above items 2 to 4, wherein the number of repetition periods of the high-concentration layer and the low-concentration layer is 10 to 1,000.

(6) The n-type group III nitride semiconductor multilayer structure according to any one of 1 to 5 above, wherein the thickness of the entire multilayer structure is 0.1 to 10 μm.

(7) The n-type group III nitride according to any one of 1 to 6 above, wherein the n-type impurity atom concentration of the high-concentration layer is 5 × 10 ^{17 to} 5 × 10 ¹⁹ cm ^−3. Physical semiconductor laminated structure.

(8) The n-type impurity atom concentration in the low concentration layer is lower than the n-type impurity atom concentration in the high concentration layer, and is 2 × 10 ¹⁹ cm ⁻³ or less. Item 4. An n-type group III nitride semiconductor multilayer structure according to item.

(9) The n-type group III nitride semiconductor multilayer structure according to the above item 8, wherein the low-concentration layer is not intentionally doped with n-type impurity atoms.

(10) One or two n-type impurity atoms selected from the group consisting of silicon (Si), germanium (Ge), sulfur (S), selenium (Se), tin (Sn), and tellurium (Te) 10. The n-type group III nitride semiconductor multilayer structure according to any one of 1 to 9 above, which is a combination of the above.

(11) In a group III nitride semiconductor light emitting device having a light emitting layer made of a group III nitride semiconductor on a substrate, the substrate according to any one of items 1 to 10, between the substrate and the light emitting layer. A group III nitride semiconductor light-emitting device comprising an n-type group III nitride semiconductor multilayer structure.
(12) A lamp comprising the group III nitride semiconductor light-emitting device according to item 11 and a fluorescent material.

  In the n-type group III nitride semiconductor layer laminated structure of the present invention, the n-type group III nitride has a low-resistance n-type impurity atom high-concentration layer filling the cracks and pits generated in the low-resistance n-type impurity atom high-concentration layer. The entire semiconductor layer has low resistance and excellent flatness. Therefore, a light emitting device using such an n-type group III nitride semiconductor multilayer structure has a low forward voltage and excellent luminous efficiency. This is effective regardless of the type of the n-type impurity element, and an n-type group III nitride semiconductor layer having low resistance and excellent flatness is obtained even with an n-type impurity that has conventionally been difficult to obtain low resistance. I can do it.

In the present invention, the substrate on which the group III nitride semiconductor layer is laminated is a sapphire (α-Al ₂ O ₃ single crystal), zinc oxide (ZnO), gallium oxide / lithium (having a relatively high melting point and heat resistance). Examples thereof include an oxide single crystal material such as a composition formula LiGaO ₂ ), a substrate made of a group IV semiconductor single crystal such as silicon single crystal (silicon) and cubic or hexagonal crystal type silicon carbide (SiC). As the substrate material, a III-V compound semiconductor single crystal material such as gallium phosphide (GaP) can also be used. An optically transparent single crystal material that can transmit light emitted from the light emitting layer can be effectively used as a substrate. Sapphire is preferable.

N-type Group III nitride semiconductor layer of the present invention, and by a composition formula _{Al X Ga Y In Z N 1} -a M a (0 ≦ X ≦ 1,0 ≦ Y ≦ 1,0 ≦ Z ≦ 1, X + Y + Z = 1. Symbol M represents a Group V element different from nitrogen, and 0 ≦ a <1)). When there is a lattice mismatch between the substrate and the group III nitride semiconductor layer formed thereon, the low temperature buffer layer or the high temperature buffer that relaxes the mismatch and provides a group III nitride semiconductor layer with excellent crystallinity. It is a good idea to stack with layers. The buffer layer can be made of, for example, aluminum gallium nitride (compositional formula Al _x Ga _y N: 0 ≦ X, Y ≦ 1, X + Y = 1) or the like.

  The group III nitride semiconductor layer having the above composition is formed by metal organic chemical vapor deposition (abbreviated as MOCVD, MOVPE or OMVPE), molecular beam epitaxy (MBE), halogen vapor phase epitaxy, hydride (hydride). ) It can be formed by vapor phase growth means such as vapor phase growth. Among these, the MOCVD method is preferable.

In the MOCVD method, hydrogen (H ₂ ) or nitrogen (N ₂ ) is used as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) is used as a Ga source as a group III source, and trimethyl aluminum (TMA) or triethyl aluminum is used as an Al source. (TEA), trimethylindium (TMI) or triethylindium (TEI) is used as the In source, and ammonia (NH ₃ ) or hydrazine (N ₂ H ₄ ) is used as the nitrogen source.

As the n-type impurity, silicon (Si), germanium (Ge), tin (Sn), sulfur (S), Se (selenium), Te (tellurium), or the like can be used. As raw materials, hydrides of respective elements, such as monosilane (SiH ₄ ), disilane (SiH ₆ ), germane (GeH ₄ ), hydrogen sulfide (H ₂ S), hydrogen selenide (H ₂ Se), telluride Hydrogen (H ₂ Te) and the like and organic compounds of the respective elements, for example, tetramethyl silicon ((CH ₃ ) ₄ Si), tetraethyl silicon ((C ₂ H ₅ ) ₄ Si), tetramethyl germanium ((CH ₃ ) ₄ Ge), tetraethyl germanium ((C ₂ H ₅ ) ₄ Ge), diethyl selenium ((C ₂ H ₅ ) ₂ Se), diisopropyl selenium ((C ₃ H ₇ ) ₂ Se), diethyl sulfide ((C ₂ H _{5) 2} S), diisopropyl sulfide _{((C 3 H 7) 2} S), tetramethyl tin _{((CH 3) 4 Sn)} , tetraethyl tin _{((C 2 H 5) 4} Sn), di Chiruteruru _{((CH 3) 2 Te)} , available diethyl tellurium _{((C 2 H 5) 2} Te) or the like. In the MBE method, elemental (metal) can also be used as a doping source.

  In the MOCVD method, it is preferable to grow a group III nitride semiconductor layer according to the purpose in a temperature range of 900 ° C. to 1250 ° C. on the substrate using the above-mentioned raw materials.

  The n-type impurity atom high-concentration layer and the low-concentration layer are formed by changing the supply amount of the doping source of the n-type impurity to the vapor phase growth reaction system during the vapor phase growth of the group III nitride semiconductor layer. For example, a large amount of n-type impurity doping source is instantaneously supplied to the vapor phase growth reaction system to form a layer containing n-type impurity atoms at a high concentration, and then the n-type impurity doping source is transferred to the vapor phase growth reaction system. Without supply, an undoped layer, that is, a layer having an n-type impurity atom concentration of zero is formed. In addition, after the growth of a layer containing n-type impurity atoms at a high concentration, the growth is temporarily stopped, and the growth conditions such as the V / III group material ratio are adjusted to conditions suitable for the layer having a low concentration of n-type impurity atoms. Then, a layer having a low n-type impurity atom concentration may be grown.

  If the supply amount of the n-type impurity doping source to the vapor phase growth reaction system is increased or decreased over time, thin layers having different n-type impurity atom concentrations can be alternately and periodically formed. The n-type group III nitride semiconductor layer composed of the n-type impurity atom high-concentration layer and the n-type impurity atom low-concentration layer in the present invention has a thin n-type impurity atom concentration and a low n-type impurity atom concentration. It is preferable that a large number of thin layers are alternately laminated.

  In this case, the thickness of the thin layer containing n-type impurity atoms at a high concentration is suitably from 0.5 nm to 500 nm. Preferably, they are 2 nm or more and 200 nm or less, More preferably, they are 3 nm or more and 50 nm or less. When the film thickness is less than 0.5 nm, the n-type impurity doping amount in the entire n-type semiconductor layer is not sufficient and the resistance is increased. On the contrary, if it exceeds 500 nm, cracks and pits are not completely filled in the low-concentration layer, resulting in poor flatness. Moreover, if the low concentration layer is made sufficiently thick to fill cracks and pits, the resistance of the entire n-type semiconductor layer is increased.

  The thickness of the thin layer containing n-type impurity atoms at a low concentration is preferably 0.5 nm or more and 500 nm or less, more preferably 2 nm or more and 200 nm or less, similarly to the thin layer containing n-type impurity atoms at a high concentration. 3 nm or more and 50 nm or less are particularly preferable. When the film thickness is less than 0.5 nm, cracks and pits formed in the high concentration layer cannot be sufficiently filled, and flatness is impaired. On the other hand, when the thickness exceeds 500 nm, the resistance of the entire n-type semiconductor layer is increased, which is disadvantageous for obtaining a group III nitride semiconductor light emitting device having a low forward voltage (Vf) or low threshold voltage (Vth).

  In the present invention, a set of a high concentration layer and a low concentration layer that are in contact with each other is referred to as one period. The total thickness of the high-concentration layer and the low-concentration layer in each cycle, that is, the thickness of one cycle is preferably 1 nm or more and 1000 nm or less. Preferably, they are 4 nm or more and 400 nm or less, More preferably, they are 6 nm or more and 100 nm or less. If it exceeds 1000 nm, formation of cracks and pits cannot be suppressed, or the resistance of the entire n-type semiconductor layer is increased. Further, in order to make the total film thickness less than 1 nm, the supply amount of the N-type impurity raw material must be changed frequently, and the working efficiency is lowered.

  If the high-concentration layer is thicker than the low-concentration layer in one cycle, cracks and pit formation are not sufficiently suppressed, and flatness cannot be obtained sufficiently. On the other hand, when the low concentration layer is equal to or thicker than the high concentration layer in one cycle, the flatness is good. Therefore, the thickness of the low concentration layer is preferably equal to or greater than the thickness of the high concentration layer.

  The total thickness of the n-type group III nitride semiconductor multilayer structure is preferably 0.1 μm to 10 μm, more preferably 0.3 μm to 5 μm, and particularly preferably 0.5 μm to 3 μm. When the layer thickness is less than 0.1 μm, the forward voltage of the light emitting element increases. Further, even if the thickness is larger than 10 μm, there is not much difference in the obtained effect, and only the cost increases.

  From the thickness of one cycle and the thickness of the entire n-type semiconductor multilayer structure, the number of cycles to be stacked is preferably 1 or more and 10000 or less, more preferably 10 or more and 1000 or less, and particularly preferably 20 or more and 200 or less. . For example, an n-type semiconductor multilayer structure having a total thickness of 2 μm is formed by laminating over 100 periods, with a repetition of a high-concentration layer having a thickness of 10 nm and a low-concentration layer having a thickness of 10 nm as one period.

The concentration of the n-type impurity atoms in the high-concentration layer is preferably 5 × 10 ¹⁷ cm ⁻³ or more and 5 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁸ cm ⁻³ or more and 3 × 10 ¹⁹ cm ⁻³ or less. Is more preferably 3 × 10 ¹⁸ cm ⁻³ or more and 2 × 10 ¹⁹ cm ⁻³ or less. When the concentration is less than 5 × 10 ¹⁷ cm ⁻³ , the resistance of the entire n-type semiconductor layer increases, and it is difficult to obtain an LED with a low forward voltage. On the other hand, when the concentration of n-type impurity atoms exceeds 5 × 10 ¹⁹ cm ⁻³ , the carrier concentration is approximately (3-4) × 10 ¹⁹ cm ⁻³ . Doping n-type impurities exceeding this atomic concentration is not preferable because the density of cracks and pits on the surface increases rapidly. The n-type impurity atom concentration of the high-concentration layer is not necessarily constant over the entire n-type semiconductor multilayer structure, and the concentration may change continuously or discontinuously for each period. Further, the n-type impurity atom concentration may be changed inside each thin layer. Furthermore, the n-type impurity element may not be one kind, and two or more kinds of elements may be combined.

The concentration of the n-type impurity atoms in the low-concentration layer is preferably lower than the concentration of the n-type impurity atoms in the high-concentration layer and 2 × 10 ¹⁹ cm ⁻³ or less. If the concentration of the n-type impurity atom is larger than 2 × 10 ¹⁹ cm ⁻³ , the density of cracks and pits on the surface increases rapidly, which is not preferable. More preferably, it is 1 × 10 ¹⁹ cm ⁻³ or less, and particularly preferably 5 × 10 ¹⁸ cm ⁻³ or less. Regarding the lower limit, the lower the better, the more preferably it is not intentionally doped. If the low-concentration layer is composed of an undoped group III nitride semiconductor thin layer in order to make the n-type impurity atom concentration smaller, the effect of filling up cracks and pits generated on the surface of the high-concentration layer is further enhanced. This is preferable for obtaining a flat n-type semiconductor layer. It is desirable that the thickness of the low-concentration layer is reduced as the n-type impurity atom concentration in the low-concentration layer is lower and the carrier concentration is lower.

  Also in the low concentration layer, as in the high concentration layer, the n type impurity atom concentration of the low concentration layer does not necessarily have to be constant over the entire n type semiconductor layer, and the concentration is continuous or continuous for each period. It may change discontinuously. Further, the n-type impurity atom concentration may be changed inside each thin layer. Furthermore, the n-type impurity element may not be one kind, and two or more kinds of elements may be combined.

  The concentration and element type of the n-type impurity atom can be measured by, for example, secondary ion mass spectrometry (SIMS). This is a technique for performing mass analysis on an element ionized and ejected by irradiating the surface of a sample with primary ions, and the concentration distribution in the depth direction of a specific element can be observed and quantified. This method is also effective for n-type impurity elements present in the group III nitride semiconductor layer. At that time, the thickness of each layer can also be calculated.

  When a group III nitride semiconductor light emitting device is produced using the n-type group III nitride semiconductor multilayer structure of the present invention, the multilayer structure can be disposed anywhere between the substrate and the light emitting layer. For example, it can be directly bonded to the surface of the substrate, or can be bonded to a buffer layer provided on the surface of the substrate. Further, it can be provided by being bonded onto an underlayer made of undoped GaN or the like. At that time, the high concentration layer is disposed on the substrate side, the high concentration layer is stacked, and then the low concentration layer is stacked.

  If a group III nitride semiconductor layer is provided above the n-type semiconductor multilayer structure of the present invention close to the substrate or buffer layer, a group III nitride semiconductor layer having excellent crystallinity can be obtained. This is because the provision of the n-type semiconductor multilayer structure of the present invention suppresses upward propagation of layers such as misfit dislocations based on lattice mismatch with the substrate.

  Providing the n-type semiconductor multilayer structure of the present invention can suppress the propagation of dislocations penetrating from below to the upper layer, so that the light emitting layer formed thereabove has excellent crystallinity, and thus has a high emission intensity III. A group nitride semiconductor light emitting device can be obtained.

The light-emitting layer composed of a group III nitride _{semiconductor, Al X Ga Y In Z N} 1-a M a ( and by 0 ≦ X ≦ 1,0 ≦ Y ≦ 1,0 ≦ Z ≦ 1, X + Y + Z = 1. Symbol M represents a group V element different from nitrogen, and 0 ≦ a <1)), and light emitting layers such as single quantum well structures and multiple quantum well structures having various compositions represented by The light emitting layer can be used without any limitation. In addition, p-type group III nitride semiconductors for constituting a light emitting part of a double heterostructure are also known in various compositions represented by the above composition formula doped with p-type dopants such as Mg and Zn. Things can be used without any restrictions.

  After stacking the target semiconductor layer, a positive electrode and a negative electrode are formed at predetermined positions. Various configurations and structures are known as a positive electrode and a negative electrode for compound semiconductor light emitting devices, and these positive electrode and negative electrode can be used without any limitation in the present invention. Moreover, those manufacturing methods can also use well-known methods, such as a vacuum evaporation method and sputtering method, without any limitation.

  From the group III nitride semiconductor light emitting device of the present invention, for example, a lamp can be produced by providing a transparent cover by means well known in the art. In addition, a white lamp can be manufactured by combining the group III nitride semiconductor light emitting device of the present invention and a cover having a phosphor.

  The present invention will be described in more detail with reference to the following examples, but the present invention is not limited to these examples.

Example 1
FIG. 1 is a diagram schematically showing a stacked structure of a stacked structure including a Ge-doped n-type group III nitride semiconductor layer manufactured in this example.

  A structure in which a group III nitride semiconductor was stacked on a sapphire substrate was formed by the following procedure using a general low pressure MOCVD means. First, the (0001) -sapphire substrate 1 was placed on a susceptor made of high-purity graphite for semiconductors heated to a film formation temperature by a high-frequency (RF) induction heater. After placing, nitrogen gas was circulated in a stainless steel vapor phase growth reactor to purge the inside of the furnace.

After flowing nitrogen gas through the vapor phase growth reactor for 8 minutes, the induction heating type heater was operated, and the temperature of the substrate 1 was raised from room temperature to 600 ° C. in 10 minutes. While maintaining the temperature of the substrate 1 at 600 ° C., hydrogen gas and nitrogen gas were circulated to set the pressure in the vapor phase growth reactor to 1.5 × 10 ⁴ pascals (Pa). The surface of the substrate 1 was thermally cleaned by being left under this temperature and pressure for 2 minutes. After the thermal cleaning was completed, the supply of nitrogen gas into the vapor phase growth reactor was stopped. The supply of hydrogen gas was continued.

  Thereafter, the temperature of the substrate 1 was raised to 1120 ° C. in a hydrogen atmosphere. After confirming that the temperature was stabilized at 1120 ° C., hydrogen gas accompanied by vapor of trimethylaluminum (TMA) was supplied into the vapor phase growth reactor for 8 minutes and 30 seconds. Thereby, it reacts with nitrogen atoms generated by the decomposition of deposition deposits containing nitrogen that have been attached to the inner wall of the vapor phase growth reactor, and aluminum nitride (AlN) having a thickness of several nm is formed on the sapphire substrate 1. A high-temperature buffer layer 2 made of a thin film was attached. After stopping the supply of hydrogen gas accompanying the vapor of TMA into the vapor phase growth reactor and terminating the growth of AlN, the process waited for 4 minutes to completely discharge the TMA remaining in the vapor phase growth reactor.

Subsequently, ammonia (NH ₃ ) gas was supplied into the vapor phase growth reactor, and after 4 minutes, the temperature of the susceptor was lowered to 1040 ° C. while continuing the circulation of the ammonia gas. After confirming that the temperature of the susceptor reached 1040 ° C., wait for a while for the temperature to stabilize, and then start supplying trimethylgallium (TMG) into the vapor phase growth reactor, and the bottom made of undoped GaN The formation 3 was grown over 1 hour. The layer thickness of the underlayer 3 was 2 μm.

Next, the substrate temperature was raised to 1120 ° C., and when the temperature was stabilized, tetramethyl germanium ((CH ₃ ) ₄ Ge) was passed for 18 seconds and then stopped for 18 seconds. This cycle was repeated 100 times to form a Ge-doped n-type GaN layer 4 composed of a Ge atom high-concentration layer and a Ge atom low-concentration layer of the present invention having a thickness of 2.0 μm and periodically changing the Ge concentration.

  After the growth of the Ge-doped n-type GaN layer 4 was finished, energization of the induction heater was stopped, and the temperature of the substrate 1 was lowered to room temperature in about 20 minutes. During the temperature drop, the atmosphere in the vapor phase growth reactor was composed only of nitrogen. After confirming that the temperature of the substrate 1 was lowered to room temperature, the laminated structure was taken out from the vapor phase growth reactor.

The carrier concentration in the hole measurement of the Ge-doped n-type GaN layer 4 of the obtained multilayer structure was 7 × 10 ¹⁸ cm ⁻³ . The surface of the n-type GaN layer 4 was a very flat surface with a pit density of 200 pieces / cm ² or less. As a result of the SIMS analysis, the high concentration layer had a Ge atom concentration of 1.2 × 10 ¹⁹ cm ⁻³ and a thickness of 10 nm. The low concentration layer had a Ge atom concentration of 1 × 10 ¹⁸ cm ⁻³ and a thickness of 10 nm.

The SIMS measurement conditions were such that Cs ⁺ was used as the primary ion species, the acceleration voltage was 14.5 keV, and the ion current was 40 nA. The raster area was 100 μm ² and the analysis area was 30 μm ² .

(Comparative Example 1)
A layered structure was fabricated in the same manner as in Example 1 except that the Ge-doped n-type GaN layer 4 was formed as a 2.0 μm thick layer with (CH ₃ ) ₄ Ge always flowing at the same flow rate. did. The flow rate of (CH ₃ ) ₄ Ge was adjusted so that the carrier concentration by hole measurement of the Ge-doped n-type GaN layer 4 was 7 × 10 ¹⁸ cm ⁻³ as in Example 1.

The surface of the Ge-doped n-type GaN layer 4 of the obtained laminated structure had an extremely high pit density of 1 × 10 ⁶ cm ⁻³ and a flat surface could not be obtained.

(Example 2)
A group III nitride semiconductor layer was further laminated on the laminated structure produced in Example 1, to produce a group III nitride semiconductor light emitting device. FIG. 2 is a diagram schematically showing a cross-sectional structure of a group III nitride semiconductor light emitting device manufactured in this example.

The process up to the formation of the Ge-doped n-type GaN layer 4 is the same as that in the first embodiment. After the Ge-doped n-type GaN layer 4 was laminated, an undoped n-type In _0.03 Ga _0.97 N cladding layer 5 was stacked at 1060 ° C. The clad layer 5 was grown using triethylgallium (TEG) as a gallium source and trimethylindium (TMI) as an indium source, and the layer thickness was 12.5 nm.

Next, the temperature of the substrate 1 is set to 730 ° C., and the multi-quantum well structure light-emitting layer 6 having a five-period structure including the barrier layer 6a made of GaN and the well layer 6b made of In _0.25 Ga _0.75 N is undoped n-type In _0.03. It was provided on the Ga _0.97 N clad layer 5. In the light emitting layer 6 having the multiple quantum well structure, first, the GaN barrier layer 6 a is provided by being joined to the undoped n-type In _0.03 Ga _0.97 N cladding layer 5.

The GaN barrier layer 6a was grown using triethylgallium (TEG) as a gallium source. The layer thickness was 8 nm and was undoped. The In _0.25 Ga _0.75 N well layer 6b was grown using triethylgallium (TEG) as a gallium source and trimethylindium (TMI) as an indium source. The layer thickness was 2.5 nm and was undoped.

On the light emitting layer 6 having a multiple quantum well structure, a p-type Al _0.07 Ga _0.93 N cladding layer 7 doped with magnesium (Mg) was formed. The layer thickness was 10 nm. On the p-type Al _0.07 Ga _0.93 N cladding layer 7, a p-type GaN contact layer 8 doped with Mg was further formed. Bis-cyclopentadienyl Mg was used as the Mg doping source. Mg was added so that the hole concentration of the p-type GaN contact layer 8 was 8 × 10 ¹⁷ cm ⁻³ . The layer thickness of the p-type GaN contact layer 8 was 100 nm.

  After completing the growth of the p-type GaN contact layer 8, the energization of the induction heater was stopped, and the temperature of the substrate 1 was lowered to room temperature in about 20 minutes. During the temperature drop, the atmosphere in the vapor phase growth reactor was composed only of nitrogen. After confirming that the temperature of the substrate 1 was lowered to room temperature, the laminated structure was taken out from the vapor phase growth reactor. At this point, the p-type GaN contact layer 8 already showed p-type conductivity without performing an annealing process to electrically activate the p-type carrier (Mg).

  Next, using a known photolithography technique and a general dry etching technique, only the region where the n-type ohmic electrode 9 is to be formed was exposed to the Ge atom high concentration layer of the Ge-doped n-type GaN layer 4. . An n-type ohmic electrode 9 in which titanium and gold were laminated (the semiconductor side was titanium) was formed on the surface of the exposed Ge atom high concentration layer. The entire surface of the p-type GaN contact layer 8 forming the surface of the remaining laminated structure is coated with nickel and gold in order from the semiconductor side by using a general vacuum deposition means and a known photolithography means. A laminated p-type ohmic electrode 10 was formed.

  After that, it was cut into a 350 μm square LED chip, placed on a lead frame, and a gold lead was connected to the lead frame so that an element driving current could flow from the lead frame to the LED chip.

  A device driving current was passed in the forward direction between the n-type and p-type ohmic electrodes 9 and 10 via the lead frame. When the forward current was 20 mA, the forward voltage was 3.5V. Further, the central wavelength of emitted blue band light when a forward current of 20 mA was passed was 460 nm. In addition, the intensity of light emission measured using a general integrating sphere reached 5 mW, and a group III nitride semiconductor light-emitting device that gave high intensity light emission was obtained.

(Comparative Example 2)
A group III nitride semiconductor light-emitting device was produced in the same manner as in Example 2 except that the laminated structure produced in Comparative Example 1 was used. When the forward voltage and the emission intensity were measured in the same manner as in Example 2, the forward voltage was 3.5 V, which was the same as that in Example 2. However, the emission intensity was only 0.4 mW, and only low intensity emission was obtained. .

(Example 3)
In this example, the n-type GaN layer 4 was formed in the same manner as in Example 1 except that diethyl sulfide ((C ₂ H ₅ ) ₂ S) was used instead of tetramethylgermanium ((CH ₃ ) ₄ Ge). Thus, a laminated structure was produced, and a laminated structure including an S-doped n-type group III nitride semiconductor layer was produced.

The carrier concentration by hole measurement of the S-doped n-type GaN layer 4 of the obtained multilayer structure was 5 × 10 ¹⁸ cm ⁻³ . The surface of the n-type GaN layer 4 was a very flat surface with a pit density of 200 pieces / cm ² or less. As a result of SIMS analysis, the high concentration layer had an S atom concentration of 1.0 × 10 ¹⁹ cm ⁻³ and a thickness of 10 nm. The low concentration layer had an S atom concentration of 9 × 10 ¹⁷ cm ⁻³ and a thickness of 10 nm.

(Comparative Example 3)
The S-doped n-type GaN layer 4 was formed in the same manner as in Example 3 except that (C ₂ H ₅ ) ₂ S was made to be a layer having a thickness of 2.0 μm while always flowing at the same flow rate. Was made. The flow rate of (C ₂ H ₅ ) ₂ S was adjusted so that the carrier concentration by hole measurement of the S-doped n-type GaN layer 14 was 5 × 10 ¹⁸ cm ⁻³ as in Example 3.
The surface of the S-doped n-type GaN layer 14 of the obtained laminated structure had an extremely high pit density of 1 × 10 ⁶ cm ⁻³ and a flat surface could not be obtained.

Example 4
A group III nitride semiconductor light-emitting device was produced in the same manner as in Example 2 except that the laminated structure produced in Example 3 was used. When the forward voltage and the light emission intensity were measured in the same manner as in Example 2, they were 3.5 V and 4.8 mW. The center wavelength of blue band emission was 465 nm.

(Comparative Example 4)
A group III nitride semiconductor light-emitting device was produced in the same manner as in Example 2 except that the laminated structure produced in Comparative Example 3 was used. When the forward voltage and the light emission intensity were measured in the same manner as in Example 2, the forward voltage was 3.5 V, which was the same as in Example 4, but the light emission intensity was only 0.3 mW, which was a low intensity light emission. .

(Example 5)
In this example, the n-type GaN layer 4 is formed in the same manner as in Example 1 except that tetramethyltin ((CH ₃ ) ₄ Sn) is used instead of tetramethyl germanium ((CH ₃ ) ₄ Ge). Thus, a laminated structure was produced, and a laminated structure including an Sn-doped n-type group III nitride semiconductor layer was produced.

The carrier concentration by hole measurement of the Sn-doped n-type GaN layer 4 of the obtained multilayer structure was 5 × 10 ¹⁸ cm ⁻³ . The surface of the n-type GaN layer 4 was a very flat surface with a pit density of 200 pieces / cm ² or less. As a result of SIMS analysis, the high concentration layer had an Sn atom concentration of 1.0 × 10 ¹⁹ cm ⁻³ and a thickness of 10 nm. The low concentration layer had a Sn atom concentration of 9 × 10 ¹⁷ cm ⁻³ and a thickness of 10 nm.

(Comparative Example 5)
A laminated structure was produced in the same manner as in Example 5 except that the Sn-doped n-type GaN layer 4 was formed as a 2.0 μm thick layer while always circulating (CH ₃ ) ₄ Sn at the same flow rate. did. The flow rate of (CH ₃ ) ₄ Sn was adjusted so that the carrier concentration by hole measurement of the Sn-doped n-type GaN layer 4 was 5 × 10 ¹⁸ cm ⁻³ as in Example 5.
The surface of the Sn-doped n-type GaN layer 24 of the obtained laminated structure had an extremely high pit density of 1 × 10 ⁶ cm ⁻³ and a flat surface could not be obtained.

(Example 6)
A group III nitride semiconductor light-emitting device was produced in the same manner as in Example 2 except that the laminated structure produced in Example 5 was used. When the forward voltage and the light emission intensity were measured in the same manner as in Example 2, they were 3.5 V and 4.8 mW. The center wavelength of blue band emission was 460 nm.

(Comparative Example 6)
A group III nitride semiconductor light-emitting device was produced in the same manner as in Example 2 except that the laminated structure produced in Comparative Example 5 was used. When the forward voltage and the light emission intensity were measured in the same manner as in Example 2, the forward voltage was 3.5 V, which was the same as in Example 6, but the light emission intensity was only 0.2 mW. .

(Example 7)
In this example, the n-type GaN layer 4 was formed in the same manner as in Example 1 except that monosilane (SiH ₄ ) was used instead of tetramethylgermanium ((CH ₃ ) ₄ Ge) to produce a laminated structure. Then, a laminated structure including the Si-doped n-type group III nitride semiconductor layer was produced.

The carrier concentration by hole measurement of the Si-doped n-type GaN layer 4 of the obtained multilayer structure was 2 × 10 ¹⁹ cm ⁻³ . The surface of the n-type GaN layer 4 was a very flat surface with a pit density of 200 pieces / cm ² or less. As a result of SIMS analysis, the high concentration layer had a Si atom concentration of 3 × 10 ¹⁹ cm ⁻³ and a thickness of 10 nm. The low concentration layer had a Si atom concentration of 3 × 10 ¹⁸ cm ⁻³ and a thickness of 10 nm.

(Comparative Example 7)
A laminated structure was fabricated in the same manner as in Example 7 except that the Si-doped n-type GaN layer 4 was formed into a layer having a thickness of 2.0 μm while constantly flowing SiH ₄ at the same flow rate. The flow rate of SiH ₄ was adjusted so that the carrier concentration by hole measurement of the Si-doped n-type GaN layer 4 was 2 × 10 ¹⁹ cm ⁻³ as in Example 7.
The surface of the Si-doped n-type GaN layer 4 of the obtained laminated structure had an extremely high pit density of 1 × 10 ⁶ cm ⁻³ and a flat surface could not be obtained.

(Example 8)
A group III nitride semiconductor light-emitting device was produced in the same manner as in Example 2 except that the laminated structure produced in Example 7 was used. When the forward voltage and the light emission intensity were measured in the same manner as in Example 2, they were 3.5 V and 4.8 mW. The center wavelength of blue band emission was 455 nm.

(Comparative Example 8)
A group III nitride semiconductor light-emitting device was produced in the same manner as in Example 2 except that the laminated structure produced in Comparative Example 7 was used. When the forward voltage and the light emission intensity were measured in the same manner as in Example 2, the forward voltage was 3.5 V, which was the same as in Example 8. However, the light emission intensity was only 0.2 mW, and only low intensity light emission was obtained. .

  Since the n-type group III nitride semiconductor multilayer structure obtained by the present invention has excellent surface flatness and low resistance, it is useful for a group III nitride semiconductor light emitting device.

3 is a diagram schematically showing a laminated structure of a laminated structure produced in Example 1. FIG. 6 is a diagram schematically showing a cross-sectional structure of a group III nitride semiconductor light-emitting device manufactured in Example 3. FIG.

Claims (12)

  An n-type group III nitride comprising an n-type impurity atom high-concentration layer and an n-type impurity atom low-concentration layer laminated on a substrate, wherein the low-concentration layer is laminated on the high-concentration layer Semiconductor laminated structure.   2. The n-type group III nitride semiconductor multilayer structure according to claim 1, wherein the high concentration layer and the low concentration layer are alternately and periodically present.   3. The n-type group III nitride semiconductor multilayer structure according to claim 1, wherein the high-concentration layer and the low-concentration layer each have a thickness of 0.5 to 500 nm.   4. The n-type group III nitride semiconductor according to claim 1, wherein the thickness of the low concentration layer is equal to or greater than the thickness of the high concentration layer. 5. Laminated structure.   5. The n-type group III nitride semiconductor multilayer structure according to claim 2, wherein the high-concentration layer and the low-concentration layer have a repetition period of 10 to 1,000.   The thickness of the whole laminated structure is 0.1-10 micrometers, The n-type group III nitride semiconductor laminated structure as described in any one of Claims 1-5 characterized by the above-mentioned. The n-type group III nitride semiconductor multilayer according to claim 1, wherein the n-type impurity atom concentration of the high-concentration layer is 5 × 10 ^{17 to} 5 × 10 ¹⁹ cm ^−3. Structure. 8. The n-type impurity atom concentration in the low concentration layer is lower than the n-type impurity atom concentration in the high concentration layer, and is 2 × 10 ¹⁹ cm ⁻³ or less. An n-type group III nitride semiconductor multilayer structure.   9. The n-type group III nitride semiconductor multilayer structure according to claim 8, wherein the low-concentration layer is not intentionally doped with n-type impurity atoms.   The n-type impurity atom is one or a combination of two or more selected from the group consisting of silicon (Si), germanium (Ge), sulfur (S), selenium (Se), tin (Sn) and tellurium (Te) The n-type group III nitride semiconductor multilayer structure according to any one of claims 1 to 9, wherein   11. A group III nitride semiconductor light-emitting device having a light-emitting layer made of a group III nitride semiconductor on a substrate, wherein the n-type III according to claim 1 is interposed between the substrate and the light-emitting layer. A group III nitride semiconductor light-emitting device comprising a group nitride semiconductor multilayer structure.   A lamp comprising the group III nitride semiconductor light-emitting device according to claim 11 and a fluorescent material.

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