JP2006047580A - Active matrix type display device using organic light emitting element and driving method thereof, and semiconductor circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a current output type semiconductor circuit which can be less increased in circuit scale even when the number of output bits of a current driver is increased, a display driving device, a display device, and a current output method. <P>SOLUTION: Provided is a period in which a maximum current is supplied within one horizontal scanning period at the time of variation a low gradation to a low gradation and variation from a high gradation to a low gradation, especially, when gradations hardly vary. At this time, specification of the period wherein the maximum current is supplied and whether insertion is carried out are decided based upon the state of a source signal line which is one horizontal scanning period before and determined according to the display gradation difference between the gradation of the last line and the gradation of the current line. In the display device using an organic light emitting element etc., easiness of variation is different with colors depending upon differences of currents for each gradation due to differences in light emission efficiency by display colors. In this case, it is made possible to adjust the period in which the maximum current is supplied for each light emission color and then low gradations can be displayed exactly even when an element with different light emission efficiency is used. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a driving semiconductor circuit that performs current output used in a display device that performs gradation display according to an amount of current, such as an organic electroluminescent element.

  Since the organic light emitting element is a self light emitting element, a backlight required for a liquid crystal display device is unnecessary, and it is expected as a next generation display device from the advantages such as a wide viewing angle.

  A cross-sectional view of a device structure of a general organic light emitting device is shown in FIG. The organic layer 42 is sandwiched between the cathode 41 and the anode 43. When a DC power supply 44 is connected to this, holes are injected from the anode 43 and electrons are injected from the cathode 41 into the organic layer 42. The injected holes and electrons move in the organic layer 42 to the counter electrode by the electric field formed by the power supply 44. In the middle of movement, electrons and holes recombine in the organic layer 42 to generate excitons. Light emission is observed in the process of exciton energy deactivation. The emission color differs depending on the energy of the exciton, and becomes light having a wavelength of energy corresponding to the value of the energy band gap of the organic layer 42.

  In order to extract light generated in the organic layer to the outside, at least one of the electrodes is made of a transparent material in the visible light region. For the cathode, a material having a low work function is used to facilitate injection of electrons into the organic layer. For example, aluminum, magnesium, calcium and the like. These alloys and materials such as aluminum lithium alloys may be used for durability and further lower work function.

  On the other hand, an anode having a high ionization potential is used because of the ease of hole injection. Further, since the cathode does not have transparency, a transparent material is often used for this electrode. Therefore, in general, ITO (Indium Tin Oxide), gold, indium zinc oxide (IZO), or the like is used.

  In recent years, in an organic light emitting device using a low molecular material, the organic layer 42 may be composed of a plurality of layers in order to increase the light emission efficiency. This makes it possible to share the functions of carrier injection, carrier movement to the light emitting region, and light emission with a desired wavelength in each layer. By using efficient materials for each layer, higher efficiency organic A light emitting element can be formed.

  The organic light emitting device thus formed has a luminance proportional to the current as shown in FIG. 5A and a non-linear relationship with the voltage as shown in FIG. 5B. Therefore, in order to perform gradation control, it is better to perform control based on the current value.

  In the case of the active matrix type, there are two types, a voltage driving method and a current driving method.

  The voltage driving method uses a voltage output type source driver, converts a voltage into a current inside a pixel, and supplies the converted current to an organic light emitting element.

  In this method, since voltage-current conversion is performed by a transistor provided for each pixel, there is a problem in that output current varies depending on variation in characteristics of the transistor, and luminance unevenness occurs.

  The current driving method uses a current output type source driver, has only a function of holding the current value output for one horizontal scanning period inside the pixel, and supplies the same current value as the source driver to the organic light emitting element. .

  An example of the current driving method is shown in FIG. The system in FIG. 6 uses a current copier system for the pixel circuit.

  FIG. 7 shows a circuit during operation of the pixel 67 of FIG.

  When a pixel is selected, as shown in FIG. 7A, a signal is output from the gate driver 35 so that the gate signal line 61a in that row is in a conductive state, and 61b is in a non-conductive state. . The state of the pixel circuit at this time is shown in FIG. At this time, a current flowing through the source signal line 60 that is a current drawn into the source driver 36 flows through a path indicated by a dotted line 71. Therefore, the same current as the current flowing through the source signal line 60 flows through the transistor 62. Then, the potential of the node 72 becomes a potential corresponding to the current-voltage characteristics of the transistor 62.

  Next, in a non-selected state, a circuit as shown in FIG. A current flows from the EL power source line 64 to the organic light emitting element 63 along a dotted line path 73. This current is determined by the potential of the node 72 and the current-voltage characteristics of the transistor 62.

  7A and 7B, the potential of the node 72 does not change. Accordingly, the drain current flowing in the same transistor 62 is the same in FIGS. 7A and 7B. As a result, a current having the same value as the current flowing through the source signal line 60 flows through the organic light emitting element 63. Even if there are variations in the current-voltage characteristics of the transistor 62, the values of the currents 71 and 73 are not affected in principle, and a uniform display can be realized without being affected by variations in the characteristics of the transistors.

  Therefore, in order to obtain a uniform display, it is necessary to use a current driving method. For this purpose, the source driver 36 must be a current output type driver IC.

  An example of the output stage of the current driver IC that outputs a current value corresponding to the gradation is shown in FIG. An analog current output is performed from 104 to the display gradation data 54 by the digital-analog converter 106. The analog-to-digital conversion unit defines a plurality of (at least the number of bits of gradation data 54) gradation display current sources 103, switches 108, and a current value flowing through each gradation display current source 103. The gate line 107 is configured.

  In FIG. 10, an analog current is output to the 3-bit input 105. For example, in the case of data 1, the current source 103 corresponds to one current, and in the case of data 7, the number of current sources 103 corresponding to the bit weight is connected to the current output 104. A current corresponding to the gradation can be output, such as seven currents. A current output type driver can be realized by arranging 106 of this configuration in a number corresponding to the number of outputs of the driver. In order to compensate for the temperature characteristics of the transistor 103, the voltage of the common gate line 107 is determined by the distributing mirror transistor 102. The transistor 102 and the current source group 103 have a current mirror configuration, and the current per gradation is determined according to the value of the reference current 89. With this configuration, the output current varies depending on the gradation, and the current per gradation is determined by the reference current.

  Examples of display devices using organic light emitting elements are shown in FIGS. FIG. 21 is a perspective view of a television (FIG. 21A and its structural block (FIG. 21B), FIG. 22 shows a digital camera or digital video camera, and FIG. 23 shows a portable information terminal. Is a display panel suitable for these display devices having many opportunities to display moving images because of its high response speed (see, for example, Patent Document 1).

  In the current driver as shown in FIG. 10, the number of transistors 103 of the same size is arranged (number of gradations-1), and current output is performed by changing the number of transistors 103 connected to the output with respect to input data. . Therefore, the gradation and the output current are in a proportional relationship. If this is output as it is, it appears whitish from the human visual characteristics (the low gradation side becomes whitish).

  In a general display driver, an output corresponding to each gradation is subjected to gamma correction and output. In the case of a liquid crystal display, since it is voltage driven, a voltage value corresponding to each gradation is required. (In the case of voltage, it is impossible to express by the addition of gradations like current, so voltage is required for each gradation.) Therefore, voltage output corresponding to gamma correction at each gradation voltage stage Therefore, even if it is a 6-bit driver, gamma correction has been completed, and gradation display can be sufficiently performed.

  On the other hand, since the current driver does not perform gamma correction even for the same 6 bits, a gradation output finer than 6 bits is required in order to make the step in the low gradation part finer. If this is performed by frame thinning (FRC), frame thinning is required at least for four frames, and the response speed of the organic light emitting device may be high, and flicker occurs. Therefore, it is necessary to perform fine gradation expression without FRC, for example, it is necessary to make it 8 bits.

  This problem is a problem peculiar when a current driver in which gradation and output current are proportional to a current output type display element in which input current and luminance are proportional.

In order to eliminate the gamma correction by FRC, a configuration in which the output of the current driver is increased from 6 bits to 8 bits, the gamma processing is performed before the source driver is input, and the gamma processed 8-bit signal is input to the source driver.
JP 2001-147659 A

  As a method of expanding the output of the current driver from 6 bits to 8 bits, there is a method of preparing 255 transistors 103, but in this method, compared with the conventional method (63 transistors 103), 4 Double the transistor 103 is required, and the area of the source driver increases accordingly. Since the ratio of the output stage transistor to the total chip area is about 70%, it is simply about three times as large as the case of 6 bits. There is a big impact on cost.

  In view of the above problems, the present invention provides a current output type semiconductor circuit, a display drive device, and a display device that can suppress an increase in circuit scale even when the number of output bits of the current driver is increased. An object is to provide a current output method.

In order to achieve the above object, the present invention provides a method for driving an active matrix display device,
Within a certain horizontal scanning period, there are a first period in which a voltage is applied to the source signal line, a second period in which the maximum current flows, and a third period in which a current corresponding to the gradation flows.
This is a driving method of an active matrix display device in which the length of the second period may be different for each display color even when the display patterns of the display colors are all the same.

  According to the current output type semiconductor circuit, display drive device, display device, and current output method of the present invention, even if the number of output bits of the current driver is increased, the increase in circuit scale can be suppressed to a lower level.

  In the current output type semiconductor circuit of the present invention, 2 bits to be added are added to the lower side of the conventional 6 bits. Therefore, a current source that outputs one-fourth of the current value of the gradation display current source 103 used for the 6-bit output so far is prepared, and 256 gradation outputs are performed by adding three current sources. FIG. 24 shows a conceptual diagram of a current output stage that performs 8-bit output.

  Since the number of transistors increased by 8 bits is 3, it is possible to realize a configuration in which the increase in circuit scale is small compared to the case of adding to the upper side.

  The current value in white display (maximum gradation display) can be adjusted by adjusting the value of “I”, and the value of “I” can be changed by controlling the reference current 89 having the configuration shown in FIG. This is realized by inputting the control data 88 according to the above.

  FIG. 25 shows an example in which the structure of FIG. 24 is realized by a transistor. Transistors 252 for the upper 6 bits correspond to the first unit transistor of the present invention as an example, and transistors 251 for the lower 2 bits correspond to the second unit transistor of the present invention as an example. The transistor groups 241a and 241b correspond to the first current source group of the present invention as an example, and the transistor groups 242a, 242b, 242c, 242d, 242e, and 242f correspond to the second current source group of the present invention as an example. To do. For input video signal data D [7: 0], between D [0] and D [1] and between D [2] and D [7], the number of transistors connected to the output for each bit weight. The weighting between the lower 2 bits and the upper 4 bits is determined by the channel width of the transistor. The transistors 251 and 252 are designed so that the channel width of the 252 is about four times. However, since the channel width ratio and the output current ratio do not exactly match, the ratio of the channel width of the transistor should be determined between 3.3 and 4 times based on simulation and TEG transistor measurement data. Thus, an output stage with higher gradation can be configured.

  The output current is determined by the number of current source transistors connected to each bit, and the output current is changed in such a manner that the amount of current flowing through one transistor is accumulated. In the case of 8-bit output in FIGS. 24 and 25, the gradation and output current characteristics are as shown in FIG. (Note that only the lower 64 gradations are shown due to space limitations) The current shown in the region 262 is output by the upper 6-bit transistor 252 and the current shown in the region 261 is output by the lower 2-bit transistor 251. The Since the current of 262 changes the current value due to the difference in the number of transistors, the variation in the step size can be reduced to 1% or less. Since most of the output current is the portion 262, even if the current in the portion 261 slightly varies, the linearity of the gradation is not affected. Further, even if the step width of 261 is increased or decreased from a predetermined value, there is only a portion where the step width is different only once every four gradations, and there is no practical problem when the ratio of the output current of 262 and 261 is taken into consideration. In the low gradation region where the current ratio of 262 is small, it is difficult to recognize the luminance difference due to the characteristics of the human eye, and the variation in the step size becomes more inconspicuous, so there is no problem.

  Since the output variation between adjacent terminals by the upper 6 bits of the transistor 252 is the same as that of the 6-bit driver, the variation is within 2.5%, and vertical stripes due to output current variation do not occur. Has been confirmed.

  On the other hand, for the newly added 2-bit transistor, the channel area of the transistor is reduced by simply reducing the channel width to a quarter, so that the variation increases and exceeds 2.5% (adjacent The output current variation between terminals is inversely proportional to the square root of the transistor area).

  FIG. 19 shows the relationship between the gray level and the adjacent current variation in the configuration of the output stage of FIG. When the size of the transistor 251 for the lower 2 bits is simply reduced, there is a relationship between the gradation indicated by the solid line 191 and the broken line 192, and there is a problem that the dispersion exceeds 2.5% at the gradation 3 or lower. FIG. 14B shows the relationship between variation and gradation when the channel width is simply set to ¼. In gradations 1 to 3, the variation exceeds 2.5%, which is unacceptable.

  Therefore, in the present invention, the value of (transistor channel width) / (transistor channel length) is maintained only for the three transistors 251 that contribute to the output of gradations 1 to 3, and the channel width and channel length are not changed without changing the output current. The variation is reduced by increasing the channel area. An example is shown in FIG. In this case, the channel length and the channel width are both doubled, and the channel area is quadrupled so that the variation is within 2.5% in all gradations.

  Note that in this example, theoretical values are described, and actually the channel widths of the transistor group 241a and the transistor group 241b are larger than this value. In order to create in the direction of increasing, the process proceeds in a direction having a margin with respect to variations in output current. Therefore, calculation design is first performed with theoretical values, and finally, changes are made based on actual measurement data.

  Since the increase in the chip area by this method is 1.05 times of 70% of the total, the overall increase is about 1.04 times, so that the display can be displayed with little increase rate and no variation. It becomes. Also, the relationship between gradation and variation is the relationship indicated by the solid lines 191 and 193 shown in FIG. 19, and a variation of 2.5% was realized for all gradations.

  Further, since the transistor groups 241 and 242 are formed in different sizes, the current output of the transistor group 241 becomes larger than the current output of the transistor group 242 due to the difference between the simulation and the actual measurement value. Or get smaller.

  Even if the current output of the transistor group 241 can be made smaller than the output current of the transistor group 242, the output is not 0 or a negative current does not flow, and therefore, there is no problem because gradation inversion does not occur.

  On the other hand, when the current output of the transistor group 241 becomes larger than the output current of the transistor group 242, the gray level that the transistors of the transistor group 241 contribute to the output and the gray level that does not contribute to the gray level between adjacent gray levels. Tone reversal can occur. For example, it is between gradations 3 and 4 or between 127 and 128.

  Between gradations 3 and 4, there is a luminance difference of 33% as shown in FIG. Since the output variation is about 2.5% as shown in FIG. 14, even if the variation occurs in the direction in which the gradation difference becomes smaller, there is a difference of 30%. Therefore, there is no problem even if the actual current output of the transistor group 241 is 30% larger than the simulation value.

  Between the gradations 127 and 128, the gradation difference is 0.79% as shown in FIG. Of the gradation 127, 124 gradations and gradation 128 are output by the transistor 242 having the same size, so that the variation is about 0.5% as in the case of the adjacent variation. Therefore, the gradation difference may be 0.29% at the minimum. Even if the current due to the transistors in the transistor group 241 is increased, the current may be suppressed to 0.29% as a whole. If the current of the transistors in the transistor group 241 is 12.3% at the maximum, gradation inversion will not occur.

  When the gradation exceeds 128, for example, between gradations 131 and 132, as shown in FIG. 37, the gradation difference is 0.75%, but both have the current output of the transistor group 242f, and the difference is the transistor There are three groups: a group 242a, a transistor group 241a, and a transistor group 241b. Compared with the transistor group 242f, the current of the transistor group 242a is 1/32 and the change in the current value due to the variation of the transistors is smaller than that in the case of 128 gradations or less. In this case, it may be reduced by 0.08%. As a result, even if there is a variation in transistors, the luminance difference is 0.67%. There is no problem even if the transistor current in the transistor group 241 is larger than at least between 127 and 128 because the luminance difference between 127 and 128 is larger and the ratio of the current output of the transistor group 241 is smaller. .

  FIG. 34 shows the relationship between the display gradation and the range where gradation inversion does not occur even when the current amount of the transistors in the transistor group 241 is larger than the simulation value (theoretical value).

  According to FIG. 34, the most deviation from the theoretical value is between 127 and 128 gradations, in this case 12.3%. If at least the theoretical value does not deviate from the actual value by 12%, current output can be realized without gradation inversion.

  In the 8-bit driver in the configuration of FIG. 24 and FIG. 25, even if the transistor size of the lower 2 bits (output from the transistor group 241) and the upper 6 bits (output from the transistor group 242) is changed, the display is performed without gradation inversion. Is possible.

  Since the gradation inversion is most likely to occur between the gradation 127 and the gradation 128, a current output stage incorporating a circuit that eliminates the gradation inversion by repair even when the gradation inversion occurs between the two gradations. The circuit configuration of one output of 23 is shown in FIG.

  Compared to the configuration of FIG. 25, a current increasing transistor 322 and a switching unit 321 at 128 gradations or more are added.

  The switching unit 321 has three terminals 323, which are connected to the current increasing transistor 322, the ground potential, and the current source 242f, respectively.

  In the switching unit 321, normally, 323a and 323b are connected, and 323c is not connected. Therefore, the current increasing transistor 322 does not affect the current output. If there is no gradation inversion, the product is shipped in this state.

  On the other hand, when gradation inversion occurs when the current of the transistor group 241 increases, the current of the 128 gradations or more is increased to prevent gradation inversion, so that the switching unit 321 can be controlled by a laser or the like. The connection is changed and the terminals 323a and 323c are connected.

  As a result, a current of 128 gradations or more increases, and gradation inversion can be prevented.

  It is assumed that the current increase transistor 322 outputs about 10% of the current of the transistor group 241a. When the current of the transistor group 241 exceeds 12.3%, inversion occurs between 127 and 128 gradations. If the current of the transistor group 241 is shifted by 22%, gradation inversion between 127 and 128 gradations cannot be prevented, but in this case, gradation inversion already occurs between 63 and 64 gradations. Since correction between 63 and 64 gradations is impossible with this circuit, it is not necessary to consider a 22% shift.

  Therefore, in the present invention, only the gradation inversion between the gradations where gradation inversion is most likely to occur can be relieved, so that the current of the current increasing transistor 322 is about 10% of the current of the transistor group 241a. Good.

  The influence of the current increase transistor 322 on the adjacent variation is negligible because the output current of 322 is 1/180 of the current of 128 gradations and is 0.08% of the total. There is no problem even if the transistor group 241a or the transistor group 241a is made about one-fourth the size.

  By providing the switching unit 321 for each output, a driver IC with low possibility of gradation inversion is realized. Thereby, it can be expected that defective products can be made good by laser processing or the like and the yield can be increased.

  However, if laser processing is performed for each output, the number of work steps and cost increases due to the time required for processing, and the price may not decrease as much as the effect of increasing yield.

  Therefore, as shown in FIG. 39, the current increasing transistor 322 and the current source 242f are connected via the switching means 391, and the switching means 391 is controlled by the raising signal 392, thereby using the raising signal 392 by external command input. We considered a configuration that can easily increase the current of the 128th gradation.

  The raising signal 612 only needs to be set for each output. In this case, a latch that holds the value of the raising signal 612 for each signal line is necessary. A signal can be distributed to each latch by a 1-bit signal input 392 if a shift register used for distributing a video signal is shared. However, since the latch is provided for the signal line, there is a problem that the circuit scale becomes large. The number of bits of data to be held by the latch unit 22 is increased by 1 bit in each source line. If the circuit scale may be large or if the area of the latch portion occupying the whole is small by using a fine process, it is possible to decide whether to raise by controlling the raising signal for each output, but gradation inversion When this occurs, it occurs when the simulation value and the actual measurement value are far from each other. Therefore, basically, it is necessary to determine whether the current increasing transistor 322 is necessary for all terminals.

  Therefore, the raised signal line 392 is a common signal line in one source driver, and by controlling this signal line, it is determined whether or not to increase the current of 128 gradations or more in all outputs.

  For example, the signal line is normally set to a low level and the switching unit 391 is placed in a non-conductive state. However, if the raised signal line 392 is switched to a high level by laser processing, the entire output is controlled collectively. Repair can be carried out in a short period of time. This can be realized by forming a circuit as shown at 431 in FIG.

  Further, when the ROM 351 can be configured inside the source driver IC 36, the value of the ROM 351 is written by an external control signal, and in the IC in which gradation inversion has occurred, the raised signal line 392 is set to the ROM 351 at a high level. In an IC in which tone reversal does not occur, the ROM 351 may be written so that the raised signal line 392 is at a low level.

  For example, as shown in FIG. 35, a signal from a PC 352 or the like can be input to the ROM 351 at the time of inspection, and the PC 352 detects whether gradation inversion has occurred due to the current value of the output current measuring means 353. A high level signal is written in the ROM 351 when gradation inversion occurs. When gradation inversion does not occur, a low level signal is written in the ROM 351. As a result, it is possible to determine whether or not to automatically correct the gradation inversion, and it becomes possible to rescue defective products without human intervention, and it is possible to provide ICs at high speed and at low cost.

In the above description, the source driver is described as having 8 bits, but the present invention can be realized even if the source driver is not 8 bits. In addition to combinations of lower 2 bits and upper 6 bits, as shown in FIG. 27, combinations of lower 1 bit and upper 7 bits can be realized. By forming the lower N bits with a certain transistor size and the upper M bits with another transistor size, a current driver with (N + M) (≧ 3) bit output can be realized. In this case, it is best if the lower N-bit transistor outputs a current that is 1/2 ^N of the current output of the upper M-bit transistor. However, if gradation can be expressed, there may be a case where the current output of the upper M-bit transistor is larger than that of the lower N-bit transistor.

  The relationship between N and M is preferably N ≦ M. As N increases, the current output ratio of the transistor corresponding to the N bit increases, so the influence of the deviation of the current value of the transistor corresponding to the N bit from the theoretical value increases. For example, in the case of an 8-bit driver, when N = 2 and M = 6, the deviation can be allowed up to 12.3%, but when N = 3 and M = 5, 5.26%, N = 4, M = 4 can only tolerate a deviation of 2.46%. When it is 2.46%, it is the same level as the variation between adjacent ones, and this level is the minimum value that can control the deviation between the theoretical value and the actually measured value.

  Therefore, N = 4 is the maximum value in the 8-bit driver.

  In general, also in the (N + M) bit driver, N ≦ M needs to be satisfied in order to reduce the influence of deviation from the theoretical value of the lower transistors (for N bits). Even if N ≦ M, it is preferable that N ≦ 4 in order to improve gradation between adjacent gradations.

  When an 8-bit signal subjected to gamma correction is input and display is performed using the source driver IC 36, display with gamma correction can be realized without using FRC. Therefore, display on the lower gradation side is facilitated (the influence of flicker due to FRC is eliminated), and a display device with high display quality can be realized.

  The driver IC 36 is indispensable for the display device as shown in FIGS.

  Up to this point, an example in which the transistor used for the pixel 67 is a p-type transistor has been described, but the same can be realized by using an n-type transistor.

  FIG. 20 shows a circuit for one pixel when a current mirror type pixel configuration is formed by n-type transistors. The direction of current flow is reversed, and the power supply voltage changes accordingly. Therefore, the current flowing through the source signal line 205 needs to flow from the source driver IC 36 toward the pixel 67. The configuration of the output stage is a current mirror configuration of a p-type transistor so as to discharge current outside the driver IC. Similarly, the direction of the reference current needs to be reversed.

  Thus, the transistor used for the pixel can be applied to both p and n.

  In recent years, the number of colors has been increasing in portable information terminals, and display of 65,000 colors or 220,000 colors has become mainstream. When the input signal of the driver IC is an RGB digital interface, 16 bits or 18 bits are required. Therefore, the number of input signal lines is 16 to 18 and only necessary for data transfer. In addition, a signal line is necessary for the operation signal of the shift register and the setting of various registers.

  Therefore, the number of wirings increases, and for example, as shown in FIG. 3, the wiring between the control IC 31 and the source driver IC 36 increases with respect to the display panel 33. For this reason, there is a problem that the cost increases due to an increase in the size of the flexible substrate 32 or the use of a multilayer substrate.

  The configuration of the current output type source driver IC 36 in the present invention is shown in FIG. The number of outputs is simply the number of shift registers 21 and latches 22 required per output, the current output stage 23, the precharge voltage application determination unit 56, and the current output / precharge voltage selection unit 25 as the number of outputs increases or decreases. Because it can be realized by increasing or decreasing, it is possible to cope with any number of outputs (however, as the number of outputs increases, the chip size becomes too large and the versatility is lost, so about 600 is the maximum in practical use. is there).

  The video signal of the driver IC 36 of the present invention is input from the control IC 28 through the signal lines 12 and 13. The distribution unit 27 distributes the video signal and various setting signals, and inputs only the video signal to the shift register unit 21. The output is distributed to each output terminal by the shift register unit 21 and the two latch units 22. The distributed video signal is input to the current output stage 23. The current output stage 23 outputs a current value corresponding to the gradation from the video signal and the reference current generated by the reference current generator 26. The precharge determination signal data in the latch unit is input to the precharge voltage application determination unit 56. On the other hand, the precharge voltage application determination unit 56 controls a switch as to whether or not to output the voltage supplied from the precharge power supply 24 to the output 53 by the precharge determination signal latched by the latch unit 22 and the precharge pulse. Generate a signal. Thus, a current output / precharge for selecting whether to supply a current corresponding to the gradation to the outside of the driver IC 36 or to supply a voltage supplied from the precharge power supply 24 in accordance with the output signal of the precharge voltage application determination unit 56. A current or voltage is output to the outside of the driver IC 36 via the voltage selection unit 25.

  The voltage output from the precharge power supply 24 has a voltage value necessary for displaying black on the display panel. This method of applying the precharge voltage is a configuration peculiar to the driver IC 36 for performing gradation display according to the current output in the active matrix display device.

  For example, consider a case where a predetermined current value is written from a source signal line to a certain pixel in an active matrix display device having a pixel configuration shown in FIG. When precharge is not performed, that is, when there is no precharge circuit, a circuit extracted from the circuit related to the current path from the output stage of the source driver IC 36 to the pixel is as shown in FIG.

  A current I corresponding to the gradation flows from the driver IC 36 as a drawn current in the form of a current source 122. This current is taken into the pixel 67 through the source signal line 60. The captured current flows through the driving transistor 62. That is, the current I flows from the EL power supply line 64 to the source driver IC 36 through the drive transistor 62 and the source signal line 60 in the selected pixel 67.

  When the video signal changes and the current value of the current source 122 changes, the current flowing through the drive transistor 62 and the source signal line 60 also changes. At that time, the voltage of the source signal line changes according to the current-voltage characteristics of the drive transistor 62. When the current-voltage characteristics of the drive transistor 62 are as shown in FIG. 12B, for example, if the current value flowing through the current source 122 changes from I2 to I1, the voltage of the source signal line changes from V2 to V1. . This change in voltage is caused by the current from the current source 122.

  A floating capacitance 121 exists in the source signal line 60. In order to change the source signal line voltage from V2 to V1, it is necessary to extract the charge of the stray capacitance. The time ΔT required for the extraction is ΔQ (charge of stray capacitance) = I (current flowing through the source signal line) × ΔT = C (stray capacitance value) × ΔV. If ΔV (signal line amplitude from white display to black display time) is 5 [V], C = 10 pF, and I = 10 nA, ΔT = 50 milliseconds is required. This is shorter than one horizontal scanning period (75 μs) when driving the QCIF + size (number of pixels: 176 × 220) at a frame frequency of 60 Hz. For this reason, black display is performed on the pixel below the white display pixel. If this is the case, the switch transistors 66a and 66b for writing the current to the pixel are closed while the source signal line current is changing, so that the halftone is stored in the pixel, so that the pixel shines at a luminance between white and black. It means to end up.

  Since the value of I becomes smaller as the gradation becomes lower, it becomes difficult to extract the charge of the stray capacitance 121, and the problem that the signal before changing to the predetermined luminance is written inside the pixel becomes more prominent as the low gradation display. Appear in Extremely speaking, when black is displayed, the current of the current source 122 is 0, and it is impossible to extract the charge of the stray capacitance 121 without passing the current.

  Therefore, a voltage source having a lower impedance than that of the current source 122 is prepared and applied to the source signal line 60 as necessary. This voltage source corresponds to the precharge power source 24 of FIG.

  A schematic circuit for one source signal line 60 is shown in FIG. By applying a voltage supplied from the precharge power supply 24 to the source signal line 60, the charge of the stray capacitance 121 can be charged and discharged. The voltage supplied from the precharge power supply 24 may be able to supply a voltage corresponding to each gradation current in accordance with the characteristics of FIG. Since a conversion unit is required, the circuit scale increases. In a small panel (9 inches or less), since the capacitance value of the stray capacitance 121 is 10 to 15 pF and the number of pixels is small, the vertical scanning period is relatively long. It can be said that it is sufficient in terms of cost (chip area) and effectiveness to generate only the voltage corresponding to the black gradation in which the current value is most difficult to be written. As shown in FIG. 38 to be described, a driver IC using a digital-analog conversion unit is also conceivable.

  In a small panel, only one voltage may be generated from the precharge power supply 24. It is only necessary to determine whether to output a voltage based on data and to control the switch 131. That is, a 1-bit signal line (precharge determination signal) for determining whether or not to apply the voltage source 24 is prepared before outputting a current corresponding to a certain video signal.

  FIG. 9 shows a voltage application determination operation in the circuit configuration of FIG. Whether or not to apply a voltage is determined by the precharge determination signal 55. In this example, a voltage is applied at the “H” level, and no voltage is applied at the “L” level.

  The time during which the gate voltage of the drive transistor 62 in the pixel circuit 67 becomes the same as the output voltage of the precharge power supply 24 is determined by a time constant represented by the product of the wiring capacitance and wiring resistance of the source signal line 60. Although it depends on the buffer size of the precharge power supply 24 output and the panel size, it can be changed in about 1 to 5 μsec.

  When gradation display is performed by voltage, even if the same voltage can be supplied to each pixel due to variations in the current-voltage characteristics of the drive transistor 62, the current flowing through the EL element 63 differs and uneven luminance occurs. In order to correct the variation of the transistor 62, a current is output after a predetermined voltage is set in 1 to 5 μs.

  For this purpose, switching between voltage output and current output is performed using a precharge pulse. The voltage of the precharge power supply 24 is output only when the precharge pulse and the precharge determination signal 55 are “H” at the same time. In other cases, the current output is performed. When voltage application is unnecessary, the current output is performed. Even when voltage application is necessary, variation correction can be performed by current after voltage application.

  The switch 131 that controls the precharge power supply 24 performs the above operation, but the operation of the switch 132 by the current output control unit 133 needs to be on in the current output period 152 as shown in FIG. The period may be on or off.

  If it is off, there is no problem because the output of the precharge power supply 24 is directly output from the source driver. On the other hand, since the voltage of the current output destination 104 by the digital-analog conversion unit 106 is determined by the load even if it is on, the voltage of the source signal line 60 is the same voltage as the precharge power supply 24 if the precharge power supply 24 is output. It becomes. Therefore, the switch 132 may be in any state.

  Therefore, the switch 132 and the current output control unit 133 may not be provided. However, in practice, if an operational amplifier is used for the output of the precharge power supply 24, a current is drawn from the operational amplifier to the gradation display current source 103, and it is necessary to increase the current output capability of the operational amplifier. For this reason, when the capability of the operational amplifier cannot be increased, the switch 132 is often provided to perform the reverse operation of the switch 131 to compensate for the shortage of the current output capability of the operational amplifier.

  The presence or absence of the switch 132 depends on the design of the operational amplifier at the time of driver design. In order to reduce the operational amplifier, a switch 132 is provided. When the operational amplifier or the precharge power supply 24 is supplied from the outside of the source driver 36 and a power supply having sufficient current output capability is used, the circuit scale of the source driver is reduced. Therefore, the switch 132 and the current output control unit 133 may be eliminated.

  Since the voltage value output from the precharge power supply 24 is only the voltage corresponding to the current at the time of black gradation (hereinafter referred to as black voltage), for example, white voltage is generated over a plurality of horizontal scanning periods in which the gradation data 54 is continuous. When the gray scale is displayed, the source signal line repeats the black, white, black, and white states. If precharging is not performed, white states will occur continuously. In other words, precharge causes the change of the signal line to become intense, and depending on the current at the time of white display, white may not be completely generated and there is a possibility that the write current is insufficient.

  Therefore, by using the precharge determination signal, precharge is not performed in a gradation in which a relatively large amount of current flows, and only the gradation that is difficult to change to a predetermined current near the black gradation is assisted by the precharge power supply 24. That's fine. For example, there is a period in which the precharge voltage is applied only at the gradation 0 (black), and it is most effective to prevent the precharge voltage from being applied at other gradation display. By reducing the luminance at the lowest gradation, the contrast is increased and a more beautiful picture can be displayed.

  For example, as shown in FIG. 17A, precharging can be performed only at the gradation 0 by setting the precharge determination signal 55 only when the gradation data 54 is 0.

  If the precharge determination signal 55 is generated when the gradation data 54 is 0 or 1, precharge can be performed when the gradation data is 0 or 1 (FIG. 17B).

  By the way, in a pattern in which the source signal line does not change such that the entire screen is black, if a precharge voltage is applied only at the beginning of one frame, a predetermined gradation flows sufficiently even with only the black current thereafter.

  That is, even when the same black is displayed, the time required for the current to flow to the predetermined current value differs depending on the current value passed through the source signal line in the previous horizontal scanning period. The larger the amount of change, the longer the change takes. For example, although it takes time to display black after white display, in the case of performing black display after black display, the signal line changes only for the variation of the drive transistor 62, so the time required for the change is short.

  Therefore, in synchronization with the gradation data 54, a signal (precharge determination signal 55) for determining whether or not to apply a precharge voltage is introduced for each color, so that an arbitrary gradation or the same gradation can be obtained. It is also possible to introduce a configuration that allows selection with or without precharge.

  A precharge determination signal 55 is added to the gradation data 54. Along with this, the latch unit 22 also needs to latch the precharge determination signal, so that it has a latch unit of the number of video signal bits + 1 bit.

  In FIG. 17C, when the precharge is applied when the gradation is 0 and the gradation in the previous period is not 0 (the precharge is applied when the gradation is 0, but the gradation is 0 when continuous. But precharge is not performed).

  Unlike the previous method, this method has an advantage that it can be selected whether or not to precharge depending on the state of the source signal line before one horizontal scanning period even at the same gradation.

  The precharge determination signal is supplied from the control IC 28. By the command operation of the control IC 28, the pattern of the precharge determination signal 55 can be changed and output as shown in FIGS.

  According to the capacity of the source signal line and the length of one horizontal scanning period, the precharge setting can be flexibly changed from the outside of the source driver IC 36, and there is an advantage that versatility is increased.

  A method for generating the precharge determination signal 55 by the control IC 22 will be described. It is determined whether or not to precharge the input video signal, and the result is output as a precharge determination signal 55 from the control IC 22 to the source driver.

  The determination of whether to precharge depends on the state of the previous line from the viewpoint of affecting the amount of change in the current of the source signal line and whether the value of the current flowing through the source signal line changes to a predetermined current value. The discrimination is performed based on the display gradation of the row.

  For example, when the state of the source signal line is white, black, or black, the change amount is large and takes time when it changes from white to black, but the same gradation is displayed over a plurality of rows as from black to black. In this case, the change in the source signal line current in the period corresponding to the row displaying the same gradation is only the amount to compensate for the variation, so the amount of change is small.

  Utilizing this fact, the voltage output from the precharge voltage is performed only when the previous row data is referred to and the gradation difference between the previous row data and the data is large. In the previous example, precharge is performed when the color changes from white to black, and precharge is not performed when the color changes from black to black. The time required for correcting the black-to-black variation correction can be increased by not performing precharge, and the correction accuracy can be further improved. Thus, it can be seen that it is preferable not to precharge when the gray level of the previous row and the gray level data of the row are the same.

  Further, since the voltage for precharging is only the voltage corresponding to the black state, when the brightness of the row is higher than the state before the previous row, the black state is not used, and only the predetermined current is used. A gradation display may be performed. Therefore, it can be seen that it is preferable not to perform precharge when the row gradation is higher than the previous row.

  Further, when the pixel is halftone or higher, the amount of current is large, and it is easy to change to a predetermined current. Therefore, no precharge is required regardless of the pixel in the previous row. However, when the resolution is high, the current amount is small even in the halftone, or when the panel size is large or the like is difficult to change, precharge may be performed when the pixel in the previous row is equal to or lower than the halftone.

  In general, it is more difficult for the current value to change from white to black than to change from black to white. As described above, this requires a change from the state of the source signal line in the previous row to the state of the desired source signal line by the current corresponding to the display gradation to be displayed, and the current value is small. The lower the gradation, the more difficult it is to change. Further, when the amount of change is large, the horizontal scanning period ends before the change is complete. Therefore, it takes time to change, and when the amount of change is large and the gradation is low, that is, when the gradation of the pixel in the previous row is equal to or higher than the halftone, the luminance of the pixel is equal to or lower than the halftone. In this case, it is effective to perform precharge.

  If the previous line is less than halftone, even if the luminance of the pixel is less than halftone, a predetermined gradation can be displayed as much as the amount of change is small.

  Accordingly, when the luminance of the pixel is larger than a certain gradation, precharge is not performed, and when the luminance is equal to or less than a certain gradation, the previous line is determined according to the data of the previous line by the gradation of the previous line. If the data is larger than the previous data, the precharge is not performed. If the data is smaller than the previous data, the precharge is performed. In the case where the data is the same as that of the previous row, it is assumed that precharge is not performed regardless of the gradation of the row.

  Note that regarding the data in the first row in which the data before the first row does not exist, the state immediately before writing the data in the first row to the pixels, that is, the state of the source signal line in the vertical blanking period is important.

  There is generally a vertical blanking period in which no row is selected during one frame. At this time, the source signal line is disconnected from any pixel by the switching transistor, and there is no current path. When the current output stage of the source driver IC is configured as shown in FIG. 13, only the source signal line is connected to the tip of the current output 104 in the vertical blanking period, and the current source 103 for gray scale display supplies current. Even if you try to pull in from the source signal line, you cannot pull in because there is no current path.

  For this reason, the gradation display current source 103 attempts to draw a current even if it is impossible to reduce the drain voltage of the transistors constituting the current source 103. The potential of the source signal line also decreases at the same time.

  When the vertical blanking period ends and an attempt is made to supply current to the pixels in the first row, the source signal line potential is greatly reduced, and the source signal line potential is also reduced compared to normal white display. (Here, the potential of the source signal line is the lowest when white is displayed and is the highest when black is displayed. When the pixel configuration shown in FIG. 6 is used) It is difficult to change the potential compared to other rows (the required change width is large).

  When the potential of the source signal line is greatly reduced, the potential is further reduced compared to when white is displayed, and even when white display is performed on the first line, if the change takes time, display is performed with higher brightness than the predetermined brightness. End up. For a row that is scanned immediately after the end of the vertical blanking period, it is desirable to output a precharge voltage regardless of the display gradation.

  Therefore, in the present invention, the vertical sync signal is used, and the precharge determination signal corresponding to the data corresponding to the next row in the vertical blanking period is used to forcibly precharge the luminance of the first row. Solved the problem different from the brightness of other lines.

  Note that as a method of reducing the potential drop of the source signal line as much as possible, black display data is input to the gradation data 54 in the vertical blanking period, and the switch 108 is turned off to reduce the source signal line potential. It may be suppressed. Further, a switch may be provided between the current output 104 and the source signal line, and the switch may be turned off during the vertical blanking period. This switch may also be used as the current / voltage selection unit 385, and the number of switches can be reduced by separating the current output, voltage output, and source signal line by setting the switch state to three values. Is possible.

  A phenomenon in which a predetermined gradation is difficult to write, particularly a phenomenon in which black becomes halftone display affects the average luminance and lighting rate of a display image. When the lighting rate is high, the luminance is high as a whole, and a small number of black display pixels cannot be visually recognized even if they are halftone display. On the other hand, when the lighting rate is low, the brightness of most pixels is set low, and when this brightness cannot be displayed normally, the brightness of the entire surface changes, resulting in a display far from the original image. This has a big effect on display quality.

  Therefore, for a display with a high lighting rate that has little effect on the display quality, precharging is not performed in order to prioritize a uniform display by current drive, but precharging is performed in a display with a low lighting rate where the increase in black display brightness is conspicuous. To be able to set.

  The lighting rate of the panel can be calculated by adding all luminance data for one frame. Based on the lighting rate value obtained by this method, pre-charging is not performed when the lighting rate is high, and when the lighting rate is low, pre-charging is performed based on the determination result so far, so that the low gradation The luminance of the display pixel can be displayed faithfully.

  FIG. 41 shows a flowchart for performing the precharge method described above.

  When the forced precharge signal is valid from the video signal and the forced precharge signal, a precharge voltage is output regardless of the video signal. The output voltage value may be changed according to the video signal when there are a plurality of voltages. Here, if the forced precharge signal is enabled only when the video signal corresponding to the first row is input, the data of the first row is precharged regardless of the video signal, and the source signal line is used during the vertical blanking period. It is possible to avoid a phenomenon in which the current due to the voltage drop hardly changes to a predetermined value.

  If the forced precharge signal is invalid, the gradation of the input video signal is then determined (412). In a small gradation panel or a low-resolution panel, in a high gradation region where the amount of current is larger than that of a low gradation portion, it is possible to change the current value to a predetermined current value only by a current within a predetermined period (one horizontal scanning period). Therefore, in 412, a determination is made such that precharge is not performed in a gradation in which a predetermined current can be written, and precharge is performed in a gradation in which the current does not become a predetermined current alone.

  Next, if it is below a specific gradation that requires precharging, the process proceeds to 413. (Here, it is preferable that the specific gradation can be set by an external command because the specific gradation differs depending on the display panel.) It is determined whether or not to precharge according to the state of the video signal of the previous line. When the current video signal data has a higher gradation than the data of the previous line, if the black is precharged, the change in the signal line is increased, so that the precharge is not performed. Similarly, precharge is not performed even when the gradation is the same as that of the previous row.

  When it is determined that all the precharges are performed in the above determination, the lighting rate is referred to next, and when the lighting rate is high, the precharge is not performed regardless of the determination result. When the lighting rate is low, precharge is performed as determined.

  In this description, it is determined whether or not to precharge through all the processes from 411 to 414 in order, but all the processes are not necessarily required.

When there are a plurality of outputs of the precharge power supply 24, there are a plurality of switches 131, and the output of the application determination unit can be considered as (number of voltage outputs + 1) of the precharge power supply 24. Since the number of outputs is (number of voltage outputs + 1), the precharge determination signal 55 needs to be N bits (2 ^N ≧ (number of voltage outputs + 1), where N is a natural number) instead of 1 bit. This can be dealt with by changing the number of bits of the latch unit 22 accordingly. FIG. 40 shows an example with a 2-bit precharge determination signal 55. This is the case where there are three voltage values of the precharge power supply 24. When both precharge determination signals are 0, only current is output, and when all are 1, there is a period for outputting the first voltage, and only 55a is 1 In this case, it is possible to appropriately control the precharge determination signal 55 in accordance with the gradation by having a period for outputting the second voltage and having a period for outputting the third voltage when only 55b is 1. It is possible to apply a precharge voltage.

  FIG. 42 shows a circuit block for realizing the precharge method according to the present invention. A determination signal as to whether to precharge the video signal 410 as a result of determination by each block is output to 417. Whether to perform precharge on the source driver side is determined by the determination signal 417 output at almost the same timing as the video signal 410. The serial / parallel conversion unit 427 is not necessarily required, and is necessary for matching with the input interface of the source driver 36 when realized in combination with the source driver IC configured by 36 of FIG.

  The video signal 410 is input to the precharge determination unit (421) and the storage unit (422).

  As shown in 411 of FIG. 41, the forced precharge is performed when the forced precharge signal 416 is input regardless of the video signal 410. Therefore, in the final stage of all the precharge determination blocks, What is necessary is just to insert in the form which masks the determination result. Therefore, in FIG. 42, the precharge flag generation unit 408 is configured in the final stage. If the precharge determination signal 417 is to be precharged at the “H” level, a desired operation can be realized by configuring this block with only a logical sum.

  If the data of the previous line is smaller than the current data, no precharge is performed, so the data of the previous line is first compared with the data of the current line. As a circuit for this purpose, there are a storage means 422 and a data comparison unit 400 one row before. The storage unit 422 has a capacity capable of holding data corresponding to the number of outputs of the source driver 36, and holds data of one row before by holding a video signal for one horizontal scanning period. By comparing the output of the storage means 422 and the video signal 410, the data of the previous row and that row are compared, and the comparison result is input to the next precharge determination unit. The comparison result is output as one bit indicating whether or not to precharge.

  In addition, since the pre-charge is not performed in the case of the high gradation data that can be written only by the current, the image signal 410 is referred to and is larger than the gradation set by the pre-charge application gradation determination signal 429 or below. Whether or not to perform precharge is output.

  Further, the determination is made based on the lighting rate. Based on the lighting rate data 420 and the lighting rate setting signal 418 calculated by the determination unit 409 based on the lighting rate, a signal that precharge is performed when the lighting rate determined by the lighting rate setting signal 418 is exceeded is output.

  In the pre-charge flag generation unit 408 to which the output of the determination unit and the forced precharge signal 416 are input by the previous row data comparison unit, the precharge determination unit, and the lighting rate, when the precharge is performed by the forced precharge signal 416, A precharge signal is output to 417 regardless of the signal. In other cases, output is performed so that precharge is performed only when the output of the determination unit is all precharged by the previous row data comparison unit, the precharge determination unit, and the lighting rate.

  Thus, the precharge flag 417 corresponding to the video signal 410 performs output corresponding to the result determined according to the flow of FIG.

  The serial / parallel conversion unit 427 is necessary to match the input interface of the source driver 36 of FIG. 3, and is not necessary when the video signal of each color and the precharge output 417 (for each color) are transferred in parallel ( Output to the source driver as it is).

  2 shows an example in which the control IC 28 and the source driver 36 are composed of different chips, but an integrated chip composed of the same chip may be used. In this case, the configuration shown in FIGS. 41 and 42 is built in the source driver 36.

  It is preferable that the output voltage value of the precharge power supply 24 can be controlled by an electronic volume or the like. This is because the precharge voltage for causing the predetermined current to flow is determined based on the voltage of the EL power supply line 64. In FIG. 12, when the current I2 is made to flow through the source signal line 60, the potential of the source signal line 60 is (the voltage of the EL power supply line 64) from the relationship between the drain current and the drain-gate voltage of the transistor 62 (FIG. 12B). −V2.

  On the other hand, the EL power supply line 64 is supplied to each pixel through wirings 313 and 314 in the display panel shown in FIG. The maximum current flows to 313 when all pixels display white, and the minimum current flows to 313 when black displays. At this time, due to the wiring resistance of 313, the potential is different at points 315 and 316 during white display. On the other hand, at the time of black display, 315 and 316 have substantially the same potential. That is, the potential of the EL power supply line 64 differs depending on the voltage drop of the EL power supply line 313 between white display and black display. That is, even when the same current I2 is passed, the voltage of the source signal line 60 differs depending on the voltage drop amount of the EL power supply line 313. Therefore, if the voltage value of the precharge power supply 24 is not changed by the voltage drop amount 313, there arises a problem that the current of the source signal line changes and as a result, the luminance changes.

  If the voltage of the EL power supply line 64 is different, the voltage applied to the source signal line 60 needs to be different. What is necessary is just to change a voltage using the lighting rate data in 1 frame. When the lighting rate is high, the current flowing through the EL power supply line 313 increases, so that the electronic volume is controlled so that the voltage drop is large and the voltage value of the precharge power supply 24 is lowered. On the other hand, when the lighting rate is low, the voltage drop of the EL power supply line 313 is small, so that the luminance value caused by the wiring resistance of the EL power supply line 313 is increased by increasing the voltage value of the precharge power supply 24 using an electronic volume. It can be eliminated.

  On the other hand, in a large panel, it becomes difficult to write current up to a predetermined value. Therefore, it is necessary to improve writing by preparing a voltage value for almost every gradation, particularly at a low gradation. In order to further increase the voltage value, there is a method of increasing the precharge power supply 24, but the switches 131 are required as many as the number of voltages. In particular, a switch requires a large number of power supplies for each source line, so that a large area is required.

An N-bit precharge determination signal 55 is required for the number of power supplies (2 ^N -1), and a decoding unit for controlling (2 ^N -1) switches from the N-bit signal is provided for each source signal line. Therefore, there is a problem that the circuit scale of the decoding unit increases as N increases and the chip area increases.

  This is because the digital data (grayscale data) is converted to analog values (precharge voltage) in each source line, so a digital-analog converter is required for each source line, so the circuit scale increases as the number of output voltages increases. Becomes larger.

  Therefore, as shown in FIG. 38, only one digital-analog conversion unit 381 is prepared in the semiconductor circuit, converts the serially transferred data into an analog voltage, and then distributes it to each source signal line. For this purpose, the output 382 of the digital-analog conversion unit is input to the distribution unit and hold unit 383, and an analog voltage based on the gradation data is distributed and supplied to each source signal line.

  On the other hand, the method of outputting the current corresponding to the gradation is similar to FIG. 2, in which the gradation data 386 is distributed to each source line by the shift register and latch unit 384, and the gradation is obtained by the current output stage 23 in each source line. A corresponding current is output.

  A current / voltage selector 385 is arranged immediately before output to the source signal line as a part for determining whether to output current or voltage. Based on the precharge determination signal 380, the precharge voltage application determination unit 56, and the precharge pulse 52, the current voltage selection unit 385 is switched to determine whether to output current or output current after voltage output. The precharge voltage application determination unit 56 determines whether or not to provide a period for performing voltage output, and the precharge pulse 52 determines a period for performing voltage output when performing voltage output.

  Thus, if the digital-analog converter 381 has the number of analog output stages corresponding to the number of gradations, it is possible to output a voltage corresponding to the gradations, and a period during which a certain row is selected (in the horizontal scanning period). 1), the source signal line current is first changed to a predetermined value by the voltage, and then the deviation of the current value due to the variation of the transistors of each pixel can be corrected by the current output.

  In order to change the current to a predetermined current value by the current, it often takes a time longer than the horizontal scanning period particularly in the low gradation portion, but the method of changing by the voltage can complete the change in approximately 1 μsec. Since the correction by the current is slight, there is an advantage that it is easy to change the current up to a predetermined current within the horizontal scanning period in the method of flowing the current after applying the voltage.

  For example, in a driving semiconductor circuit capable of displaying 256 gradations, if only the current can be sufficiently changed to a predetermined current value in the upper 128 gradations, the voltage may be output for the lower 128 gradations. Therefore, the digital-analog converter 381 has only to have a 7-bit resolution and only needs to output 128 kinds of voltages. When the gradation data 386 is one of the upper 128 gradations, a precharge determination signal 380 is input so that voltage output is not performed. As a result, the current / voltage selector 385 always outputs only current. Since the output signal of the digital-analog converter 381 is not output to the outside of the driving semiconductor circuit, it may have any value. The simplest method is to ignore the upper 1 bit of the input gradation data 386 and output a voltage corresponding to the value of the lower 7 bits.

  When the gradation data 386 is between 0 and 127 gradations, the current / voltage selection unit 385 is controlled by the precharge determination signal 380, and the analog voltage from the digital / analog conversion unit 381 is supplied to the outside of the driving semiconductor circuit. An output period is provided.

  As a result, a circuit with a reduced resolution of the digital-analog converter can be formed. In general, in the case of a current copier using a p-type transistor as shown in FIG. 6 or a current mirror pixel configuration as shown in FIG. Will go down. The voltage change width in the black to halftone range is smaller than the voltage change width in the black to white range. Therefore, when the configuration is such that the voltage is output only when the gradation is from 0 to 127, the dynamic range of the output voltage can be reduced.

  In addition, since the source driver IC 36 of the present invention performs an operation of outputting a current after applying a voltage and correcting the variation of the driving transistor, the output voltage value may be a value that substantially becomes a target current value. Is not required. As a result, the value of the output deviation of the voltage output of the digital-analog converter 381 may be larger than that of the liquid crystal panel, so that the circuit scale can be reduced accordingly.

  In general, the ease of current change varies depending on the difference in the size of the panel using the source driver IC (the floating capacitance of the source line is different) and the difference in the number of pixels in the scanning direction (the horizontal scanning period is different).

  When the driver IC of this configuration is used, if the precharge pulse 52 is input from the outside of the source driver IC, the precharge determination signal 380 and the gradation data 386 become external signal inputs as shown in FIG. According to the panel, there is an advantage that a gradation range for performing gradation display can be arbitrarily set using only current or both voltage and current. The setting of the gradation range can be controlled by a control IC formed outside as shown in FIG. When the operation of the control IC can be changed by inputting a command, it can be adjusted by inputting the command. In addition to the case where the control IC is configured outside the source driver IC as shown in FIG. 2, the source driver IC and the control IC are integrally formed on the same chip as seen in a part of the liquid crystal source driver. It doesn't matter. At this time, the gradation range may be adjusted by inputting an integrated IC command.

  According to the above invention, in the low gradation portion, since the current flowing through the source signal line is small, the current cannot be changed to a predetermined value within a predetermined time (horizontal scanning period). The problem that the luminance of the image becomes higher than a predetermined value has been solved by inputting a precharge voltage.

  FIG. 8 is a diagram showing a reference current generating circuit. The reference current defines a current value (reference current 89) per gradation in the output stage configuration shown in FIG.

  In FIG. 8, the reference current 89 is determined by the potential of the node 80 and the resistance value of the resistance element 81.

  Further, the potential of the node 80 can be changed by the control data 88 by the voltage adjusting unit 85.

  Depending on the transistor size of the gradation display current source 103 for performing current output, output current variation occurs for each terminal. FIG. 11 shows the relationship between transistor size (channel area) and output current variation. In consideration of the variation in the reference current, the variation between the adjacent terminals within the chip and between the chips needs to be within 2.5%. Therefore, the variation in the output current (current variation in the output stage) in FIG. The transistor size of 103 is preferably 160 square microns or more.

  Now, in a display panel using an organic light emitting element, current flows only to the lit pixel, and no current flows to the non-lit pixel. Therefore, the maximum current flows when the full screen is white and the minimum current flows when the full screen is black.

  The power supply circuit that supplies current to the display panel needs to have a capacity that allows the maximum current to flow. However, there is very little screen display that allows the maximum current to flow. It is wasteful to provide a power supply circuit having a large capacity because of the maximum current that is generated with very few opportunities. In order to reduce power consumption, it is necessary to reduce the maximum current as much as possible.

  Therefore, as a method of reducing the maximum current, when the number of white display pixels is 60% or more, the luminance of all the pixels is reduced by about 2 to 3%. According to this, the maximum current decreases by 2 to 3%, and the power at the peak decreases.

  This method can be realized by changing the value of the reference current 89 generated from the reference current generation unit 26 that determines the current per gradation by about 2 to 3%.

  Therefore, the reference current 89 is changed by changing the value of the control data 88 and changing the voltage at the node 80 according to the display pattern.

  As described above, in order to change the value of the control data in accordance with the display pattern, it is necessary to perform a control of determining the display pattern and changing the control data according to the determination result. Therefore, this determination is normally performed by the control IC 28.

  Therefore, the number of signal lines input from the control IC 28 to the source driver IC 36 is equal to the number of control data lines of the electronic volume in addition to the video signal lines. Therefore, the input / output terminals of both ICs increase. When the electronic volume control is 6 bits and the video signal line is 18 bits (each color is 6 bits), 24 terminals are required.

  Further, since the precharge power supply 24 is built in, there is a register for setting the output voltage of the precharge power supply 24. Since the precharge voltage is determined by the TFT characteristics of the display panel and the threshold voltage of the organic light emitting element, it is necessary to set a different voltage value for each different panel, and it is necessary to set it from the outside at least once. Providing an external input terminal for one setting is inefficient.

  Reducing the number of input / output signal lines is effective for reducing the chip area and simplifying external wiring.

  Therefore, in the present invention, the number of signal lines is reduced by connecting the data lines and address lines between the control IC and the source driver IC so that the video signal and various setting signals are serially transferred at high speed. The video signal is also serially transferred in the three source colors of red, green and blue.

  FIG. 1 shows a timing chart of data lines and address lines. After the start pulse 16 is input, pixel data for one row is transferred from the data line 12. Thereafter, control data is transferred. For example, the setting value of the electronic volume. In order to determine what data is flowing in the data line 12, the address 13 is transferred in synchronization with the data on the data line 12. In this example, when the data on the address line 13 is 0, red data is displayed, 1 is green data, and 2 is blue data. A value of 4 or more is command data.

  A block diagram of the distribution unit 27 for distributing the serially transferred data is shown in FIG. The distribution unit is composed of a two-stage register for video signals and a one-stage register or latch circuit for other command data.

  The first stage register or latch circuit 182 captures only necessary data, and for the video signal 11, the timing of the three color signals is adjusted so that the carry pulse of the next shift register unit 21 can be lengthened. . Thereby, video data 11 as shown in FIG. 1 is extracted. This data is distributed to each output by the shift register unit 21.

  A second example for reducing the number of signal lines is shown in FIGS.

  In this example, a signal line is prepared for each color, and data of each color is serially transferred. A video signal corresponding to each dot is sequentially transferred, and a command signal is transmitted using a blanking period. FIG. 30 shows the transfer relationship in one horizontal scanning period. The video signal transfer period 301 and the command transfer period 302 are identified by the data command flag 282. The data at the head of the data 281 for one pixel is applied to the data command flag 282 (in this example, one of the red data is used). It is determined as a command and is determined. The data command flag 282 may be in any part of the data 281 for one pixel, but the data command flag 282 is easier to process because it can be determined first whether the input data is a command or not.

  In this example, the data 281 for one pixel consists of six times of data transfer. The precharge determination signal 55 is 3 bits, and the video signal is 8 bits and an 11-bit signal is transferred at 6 times speed by two signal lines. To do. A breakdown is shown in FIG. First, the precharge determination signal 55 group 283 is transmitted, and the video signal group 284 is transmitted. There is no restriction on this order. In order to make the red data, the green data, and the blue data have the same circuit configuration, it is preferable to leave the first one bit of data and transfer the precharge determination signal 55 and the video signal group 284. Since the video signal is transferred serially, it is input to the shift register after parallel conversion via the serial-parallel converter. The output timing after parallel conversion of red data is shown at 286.

The period represented by 285 may be blank data. In this example, the gate signal line sent by serial transmission is input to the source driver, converted into parallel in the source driver, and the signal is supplied to the gate driver. The signal of the line is put. (In a display device using an organic light-emitting element, the gate driver includes a pixel selection gate driver for flowing a predetermined current to a predetermined pixel and an EL lighting gate driver for continuing to flow a current stored in the pixel. If a clock, start pulse, scan direction control, and output enable terminal are required for each, 8 signal lines are required in total, and 6 signal lines are required for one gate signal line, and 2 signal lines for 285. (If it is sent, the waveform of the gate driver can be controlled at the timing of one pixel. Finer control is possible. To achieve this, 285 sections are required in addition to the serial transfer of the gate signal line)
On the other hand, FIG. 29 shows an example of data transfer at the time of command transmission. Since it is often sufficient that the number of bits per command is about 6 bits, in this example, all the red, green, and blue data are collectively regarded as a 6-bit signal, and data for 5 times after the data command identification signal 282 is used as a command. I try to capture it. Since the operation of the gate driver is necessary even during the blanking period, a gate driver signal is input in the section of the gate line and 285 regardless of the value of the flag 282.

  Among signals having the same timing as that of the data command flag 282, there is empty data for 3 bits other than a section in which a gate driver signal is input. This part may be applied to a command having a short bit length, but is used as a command address when it is necessary to set five or more commands. In FIG. 29, a 1-bit command address indicated by 292 is prepared by taking a source driver that accepts 10 or less commands as an example. The command register to be updated is changed according to the values of 282 and 292. Since the data is transferred once, the serial / parallel converter is not required, and the internal register input (such as an electronic volume input that determines the precharge power supply 24) may be directly updated.

  The input interface shown in FIGS. 28 to 30 multiplexly transmits the video signal and the precharge determination signal and performs the command input in the video signal non-transmission period, so that the number of commands is 10 and the command bit length is 6 bits. In this case, the number of 93 input lines can be reduced to 6 signal lines.

  The number of signal lines and the transfer rate can be arbitrarily set, and the number of signal lines can be set from 1 bit for each color to the minimum and 2 bits for each pixel of each color at the maximum. When the number of signal lines decreases, the clock frequency increases and it becomes difficult to route external wiring. Therefore, in practice, the number of signal lines with a data transfer rate of 100 MHz or less is preferable. In the present invention, in order to reduce EMI, only the clock is set to a half frequency, and data is captured at both edges.

  The input signal may not be a CMOS level signal but may be transmitted by differential transmission. When differential transmission is used, the signal line amplitude generally decreases, and thus EMI is reduced.

  With respect to the clock and data line for performing high-speed transfer, transmission may be performed in the RSDS format in which the logic signal 164 is extracted from the difference between the two input signal lines (161 and 162) as the input format as shown in FIG. Reference numerals 165 and 166 denote resistance elements for changing the current-transmitted signal into a voltage value. The value of this resistance element is determined according to the specification on the transmission side. By incorporating this input terminal into all the signal lines in FIGS. 1 and 28, the transmission format is differential transmission, and a driver with low EMI is realized.

  As a result, the source driver IC 36 having a small number of input signal lines can be realized.

  FIG. 70 shows a schematic configuration of the driver IC when the current output stage is formed by a current copier configuration as indicated by 736 in FIG.

  In the current copier circuit, an input current is passed through the drive transistor 731 via the switches 734 and 735, and the voltage at the node 742 is determined according to the amount of current flowing. In order to hold this voltage, a storage capacitor 732 is provided to hold the voltage by storing charges. After storing the input current, the switches 734 and 735 are turned off to save the input current. When the current is output, the transistor 733 is turned on, so that a current corresponding to the amount of charge stored in the storage capacitor 732 flows to the output 731. Since the input current is stored and output using the drain current-gate voltage characteristics of the same drive transistor 731, there is an advantage that the same current as the input current can be output regardless of variations in transistor characteristics.

  Further, the current copier circuit has a memory function in order to output the input current once stored in the storage capacitor 732. For this reason, after the input data is distributed to the output terminals, the current copier circuit can have a function of a latch unit for aligning the data output timing. Thereby, the video signal transferred serially in the configuration of FIG. 70 can be distributed to each output without using the latch unit.

  Since the analog current can be held in the current copier circuit, the video signal is converted in advance into a gradation current signal 730 that is an analog current corresponding to the gradation by the digital-analog conversion unit 706 and output from the shift register 21. Each output is distributed according to the signal. A current copier circuit is formed in the current holding means 702 for holding the distributed current.

  As described above, the current copier circuit operates to output the current according to the input current after holding the input current once. Therefore, the current cannot be output during the period in which the input current is stored. When outputting, the gradation current signal 730 cannot be captured.

  Since the current output to the display unit has a problem that it takes time to change to a predetermined current in the pixel circuit, it is desirable to continue outputting the current as long as possible within the horizontal scanning period. Therefore, it is preferable that a current is always output from the source driver IC.

  Therefore, in order to continuously output current even in the output stage of the current copier circuit configuration, two current copier circuits are provided at the same output terminal, and when one stores the gradation current signal 730, the other stores the current. The driver IC is configured to output current to the outside.

  A circuit of the output stage is shown in FIG. Two holding circuits 736a and 736b have a current copier configuration. A select signal 738 is a signal for determining which of the two holding circuits is to be output and which is to store the gradation current signal 730. The select signal 738 changes every horizontal scanning period, and by changing the holding circuit 736 every horizontal scanning period, a current output corresponding to the video signal can be made. By changing the state of the current output transistor 733 of the holding circuit 736 according to the select signal 738, the holding circuit used for output can be determined.

  When both the holding circuits 736 do not output, the selection signal 738 and the inverted output 739 of the selection signal are set to low level. Although 738 and 739 do not necessarily need to enter the reverse phase, both signals must not be at a high level. As another method, 738 and 739 are always in opposite phases, a separate enable signal is provided, and the same operation can be performed by inputting the logical product of 738 and 739 to a signal for controlling the switch 733. .

  The gradation current signal 730 can be distributed to each output by the shift register 21 and the current holding means 702. Next, a circuit that generates the gradation current signal 730 will be described. A digital-analog conversion unit 706 is provided to convert a video signal that is a logic signal into a gradation current signal 730 that is an analog signal, and a current corresponding to the video signal is output. A circuit example of the digital-analog converter 706 is shown in FIG.

  A current corresponding to each bit of the video signal is input from the outside, and the switch 712 is controlled by the gradation signal 711 corresponding to the current value for the corresponding current (gradation reference current 1 to gradation reference current 8). Thus, the gradation current signal 730 corresponding to the gradation signal 711 is output. When gradation signal 1 (711a) to gradation signal 8 (711h) are sequentially assigned from the least significant bit to the most significant bit, twice the gradation reference current 1 (700c) is the gradation reference current 2 (700d). In general, the current value is set and inputted so that the gradation reference current (n + 1) becomes twice the gradation reference current n (where n is an integer of 1 or more and less than the number of bits).

  As a result, the sum of the gradation reference current 700 in which the switch 712 is in a conductive state is output as the gradation current signal 730.

  Next, a method of creating the gradation reference current 700 and inputting it to the digital-analog conversion unit 706 will be described.

  As shown in FIG. 78, the gradation reference current 700 is generated by the gradation reference current generation unit 704. A gradation reference current 700 corresponding to the bit of the video signal is output by a current mirror configuration or the like based on a reference current 781 that sets how much current per gradation is to be set. Here, in the case of 8-bit output, there are 8 outputs of the gradation reference current 700. Since it is necessary to accurately output a current such that (current value of gradation reference current n) × 2 = (current value of gradation reference current (n + 1)), the number of mirrored transistors 782 is changed. Thus, it is preferable to change the output current. This method has a drawback that the gradation is high but the circuit area is large. On the other hand, the number of transistors 782 that generate each gradation reference current 700 is one for each forward current, and the gradation reference currents 1 to 8 can be changed by changing the channel width. Since it does not exactly match the channel width, it is necessary to change the channel width according to the process by simulation. For this reason, there is a possibility that the gradation is deteriorated as compared with the method of arranging only the number. Therefore, as shown in FIG. 78, the gradation reference currents are grouped into the low gradation part and the high gradation part, and the current value is changed by changing the channel width between the low gradation part and the high gradation part. The current is changed between the gradation parts and between the high gradation parts by changing the number of transistors.

  In FIG. 78, the low gradation part is the lower 2 bits and the high gradation part is the upper 6 bits, and the transistor surrounded by a dotted line indicated by 783 has a channel of about 1/4 of the transistor surrounded by the dotted line indicated by 784. By forming with a width (-10% or more and less than + 50%, which varies depending on the process), it is possible to realize the gradation reference current generation unit 704 having a small circuit scale while maintaining gradation.

Since there is one circuit for the driver IC, the current may be changed depending on the number of transistors as shown in FIG. (Because the total circuit area is 10% or less)
The reference current 781 can be realized by configuring a constant current source with a resistor, an operational amplifier, etc. as shown in FIG. It is also possible to change the current value of the reference current 781 by 88 control data. The control of the reference current 781 is useful for suppressing power, preventing burn-in, and improving contrast.

  The gradation reference current 700 formed as described above may be input to the digital-analog conversion unit 706. However, when directly connected, when a plurality of source driver ICs 36 are connected, an error of 1% or less in all chips is obtained. Thus, it becomes difficult to supply the gradation reference current 700.

  When the reference current generation unit 703 and the gradation reference current generation unit 704 are provided for each chip, the mean square of the variation in the reference current generation unit 703 in FIG. 81 and the variation in the current mirror in FIG. 78 or FIG. Variation occurs in the gray scale reference current 700, the current value of a certain gray scale may be different depending on the chip, and luminance unevenness occurs in each chip. To reduce the variation due to the mirror ratio deviation of the current mirror, it can be realized by increasing the transistor size of 782 and 801. To reduce the variation to 1% or less, a channel size of 10,000 square microns or more is required. It becomes.

  In order to supply the gradation reference current 700 to each chip with a small size and no variation, the gradation reference current is generated by using one gradation reference current generation 704 from one reference current generation part 703 for one display unit. 700 is generated and distributed to each chip. This concept is illustrated in FIG.

  By supplying the gradation reference current 704 generated by the source driver 36a to all the chips including 36a, a current having no variation is supplied to each chip. Here, it is necessary to prevent the gradation reference current 700 from being supplied to two or more source driver ICs 36 simultaneously. When the current is different from the voltage, it is divided when connected to a plurality of drivers, and the gradation reference current value flowing through one driver IC is different. Therefore, one IC generates the gradation current signal 730 corresponding to the video signal by using the switch 712 included in the digital-analog conversion unit 706 so that the plurality of driver ICs 36 do not capture the gradation reference current 700 at the same time. In other ICs, it was considered that all the switches 712 are in a non-conductive state.

  The gradation current signal 730 is necessary when supplying a current to the current holding means 702 and outputting a signal to be taken in one of the outputs of the shift register 21. In other words, the period from when the start pulse 16 is input and when the pulse is output from the carry output 701 to the cascaded next stage IC 36 is a period in which the gradation current signal 730 is required.

  Therefore, the switch 712 of the digital-analog conversion unit 706 is always in a non-conductive state regardless of the gradation signal 711 except during the period when the shift register 21 is outputting. In order to realize this, a chip enable signal generation unit 707 is provided so that the switch 712 is always in a non-conductive state except during the shift register operation. The chip enable signal generation unit 707 outputs a pulse only until the start pulse 16 is input and the carry output 701 is performed, and permits the video signal to be converted into an analog current. More precisely, it is a period during which the shift register output 719 is output within the same chip. Since the relationship between the start pulse 16 and the shift register output 719 and the carry output 701 and the shift register output 719 may change depending on the relationship between the input data and the start pulse 16 and the configuration 21 of the shift register, the start pulse 16 and the carry output 701 The enable signal 821 is output after adjusting the period. A circuit diagram of the digital-analog converter 706 corresponding to the enable signal is shown in FIG. The chip enable signal 821 is in a high level state after the start pulse 16 is input until the carry output 710 is performed, and the gradation reference current 700 is output to the gradation current signal 730 in accordance with the gradation signal 711. In other periods, the chip enable signal 821 is a low level signal, so that the switch 712 is always non-conductive and no current is supplied.

  FIG. 83 shows a timing chart of the chip enable signal 821, the select signal 738, the gradation current signal 738, and the gradation signal 711 of the driver IC (chip 1) in one horizontal scanning period.

  The select signal 738 changes for each horizontal scanning period by the timing pulse 29, and it is determined which of the two holding circuits 736 for one output stores the gradation current signal 738 and the other outputs the stored current. Decide. In the period 831a, current is output from the holding circuit A (736a), and the gradation current signal 730 is stored in the holding circuit B (736b).

  The gradation current signal 730 is stored one by one in order, and the output to be stored is determined by the shift register output 719. Further, since the wiring for distributing the reference current to the plurality of driver ICs is used, the digital / analog conversion unit 706 is operated by the chip enable signal 821 only during the period during which the shift register is operating in order to prevent the diversion. A current signal 738 flows. The chip enable signal 821 of the chip 1 becomes a high level signal only during the period 832a, which is the period during which the shift register is operating in the chip 1, and the gradation current signal 738 flows. During the period 832b (a shift register other than chip 1 is operating), the chip enable signal 821 is at a low level, and the gradation current signal 738 does not flow. Therefore, since the gradation reference current signal 700 is always input only to one driver IC, it is possible to branch and wire to a plurality of driver ICs as shown in FIG. Compared with distribution using a current mirror, the same current can be supplied accurately because the distribution is divided by time.

  In the method in which a current copier is provided for each output and the gradation current is distributed to each output, the same current as the stored current can be output regardless of the characteristic variation of the drive transistor 731. Therefore, output variation hardly occurs. . However, the output current may vary due to a phenomenon called “penetration”.

When the signal of the gate signal line 741 is set to the high level in the holding circuit of FIG. 73, the gradation current is stored. For example, if a white gradation current is stored, as shown in FIG. 74, the drain current in the driving transistor 731 becomes a white gradation current (here, Iw). At that time, the voltage at the node 742 becomes Vw from the current-voltage characteristics of the driving transistor 731 (FIG. 75). (Period 747)
The period 747 ends and the gate signal line 741 changes to a low level in order to finish storing the current in the holding circuit 736. At this time, the voltage of the node 742 is also lowered by VG due to the capacitive coupling through the gate capacitance of the transistor 735a when the voltage of the gate signal line 741 is lowered. As a result, the drain current of the driving transistor 731 also decreases from Iw by IG.

  This “piercing” may cause the output current to change depending on the terminal. For example, it is assumed that there is a drive transistor 731 having current-voltage characteristics as indicated by 765 and 766 in FIG. When the voltage of the node 742, that is, the gate voltage of the driving transistor 731 changes to VG due to punching, the drain current becomes Iw1 in the driving transistor of 765, and the drain current becomes Iw2 in the driving transistor of 766, and this current passes through the output signal line 737. It flows to the outside and the output current varies. When the difference between Iw2 and Iw1 is 1% or more with respect to the two average currents, the display quality is affected as luminance unevenness.

  The voltage change amount VG at the node 742 is expressed as VG = Vga × Cgs / (Cgs + Cs), where Cgs is the gate capacitance of the transistor 735, Cs is the capacitance of the storage capacitor 732, and Vga is the amplitude of the gate signal line 741.

  To reduce VG, Cgs or Vga is decreased or Cs is increased. The method of increasing Cs is actually difficult because the chip size increases. Vga basically has an amplitude corresponding to the analog power supply voltage. When this voltage is lowered, the voltage amplitude at the output terminal is lowered, so that the dynamic range of the current that can be outputted is lowered. Further, if the high level voltage of only the gate signal line 741 is lowered, the power supply for the gate signal line 741 is required, so the number of power supplies increases. Since the increase in the number of power supplies leads to an increase in power supply circuits, it is difficult to realize this method.

  Therefore, in the present invention, the gate capacitance Cgs of the transistor 735 is considered to be reduced. When the size of the transistor 735 is simply reduced, the leakage current at the time of turning off increases and the charge held in the storage capacitor 732 moves through the transistor 735, so that the potential of the node 742 changes and a predetermined current cannot flow. A problem occurs.

  It was considered that the transistor 735 is divided into at least two, and the transistor closest to the storage capacitor 732 is made smaller. FIG. 77 shows a circuit of the current holding means 702 when divided into two.

  The transistor 735 is divided into two to have two structures 775 and 772. Compared with the transistor 775, 772 has a smaller channel size. In addition, signal lines connected to the respective gate electrodes are separate, and the transistor 772 is brought into a non-conductive state earlier than 775 by the control of the gate enable signal 771. A timing chart is shown in FIG.

  The advantage of using a plurality of transistors is that the waveforms of the gate signal lines of the two transistors are different, the transistor 772 close to the storage capacitor 732 is first turned off, and then 775 is turned off. “Punch-through” depends on the gate capacitance Cg1 and storage capacitance Cs of the transistor 772 and the gate amplitude Vgate. Since Cgs> Cg1, VG itself can be reduced. Further, in order to hold the charge in the storage capacitor 732, the gate signal line 741 is changed to a low level so that 775 becomes non-conductive after 772 is completely non-conductive. 775 is designed to increase the channel width / channel length value of the transistor in order to reduce the leakage current. There is an advantage that leakage current is reduced by connecting two transistors in series. Further, since the transistor 772 is inserted between the transistor 775 and the storage capacitor 732 in a non-conductive state, there is an advantage that the “piercing” to the node 742 due to the gate signal of 775a does not occur.

  In this way, the transistor connected between the gate and drain electrodes of the drive transistor 731 is divided into a plurality of transistors, and the transistor closest to the storage capacitor 732 is made smaller in channel size and is non-conductive earlier than other transistors. By doing so, it is possible to realize a reduction in the amount of penetration without problems such as charge leakage.

  Furthermore, it is preferable that the value of W / L is small with respect to (channel width) / (channel length) (hereinafter referred to as W / L) of the drive transistor 731.

  FIG. 84 shows current-voltage characteristics. The smaller the value of W / L, the smaller the slope. After storing the grayscale current signal 730, the decrease in the amount of current when the gate voltage of the drive transistor 731 decreases by VG due to “push-through” is a curve 841. Is larger than the curve 842. Therefore, in order to suppress a decrease in drain current due to “penetration”, the W / L of the driving transistor is preferably set to 0.5 or less. In this case, the amount of decrease is 1% or less with respect to the set current (Iw). The lower limit value needs to be 0.002 or more because of the effect of increasing the chip area by extending the minimum creation dimension of the channel width and the channel length.

  As described above, an output stage using a current copier circuit is formed to realize a driver IC with small output variation.

  In a source driver for a large screen panel, there is a problem that the signal line frequency becomes high because the video signal needs to be transferred at high speed, and as a result, electromagnetic noise is emitted. In addition, for televisions and the like, the number of input signal line bits also increases, and there is a problem that the number of signal lines increases.

  Therefore, it was decided to transmit a video signal with a small amplitude signal. FIG. 85 shows connections between the source driver 852, the gate driver 851, the controller 854, and the power supply module 853 at that time. Among them, the small-amplitude signal transmission is performed by a clock 858 having a high signal line frequency, a synchronization signal 857, and a video signal line 856.

  The transmission format of the video signal line 856 is shown in FIG. A period (data transfer period 865) and a blanking period (866) in which data output to the pixels are transferred are formed within one horizontal scanning period 864. The blanking period does not necessarily exist.

  The data transfer period 865 is divided into the number of panel source signal lines (in the case of a color panel, the number of signal lines / the number of colors (generally three colors)). The divided period is a period 862. Within this period 862, 1-bit precharge flag (862) for determining whether or not voltage application corresponding to each color data (861) of red, green and blue and gray scale is inserted at the beginning of the horizontal period is transferred via the video signal line 856. Is done. The video signal data 861 and the precharge flag 862 can be transferred by an arbitrary method from the case where all bits are transferred simultaneously in parallel to the case where the bits are transferred serially bit by bit due to restrictions on the transfer signal rate and the number of signal lines. It is.

  In a large current driver, the current cannot be changed to a predetermined value within one horizontal scanning period due to an increase in the source signal line stray capacitance due to a large panel size and a shortening of the horizontal scanning period due to an increase in the number of pixels. The problem becomes noticeable. Therefore, it is indispensable to change the state of the source signal line to the vicinity of the predetermined gradation by the voltage once before displaying the predetermined gradation by the current, and then change it to the predetermined current by the current.

  A configuration example of the source driver is shown in FIG. Here, the source driver is the source driver 852 in FIG. Since the video signal is transmitted with a small amplitude signal together with the clock and the synchronization signal, it is input to the differential input receiver 893 for level conversion on the source driver side. The video signal is converted into gradation data 386 of CMOS or TTL level. The gradation data 386 is input to the shift register / latch unit 384 and the precharge voltage conversion unit 884. The gradation data 386 is distributed to each output by the shift register and latch unit 384, and the distributed gradation data is converted into a current amount corresponding to the gradation by the current output stage 23. This makes it possible to output current according to the gradation. On the other hand, the gradation data is input to the precharge voltage converter 884 at the same time. The precharge voltage converter 884 outputs a voltage corresponding to the gradation data as a signal 885 with a circuit configuration as shown in FIG. The output voltage can be changed according to the conversion matrix of the precharge value conversion unit 882 and the value of the resistance element 883.

  An equivalent circuit between the pixel and the source driver during the current writing period is the circuit shown in FIG. At this time, assuming that the current during white display is I3 and the current during black display is I1, the fluctuation range of the precharge voltage output is the range from V3 to V1 from FIG. The values of V3 and V1 vary depending on the channel size of the pixel driving transistor 62. For example, the difference between V3 and V1 increases as the channel width decreases. In the present invention, two resistance elements indicated by 883 in FIG. 88 are externally arranged so that different voltage values can be output depending on the panel (configuration of the pixel transistor), and the resistance value can be arbitrarily set. Voltage output to any panel. Since the current-luminance characteristics of organic light emitting elements are generally different for red, green, and blue, the values of I1 and I3 are different for each color, and as a result, V1 and V3 are also different for each color. Therefore, the precharge voltage converter 884 shown in FIG. 88 is necessary for the source driver for three circuits. The external resistance value is different for each color. In FIG. 85 and FIG. 89, one circuit is described, but there are actually three circuits of red, green, and blue.

  As described above, the voltage output in accordance with the gradation is then distributed to each output by the distribution unit and hold unit 383. As a result, a current corresponding to the gradation and a current corresponding to the gradation were distributed to each output. The current / voltage selection unit 385 selects whether to output current or voltage.

  Which of the current voltages is selected is determined by the precharge voltage application determination unit 56. The precharge voltage application determination unit 56 makes a determination based on the precharge pulse 451 and the precharge enable 895, and applies a voltage only when the precharge pulse 451 is input and the precharge enable 895 outputs a precharge signal. Like that.

  Thereby, as shown in the output 901 of FIG. 90, when the voltage corresponding to the gradation data Dn (n is a natural number) is VDn and the corresponding current is IDn, the precharge determination signal 383 becomes high level and precharges. In this case, IDn is output after VDn is output within one horizontal scanning period. (VDn application period depends on the pulse width of the precharge pulse 451) On the other hand, when it is at low level, VDn is not output and only IDn is output during one horizontal scanning period. By using the precharge determination signal 383 (a rough time chart of current output or voltage output is shown in FIG. 47), in the low gradation part that hardly changes to the current corresponding to the predetermined gradation value, the voltage is After roughly changing the state of the source signal line, the source signal line is changed to a predetermined current value by the current. On the other hand, in the high gradation part and in the second and subsequent lines when the same gradation is continuously displayed in a plurality of lines, the source signal line can be easily changed to a predetermined current value in the high gradation part. In the case of row continuation, the state of the source signal line does not need to change, and therefore it is not necessary to change the voltage to a predetermined gradation value by voltage, so that the precharge is not controlled by the precharge determination signal 383. It becomes possible. (It is better not to apply the voltage because there is a risk of luminance unevenness due to variations in the characteristics of the drive transistor 62 of the pixel circuit if the voltage is changed in this state.) The precharge determination signal 383 is thus the source signal line. There is an advantage that it is possible to decide whether or not to precharge depending on the situation. Therefore, it is necessary to transfer even if the amount of data sent through the video signal line 856 increases by 1 bit for each color.

  The precharge pulse 451 inputs a precharge period to the source driver through the command line 847 so that the pulse width of the precharge pulse 451 can be changed according to the precharge period set value. Thereby, voltage output is performed in a minimum time required for precharging according to the screen size, and the current output period for setting the predetermined brightness is made as long as possible. Make unevenness correction easier. In order to reduce the number of signal lines of the command line 847, as shown in FIG. 87, 1-bit data is sent to the source driver by serial transfer. In addition to the precharge period setting 872, commands required for the source driver are only a reference current setting 871 for changing the reference current value and a driver output enable signal. These signals are not frequently rewritten, and even if they are frequently performed, they may be rewritten once within one horizontal scanning period. In the example of FIG. 87, the total number of bits is 15 bits, and since the clock 871 for the shift register of the source driver may be slower than the time required to change within one horizontal scanning period, signal transmission is possible without the influence of electromagnetic noise. It is. Therefore, the number of signal lines may be one. Also, the data flowing on the command line 847 is also determined by, for example, the reference current setting 871, then the precharge period setting 872, and the output enable signal in the order of the upper bit to the lower bit for 8 bits from the clock next to the timing pulse 849. This eliminates the need for a command discrimination line (address setting). Thus, the source driver can be set with a small number of signal lines. Note that the reference current generating unit 891 to which the reference current setting signal is input has a configuration in which the reference current can be changed by the electronic volume, and the reference current is changed by changing the electronic volume value by the setting signal (see FIG. 8 shows a configuration example).

  When the video signal is composed of even bits for each color (for example, 10 bits for each color, a total of 30 bits), the precharge flag 862 is added to each color by 1 bit, so the total number of bits is always an odd number. (33 bits in the example) When performing low-amplitude signal transmission, the wiring is usually sent by twisted pair wires. When sending a 33-bit signal line, 66 lines are required if the transfer rate is the same as that of the driver. In this case, since the number of wirings is large, the normal transfer speed is transferred at a constant multiple of the driver clock, and the number of wirings is reduced accordingly. For example, when sending at double speed, 34 bits can be transferred by transferring 17 bits at a time. Of these, data is transferred at double speed by putting data in 33 bits. However, one bit of blank data is sent compared to the actual transfer capability of 34 bits. Similarly, when data is transferred at even multiple speed, blank data is always sent for one bit of odd-bit data, and it is understood that the utilization efficiency of the signal line is low. That is, even if the data for one bit is increased, the transfer rate (double clock speed) and the number of signal lines are not affected.

  Therefore, in the present invention, when the data / command flag 911 is added to the red / green / blue video signals and the precharge flag, and the value of the data / command flag 911 is 1, for example, the video signal and the precharge flag are transferred. When 0, it is possible to make various register settings of the source driver. 91A shows data transfer, FIG. 91B shows the configuration of each bit when various registers are set, and FIG. 92 shows the transfer timing of data transfer and various register settings. Various register settings of the source driver are set by the data / command flag 911 using the blanking period after transferring all the video signals of each color and the precharge flag without one horizontal scanning period. Here, as shown in FIG. 91B, the reference current and the period for applying the precharge voltage are set.

  In this way, the command line 847 in FIG. 85 is not necessary, and the number of signal lines can be reduced.

  A block diagram of the source driver is shown in FIG. In order to separate the command data and the video signal from the video signal line 856, a video signal / command separation unit 931 which is a circuit for converting the low amplitude signal to the CMOS level is different from the configuration of FIG.

 As described above, in the source driver IC that needs to transfer the precharge flag in synchronization with the video signal line and perform various register settings, the video signal line and the precharge flag or the video signal line and the precharge flag are set. And various register settings can be transferred at high speed with a low amplitude signal using the same signal line. As a result, the number of wires necessary for the precharge flag and the number of wires for setting various registers can be reduced, and electromagnetic noise during high-speed transfer can be reduced.

In a small-sized display panel, there is a spatial restriction on the module arrangement, and it is necessary to reduce the number of signal lines drawn out of the panel as much as possible. Since the number of display dots is smaller than that of a large panel, the transfer rate of the video signal line is low. Therefore, as shown in FIGS. 94 and 95, for the gradation display data (red, green, and blue color data, here, R data, G data, and B data) and the gradation display data on the video signal line 856, In addition to multiplexing a precharge flag 862 for determining whether or not to perform precharge, gate driver control data 951 is further transmitted. Signal lines necessary for controlling both the gate driver A (851a) and the gate driver B (851b) are transmitted. The signals to be transmitted are a shift register operation clock, a start pulse, an output enable signal, and a signal for determining a shift direction. Since the output enable signal may change the signal line state in units of several microseconds, the gate driver control data 951 is transmitted not only in the data transfer period 962 but also in the blanking period 963 in FIG. Therefore, as shown in FIG. 95B, in addition to the source driver setting signal, the gate driver control data 951 is transferred. As a result, the signal lines drawn from the panel can be composed of a minimum of two pairs of twist lines and three signal lines in addition to the power supply lines.

  If the number of signal lines is reduced, the transfer rate increases, so that the power consumption of the clock generator attached to the transmission-side controller 854 increases. In general, most of the power for small amplitude transmission is consumed by the clock generator. Therefore, in a device that requires low power consumption, the number of twist lines used for the video signal line 856 is increased, and the power consumption is reduced by lowering the transfer rate. (The power consumed by the signal line is about one-tenth to one-twentieth of the power consumed by the clock generator.) The data string shown in FIG. 95 (a) sent during the period indicated by 964 in FIG. These may be sent serially, or some or all of them may be transferred in parallel according to the number of video signal lines 856.

  In this manner, the data of the video signal line 856 transmitted with a small amplitude is separated by the source driver 852. An internal block of the source driver 852 is shown in FIG. Video signal / command separation for outputting clock 858 and video signal line 856, gradation data 386 synchronized with source driver clock 871 created from clock 858 from start pulse 848, precharge determination signal 383 and gate driver control line 941 It is characterized by having a portion 931. The gate driver control signal is always transmitted corresponding to the video signal and command as shown in FIG. 95, and therefore can be demodulated to a signal synchronized with the source driver clock 871 as shown in FIG. By doing so, it is not necessary to draw out gate signal lines to the outside of the panel, and a display panel with a small number of signal lines can be realized. Further, by outputting in synchronization with the source driver clock 871, there is an advantage that the timing of the source driver and the gate driver can be easily matched. Further, since the control line from the controller 854 to the gate driver 851 becomes unnecessary, the number of output terminals of the controller 854 is reduced, and the controller 851 can be created with a smaller package.

  The configuration in FIG. 98 differs from the configuration in FIG. 93 in the block that generates and outputs the precharge voltage. In FIG. 93, a voltage corresponding to the video signal is generated and distributed to each output using an analog latch. However, in FIG. 98, a plurality of voltage outputs of the precharge voltage generator 981 determined by the voltage setting line 986 are output to each output stage. The precharge voltage selection and application determination unit 982 determines which of a plurality of voltages is output or whether only current is output. As a result, the distribution unit and the hold unit 383 become unnecessary. Compared with a large panel, a small current panel has a long horizontal scanning period and a small floating capacitance of a source signal line, so that a predetermined current value is easy to write. Therefore, in this source driver, the number of generated voltage values is reduced and the circuit scale is reduced on the premise that no voltage is applied in a high gradation portion where writing is possible only with current. In this example, a ternary voltage output is used. The number of voltage values may be changed from 1 to 7 as necessary.

A method for outputting a precharge voltage in accordance with video signal data will be described. A video signal and a precharge flag are transmitted as a pair from the video signal line 856 by the method of FIG. In the case of a color panel, a pair of red, green and blue is transmitted. Since precharge is performed by the same method, a red signal is used here. The R precharge flag 862a and the R data 861a transmitted as a pair are input to the video signal / command separation unit 931. Here, it is converted to a CMOS level, and becomes a precharge determination signal 383 and gradation data 386, respectively. In order to distribute the signals sent one pixel at a time to each output, the signals are input to the shift register and latch unit 384. After the distribution, the gradation data 386 is input to the current output stage 23 via the gradation data line 985, and a current corresponding to the gradation is output from 104. On the other hand, the precharge determination signal 383 is output to the precharge determination line 984. As shown in FIG. 100, the precharge voltage selection and application determination unit 982 controls the decode unit 1001 and the selection unit 1004 by using the precharge determination line 984 and the precharge pulse 451, and outputs the gradation current 104 or the precharge voltage. It is determined whether any one of 983 is output. Here, since one signal is selected from the four inputs, the precharge determination line 984 needs to have a 2-bit width. In general, if the number of bits of the precharge determination line 984 is N (N: natural number), the number of bits is required such that the value of ^2N is equal to or greater than (the number of precharge voltages + 1).

  The precharge pulse 451 is a signal for determining a voltage output period within one horizontal scanning period, as indicated by 473 in FIG. Accordingly, even when any precharge voltage 983 is output by the precharge determination line 984, the voltage is output only during the input period of the precharge pulse 451.

  FIG. 101 shows the relationship between the precharge pulse 451 and the precharge determination line 984 and the output 1005. Thus, by controlling the signal input to the precharge determination line 984 from the controller, it is possible to provide a period for outputting the precharge voltage corresponding to the video signal.

  The precharge voltage is generated by a precharge voltage generator 981. A configuration example of the internal circuit is shown in FIG. Each voltage is generated by resistance division. (An operational amplifier is generally connected to the 983 output) Vp1 is determined by resistance elements 992a and 992b. On the other hand, Vp3 has a configuration in which the voltage can be changed for each color because the required current value differs depending on the emission color. The resistor element 997 and the voltage selection unit 994 are used to select any voltage from Vs1 to Vs4. In the display device having the pixel circuit as shown in FIG. 6, the relationship between the source signal line current (= current flowing through the EL element 63) and the voltage of the source signal line 60 is the current-voltage characteristic of the drive transistor 62 in FIG. Since the values coincide with each other, a current shift per gray level due to a difference in luminous efficiency of the EL element between green and blue appears as a shift in the source signal line voltage. Considering 0 to 2 gradations that require a precharge voltage, blue requires less current than green, so a large amount of current is required. Blue also has a dot of 1021 and green has a dot of 1022. It becomes a point. As a result, the voltage value is also different. The voltage selection unit 994 is controlled by the voltage setting line 986. For example, 994c selects Vs4 (995c), and 994b selects Vs1 (995a), so that the precharge voltage value is changed depending on the color as shown in FIG. It is possible. A predetermined voltage can be generated by determining resistance values of 997 and 998 that match the characteristics of the driving transistor 62. The voltage setting line 986 can be set from the outside, and as shown in FIG. 95 (b), a precharge voltage setting 953 is input during the command period, and the video signal / command separation unit 931 separates the video signal from the voltage setting line. 986 can be taken out. As a result, when performing different voltage settings for each color, the voltage can be realized without increasing the number of external signal lines. In FIG. 98, only three precharge voltages 983 are shown, but this shows an example of a single color, and in the case of multi-color, three precharge voltages 983 are required for each color, for a total of nine. Become. The precharge voltage selection and application determination unit 982 has three voltage inputs. This is because the display color is determined for each output, and it is only necessary to input three voltages corresponding to the output color.

  Note that when eight or more voltage values are required, the circuit scale of the decoding unit 1001 and the selection unit 1004 of FIG. 100 becomes large, so the circuit configuration of FIG. 89 is better.

  The configuration shown in FIG. 95, FIG. 98 or FIG. 91 and FIG. 93 may be determined based on the panel size and the number of pixels.

  As a result, a source driver IC capable of outputting current and voltage can be realized with a small number of signal lines.

  The problem with current driver ICs is that the change in the current written to the pixel is slow due to insufficient charge / discharge of the source signal line stray capacitance due to the small output current value, especially in the low gradation part. The time Δt required for the current to change is expressed by Δt = C × ΔV / I (where C is the source line capacitance, ΔV is the source line voltage change amount, and I is the current flowing through the source signal line). Therefore, it can be seen that the lower the gradation, the longer it takes to change. It was also found that the change from black to white took longer when changing from white to black and from black to white.

  For example, if a source signal line current of 10 nA is passed during white display and a source signal line current of 0 nA is displayed during black display, the change in the source signal line current from white to black becomes the waveform shown in FIG. The source signal line current changes to the waveform shown in FIG.

  When one frame is scanned at 60 Hz on a QCIF + (176 × 220 pixel) panel, one horizontal scanning period is approximately 70 μsec. The change in 70 μs from the initial state changes from 94% with respect to the target as shown in FIG. 104 from white to black, but only 5% with respect to the target as shown in FIG. 105 from black to white. It has not changed.

  The reason why the difference between 10 nA and 0 nA is so large is that the change in the value of the source signal line voltage with respect to the source signal line current is a non-linear change. The relationship between the source signal line current and voltage is shown in FIG. The relationship between the current and voltage is determined by the current-voltage characteristic (1063) of the driving transistor 62, and the voltage corresponding to the curve of 1063 becomes the source signal line voltage value according to the current of the source signal line. In the expression Δt = C × ΔV / I of the time required for the current change, the current of the source driver is 0 at the time of change from black to white, and the current of the source driver is 0 at the time of change from white to black. In the initial state, I = 10 nA. Then, when Δt is the same as 70 μs, it can be seen that ΔV is almost equal. When the source potential increases by ΔV from the 10 nA state and when the source potential decreases by ΔV from the 0 nA state, the amount of current change is completely different from the characteristic of the curve 1063. In the direction in which the potential increases, it decreases from 10 nA to 0.6 nA as indicated by 1061, while in the direction in which the potential decreases, it changes only from 0 nA to 0.5 nA. As a result, the current changes as shown in FIGS. 104 and 105 are obtained.

  Here, a change between 10 nA and 0 nA has been described as an example. However, in any combination of gradations, a change from a high gradation to a low gradation is similarly performed from a low gradation to a high gradation. Faster than change.

  Therefore, in the present invention, a method for accelerating the change from a low gradation to a high gradation with a slow change speed has been devised.

  In order to speed up the change, it is necessary to reduce the source signal line capacitance, reduce the voltage change amount, or increase the current. The source signal line capacitance cannot be changed because it is determined by the panel size. In order to reduce the amount of voltage change, the current voltage characteristics of the driving transistor must be changed. Specifically, the channel width of the transistor must be increased or the channel length must be decreased. When the channel width is increased, the transistor size increases, and a small high-definition panel with a small area for one pixel cannot take measures. On the other hand, when the channel length is shortened, the Early effect is more greatly generated. When the drain voltage of the driving transistor 62 is different between writing and EL light emission (period of FIGS. 7A and 7B), the Early effect causes In each case, there arises a problem that the drain current value changes, so that the channel length cannot be shortened. Therefore, it was considered to increase the source signal line current.

  FIG. 108 shows a source driver current output waveform according to the present invention when the current I is written to a certain pixel. It is characterized in that a period during which a current 10 times the predetermined current flows is provided for 10 μsec at the beginning of the horizontal scanning period. For example, as shown in FIG. 107, the current change is changed from the conventional 1072 to 1071 by passing the current 10 times, and the predetermined current writing can be performed in 70 μsec. Thus, by providing a period for increasing the current flowing through the source signal line at the beginning of one horizontal scanning period, the change in the current value is accelerated and a predetermined current can be written.

  When the current is output 10 times the predetermined value, it is necessary to calculate a value 10 times the predetermined current, and it is necessary to provide a function capable of flowing 10 times the current on the source driver side. For this purpose, there is a problem that an arithmetic circuit is required or the current source of the current output stage of the source driver must be increased by 10 times, resulting in an increase in circuit scale. In addition, when the current value per gradation differs depending on the display color, it is necessary to change the magnification for each gradation. Therefore, processing becomes complicated.

  Therefore, in the present invention, since the change from the low gradation to the high gradation is difficult to change, and the gradation 0 changes most slowly even at the low gradation, the gradation 0 is changed to the next gradation. The current value (here, Ip1) is applied at the beginning of one horizontal scanning period and then a predetermined current is applied. The configuration is such that it can be changed to a predetermined current value within one horizontal scanning period. When the predetermined gradation value is larger than Ip1, the current from the gradation 0 to the predetermined gradation is set to 1 over the entire gradation area by causing the predetermined gradation current to flow even during the period of flowing the current of Ip1. It became possible to write within the horizontal scanning period. In this case, a multiplier is not necessary because it is sufficient to provide a period for inserting Ip1 only when the video signal is less than a certain gradation. In the output stage, it is only necessary to provide one current source for outputting Ip1 for each output. The concept is shown in FIG. This can be realized by providing a current source Ip1 (1033) for precharging at the current output 104 in addition to the current source for gradation display. Since this current Ip1 is used only for the purpose of accelerating the speed of changing to a predetermined gradation, there may be variations between adjacent terminals. Therefore, the same current is used as compared with a transistor constituting a current source used for gradation display. It is possible to reduce the total transistor area for output.

  Further, the optimum value of the current Ip1 is determined by the source line capacitance and the current-voltage characteristics of the pixel transistor, and does not depend on the light emission efficiency of the EL element 63. Therefore, it is sufficient that a common current value is entered for each color, and there is no need for individual adjustment for each color, and a small circuit can be configured.

  FIG. 109 shows the configuration of the source driver IC in the case where a function for outputting Ip1 is provided at the beginning of the horizontal scanning period. Here, the current Ip1 output at the beginning of the horizontal scanning period is referred to as a precharge current. A precharge reference current generator 1092 for generating a precharge current, a precharge current output stage 1094 for determining whether to output to the source signal line, and a pulse generator 1097 for setting the period of the precharge current are provided. Is a feature.

  Whether or not to output a precharge current is determined by a precharge determination signal 383. Since the precharge determination signal 383 is transmitted in synchronization with the gradation data 386, whether or not to provide a period for outputting the precharge current for each pixel, and when a plurality of precharge currents are provided, It is possible to set which one to select. It is distributed to each output by the shift register and latch unit 384 together with the gradation data 386 so as to be distributed to each output. The gradation data is input as a gradation data line 985 to the current output stage 23 provided for each output. In the current output stage 23, a current amount corresponding to the reference current value created by the gradation data line 985 and the reference current generator 891 is output to 1093. FIG. 110 shows the configuration of the reference current generation unit 891 and the current output stage 23 in the case of a multi-color driver with an example in which the gradation data line 985 is 3 bits. The signal line potential of 1101 is changed by the reference current setting line 934, and the current value of the constant current circuit including the operational amplifier 1103, the resistor 1102, and the transistor is changed. Thus, it can be seen that the current changes according to the value of the reference current setting line 934. The current of the output 1093 is changed by the gradation data line 985 by changing the number of current source transistors 103 connected to the output depending on the value of the gradation data line 985. In general, since the organic EL element has different light emission efficiency for each emission color, it is necessary to change the current per gradation for each emission color. In the present invention, by configuring the resistor 1102 as an element outside the IC, the resistor 1102 can be easily adjusted, and the current value per gradation is changed by the resistance value so as to achieve white balance. On the other hand, the precharge determination line 984 distributed to each output is input to the precharge current output stage. Further, the precharge current output stage 1094 also receives signals from the precharge reference current generator 1092 and the precharge pulse 1098.

  The pulse width of the precharge pulse 1098 is determined by the pulse generator 1097. The pulse generation unit 1097 outputs a precharge pulse 1098 based on the value of the precharge period setting line 1096 from the timing pulse output using the value and timing pulse of the current precharge period setting line 1096 and a counter circuit with a clock. I have to.

  A precharge reference current generator 1092 that determines the value of the precharge current changes the precharge current by inputting a precharge current setting line 1091.

  These two external setting values (the current precharge period setting line 1096 and the precharge current setting line 1091) are applied to the video signal line 856 using the blanking period of the video signal to reduce the input signal lines of the source driver. A setting signal was sent during the ranking period. Therefore, the current precharge period setting line 1096 and the precharge current setting line 1091 are taken out from the video signal line 856 via the video signal / command separator 931.

FIG. 111 shows a circuit configuration of the precharge current output stage 1094 and the precharge reference current generator 1092. (Two examples of multi-color three-color set)
In the precharge current output stage 1094, one of the precharge current source transistors 1112 to 1114 or the gradation current 1093 is output to the output 104 by the determination signal decoding unit 1111 to which the precharge determination line 984 and the precharge pulse 1098 are input. Whether or not to output a precharge current is selected by making the connection.

  As a result, when the precharge pulse 1098 is at a high level, which of the precharge current sources is output depending on the value of the precharge determination line 984, or whether the gradation current is output without the precharge current Can be decided.

  The pre-charge current may be 1 value, but the required current value varies depending on the panel size, that is, the capacitance value. Therefore, when the IC driver is used for general purposes in any size, the current is adjusted for large size and small size. Thus, it is possible to improve versatility by allowing a plurality of items to be output.

  Although the pulse width of the precharge pulse 1098 depends on the panel size and the length of the horizontal scanning period, it is preferably 5 μsec or more and 50% or less of the horizontal scanning period. When a predetermined gradation cannot be written in this range, this is dealt with by increasing the precharge current. The precharge determination signal 383 is controlled so that the value of the gradation data 386 providing a period for inserting the precharge current is applied when the current output from the current output stage 23 is less than the precharge current based on the gradation data 386. That's fine. The precharge determination signal 383 may be differentially input with a small amplitude in the form shown in FIG. 95 in order to reduce the number of input signal lines and to prevent electromagnetic waves.

  In this way, a desired current can be written by inputting a precharge current even when the data in the next row has a higher gradation than the data in the previous row.

  When changing from a high gradation to a low gradation, the target current value can be written almost as shown in FIG. 104, so it can be left as it is. However, it is better to display black exactly for gradation 0 (black). Further, it is possible to emphasize the advantages of improving contrast and displaying black which is a feature of the self-luminous element.

  For this reason, when changing from a gradation other than 0 to 0 gradation, a voltage for displaying black by a voltage is applied at the beginning of the horizontal scanning period, thereby realizing neat black. When a voltage corresponding to the black current is applied to the source signal line, depending on the applied voltage, a phenomenon in which black floats (slightly emits light) is observed depending on the pixel due to variations in the current-voltage characteristics of the drive transistor 62. In order to prevent this, the applied voltage takes into account variations in the current-voltage characteristics, and the drive transistor 62 through which the current flows most is applied with a voltage (precharge voltage) that does not flow in the drive transistor. The brightness variation due to can be prevented.

  FIG. 112 shows the configuration of a source driver that can apply a precharge current or precharge voltage within a horizontal scanning period. A feature is that a precharge voltage generator 981 and a voltage precharge pulse 451 for specifying a period for performing voltage precharge are input so that the precharge voltage can be supplied.

  In the case of performing precharge with a voltage, the source signal line can be sufficiently precharged when the voltage application period is 0.8 μsec or more and 3 μsec or less. Therefore, since application is performed only for a shorter period than the current precharge, a signal line voltage precharge pulse 451 different from the current precharge pulse 1098 is input. Although the period may be shared with the current precharge, in this case, the period for supplying the current according to the gradation is shortened, so that the variation of the driving transistor due to the current is not sufficiently corrected, and the voltage value of the black display is changed. May cause uneven brightness. For this reason, the voltage application period is shortened as much as possible, and the gradation current output period is lengthened (in each panel, the precharge voltage can be adjusted in accordance with the variation of the drive transistor 62, but in practice In some cases, there is a possibility that the characteristics of the drive transistor 62 are greatly shifted between panels and lots, whereas it can be shared by adjusting the precharge voltage, but it requires an adjustment process and is practical. In order to perform this adjustment function with current, it is preferable that the grayscale current output period is long.In a small panel, since the source line capacitance is relatively small and the horizontal scanning period is long, it is sufficient to be shared. (2) Precharge pulses are shared with priority on chip size.

  Since the two precharge pulses 1098 and 451 have the same start position (beginning of the horizontal scanning period) and differ only in pulse width, they can be generated by a counter generated from the source driver clock 871 and the timing pulse 849. It is. The pulse width is determined by a current precharge period setting line 1096 and a voltage precharge period setting line 933, respectively. Similarly to the configuration of FIG. 109, the signal is transmitted using the blanking period of the video signal line 856 in order to reduce the number of input / output signal lines of the source driver. Since two pulses are output once in one horizontal scanning period, the setting is rewritten at most once even in one horizontal scanning period, so insert a signal to be set in the blanking period in this way. That's fine.

  The precharge voltage value to be applied is generated by the precharge voltage generator 981. If there are a plurality of voltages to be output to the precharge current voltage output stage 112, a configuration similar to that shown in FIG. 99 may be used. However, if there is only one voltage value corresponding to the gradation 0, there are three The voltage may be configured by an electronic volume and an operational amplifier, and the voltage value may be adjusted by the electronic volume. In either configuration, the voltage value is adjusted by the precharge voltage setting line 986. As with the precharge pulse, the setting line is performed during the blanking period of the video signal 856.

  The precharge current voltage output stage 1121 selects which of the precharge voltage, precharge current, and gradation current is output. FIG. 113 shows a circuit configuration of the precharge current voltage output stage 1121. In this example, two precharge current sources 1112 and 1113, a total of three precharge voltage lines 983, and a gradation current 1093 are selected, so the precharge determination line 984 is 2 bits. ing. The decision signal decoding unit 1131 decodes which one of the four is output from the decision line 984 and the precharge pulses 1098 and 451. FIG. 114 shows the relationship between the states of the switching units 1132, 1133, 1134, and 1135 and the input signals. A precharge determination line 984 determines whether precharge is performed or, if so, whether current or voltage is used. Further, when precharging is performed, the precharge is performed only during the period of the current or voltage precharge pulse, and the gradation current is output during the other periods. This realized a source driver IC having a current or voltage precharge function. In FIG. 112 to FIG. 114, the number of voltage precharge voltages is one for each color and the number of current precharge currents is two for each color. However, any number can be realized.

  FIG. 115 shows a flowchart for generating a precharge flag that is a source of the precharge determination line.

  Here, the conditions for precharging are considered. The voltage precharge is performed only when the gradation is 0. Further, when the gradation is 0 before one row, since the signal line does not change during these two horizontal scanning periods, it is not necessary to perform voltage precharge. Next, current precharge, but if it is above a certain gradation, it is possible to write enough with the gradation current no matter what data is in the previous row, so no current precharge is required. It is. In general, current precharge is not necessary for a gray scale that outputs a gray scale current larger than the current value Ip of the current source for current precharge. In the example of FIG. 115, a flowchart for a 3.5-type QVGA panel is shown. In this case, the current precharge is unnecessary because the gradation can be changed to a predetermined gradation at 32 gradations or more. The current precharge is required for the 1st to 31st gradation display rows, and the current precharge is performed when the data of the previous row is larger than the display gradation. If the row data is smaller than the previous row data, or if the gradation is the same, current precharge is not required. When the previous row data is gradation 0, a precharge voltage is often applied, and a voltage higher than a predetermined gradation is applied to prevent luminance variation due to voltage. Therefore, the amount of change in potential of the source signal line is increased, and it becomes difficult to write a predetermined gradation. Therefore, when the previous row data is 0, it is possible to prepare Ip0 whose current precharge current value is larger than Ip and to output this current after gradation 0.

  In order to realize such precharge, as shown in FIG. 115, video signal data is first examined by the flow shown in 1151, and gradation 32 or higher that does not require precharge, gradation 0 that becomes voltage precharge, and the like. Branch to gradation. Since precharge is not necessary at gradation 32 or higher, the precharge flag value is set to 0 by the determination of 1157 (when the determination signal decoding unit 1131 truth table of FIG. 114 is used).

  In the case of gradation 0, the data of the previous row is referred to by the flow of 1152. Since it is not necessary at the time of gradation 0, it is divided into gradation 0 and the others, 1157 is not precharged at gradation 0, the flag is set to 0, and voltage precharge is performed at other than gradation 0. The charge flag is 1.

  In the remaining gradations 1 to 31, if the video signal data of the previous line is larger, 1157 is not precharged and the flag is 0 because precharge is not required. In the case of gradation 0, since the current Ip0 is required as a precharge current, the current precharge (current source 1113) is 1155. Therefore, the flag value is 3. In other cases, since the normal current precharge (current value Ip) is used, the current precharge (current source 1112) is 1156, and the precharge flag outputs 2 (where the current source 1112 is the current source of Ip, The current source 1113 is assumed to be a current source of Ip0).

  Depending on the panel, the value of Ip may increase, and the number of gradations that require precharging may increase accordingly. In preparation for this, the branch instruction 1151 may change the condition of the conditional branch by an external command or the like. Further, when the number of precharge current sources and voltage sources is increased, it is possible to similarly create a flowchart and realize a circuit.

  As shown in FIG. 116, the precharge flag generation unit 1162 that realizes this flowchart receives the video signal 1161 and the output of the line memory 1164 that accumulates data of the previous row as shown in FIG. The small amplitude differential signal conversion unit 1163 is input in synchronization with 1161. Here, in order to reduce the number of signal lines and to prevent electromagnetic noise, the signal is converted into a small amplitude differential signal, and further a source driver control signal is inserted during the blanking period, and a video signal line 856 and a clock 858 are output to the source driver. To do. Note that when the controller and the source driver are composed of one IC, the small-amplitude differential signal conversion unit 1163 is not necessary, and this signal may be input to the shift register and latch unit 384 as it is.

  109 and 112, the gate driver control line 941 is output. This signal is used to reduce the number of controller output signal lines, and the number of output signal lines of the controller is not limited. Is unnecessary.

  It has been found that the necessary amount of current precharge varies depending on the display gradation of the previous line even when the same gradation display is performed. For example, when gradation 16 is displayed, a precharge current corresponding to 64 gradations is required when the gradation before the first row is 0, and a precharge equivalent to 26 gradations when the gradation before the first row is 1. When the current gray level of one row was 2, a precharge current corresponding to 16 gray levels (= not necessary) was obtained. For this reason, when determining the precharge current, it is necessary to refer to the data of the previous row and set the optimum precharge current from the data of the previous row and the value of the row data.

  There is a method of controlling the precharge current by preparing a matrix table or the like for the relationship between the previous row data, the row data and the precharge current value, but the table becomes larger as the number of gradations increases, and the circuit scale at the time of IC design increases. There is a problem that it gets bigger.

  The reason why the precharge current has to be determined by preparing a matrix table is that there is a large difference in change time depending on which state the source signal line is in first. The time required for the current change is represented by (capacity of the source signal line) × (source signal line potential difference between the previous row and the row) / (source signal line current). As shown in FIG. 106, the relationship between the current and voltage of the source signal line follows the characteristics of the driving transistor 62 and is represented by a non-linear curve. The lower the gradation display, the larger the potential difference per gradation. For this reason, even if the gradation difference is the same, the time varies greatly to change to a predetermined current. For example, since the potential difference is 1/2 in the 2nd to 4th gradations compared with the 0th to 2nd gradations, the writing time is 1/2 when the source signal line current is doubled. 4 (When the gradation difference is the same at 2) It is necessary not only to detect the gradation difference but also to determine the precharge from the gradation difference and the display gradation, and at least the data of the previous row and the data of the row Need to see.

  If the gradation difference is proportional to the source potential difference, the source potential difference with respect to the gradation difference 1 is uniquely determined, and the necessary current per gradation difference 1 is determined. Based on this, the amount of current required for an arbitrary gradation difference can be obtained by calculation. Therefore, the necessary current value is determined from the calculation result of the gradation difference. If there is a means capable of storing even the necessary current, the precharge current can be determined.

  However, in the display device of the present invention, the gradation difference and the source potential difference are not proportional to each other, and even if the gradation difference is the same, the source potential difference may be different. With reference to the previous data and the row data, the source signal line potential difference is first calculated therefrom. It is necessary to determine the precharge current based on the source signal line potential difference. It is impossible to calculate the relationship between the previous row of data, the row data, and the source signal line potential difference by calculation, or it is not possible because of the calculation that makes the circuit scale very large. In addition, it is necessary to record the precharge current value in all combinations of gradations so that the necessary current value can be found from the data before one row and the row data.

  In the case of 256 gradations, it is necessary to memorize all 65,000 combinations, and even in this case, it is quite difficult to actually create a circuit. The circuit scale is reduced by not storing the combination of unnecessary gradations, which can be realized with a storage amount of about 10,000).

  Therefore, in the present invention, in order to further reduce the circuit scale of the circuit for determining the precharge current value, a voltage corresponding to gradation 0 is applied by a voltage at the beginning of the horizontal scanning period. Changing the state of the source signal line to gradation 0 by the voltage can be realized in about 1 to 3 μsec. Since the time is changed in a period within 10% of the horizontal scanning period, it is not necessary to greatly sacrifice the time required for writing, and the source signal line can be changed to the state of gradation 0.

  By providing a period (voltage reset period) in which a voltage corresponding to this gradation 0 is applied, the state of the source signal line is always changed from the state of gradation 0, and the state of the previous row needs to be stored. Disappears. Since only the precharge current corresponding to the display gradation is stored (because it is always 0), the storage amount is drastically reduced, and at most about 70 are sufficient.

  After the voltage reset period, a precharge current output period is provided to quickly change to a predetermined current, the current is changed to near the predetermined gradation, and then the current change speed is output by outputting the current corresponding to the predetermined gradation. It can be changed quickly even in a low gradation region where the speed is slow.

  In the method of outputting the precharge current with the optimum value according to the display gradation, a current source corresponding to the optimum precharge current value is required for each type of necessary current value. If a current precharge current source is provided in addition to the grayscale display current source 241, the source driver circuit becomes large and the chip size increases. In addition, since the time required for the current change varies depending on the capacity of the source signal line, there is a possibility that the current value of the current precharge is different in panels of different sizes. Since the precharge current cannot be changed by a driver IC formed with a circuit, for example, a current value selection pattern corresponding to a gradation can be created by creating an extra current value and a larger current value than the number of necessary current sources. However, there is a problem that the circuit scale becomes larger.

  Therefore, in the present invention, a precharge current is applied instead of changing the current value according to the gradation so that optimum current precharge according to a plurality of panel sizes can be performed by an external command operation or the like. The period was changed according to the gradation.

  Specifically, the precharge current is a current corresponding to the current at the maximum gradation display, and if the time for applying this precharge current is changed, the amount of change due to the precharge current is small when the time is short. The current is about the gradation, and when the time is long, the amount of change due to the precharge current increases, so that a high gradation current can be achieved.

  A source driver configuration for realizing this is shown in FIG. FIG. 118 shows a circuit configuration example of a current output unit 1171 that outputs a precharge current and a current corresponding to a gradation.

  In FIG. 118, whether or not the gradation display current source 241 is connected to the output 104 depends on the switching means 1183 controlled by the gradation data line 985. This current source is designed so that the amount of current varies depending on the bit weight of the gradation data line 985. Specifically, as shown in FIG. 25, if a current source is formed by a transistor and the weight of the current is determined by the number, the current can be output accurately.

  The circuit scale of the current source unit is reduced by enabling the precharge current to be output from the same current source. For this purpose, the switching means 1184 for connecting or not to connect the current source 241 to the output 104 is connected in parallel with 1183, and the switching means 1184 is controlled by the current precharge control line 1181, so that the current source is shared. Reduced circuit scale. Thus, the fact that switching means 1183 and 1184 are arranged in parallel for one current source 241 can be realized because the precharge current is the maximum current (white display current). Although the switching means is connected in parallel, the current of the connected current source is output if one of them is in a conductive state. Therefore, these two switches realize an OR circuit, and in the current precharge output period, the current precharge control line 1181 is at a high level, and when not output, the gradation data 985 is set at a low level. In this case, all currents 241 are output by the current precharge control line 241. Therefore, a precharge current can be output regardless of the gradation data 985. Note that the use of the maximum current value has an advantage that the current change is accelerated, the precharge current output period 1203 can be made as small as possible, and the gradation current output period 1204 for accurately performing gradation display can be made long.

  Providing two switching units 1183 and 1184 connected in parallel eliminates the need for a logical operation element, thereby reducing the circuit scale.

  In order to control the precharge current output period by gradation, the high level period of the current precharge control line 1181 may be changed by gradation. Therefore, in the present invention, the pulse selection unit 1175 is provided with a plurality of current precharge pulses, and one of the current precharge pulse groups 1174 is selected according to the value of the precharge determination line 984. The precharge pulse 1174 can change the precharge period by using a signal in which the high level period is changed in advance by command setting.

  The input / output relationship of the pulse selector 1175 is shown in FIG. The state of the current precharge control line 1181 and the voltage precharge control line 1182 changes depending on the value of the precharge determination line 984. When the state of the source signal line does not change, such as when the same gradation is displayed in continuous rows, voltage and current precharge is not necessary. In this example, when the precharge determination line 984 is 0, it corresponds to the gradation. Only current output is performed. Further, since gradation 0 is displayed by voltage precharge at the time of gradation 0, only current precharge is not necessary. Therefore, when precharge determination line 984 is 7, only the current precharge control line is always at a low level. Mode is provided. In the case of other determination values, one of a plurality of current precharge pulses having different pulse widths can be selected.

  As a result, as shown in FIG. 120, signals output from the precharge determination line 984, the voltage precharge pulse 451, and the current precharge pulse 1174 to the output 104 are determined. When the relationship shown in FIG. 119 is followed, the output is precharged during the first horizontal scanning period, and then has a precharge current output period 1203 corresponding to the current precharge pulse of 1174d. Period 1204 is entered. In the next one horizontal scanning period, only the gradation current output period 1204 exists. By doing so, it is possible to change the period during which the current precharge is performed by the precharge determination line 984, and the high-level period of each current precharge pulse 1174 is designed to be changed by an external input. For example, an optimal current precharge can be performed according to the panel size and horizontal scanning period, and a source driver corresponding to an arbitrary panel size and the number of pixels can be realized.

  In the present invention, a current precharge pulse group 1174 and a voltage precharge pulse 451 are generated by a pulse generator 1122 as shown in FIG. A current precharge period setting line 1096 and a voltage precharge period setting 933 are input to the pulse generator 1122 from the outside via the video signal / command separator 931, so that an arbitrary command has an arbitrary pulse width. A precharge pulse can be realized.

  Further, in a display device using an organic light emitting element, there is a problem that the current value per gradation is different for each color because the light emission efficiency is different for each display color, thereby changing the precharge current value. In the most efficient display color, since the white display current value is small, there is a possibility that the current cannot be sufficiently changed to a predetermined gradation. Therefore, in the present invention, the current precharge pulse group 1174 is prepared for each color as 1174g, 1174h, and 1174i, thereby solving the above-mentioned problem by adjusting the current application period. Specifically, in the most efficient color, the width of the precharge pulse is increased as a whole because the current is small.

The fact that the predetermined current can be obtained by changing the length of the precharge pulse 1174 in accordance with the gradation will be described using the state of current change in FIG. (In this case, description will be made assuming that the driver output can output 8 bits and 256 gradations. The number of gradations will be explained in the same manner even if the driver has an arbitrary number of bits if replaced according to the number of bits actually used. Is possible)
Assuming that the period of the current precharge pulse is 1174a, for example, the current changes quickly due to the precharge current output period 1242, and then changes slowly because a predetermined current is output. As shown in FIG. 124 (b) The current change indicated by

  On the other hand, when a current precharge is output for a longer time, for example, when a precharge current is output for a period of 1174c, it quickly changes for a period of 1243, and then slowly changes to a gradation 30 with a predetermined current (curve diagram 124 ( c)).

  Further, when the current precharge pulse is always applied, the change is as shown in FIG.

  It can be seen that the current can be changed most quickly by performing current precharge on the current change curve of FIG. 124 (d) until it approaches the predetermined gradation value and then outputting the predetermined gradation current. The higher the gray level, the longer the precharge current output period, and the shorter the gray level becomes, the shorter the gray level becomes, the less the precharge current value itself can be changed to a predetermined gray level only in the application period.

  FIG. 123 shows the relationship between the necessary precharge current period and gradation in the 3.5-type QVGA panel. As the gray level becomes higher, the precharge current period becomes longer. In addition, it is known that the precharge current period is unnecessary for 36 gradations or more. Therefore, by associating the necessary current period and the current precharge pulse as shown in FIG. 123 and specifying the high level period of each current precharge pulse as the period shown in FIG. 123 by an external command, one precharge is performed. With the current source, it is now possible to display the predetermined gradation properly on the next line for all gradation changes by an external command operation.

  The correspondence between the gradation and the current precharge pulse is replaced with the correspondence between the precharge determination line 984 and the current precharge pulse. A control IC or the like generates and supplies a precharge determination signal corresponding to the gradation data so that a desired precharge pulse is selected for the display gradation, and the gradation can be associated with the current precharge pulse. .

  This is advantageous in that the current precharge pulse for the gradation can be changed by the control of the control IC when the correspondence between the gradation and the current precharge pulse is changed.

  When the current value per gradation is large, a predetermined gradation can be displayed without current precharge even at a lower gradation. For example, when the current is twice as large as that in the case of FIG. 123, theoretically, writing can be performed without current precharge for 18 gradations or more. In this case, it is possible to cope with the problem by changing the processing in the control IC that controls the relationship between the gradation and the precharge determination line 984 and rewriting the relationship.

  For this reason, a precharge determination line is prepared separately from the gradation signal in this way, and a current precharge pulse is selected by this precharge determination line, so that the same source driver can be used even when the light emission efficiency of the organic light emitting device changes. It became possible to display using.

  In the method of selecting one of the precharge pulses 1174 having a plurality of pulse widths according to the value of the precharge determination line 984, the pulse widths of the plurality of precharge pulses 1174 can all be controlled by commands from the outside. In order to do so, a signal defining a large number of pulse widths is required. If all these signals are directly input from the outside of the driver IC 36, many input pins are required, which is not practical. Accordingly, in the present invention, the precharge pulse width is increased without increasing the number of external signal lines by serially transferring all set values via the video signal line 856 within the blanking period using the blanking period of the video signal. Can be set.

  FIG. 121 shows a signal input method for inputting a command using the video signal line 856. While the video signal is transmitted, display color data 861 (here, red, green, and blue are assumed as shown in FIG. 121 (a). Note that the data of any color is not limited to these three colors, depending on the display device. For example, three colors of cyan, yellow, and magenta) and a precharge flag 862 that is a signal for determining whether or not to precharge each data 861 are input correspondingly. A data / command flag 950 for determining that it is a video signal is also transmitted. For example, if it is 1 for data and 0 for command, it is possible to identify whether the transmitted signal is a video signal or a command by referring to this bit.

  Next, a command is transmitted during the blanking period. The data / command flag 950 is set to 0 so that it can be identified as a command. This is not necessary if all commands can be set in one transfer. However, in the present invention, since the number of commands is large, some bits are used as addresses, and which data depends on the address value. Determine if it corresponds to a command. In the example of FIG. 121, at address A1211, it is determined whether the signal is a current precharge setting signal or other signal. In FIG. 121 (b), necessary signals are set in addition to the setting of the current precharge period, and a reference current setting signal 912 that defines a precharge voltage value, a voltage precharge period, and current per gradation is transmitted. is doing. In FIG. 121 (c), since it is necessary to set six current precharge output periods for each color, each address B1212 is further provided, and the pulse width of which current precharge pulse depends on the value of the address B1212. Decide whether to set

  Since the pulse width of the current precharge pulse is about 0.4 μsec from FIG. 123, the step width is 0.2 μsec or 0.4 μsec, and the variable range is arbitrary as long as it is about 6.4 μsec. Adjustment to the panel is possible. It suffices if 32 or 16 levels can be set. Since 1174a to 1174f do not need to have the same pulse width, they should be set to different values. Furthermore, 1174a has the minimum pulse width and 1174f has the maximum pulse width, and the roles of the pulses are shared. In this case, for example, the adjustment range of 1174a is 0.2 μs to 6.6 μs (32 step adjustment), and the range of 1174f is 2.0 μs to 8.4 μs (32 step adjustment). The pulse width can be set from 2 μs to a maximum of 8.4 μs. In this way, by setting the variable range of the pulse width of each pulse slightly shifted for each pulse, the variable range can be reduced, the setting signal line width is reduced, and the circuit scale is reduced. can do.

  As described above, by enabling various values to be set by the external input command, the source driver IC 36 that can quickly output a current corresponding to the gradation of the display device at an arbitrary panel size and resolution is realized.

  The current output unit 1171 according to the present invention includes a plurality of switching units connected in parallel to one current source 241 as shown in FIG. 118, and each bit and current of the gradation data line 985 as shown in FIG. This can also be realized by a method in which the logical sum of the precharge control lines 1181 is used to control the switching unit 1221 connected to the current source 241. In the process in which the switching units 1183 and 1184 can be formed small, the circuit scale in FIG. 118 is small. However, if it cannot be reduced, there is a case in which adding a logical sum circuit that can be created according to the logic signal rule may be small.

  Whichever of these two circuits is taken may be selected in consideration of the process rule.

  In this example, the same pulse is input as the voltage precharge pulse 451 regardless of the display color. This is because the state change speed depends on the driving capability of the output operational amplifier to change the state of the source signal line by the voltage. Since there is no influence of different signals for each display color, such as current per gradation, one voltage precharge pulse 451 is used to reduce the circuit scale. If the circuit scale is not a problem, three pulses may be provided so that each color can be individually specified.

  In the source driver IC 36 having the configuration of the output stage of FIG. 118 or 122, an output having the precharge current output period 1243 can be performed with the relationship between the gradation and the precharge pulse as shown in FIG. On the other hand, if the precharge current output period 1243 is determined according to the relationship of FIG. 123, for example, even when the same gradation in which the source signal line does not change is continuously output, precharge is performed.

  As shown in FIG. 125, after the signal line changes to the black display state in the precharge voltage application period 1251 at the beginning of the horizontal scanning period, the state of the source signal line changes to a value close to a predetermined current value in the precharge current output period 1252. In the final gradation current output period 1253, the current value changes to a predetermined current value, and the source signal line current once becomes black at the beginning of the horizontal scanning period. The possibility that the state of the signal line is changed to cause insufficient writing has been increased.

  Therefore, in the present invention, as shown in FIG. 126, when the same gradation current output is continuously output, the precharge current output period 1252 is not provided in the subsequent row, and only the gradation current output period 1253 is provided. It was made difficult to generate an insufficient writing state by reducing the state change of the source signal line.

  In the case of the display pattern shown in FIG. 127 (the pattern in which the areas 1272 and 1274 have the same luminance and the area 1273 has a lower luminance than the areas 1272 and 1274), the first row that becomes the area 1273, the area 1274, In the first row, current precharge is performed. The output current waveform of the source signal line corresponding to the column 1271 is as shown in FIG. Since the output current does not change in the period corresponding to the region 1272, only the gradation current output period is included in the horizontal scanning period 1281.

  In the first horizontal scanning period 1281d after moving to the region 1273, since the source signal line current changes, a precharge voltage application period 1251d and a precharge current output period 1252d are provided for the purpose of quickly changing the current. The current corresponding to the region 1273 can be output in a shorter period than when the precharge current is not output (1282). Similarly, even when the display of the region 1273 is continuous, the change of the source signal line current is minimized by performing only the grayscale current output without providing the period for outputting the precharge current and the precharge voltage.

  Further, when the source signal line performs output corresponding to the display of the region 1274, the voltage and current precharge are performed only in the first horizontal scanning period 1281g. Note that the precharge current output period 1252g is longer than 1252d. This corresponds to the fact that the higher the gradation, that is, the longer the current, the longer the precharge current output period, from the relationship between the gradation and the current precharge output period in FIG. If the region 1274 has gradation 0, the gradation current output period 1253g follows the precharge voltage application period 1251g, and the precharge current output period 1251g disappears. (Because the precharge current output period 1251 exists depending on the gradation, it does not necessarily exist.) By performing this precharge, the output current value is changed only by the gradation current output without the conventional precharge. In comparison with the case (1283), the current of the source signal line could be changed to the predetermined current value in a short time.

  In order to perform voltage precharge and current precharge or voltage precharge only when the state of the source signal line changes in this way, in addition to the relationship with the gray level in FIG. As a result of the comparison, it is necessary to perform the precharge according to the relationship of FIG. 123 only when the video signal is changed.

  FIG. 129 shows a flow for determining whether to perform precharge. The current gradation value is detected from the video signal 1291. (1292) If the gradation is 0, only voltage precharge is performed as in FIG. 123, and then a current corresponding to the gradation is output (1293).

  At the gradation 36 or higher, the current changes up to a predetermined gradation without performing precharge, so only current output corresponding to the gradation is performed (1296).

  In gradations 1 to 35, the processing changes depending on the gradation of the previous line (1294), and only current output corresponding to the gradation is performed in the same gradation as the current gradation (1296). This is done to reduce the waveform change as shown in FIG. 126 when the same gradation is displayed continuously.

  On the other hand, in the processing of 1294, when the gray level one row before and the current gray level change, after the precharge voltage is output, the current pre-charge for the period corresponding to the gray level and the current output corresponding to the gray level for the remaining period are performed ( 1295). This corresponds to the operation in the horizontal scanning periods of 1281d and 1281g in FIG.

  If the signal of the precharge determination line 984 is generated so that the relationship between the gradation and the precharge current output period of FIG. 123 is obtained when the determination result of FIG. The driver IC can output as shown in FIG. In the state of 1296, the relationship of FIG. 123 is not used, and the value of the precharge determination line 984 may be determined so that the gradation current is always output.

  As a result, the change of the source signal line is minimized, and the current can be changed rapidly at the change point, so that the boundary of the region can be displayed properly even in the display as shown in FIG.

  In the gradation 0 display, a precharge voltage is applied to the gate electrode of the drive transistor 62 in the pixel circuit through the source signal line so that a current corresponding to black display (current of 1.3 nA or less) flows. However, in this case, since the voltage is converted into a current in the drive transistor 62, the drain current with respect to the input voltage changes with a change in temperature. For example, as shown in FIG. 130, when the drive transistor 62 is made of low-temperature polysilicon, the current is higher when the temperature is higher (FIG. 130 (a)) than when the temperature is lower (FIG. 130 (b)). Flows well. Therefore, there is a problem that the current during black display increases and black floating occurs (in the case of the circuit configuration as shown in FIG. 6, the drain current of the drive transistor 62 is a current flowing through the EL element. As the current flowing through the EL element is increased, the EL element is lighted slightly and black floating occurs.

  For example, when the temperature is low (a) and the precharge voltage is adjusted to VBk2, the drain current of the transistor 62 flows through IBk. This current is below a level (1.3 nA) where black float is not recognized. When the temperature rises in this state and the characteristics of the transistor 62 change to the curve shown in FIG. 130 (b), the current ID flows, and the current increases to a level where black floating can be seen. In order to eliminate black floating even in a high temperature state, it is necessary to increase the gate voltage to VBk1.

  When the pixel transistor channel size is designed with a width of 25 microns and a length of 15 microns, assuming that (a) is -20 ° C and (b) is + 50 ° C, the voltage of VBk2 is (64 voltage values)- The voltages of 1 [V] and VBk1 are (64 voltage values) −3 [V]. The voltage between the source and drain of the pixel transistor 62 is 1V and 3V, respectively.

  If the necessary source-drain voltage differs depending on the temperature, the precharge voltage applied to the transistor 62 may be changed depending on the temperature. When generating a reference voltage by resistance division when generating the precharge voltage, as shown in FIG. 131, if a temperature compensation element 1311 such as a thermistor is attached in parallel to one of the resistance elements 1312, the temperature is increased. As a result, the voltage at the dividing point 1314 changes. In the case of the thermistor, the resistance value decreases as the temperature rises. Therefore, the temperature compensation element 1311 is connected in parallel to the resistance element 1312a connected to the power supply side 64 among the two resistance elements 1312. If the value of each resistance element, the resistance value of the thermistor, and the temperature coefficient are adjusted, as shown in FIG. 132, a setting can be made such that the precharge voltage increases as the temperature increases.

  A specific circuit configuration is shown in FIG. Description will be made with the source driver 36 and a pixel circuit for one pixel. The circuit of the source driver 36 is described only with respect to an analog output unit that performs voltage precharge. The entire circuit configuration is as shown in FIG. 117, for example. When voltage precharge is performed, the voltage generated by the precharge voltage generator 1313 is output to the current output line 104 by the voltage precharge control line 1182.

  The output voltage is applied to the node 72 in the pixel circuit 67 selected by the gate signal line 61 through the source signal line 60.

  When the pixel selection period ends, the switches 66a and 66b are turned off and the switch 66c is turned on, and a current flows through the EL element 63 based on the relationship between the gate voltage and the drain current of the transistor 62. Since the relationship between the gate voltage and the drain current at this time is as shown in FIG. 130, when the precharge voltage outputs a constant value regardless of the temperature, the node 72 (= the gate voltage of the transistor 62) is also constant. From the relationship of FIG. 130, the current flowing through the EL element 63 changes.

  Therefore, in the present invention, in the precharge voltage generator 1313, the voltage before being buffered by the operational amplifier is not generated by the electronic volume 1341, but via the external connection terminal, using the resistance element 1312 and the temperature compensation element 1311. As a result, the precharge voltage, that is, the voltage at the node 74 is changed according to the temperature, and the current flowing through the EL element 63 is made constant regardless of the temperature.

  133 shows the relationship between the drain current of the transistor 62 (= current flowing through the EL element 63) and temperature when the precharge voltage is constant.

  A solid line 1332 in FIG. 133 shows a change of the current value with respect to the temperature when the precharge voltage is changed. In the case of 1332, it can be seen that the drain current of the transistor 62 is constant regardless of the temperature. By selecting the resistance element 1312 and the temperature compensation element 1311 so that the current value is 1.3 nA or less, it is possible to realize a display with no black floating.

  In the configuration of FIG. 134, a temperature compensation element is used to compensate for a change in current based on temperature characteristics. However, when there is an electronic volume 1341, the value of the electronic volume 1341 may be changed depending on the temperature.

  Since the electronic volume 1341 is generally controlled by the controller 1351, the electronic volume control command may be changed on the controller side according to the temperature. For this purpose, the controller 1351 receives a signal from the temperature detection means 1350.

  In this figure, the electronic volume control signal 1353 is used to set the electronic volume, and the controller 1351 controls the source driver 36. In the source driver as shown in FIG. 117, the voltage value of the precharge voltage generator 981 is set. Is received from the video signal line 856 via the video signal / command separator 931. As described above, since there is a method of separating signals after serial transfer from the controller to the source driver using another signal line, the electronic volume control signal 1353 is not necessarily required. It is only necessary that the controllable signal line be connected between the source driver and the controller, alone or in common with other signals for electronic volume control.

  When the voltage value is controlled by the electronic volume 1341, since the input is a digital signal, the voltage value cannot be increased in a proportional relationship with the temperature. As shown by the solid line in FIG. The output voltage (ie, precharge voltage) of the electronic volume changes.

  Even in this case, in order to make the current flowing through the EL element 63 equal to or less than 1.3 nA in all temperature ranges, the value of the electronic volume is set so as not to fall below the voltage value of the broken line 1362 changed by the temperature compensation element. What is necessary is just to make it change an electronic volume output voltage with respect to temperature like the changed solid line 1361. FIG.

  Thus, the drain current of the transistor 62 flows with respect to the temperature as indicated by 1371 in FIG. As a result, the current flowing through the EL element 63 can be reduced to 1.3 nA or less regardless of the temperature, and a display with no black floating can be realized even at a high temperature as compared with the conventional 1331 in which the precharge voltage is not changed. It was.

  FIG. 138 shows a method for changing the precharge voltage value depending on the temperature without using the temperature compensation element 1311 such as a thermistor.

  As a feature of the present invention, the precharge voltage generating circuit 1382 is formed on the same array surface as the array 1383 in which the pixel circuit 67 is formed, and a voltage is output using the transistor 1381 having the same characteristics as the driving transistor 62. It is characterized by that.

  The precharge voltage generation circuit 1382 includes a transistor 1381 and a capacitor 1386, and is configured to be the same circuit as the pixel selection state as compared with the pixel circuit 67. By inputting the voltage of the node 1387 to the operational amplifier of the precharge voltage generation unit 1313 of the source driver 36, the voltage when no current flows through the transistor 1381 is output from the precharge voltage generation unit 1313. It can be seen that the charge voltage can output a voltage corresponding to the black display state in this array. (Do not use the output of the electronic volume 1341) Here, in order to prevent the current of 1381 from flowing, it is necessary to design the operational amplifier 1388 so that the input impedance of the operational amplifier 1388 is sufficiently high. is there.

  The transistor 1381 and the drive transistor 62 are in the same array plane, and the relationship between the drain current and the gate voltage can be very small between the two transistors. This is because the variation in the sheet surface is smaller than the variation between lots and between sheets.

  The only way to lower the luminance during black display (reduce the current) is to increase the potential at the node 72. The only way to increase the voltage at the node 72 is to increase the voltage at the node 1387 in the precharge voltage generating circuit 1382. For this purpose, there is a method of reducing the drain current of the transistor 1381. In this case, the input impedance of the operational amplifier 1388 can only be increased, and it is easily affected by variations in the characteristics of the operational amplifier 1388.

  Therefore, in the present invention, by increasing the channel width of the transistor 1381, the voltage of the node 1387 is increased according to the characteristics of the transistor 1381 even if the drain current is the same (without changing the configuration of the source driver). did.

  In this case, the precharge voltage and the voltage when the drive transistor 62 performs black display (the voltage at the node 72) are determined only by the two transistors formed on the same array plane 1383. If the variation can be suppressed, a constant black display can always be realized regardless of the external circuit.

  When the channel width of the transistor 1381 is increased or the channel length is shortened, the relationship between the drain current and the gate voltage changes, and the curves 1391 and 1392 shown in FIG. 139 can be realized.

  When two transistors are formed so as to have the relationship as shown in FIG. 139, when a current Id1 flows through the transistor 1381 due to a leakage current or the like, the potential of the node 1387 becomes Vg1, and Vg1 is output as a precharge voltage. . At this time, the same Vg1 voltage is also applied to the node 72 of the pixel circuit 67, and a current Id2 smaller than Id1 flows through the drive transistor 62. As a result, a current of Id2 that is smaller than Id1 that is a leak current flows in the pixel, and thus a display with a lower luminance of black display is possible. The relationship between Id1 and Id2 is determined by the relationship between the characteristics of the transistors 1381 and 62, that is, the ratio of the channel width and length of the transistor. I can take it. Although the same size may be used, the channel width is preferably set to about three times.

  This is enlarged to cope with the problem that even when a current of 0 is supplied to the transistor 62 via the source signal line 60, a current of about 3.5 nA flows to the EL element 63. Due to the Early effect of the driving transistor 62 such as the relationship between the drain current and the source-drain voltage shown in FIG. 144, the source-drain voltage when a current of 0 is written from the source signal line 60 and the current flow through the EL element 63. Since the source-drain voltage of the driving transistor is completely different, there is a problem that even the current written by Id1 increases to the current of Id3. Since the current of Id3 is 3.5 nA and nearly three times the current flows compared to the current of 1.3 nA or less where black display is not a problem in subjective evaluation, a transistor is used to reduce the current to 1/3. It was decided to cope with the channel width of 1381 by triple. Since it is 1.3 nA or less, it may be 3 times or more, but it is about 3 times because the transistor formation area on the array increases.

  Furthermore, since it is within the same array plane, variation in temperature dependence is small, and as shown in FIG. 143, assuming that the characteristics at room temperature are 1391 and 1392, they are similarly shifted at 1431 and 1432 at high temperatures. Thus, only the voltage supplied as the precharge voltage changes from Vg1 to Vg2, and the drain current of the drive transistor 62 can be displayed without changing at Id2. This indicates that the temperature characteristic can be compensated without adjustment. As a result, the temperature characteristic compensation can be achieved by forming the precharge generating transistor in the array plane without using the temperature control means.

  FIG. 140 shows an example of the arrangement location of the precharge voltage generation circuit 1382. Since a pixel circuit is formed in the display area, it cannot be arranged. Therefore, it is formed around the pixel. If there is a space around the gate driver 35, it can be inserted there.

  Further, all the circuits 1382 in FIG. 140 may be formed, and one of them may be input to the precharge voltage generator 1313 via the connection changer 1411 as shown in FIG. By making it possible to change the wiring of the connection changing unit from the outside by laser processing or the like, even if the 1381a transistor becomes defective during the array manufacturing process, it can be output by using a normal transistor by laser repair. If the connection is changed as described above, an improvement in yield can be expected. An example of wiring when the transistor 1381c is operating normally is shown in FIG.

  In FIG. 142, all the transistors 1381 are connected to the source driver input terminal 1389. Since the current flowing through the terminal 1389 is constant, the current flowing per one transistor 1381 is about ¼, and a circuit capable of displaying black can be realized.

  Further, by arranging the black display voltage using the transistors having various characteristics in the array plane as shown in FIG. 140, the variation per transistor 1381 is absorbed, and the average value is obtained. There is an advantage that a close voltage can be output. When an abnormally large current flows through one transistor, the voltage is determined according to the characteristics of the transistor. Since the current value flowing through the terminal 1389 is the same, the voltage is determined according to the characteristics of the transistor that flows most. Therefore, since a voltage capable of black display is output even with the transistor having the best characteristics, there is an advantage that blacks are not always floated even in the worst case.

  In the case where the transistor 1381 has a defect, it is only necessary to cut a wiring connected to the transistor with a laser, so that repair can be easily performed.

  Note that the wiring of the node 1387 including the connection changing unit 1421 has high resistance, and thus is vulnerable to noise. In order to suppress fluctuation due to noise, the capacitance 1386 is preferably larger than the capacitance value in the pixel circuit. Unlike the display portion, since there is no need for an aperture ratio, a sufficiently large capacitor can be formed. Thereby, a voltage with little voltage fluctuation can be supplied.

  When a precharge voltage is applied from an array external circuit including the source driver IC, a precharge voltage value at which the black luminance becomes a certain level or less (0.1 candela / square meter) is different for each panel.

  Examples of adjusting the precharge voltage are shown in FIGS. 145 and 147. The difference between the two figures is whether the precharge voltage is supplied from the outside by changing it programmatically using an electronic volume or by hardware adjustment using a cermet trimmer or the like.

  A feature of the present invention is that the current of an EL cathode power supply 1450 to which all cathode electrodes of EL elements of an EL panel are connected is measured using an ammeter 1453, and the precharge voltage is changed according to the current value. It is.

  In the case of an EL element, luminance and current are in a proportional relationship. Therefore, if the current value at which luminance is 0.1 candela / square meter or less is known, it is possible to determine whether the black level is sufficient by simply measuring the current. Is possible.

  Compared to measuring luminance, measuring with current has the advantage that a dark room is unnecessary and that adjustment can be performed using an ammeter that is cheaper and easier to use than luminance meters.

  In the case of FIG. 145, since the voltage value of the precharge voltage line 1455 is adjusted using the electronic volume 1456, the input logic of the electronic volume 1456 is read by the controller 1452 such as a personal computer and the value of the ammeter 1453 is taken. Accordingly, if the value of the electronic volume control line 1459 is automatically changed, the cathode current can be automatically adjusted. Adjustment is possible at low cost because it does not involve human intervention.

  The case of FIG. 147 is an example in which the precharge voltage can be adjusted by a resistance element 1472 and a trimmer 1473 instead of the electronic volume 1456 and the storage means 1457. In this figure, a temperature compensation element 1471 is also used at the same time to compensate for the temperature characteristics. In this case, black display can be realized by adjusting the trimmer 1473 so as to obtain a predetermined current value while observing the value of the ammeter 1453.

FIG. 146 is a flow for adjusting the optimum precharge voltage. Black display is performed while performing voltage precharge. (1461)
At that time, the current value of the EL cathode power supply (1450) is measured (1462). Since the current value of 0.1 candela / square meter is known, it is determined whether the current value is the value (1463).

  If not, the electronic volume is controlled and the precharge voltage is changed. (1464) The changed value is measured, and it is determined again whether it becomes a predetermined value. This operation is repeated until a predetermined value is reached.

After reaching the predetermined value, the value of the signal supplied to the electronic volume is stored in the storage unit 1457. (1465)
If there is no storage means inside the electronic volume, the value of the electronic volume cannot be held when shipping as a module after voltage adjustment in the present invention. Therefore, a separate storage unit is provided, and the value of the electronic volume is held in the storage unit, and after the inspection is completed, a precharge voltage is generated based on the value of the storage unit 1457. (1467) First, a value is written in the storage means 1457 from the control means such as a personal computer before the inspection is completed.

  As a result, even when the power is turned off, it is possible to supply a precharge voltage that provides an optimal black display for each panel.

  According to the above invention, the black display can be realized by adjusting the brightness so that the black display always has a constant brightness regardless of the panel and does not float black.

  In addition to the above method, as a method of suppressing the luminance of black display without using voltage precharge, the on / off control of the gate signal line 2 (61b) in FIG. By shortening, the luminance can be suppressed.

  FIG. 149 shows the waveform of the gate signal line 2 (61b). FIG. 149 (a) shows a conventional waveform, which is a non-lighting period (1493) only in one horizontal scanning period in which current from a source signal line is taken into a pixel in one frame. In other periods, since the current flows through the organic EL element 63, the organic EL element is turned on.

  In the present invention, as shown in FIG. 149 (b), the switch is turned on only during a part of the period (for example, 1/10) in one frame, and a current is passed through the organic EL element 63. In order to make the display luminance constant, the current flowing from the source signal line is multiplied by ten as the light emission period 1494 is reduced to 1/10. The luminance per one frame is maintained as usual by 10 times the current flowing through the organic EL element 63 in a period of 1/10.

  During black display, the current output from the source driver is 0, and even if 0 is multiplied by 10, the current is still 0. The current of 0 increases by a certain value only due to the Early effect of the driving transistor 62, which is the same current value as before. On the other hand, since the period during which current flows through the organic EL element 63 is 1/10, the luminance can be reduced to 1/10.

  The shorter the lighting period 1494 is, the longer the non-lighting period 1495 is and the shorter the period during which current flows through the organic EL element 63, but the instantaneous current that flows through the organic EL element 63 during white display increases. However, since there is a risk of heat generation due to an instantaneous current and deterioration of the organic EL element due to an increase in current, the minimum is preferably about 1/10 times. On the other hand, since it is necessary to reduce the black display current of about 3.5 nA to 1.3 nA, it is necessary to set the non-lighting period to at least 1/3 times.

  However, when using a means for writing by increasing the current of each gradation with the same means when the number of pixels is large and the horizontal scanning period is short and a predetermined current cannot be written as in a large television, The current that is 10 times the current magnification is considered to be the maximum.

  In addition to the present invention, when a method for realizing black display using voltage precharge or the like is used in combination, for example, the black display current is reduced to about 2 nA when driven in the conventional example of FIG. 149 (a). If this is the case, there is a method in which the lighting period 1494 is halved. If it is doubled, it is considered that the burden on the logic circuit is reduced because there is an advantage such as a 1-bit right shift operation that can be easily performed. Therefore, if two or more of the methods of the present invention are combined, the lighting period can be halved.

  In order to change the lighting period 1494 of the gate signal line 2 (61b), the lighting period 1494 can be changed by, for example, controlling the length of the start pulse of the gate driver 35. This change can be realized by changing the logic inside the controller 1482 by a command.

  The lighting period 1494 can be changed by the controller 1482. Similarly, the current of the source driver 36 also has a reference current generator as shown in FIG. 8, and the reference current can be changed from the controller by the electronic volume. If the reference current is doubled, the current per gradation is also doubled.

  For example, when the reference current of the source driver 36 is doubled by controlling the controller 1482, the length of the start pulse of the gate driver is changed, and the lighting period 1494 of the gate signal line 2 (36b) is halved, the black The brightness at the time of display is ½ times.

  If the source driver and the gate driver are controlled simultaneously and driven at the same magnification, an arbitrary lighting period 1482 can be realized and the black display luminance can be reduced.

  The luminance during black display increases as the temperature increases due to the temperature characteristics of the early effect of the drive transistor 62. Therefore, in the present invention, a signal resulting from the temperature detection means 1481 is input to the controller 1482 so that the lighting period 1482 is changed depending on the temperature. The lower the temperature, the longer the lighting period, and the higher the temperature, the shorter the lighting period. As a result, the current of the source driver decreases as the temperature decreases, and the current increases only at a high temperature.

  A display device with little deterioration can be realized by increasing the current only when necessary so that an unnecessarily large current of the organic EL element does not flow.

  Note that the magnification that can be set is not continuous, but can be changed and set with a discrete value corresponding to the number of scanning signal lines of the display device. It can be increased or decreased at a rate of 1 / (number of scanning lines).

With regard to making the lighting period 1/10 to 1/3 as a measure against black floating during black display, the limit value is determined by the panel and may not be exactly 1/10, and N / ( The value of (the number of scanning lines) may be between 1/10 and 1/3. (N is a natural number and less than the number of scanning lines)
In addition to controlling the start pulse width, a non-lighting period 1495 can be provided for an arbitrary period when an output enable signal of the gate driver is used in combination. When this method is used, since the lighting period 1494 and the non-lighting period 1495 are mixed alternately, there is an effect of suppressing flicker.

  FIG. 149 (b) shows the waveform of the gate signal line 2 (61b) when the output enable signal is used. This is the result of applying output enable at the final output to the gate signal line waveform of FIG. In this way, flicker is less likely to occur by lighting evenly within one frame. The reference current of the source driver 36 may be set by changing the electronic volume from the controller according to the ratio of the non-lighting period 1495 so as to have a predetermined luminance at a gradation other than black.

  With the above configuration, it is possible to realize a display with no black floating without necessarily using a voltage precharge.

  FIG. 45 is a diagram showing a display pattern in which gradation 0 display is performed in region 451 and gradation 4 display is performed in region 452. At this time, if the number of rows in the region 452 is small, for example, one row, the luminance of the region 452 may extremely decrease.

  This is because the current of gradation 4 is small (20 nA or less), and it is difficult to charge and discharge the charge accumulated in the stray capacitance of the source signal line 60, and the source signal per gradation on the low gradation side. Since the change amount of the line voltage is large, a gradation (between 0 and 4) in the middle of changing to gradation 4 is displayed, which causes a problem that luminance is lowered.

  When the region 452 exists across a plurality of rows, the luminance gradually increases from the first row and a predetermined gradation is displayed from the third or fourth row, so that the display is slightly lost. In the case of only one line, the worst line of the region 452 is not displayed, and there is a problem that a small character or a horizontal stripe image with a black display as a background is not displayed. On the other hand, when the display gradation of the area 452 is high, even one line is displayed properly.

  FIG. 47 shows the relationship between the source signal line current and voltage in each gradation. The time required for the change from the region 451a to 452 is Δt4 when gradation 4 is displayed and Δt255 when gradation 255 is displayed. Δt4 = C × ΔV4 / I4 and Δt255 = C × ΔV255 / I255. I255≈64 × I4, while ΔV255≈3.5 × ΔV4. Therefore, it takes time to change Δt4 about 18 times compared to Δt255.

  This is because the increase in the source signal line current and the increase in the source signal line voltage are not in a proportional relationship. The lower the gradation, the greater the change in voltage with respect to the change in current. The curve in FIG. 47 is determined by the relationship between the drain current and the gate voltage of the transistor 62 as shown in the equivalent circuit of FIG. Therefore, the relationship becomes nonlinear, and the change from the same display gradation to a bright gradation becomes more difficult as the gradation changes to a lower gradation.

  When the QVGA display panel is driven with a frame fraction of 60 Hz, the source signal line current has a gradation of 40 nA or less in the region 451, and the source signal line current has a gradation of 300 nA or less in the region 452. It has been confirmed that the brightness decreases. This phenomenon in which a predetermined charge is not written in the capacitor 65 in the pixel is referred to as “insufficient writing”.

  In addition, in the display pattern of FIG. 46, when the region 461 is displayed with 255 gradations and the region 462 is intended to perform gradation 0 or gradation 4, a phenomenon in which the luminance increases over several lines below the region 461 occurs. . The first row of the region 462 has the highest luminance, and the luminance gradually decreases according to the lower row, and the predetermined luminance of the region 462 is displayed in about 3 to 5 rows.

  As shown in FIG. 48, in order to write the gradation corresponding to the region 462 after writing the current in the last row of the region 461, the stray capacitance must be charged by the current flowing through the source signal line. Takes a long time to charge. For example, in the case of a change to gradation 4, it must be changed with a current of I4, and in the case of a change to gradation 0, it must be changed with a current of I0. Therefore, the lower the gradation, the longer the change. Further, the amount of change increases as the amount of change in voltage is also changed to a lower gradation. For this reason, the change to 0 gradation is the most severe, and it becomes easier to write a predetermined value as the gradation increases.

  When one frame is displayed at 60 Hz on a panel having the number of pixels of QVGA, when the source signal line current in the region 462 becomes a current of 40 nA or less, the first 1 to 5 rows have a luminance higher than a predetermined luminance. Become.

  This phenomenon is called “tailing”.

  “Insufficient writing” and “tailing” both occur because the current of the source signal line is small. Therefore, in the present invention, a period for temporarily supplying the current of the maximum gradation is provided, and after changing to a vicinity of the predetermined current, a mechanism for supplying a predetermined current value to the source signal line is provided, so that the predetermined gradation is obtained. The state of the source signal line was changed quickly.

  For example, in the example of FIG. 47, at the time of change from gradation 0 to gradation 4, as shown in FIG. 49, the maximum current value (255 gradation current in this case) is passed during the period of Δt4p1 (491), and the remaining Δt4p2 The predetermined gradation current (I4) is allowed to flow during the period of (492). As a result, the change time Δt4p (= Δt4p1 + Δt4p2) from gradation 0 to gradation 4 is C × (V0−Vip) / I255 + C × (Vip−V4) / I4, where Vip is the voltage at 493, and I255 = When (255/4) × I4 and Δt4 = C × (V0−V4) / I4 are used, Δt4p = Δt4 + ((251 × C) / (255 × I4)) × (Vip−V0) Since V0> Vip, Δt4p <Δt4. Thereby, the current change time from the 0th gradation to the 4th gradation can be shortened.

  In the case of tailing countermeasures, simply increasing the current is not possible. Therefore, once the voltage (V0) corresponding to the black gradation is supplied from the source driver to bring the source signal line into the gradation 0 display state, gradation 4 display is performed as shown in FIG. The change from gradation 0 to gradation 4 and the change from gradation 255 to gradation 4 are different only in the potential difference before and after the change, and the potential difference is larger in the change from gradation 255 to gradation 4. Since the method of FIG. 49 can change in a shorter time than a simple change from gradation 0 to gradation 4, even in the change from gradation 255 to gradation 4, once the voltage is changed to gradation 0 (voltage) The change is most rapid when the gradation 255 current is supplied to the vicinity of gradation 4 and then a predetermined gradation is displayed with the gradation 4 current.

  In this way, flowing a maximum current before changing to a predetermined current value is defined as a current precharge.

  The operation for performing the current precharge is an operation in which a voltage corresponding to gradation 0 is first applied, a maximum current value is output until a predetermined gradation is approached, and a predetermined current is finally passed.

  Even in the case of “insufficient writing”, the voltage may be once changed to the gradation 0. Since the current change time is shortened by at least 100 μs by setting the maximum current without setting the gradation 0, it is assumed that there is an increase in the voltage application period and the current precharge period of about 2 μs (about 2 μs depending on the gradation). Also, a voltage is applied.

  As a result, the current precharge of the same operation can be performed for both “writing shortage” and “tailing”, so that the circuit for performing the current precharge is simplified.

  Further, when there is no voltage application period for setting the gradation 0, it is necessary to change the period for applying the current precharge if the gradation of the previous row is different even in the same display gradation. In the case of the change from the gradation 3 to the gradation 9 and in the case of the change from the gradation 6 to the gradation 9, the voltage change amount is different, and therefore the time required for the change is different. Therefore, if there is no period for setting gradation 0, it is necessary to change the period for outputting the maximum gradation according to the gradation of the previous line and the current gradation value. The control becomes complicated, such as the need to calculate the difference.

  Once the voltage application period for setting the gradation 0 is provided, the gradation change due to the current precharge is always a change from the gradation 0, and the period for performing the current precharge may be set according to the display gradation.

  By performing current precharge in this way, the display patterns of FIGS. 47 and 48 can be displayed exactly even during low gradation display.

  If the current precharge is performed in all gradation display, it is necessary to specify the period for applying the current precharge optimal for all the gradations of 255 gradations, and about 10 to 20 kinds of application patterns are required. It becomes.

  The current precharge application period is controlled in the source driver shown in FIG. As shown in FIG. 120, for example, seven current precharge pulses 1174 and voltage precharge pulses 451 are prepared and realized by the pulse selection unit 1175 and the current output unit 1171 shown in FIGS. 118 and 119. The precharge determination line 984 determines any one of the current precharge pulses or only the voltage precharge (outputs only the voltage in the gradation 0 state) without current precharge, and is transmitted in pairs with the video signal. Come. By selecting the precharge determination line 984 for the video signal, for example, if the current precharge pulse 1174b is selected, the voltage precharge voltage 451 first outputs a voltage corresponding to gradation 0 from the precharge voltage generator 981. After that, a current corresponding to the maximum gradation flows while the current precharge pulse 1174b is at a high level, and when the current precharge pulse 1174b is at a low level, a current corresponding to the gradation is output. Since it is necessary to select an optimal current precharge pulse 1174 in accordance with the video signal for one pixel, the pulse selection unit 1175 and the current output unit 1171 require the number of outputs of the source driver.

If six types of current precharge and voltage precharge are prepared, eight selection methods including no precharge can be considered. Therefore, at least 3 bits are required for the precharge determination line, and the pulse generation unit 1175 requires a decoding unit for converting from 3 bits to 7 bits. (For example, operation according to the truth table shown in FIG. 119)
If current precharge is performed at all gradations, 20-30 current precharge pulses 1174 are required, and the circuit scale of the pulse selector 1175 increases. Since 1175 exist as many as the number of outputs of the source driver, the increase in circuit scale greatly affects the chip area. In addition, since the precharge determination line 984 is transmitted in pairs with the video signal, the number of bits of the latch unit also increases. Therefore, considering the cost of the source driver, about six types of current precharge are preferable.

  Since the types of current precharge are limited to six due to the limitations of the source driver hardware scale, current precharge cannot be performed in all gradations, and current precharge is performed only in the required low gradation region. To do.

  FIG. 50 shows a flowchart for determining whether or not to perform current precharge. First, it is determined whether the gradation is 0 with respect to the video signal input. When the gray level is 0, current precharge is unnecessary and only voltage precharge is necessary, so that the process proceeds to the voltage precharge determination unit to determine whether or not to perform voltage precharge.

  If the gradation is not 0, the comparison is made with the gradation of the previous line. This is because, in the two states of “tailing” and “insufficient writing”, the number of gradations that require current precharge is different, so whether to perform current precharge according to each problem is determined. I have to. Here, if the previous gray level matches the current gray level, it is possible to display the predetermined gray level sufficiently without performing the current pre-charge, and therefore it is determined that the current pre-charge is not performed.

  When it is determined that the previous line is lower (display example in FIG. 45), the source signal line current has a gradation of 40 nA or less in the region 451, and the source signal line current has a gradation of 300 nA or less in the region 452. Since it has been confirmed that the luminance of the region 452 is lowered, the current precharge may be performed only when this condition is met. If they do not match, the region 452 is displayed with a predetermined luminance, so that it is not necessary to perform current precharge.

  When it is determined that the previous line is higher (display example in FIG. 46), when the source signal line current in the region 462 is 40 nA or less, the first 1 to 5 lines are lower than the predetermined luminance. Since the luminance is high, the current precharge is performed only when the current source signal line current is 40 nA or less.

  Thus, the flowchart of FIG. 50 is obtained.

  FIG. 52 shows the configuration of the gradation before the first row and the comparison 502. A line memory for one row is required to compare the gradations of the previous row. By including the memory 522 for one horizontal scanning period, it is possible to compare the current data and the data in the memory 522 by comparing the current data.

  In the case of 8-bit video signal input, an 8-bit line memory and a comparator for comparing the values of 8-bit values are required. The circuit of the line memory and the comparator becomes large. Therefore, in the present invention, if both the current gray level and the gray level one row before the current value exceed 40 nA from FIG. 50, the fact that the current precharge is unnecessary is used. Depending on the efficiency, in the case of an 8-bit signal, it exceeds 40 nA at gradation 15 or higher. In other words, if a signal with gradation 15 or higher continues for two rows, no precharge is required.

  Therefore, when the input video signal is converted in the data conversion unit 521 and written in the memory 522 as shown in FIG. 51, the memory 522 only needs 4 bits. (If the memory area is halved and the memory 522 occupies approximately half the area when the control IC is configured, it can be expected that the area of the control IC will be reduced by at least 20%.) The comparator 525 also compares 4 bits, and when comparing data of 15 gradations or more with data of 15 gradations or more, they match and it can be determined that no current precharge is performed. If either one is less than the gradation 15, the size can be compared, so either “tailing” or “writing shortage” is taken.

  The memory only needs to hold one row of data. As shown in FIG. 28, when data is transferred at 6 × speed, the clock operates at 6 × speed. That is, the clock is input six times while one data is being transferred. FIG. 68 shows the relationship between the clock 685 and the video signal. The next two numbers of DATA of the video signal represent columns and rows. DATA12 indicates the data in the second column in the first column. The data converter 521 has a latch or flip-flop, and can store a video signal. The converted data is written to the memory at the fifth clock. If the memory address is associated with the number of columns, the data content at the same address is held for one frame. Since the data in the memory 522 is updated at the fifth clock, comparing the output of the memory 522 and the data conversion unit 521 (686) at least between the third and fifth clocks, the current gradation is compared with the previous row. can do. In order to compare the first row and the second row of the data in the first column, the comparison may be performed during the period 681a. Similarly, if the comparison is performed in the period 681b using the address 2 in the memory 522, data comparison can be performed.

  Thus, the memory can be provided as long as the number of source driver outputs × 4 bits.

  According to this determination, for example, even if the change is one gradation, current precharge is performed if the change is at a low gradation. Since the amount of change is small, display is possible with or without current precharge. When current precharge is performed, a voltage corresponding to the time of gradation 0 display by the precharge voltage generator 981 is applied once. Since this voltage is applied to the gate voltage of the transistor 62, if a variation occurs in the relationship between the gate voltage and the drain current of the transistor 62, the voltage may be higher or lower than the optimum gradation 0 voltage for each pixel. To do. Current precharge is used to change this voltage value to a voltage value corresponding to a predetermined gradation, but there is little variation in the current precharge current value, source signal line capacitance, and precharge time. The voltage value after the current precharge is also higher and lower than the optimum value. As a result, since the current is small in the low gradation region, this variation is in the period during which the predetermined gradation current is flowing. There is a risk that display unevenness corresponding to the unevenness of the transistor 62 may occur due to the failure of correction. Therefore, in the present invention, it is considered that the current precharge is not performed in the case of one gradation difference with a small change so that a display with little display unevenness can be realized. However, at the time of change from gradation 0 to gradation 1, since gradation 0 is displayed by voltage precharge in order to bring the luminance at the time of black display close to 0 at the time of gradation 0 originally, the same voltage is applied. Even if input and current precharge are performed, the display is not affected. In addition, since the amount of change in voltage is large between gradation 0 and gradation 1 and it may be difficult to change only with current, current precharge can be performed even with a difference of one gradation. preferable. Further, when the current value per gradation is large, even if there are two gradation differences, display may be possible without current precharge. Even in this case, in the gradation 0, the voltage is applied higher to lower the black luminance, and the change amount from the gradation 0 to 1, and from 0 to 2 is large. As long as the current precharge may be performed.

  Therefore, in the present invention, the circuit configuration shown in FIG. 53 is used instead of FIG. 52, and a comparison / determination unit 531 is provided that can perform current precharge under the conditions specified by the command A such as one gradation difference, two gradation differences, and the like. It was decided. FIG. 54 shows the contents of command A. When the value of the command A is 0, no current precharge is performed (current precharge is not used). When 1, the current precharge is not performed in the case of one gradation difference, and when 2, the current precharge is not performed in the case of 1 gradation difference excluding the change from 0 to 1, and when 3, the difference is 2 Current precharge is not performed when the gradation is lower than 4, and the efficiency of the organic light-emitting element is determined when current precharge is not performed when the difference is less than 2 gradations excluding changes from 0 to 1 and 0 to 2 when the gradation is lower than 4. It is necessary to select the optimum value according to the value of the command A corresponding to the change of the panel brightness (the current at 255 gradation changes, so that the higher the brightness becomes, the easier it is to display the predetermined gradation). A minimum current precharge is possible. As the number of times that the comparison / decision unit 531 determines that there is no current precharge increases, the number of pixels to be displayed using current precharge on one screen decreases, and as a result, the influence of display unevenness due to application of voltage is reduced. A display that is difficult to see can be realized.

  The display of the first line that cannot be compared with the state of the previous line is configured as shown in FIG. 55 instead of FIG. The first row is divided into cases when the gradation is 0 and other than 0. When the gradation is 0, whether or not voltage precharge is performed is input to the first row voltage precharge determination unit 554. . Here, it is determined by command B whether or not voltage precharge is performed. Here, the case where voltage precharge is not performed is a display device used for an application in which black can be displayed without performing voltage precharge, or when black luminance may be high (contrast may be low). For example, it is provided so that it can be selected not to precharge.

  When the first row is other than gradation 0, the first row current precharge determination unit 551 determines whether or not to perform current precharge. When command C can be used to determine whether or not to precharge, when a panel with high maximum brightness, or when the organic light emitting device has low efficiency and a large amount of current flows, sufficient gradation display can be achieved even at low gradations. The current precharge can be omitted.

  If it is determined by the first row current precharge determination unit 551 that current precharge is to be performed, it is necessary to select a period during which current precharge is performed next in accordance with the gradation. FIG. 57 shows a circuit block for selecting a period during which current precharge is performed in accordance with gradation. FIG. 57 is a circuit block that determines whether the current precharge is 1 to 6 or the current precharge is not performed according to the video signal and the values of the command D to the command I. On the source driver 36 side, it is assumed that the period of current precharge 1 to 6 is set as shown in FIG. 120, for example, and the current precharge pulse 1174 is precharged during the high level period. Which of the six pulses of the current precharge pulse 1174 is selected is determined based on the truth table of FIG. Therefore, in order to change the current precharge period in accordance with the gradation, the value of the precharge determination line 984 may be changed in accordance with the gradation.

  57, the precharge determination signal 55 may be output in the same way as in FIG. 119 as shown in FIG. 63 for each result of 571 to 577. Thus, based on the value of the precharge determination signal 55 transmitted in pairs with the video signal, the source driver 36 can determine the length of the current precharge (only the voltage precharge, the precharge It is also possible to make the same determination as follows.)

  Note that the length of each current precharge pulse is set on the source driver side. Each pulse length is determined by a pulse generator 1122 as shown in FIG. As shown in FIG. 69, the pulse generator 1122 includes a counter 693, pulse generation means 694, and a frequency dividing circuit 692. The value counted by the counter 693 is compared with the current precharge period setting line 1096 that determines the current precharge period, and a current precharge pulse 1174 that is high for a period corresponding to the set value is output. Since the voltage precharge is first performed when the gradation is output to the source signal line, and then the current is precharged and the gradation current is output, the high-level start period of the current precharge pulse 1174 is after the output of the timing pulse 848. Starts from. Therefore, the counter 693 is reset to 0 when the timing pulse 848 is input, so that the pulse is generated based on the timing pulse 848. The voltage precharge period setting line 933 and the voltage precharge pulse 451 are similarly configured. Since the configuration of the current output unit 1171 and the voltage application selection unit 1173 is the circuit shown in FIG. 118, the current precharge pulse 1174 and the voltage precharge pulse 451 become high level at the same timing as shown in FIG. Also good. In order to simplify the pulse generation means 694, the waveform is as shown in FIG. Therefore, the high level length of the current precharge pulse 1174 is the sum of the values of the voltage precharge period setting line 933 and the current precharge period setting line 1096. Since there are six current precharge pulses 1174, six types of current precharge period setting lines 1096 can be set. Since the frequency dividing circuit 692 is provided, even if the source driver clock 871 changes due to a change in the number of pixels, the pulse width adjustment range can be adjusted as much as possible, and the necessary pulse width increases the EL efficiency. Even if it changes suddenly due to the above, etc., the configuration is such that it can be dealt with by changing the frequency division number, so that the same source driver can be used regardless of the number of pixels and the luminous efficiency of the EL element. There is.

  Accordingly, six current precharge periods are designated by six commands from command D to command I, and the length of each current precharge period is determined by the current precharge period setting line 1096 of the source driver 36. If so, an optimal current precharge can be realized. The current precharge 1 is performed from the gradation 1 to the command D designated gradation, the current precharge 2 is performed from the command D designated gradation and the command E designated gradation is performed, and the current precharge 3 is performed. The command G specified gradation is larger than the command E specified gradation, the command F specified gradation is smaller than the command F specified gradation, the command G specified gradation is smaller than the command G specified gradation, and the current precharge 5 is performed. If the current precharge is larger than the command H specified gradation and smaller than the command H specified gradation, and less than the command I specified gradation and greater than the command I specified gradation, no current precharge 57 is performed. Become.

  In cases other than the first row, even if current precharge is performed as shown in FIG. 53, two countermeasures of “insufficient writing” and “tailing” are required depending on the result of the comparison / determination unit 531. This corresponds to the flow from 504 to 506 in FIG.

  In the case of countermeasures against insufficient writing, current precharge is not required if the previous row has a gray level larger than 40 nA. First, as shown in FIG. When the gradation is higher than the set gradation by the command J, the current is not precharged. Here, the gradation corresponding to the current of 40 nA varies depending on the application, and is influenced by the display color and the light emission efficiency of the organic material. If these conditions are determined, the determination may be made with a specified gradation or more but less than a command input. If it is less than the specified gradation, then a current precharge determination function corresponding to the determination of 506 is required. This function may be used in common with the previous FIG. If the gradation of the command I is such that the source signal line current exceeds 300 nA, FIG. 50 is satisfied.

  Next, in the case of countermeasures for “tailing”, since it is sufficient to determine 504, as shown in FIG. 58, determination is performed by the current precharge period selection means 578 as in FIG. This eliminates “tailing”, but due to variations in the transistor 62 characteristics of the internal circuit of the pixel, a voltage that causes black display more than necessary when a voltage precharge is applied is applied to some pixels. At this time, since there is no variation in the current precharge, there is a possibility that when the black display is more than necessary, it may be lower than the predetermined luminance. (Because there is a period to output a current corresponding to a predetermined gradation, it does not necessarily decrease, but it means that there is a possibility in the worst case) In the case of “writing shortage”, it became black However, in the case of “tailing”, in the case of FIG. 46 where 461 is gradation 48 and 462 is gradation 40, only the top row of 462 has gradation. It can happen that 30 is displayed. If it is between the gradations 48 and 40, it becomes difficult to be conspicuous because it is hidden by the halation due to the gradation 48, but if a gradation lower than these two gradations appears, a dark horizontal line is generated at the boundary.

  Considering that dark horizontal lines affect the image quality and that “tailing” is less noticeable than “insufficient writing” due to halation, the “tailing” countermeasure is more current than the “insufficient writing” countermeasure. It is considered that there is a low need for producing a display gradation exactly by precharging.

  In an experiment with a 3.5-inch size QVGA panel, “insufficient writing” occurs when the previous line is in the range from gradation 0 to gradation 7, and the current gradation is from gradation 1 to gradation. This occurs in the case of 74. On the other hand, “tailing” occurs when the current gradation is from gradation 0 to gradation 9 regardless of the gradation of the previous row. It can be seen that the number of gradations that must be current precharged is smaller in the case of “tailing” than “insufficient writing”.

  Therefore, in the present invention, the output of the current precharge period selection unit 578 is further input to the current precharge insertion determination unit 581 so that the range in which the current precharge is performed by the command K is further limited. The command K has a role of changing the output of the precharge insertion determining means 581 as shown in FIG. 59. For example, when the value of the command K is 6, there is no current precharge depending on the gradation by the operation of FIG. Or current precharge 1 is executed. Since the range in which the current precharge 1 is executed is determined by the command D, as a result, the current precharge is performed below the set gradation of the command D. In this way, the gradation for current precharging is limited. The reason why the tail removal unit 580 is configured in two stages in this way is to reduce the number of commands. If there are two types of commands for tailing and insufficient writing, the number of commands will be twelve, but the present invention has the advantage of requiring fewer command registers because only seven commands are required. . The determination of current precharge is common, and it is an idea that a command K is used to delete only a portion that is not required for tailing.

  When the current gradation is 0, the current is 0, so no current precharge is necessary, and it is determined whether or not to perform voltage precharge to apply a voltage corresponding to 0 gradation. This determination is made as the voltage precharge determination unit 503 in FIG. 50 and has the configuration of FIG. Here, the previous row data detection unit 601 is provided because it is not necessary to change the state of the source signal line from the previous row when gradation 0 is displayed continuously for two or more rows. Even in the case of gradation 0, it is not necessary to precharge the voltage. By controlling only by the current, it is possible to reduce the influence of the luminance variation due to the variation of the transistor 62. Therefore, the previous row data detection unit 601 only determines whether the previous row data has gradation 0. (In this case, the data before one row is the video signal before one row after data conversion. Since the conversion is performed according to FIG. 51, if it is determined whether the gradation is 0 or not, there is no problem even if it is performed with the converted data.) The data of the previous line may be determined by obtaining the output from the memory 522 in FIG.

  If the black luminance is sufficiently low even at the gradation 0, or if there is no problem even if the black luminance is high, it can be determined that the voltage is not precharged. It has a simple structure. This is controlled by the command L, and it is determined whether or not to precharge the voltage as shown in FIG. The voltage precharge is always used when the luminance of black is extremely lowered. It is possible to prevent black floating due to leakage current.

  The above precharge determination is summarized as shown in FIG. First, it is determined whether the video signal has gradation 0 (621), and the processing differs between 0 and other than 0. When it is 0, it is whether to precharge the voltage. It is determined whether or not to precharge the voltage according to the data of the previous row (601). However, since there is no comparison data in the first row, precharge is determined according to the gradation in the first row (554).

  For gradations other than 0, it is determined whether or not to perform current precharge, and when current precharge is performed, it is determined which of six types of precharge periods is selected. The processing differs depending on whether the current gray level is larger or smaller than the previous gray level for measures against “tailing” and “writing shortage”. Different from the first and second lines that cannot be compared, the first line is determined by the blocks 551 and 552. In the second and subsequent lines, the “tailing” countermeasure is determined by the trailing removal unit 580, and the “writing shortage” countermeasure is determined by 561 and 578. In the case of the same gradation, or when it is better not to precharge due to a difference of one gradation, 531 is determined that there is no current precharge.

  In the 3.5-inch QVGA panel, command A outputs 2 and command B outputs 556, command C outputs 552, command D uses gradation 1, command E uses gradation 2, command F Designates gradation 4, command G designates gradation 10, command H designates gradation 30, command I designates gradation 80. By specifying the gradation 11 for the command J, 4 for the command K, and 1 for the command L, a low gradation display in which the predetermined gradation is difficult to be displayed was realized.

As a result of FIG. 62, as shown in FIG. 67, a precharge determination signal 55 is added corresponding to the video signal. (The determination in FIG. 62 is performed by the precharge determination signal generation unit 671).
The parallel-serial conversion unit 672 is not necessarily required. However, when a signal is transferred from the control IC to the source driver without conversion, the video signal is 8 bits, the precharge determination signal 55 is 3 bits, 11 bits, Since there are three colors, a 33-bit transfer line is required. Since the number of connection signal lines increases, wiring is difficult, and there is a problem that the package size increases due to an increase in the number of input / output pins. When the control IC and the source driver are composed of ICs in the same package, there is a problem with the internal wiring of the IC, so there is no need to convert them serially.

  Examples of output waveforms of the parallel serial output unit 856 when serial transfer is performed are shown in FIGS. A precharge determination signal 55, a video signal, and a source driver command are sequentially transferred to the same signal line. Basically, this signal is transferred to the wiring between the control IC and the source driver IC.

  FIG. 64 shows a panel configuration in the embodiment of the present invention. The control IC 28 receives the synchronization signal 643 and the video signal 644 from the main device side, converts them to the source driver 36 input signal format, and outputs the video signal and the command signal as the video signal line 856. In addition, a clock 858 for operating the shift register in the source driver 36, a shift direction control 890, a start pulse 848, a timing pulse 849 for determining the timing for outputting an analog current, and a gate line 651 in which the number of signal lines is reduced by serial transfer. Input to the source driver 36.

  The gate line 651 is transferred according to the time chart shown in FIG. Since the gate driver 35 has two circuits, eight signals (start pulse, output enable signal, clock, and shift direction control) are required for each of the switches 66a and 66b and 66c. For this reason, in the 6 × speed transfer, only 6 signals can be sent for one output, so two signals are put in the empty portions of the green data 856b and 856c one by one. When 8 signals are input, they are output to the gate driver control line 652 all at once. As a result, the signal line of the gate driver can be changed at intervals of at least one output. Since there is a possibility of controlling two gate drivers for one source driver, the source driver 36 outputs the gate driver control line 652 for one circuit on each side. When the gate driver 35 is controlled using two source drivers as shown in FIG. 64, the output of the gate driver control line 652 is not necessary for the outputs adjacent to each other. Therefore, gate output enable signals L and R (653) that can prevent the left and right gate driver control lines 652 from being output are provided. This eliminates unnecessary output and suppresses noise emission to the outside.

  Further, a power control line 641 for controlling on / off of the power is output. The power supply circuit 646 is stopped during standby or non-display to reduce standby power. The reason why the power supply circuit is divided into the panel power supply circuit 646a and the driver power supply circuit 646b is because the on / off timing is different. This is because the output of the gate driver 35 is indefinite when the power supply is turned on, so that the transistor 66 of the pixel circuit 67 may be unintentionally turned on. For example, when the switch 66c is turned on, if the charge of the storage capacitor 65 is in the 255 gradation display state, this pixel is turned on. A predetermined gradation current is written into the pixel 67 two frames after the power is turned on, and the output of the gate driver 35 changes in level according to the start pulse of the gate driver. Therefore, the predetermined current flows to the EL element 63 and becomes a predetermined gradation. . There is a possibility that a gradation display different from a predetermined gradation may occur between the two frames when the power is turned on, so that there is a problem that the panel shines momentarily when the power is turned on. Therefore, in order to solve this problem, the EL power supply line 64 is turned on one frame later so that a gradation different from a predetermined gradation is stored in the storage capacitor 65 of the pixel, and the transistor 66 is properly controlled. Even if it cannot, the EL element 63 does not emit light because no current is supplied from the EL power supply line 64. This avoids the problem that the panel glows for a moment. Therefore, two power control lines 641 are required.

  In such a configuration, in order to reduce the number of signal lines between the control IC 28 and the source driver 36, it is optimal to transmit data by serial transfer as shown in FIG. 1 or FIG.

  A dotted line 1511 in FIG. 151 indicates the relationship of display luminance with respect to source driver input gradation when a current output type source driver is used. The luminance is proportional to the gradation.

  On the other hand, it is necessary to perform output with gamma correction so that the relationship between gradation and luminance is the relationship indicated by the curve 1512 based on the characteristics of the human eye.

  Since it is difficult to change the relationship between the gradation of the source driver and the luminance characteristic, in order to realize the curve indicated by 1512 in FIG. 151, the relationship between the video signal gradation and the source driver gradation is previously determined by a timing controller or the like. For example, the relationship 1521 in FIG. 152 is changed to a relationship 1522.

  In this way, by making the output gradation of the source driver correspond to the video signal gradation, it is possible to perform gamma correction and realize a smooth gradation display. In this case, for example, when the gradation of the video signal is 2, the source driver gradation is 0.5. However, since the source driver cannot output 0.5 gradation, an output corresponding to 0.5 gradation is made pseudo using frame thinning, dithering, error diffusion method, or the like. For example, if the gradation 1 is displayed once every two times and the gradation 0 is displayed once the remaining, it is possible to output an output equivalent to 0.5 gradation on average. Similarly, if there is an opportunity to display four times for the video signal gradation 1, three gradations may be displayed and one gradation 1 may be displayed. When the video signal gradation is 5 to 7, it is realized by changing the ratio of the number of display times of gradation 1 and gradation 2. From the viewpoint of preventing flicker, when a gradation that cannot be displayed is designated, it is preferable to display using two gradations that are close to the gradation that cannot be displayed.

  For example, FIG. 155 shows an example of a source driver gradation output pattern in a certain frame when video signal gradation 1 is displayed on the entire screen (in this figure, a monochrome display panel is shown for the sake of simplicity). In the case of a color panel, this can be realized by displaying the pattern shown in FIG.

  When a certain display area is viewed, one-fourth of the pixels are displayed with gradation 1, three-fourths of pixels are displayed with gradation 0, and one-fourth when the same pixel is viewed between frames. By making the gradation 1 in the period 1 and gradation 0 in the third quarter period, display with less flicker can be performed. In the case of a color panel, flicker in white display can be reduced by making the pixels displaying gradation 1 different for each color.

  FIG. 153 shows a circuit block for realizing the straight line represented by 1522 in FIG. The gamma correction circuit 1536 converts the video signal 1531 with respect to the input video signal 1531. At this time, gradation conversion is performed so as to suppress the luminance of the low gradation portion in order to match the human visual characteristics. At a low gradation, it is necessary to increase the gradation with a smaller step size than the gradation of the video signal. For this reason, the number of bits of the video signal 1539 after gamma correction is larger than that of the video signal 1531.

  If the number of bits of the video signal 1539 after gamma correction and the number of video data bits of the source driver 36 are the same, the signal may be input as it is. However, in order to increase the number of bits of the source driver 36, the bit latched by the latch unit 22 is increased. As the number increases, the gradation display current source 103 and the switch 108 in the current output stage 54 increase at each output by at least the number of bits, so the circuit scale of the source driver 36 increases and the cost also increases.

  Therefore, generally, the bit number of the video signal 1539 after gamma correction is larger than the number of video data bits of the source driver 36. When the difference in the number of bits increases, the number of gradations that must be displayed using frame thinning or the like increases as described with reference to FIG. Organic light-emitting elements and the like have a high response speed, so that flicker due to a difference in gradation between two gradations used when thinning out frames tends to be easily seen. From the actual display, it was found that in order to display without flicker at a frame frequency of 60 Hz, it is necessary to complete within 4 frames by the method of frame thinning.

  If the video signal 1539 after gamma correction is M bits (M is a natural number and larger than N), and the video data bit number of the source driver 36 is N bits (N is a natural number), the M bit is converted into N bits. A data conversion unit 1537 is required.

  Therefore, in FIG. 153, the gamma-corrected video signal 1539 is converted into a converted video signal 1532 (N bits) by the data converter 1537.

As a method of conversion, as shown in FIG. 156, processing is performed by dividing the input M bits into upper N bits and lower (MN) bits. Here, if the upper N bits are supplied as they are corresponding to the gray level of the source driver and the necessary current value per gray level is multiplied by 2 ^(M−N) and output, 2 ^{(M−N )} Display by gradation can be realized properly. However, it is impossible to express the gradation during that time, and the actual expression is expressed as if the data was truncated every 2 ^(MN) gradations. In order to correct this, the lower (MN) bit data of the gamma-corrected video signal 1539 whose data is truncated is held and added using the storage unit 1564 and the adder A 1563, and the truncation amount (lower (M− N) When the sum of bit data) is 2 ^(M−N) or more, 1 is added to the video signal upper N-bit data 1561 after gamma correction to compensate for the lack of gradation due to truncation. To. For this purpose, an adder B1568 is provided. As a result, it is possible to correct a decrease in display gradation due to the fact that the lower (MN) bits are not input to the source driver 36.

  When attention is paid to the same pixel, if the correction is not completed within 4 frames, flicker occurs. Therefore, it is preferable that the lower (MN) bits are (MN) ≦ 2. When a display material with a slow response speed is used, it is not necessarily 2 or less, and the upper limit value of (MN) may be determined according to the display panel. As (MN) is smaller, the number of bits of the source driver is increased and the cost is increased, but the image quality is improved by not performing frame thinning or dither processing. Since there is a trade-off between image quality and cost, (MN) may be determined as necessary.

  In the following description, the case where the present invention is applied to a display panel using an organic light emitting element will be described.

  If the number of bits of the source driver is 8 bits in the relationship between the video signal gradation (M bit after gamma processing) and the source driver gradation (N bit) as indicated by 1522 in FIG. The number of bits can represent 10 bits and 1024 gradations.

  With reference to the gray level of the source driver, the data of the video signal after the gamma processing is expressed as 256 gray scale display at a minimum of 0.25 gray scale.

  FIG. 155 shows an example in which gradation 0.25 is displayed on the entire screen. The upper 8 bits of the video signal after gamma correction are always 0, and the lower 2 bits are always 1. At the beginning of display, the value of the storage unit 1564 is determined by the value of the random number generation unit 1569 that generates a random number for each display row. This is because the value of the storage unit 1564 is changed in advance for each display line, thereby shifting the timing at which the display gradation of the source driver increases by 1 for each line to make flicker less visible. is there. In this case, the value generated by the random number generator 1569 is one of 0 to 3 since 1562 is data of 2 bits.

  In the first row 1551a of FIG. 155, since the output of the random number generation unit 1569 is 0, the storage unit 1564 is 0 in the initial state. When data corresponding to the pixel 1553 is input from 1539, the signal line 1561 outputs 0 and the signal line 1562 outputs 1. The outputs 1533 and 1565 of the adder A 1563 output 1533 which is a carry output with a carry of the lower 2 bits to 1565 as a result of addition of 1562 and 1566 which are 2-bit inputs, respectively. 1 is output in 1565. 1 is stored in the storage unit 1564.

  Therefore, the adder B outputs 1561 data as it is, and 0 is output as the converted video signal 1532.

  Next, data (gradation 0.25) corresponding to the pixel 1554 is input. The upper 8-bit data 1561 is 0, and 1562 is 1. The output of the adder A 1563 is 0 in 1533 and 2 in 1565 because the data in the storage unit 1564 is 1. As a result, the same 0 as 1561 is output from the adder B 1568.

  Next, when data corresponding to 1555 pixels (gradation 0.25) is input, 1561 becomes 0 and 1562 becomes 1. The output of the adder A 1563 is 3 from 1562, 1566 to 1565, and 0 is 1533. As a result, the output of the adder B 1568 is 0.

  Next, when data corresponding to 1556 pixels (gradation 0.25) is input, 1561 becomes 0 and 1562 becomes 1. Since the data in the storage unit 1564 is 3, the output of the adder A 1563 is 0 for 1565 and 1 for 1533. Therefore, the output of the adder B 1568 becomes 1, and 1 is output to the pixel 1566.

  When all the rows have a gradation of 0.25, these four states are repeatedly executed.

At the beginning of the next row, the data generated in the random number generation unit 1569 is input to the storage unit 1564 without carrying over the data in the storage unit 1564 in the final column, and data is input / output. Note that the random number generation unit 1569 does not necessarily generate a random number, and 2 ^(MN) types of data are output when the value of the storage unit 1564 at the start time of the 2 ^(MN) row is viewed. Just do it.

  In this way, the relationship between the source driver gradation and the video signal gradation indicated by the line 1522 as shown in FIG. 152 can be realized.

  When the circuit of FIG. 153 with improved gradation characteristics is introduced into the present invention and the converted video signal 1532 is input to the precharge determination signal generation unit, the gradation may be changed depending on the combination of certain specific gradations. There was a problem that flicker occurred near the changed line.

  For example, as shown in FIG. 157, when the gray level of the source driver as shown in FIG. 157 is 0.25 gradation in the first row and three gradation display in the second and subsequent rows, each pixel is displayed from the circuit block in FIG. As shown in FIG. 157, the output gradation pattern of the driver is determined.

  In this pattern, if the gradation difference between the previous row and the row is 2 gradation differences or less, the pre-charge is set to 3 gradations or more without precharge, and the first row is set to the second row. Since the gray level of each column differs from column to column, current precharge is performed because there is a difference of three gray levels in the first to third columns, but current precharge is not performed because the gray level difference is 2 in the fourth column. It will be. FIG. 158 shows the result of determination on whether to perform precharge for each pixel.

  As a result, in a column where current precharge is not performed, the current value is less likely to change to a predetermined gradation, writing shortage occurs due to the data content of the previous row, and the luminance is low even in gradation 3 display. Become. In the pixel range as indicated by 1591 in FIG. 159, the luminance is lowered. Since the luminance is low in the column where the output of the first row is 1, a column with low luminance of 1 column appears in 4 columns. The lower the gradation, the longer the change time to the predetermined gradation and the larger the current difference from the predetermined gradation, so that the luminance difference with respect to the predetermined luminance becomes large and the dark part becomes conspicuous. When the dark portion and the predetermined luminance portion change from frame to frame and move sequentially, flicker occurs in such a way that dark vertical lines appear to move left and right.

  Flicker is generated even if both the first and second rows always display the same gray scale, and a different gray scale is displayed at least once every four pixels due to the presence of the data converter 1537 in FIG. Occurs when In particular, the signal of 1533 becomes 1, and when the adder B 1568 adds 1 to the signal, a writing shortage causing flicker occurs.

  As a pattern in which flicker occurs, the display of the previous line is always the same as the display pattern of FIG. 164, but the display of the line (here, the second line) displays the gradation 2.75. Depending on the column, gradation 2 is displayed or 3 is displayed. Even in this case, since the current precharge is not performed in the column displaying gradation 2, display is performed with lower luminance than gradation 2 due to insufficient writing, and current precharging is performed in the column displaying gradation 3. Therefore, a predetermined gradation 3 is displayed. Flicker can be easily seen by increasing the luminance difference between the gradation 2 and gradation 3 display areas.

  If the signal output from the source driver is changed as a video signal, the display quality deteriorates due to the occurrence of flicker or the shift in display gradation.

  Therefore, in the present invention, flicker is eliminated by separately providing a signal for performing gradation determination by the precharge determination signal generation unit 1538 or by newly adding a determination signal.

  Three examples are shown as methods for realizing this.

  FIG. 162 shows a circuit block for realizing the first method. For the input video signal line, a precharge flag 380 for determining whether to precharge the video signal 1532 after gamma correction and the type of precharge are output. The difference from the conventional method is that the signal input to the precharge determination signal generator 1621 uses the gamma-corrected video signal upper N bit data 1561 instead of the output of the data converter 1537. The operation of the data conversion unit 1537 is the same as that in FIG.

  As a result, since the data used for the determination does not pass through the adder B 1568, the determination is made based on the data obtained by truncating the lower 2 bits of the input signal. For example, even if the display of FIG. 164 is performed on the display, the signal for determining the precharge has a pattern as shown in FIG. 165, the gradation difference is always 2 and the display is performed without precharge, and flicker occurs. do not do. On the other hand, even in the case of the display pattern of FIG. 157, since a precharge determination signal as shown in FIG. 163 is inputted, current precharge is always performed and flicker does not occur in the same manner.

  When one row and the next row are displayed at the same gradation, the determination as to whether or not to precharge is constant regardless of the column, so flicker due to the difference in the presence or absence of precharging can be prevented. It was.

  The second method is shown in FIG.

  In this method, the converted video signal 1532 generated by the adder B 1568 from the gamma-corrected video signal upper N bit data 1561 is used. If the signal is input to the precharge determination signal generation unit 1621 as it is, flicker is generated. Therefore, data obtained by subtracting the amount added by the adder B 1568 by the subtractor 1681 is input to the precharge determination signal generation unit 1621.

  As a result, the same signal as the video signal upper N-bit data 1561 after gamma correction is input to the precharge determination signal generator 1621, and flicker due to the difference in the presence or absence of precharge is prevented as in the first method. I was able to.

  When a signal delay in the circuit of the data converter 1537 is large, and a timing adjustment holding circuit is required in the precharge determination signal generator in FIG. 162 in order to synchronize the precharge flag 380 and the converted video signal 1532 When the circuit scale of the holding circuit is larger than that of the subtracter 1681, the second method is effective.

  FIG. 161 shows a circuit block of the third method, and FIG. 154 shows a block of the precharge determination signal generator 1538 used in FIG.

  In the method of the present invention, the first and second points are that the carry signal 1533 is output from the data converter 1537 and the output of the precharge flag 380 is determined using both the converted video signal 1532 and the carry signal 1533. Different from the method.

  In FIG. 159, there are a pixel 1591 in which the gradation 3 is not properly applied and a pixel 1592 in which the gradation 3 is applied properly because the data in the previous row may be the gradation 0 or 1; In displaying 0.25, the gradation is 0 when there is no carry signal 1533 and the gradation is 1 when there is a carry signal 1533. FIG. 160 (a) shows an example of a display pattern in which the display gradation of each pixel and the value of the carry signal 1533 are shown in parentheses.

  Here, it can be seen that a pixel that has not been precharged even in gradation 3 display is always when the carry signal 1533 corresponding to the pixel in the previous row is 1. In the setting that current precharge is performed when the difference is 3 gradations or more, if the carry signal 1533 becomes 1 and the gradation difference from the previous line becomes 2, precharge is performed. If the determination is made, current precharge is performed on all gradation 3 display pixels, and flickering due to the failure to write a predetermined gradation can be prevented.

  In general, when the precharge is performed when the difference is greater than or equal to N gradations, the carry signal 1533 is also referred to when the difference is N-1 gradations as shown in FIG. When 1533 is 1 and the carry signal of the row is 0, the current precharge is performed regardless of the designation of N gradations or more. In the other three cases, even if there is no carry signal, the gray level difference from the previous row is less than the N gray level difference, so pre-charging is not necessary.

  Further, even in the case of an N gradation difference, as shown in FIG. 167, whether to perform precharge differs depending on the value of the carry signal 1533. For example, when the next row of gradation 0 display is gradation 2.25 display, a difference of 2 gradations is obtained in the third quarter column, and a difference of 3 gradations is obtained by the carry signal 1533 in the quarter column. . At this time, if current precharge is performed only on a pixel that has a difference of 3 gradations, a luminance difference between gradations 2 and 3 increases, and flicker occurs. Therefore, as shown in FIG. 167, when the carry signal 1533 is 1 and the previous row is the carry signal 0 as shown in FIG. This prevents flicker due to the presence or absence of precharge.

  When there are N + 1 gradation differences or more, there is a gradation difference of N gradation differences or more regardless of the presence or absence of the carry signal, so that the same precharge determination as before is performed regardless of the carry signal.

  In order to make such a determination, a carry signal 1533 is input in addition to the converted video signal 1532 to the precharge determination signal generator 1538 as shown in FIG. 161, and the precharge is performed based on the video signal and the carry signal. It is determined whether or not to perform.

  In this case, since the carry signal 1533 also needs to be compared with the data of the previous line, the comparison / determination unit 1541 needs a line memory for one bit of the carry signal in addition to the video signal. This is different from the embodiments of the invention described above.

  By providing a line memory for the carry signal 1533, the determination of FIGS. 166 and 167 can be made, and the present invention can be implemented.

  By using the invention as described above, even in the gradation display pattern as shown in FIG. 160 (a), the determination of presence / absence of precharge is as shown in FIG. 160 (b). Even in the display, flicker due to the presence or absence of precharge depending on the column could be prevented.

  In the present invention, the organic light-emitting element has been described as the display element. However, any display element such as a light-emitting diode, SED (surface electric field display), or FED that has a proportional relationship between current and luminance can be used. Is possible.

  Further, as shown in FIGS. 21 to 23, a display device using the display element according to the present invention is applied to a television, a video camera, and a mobile phone, thereby realizing a product with higher gradation display performance. be able to.

  In a color display device using organic light-emitting elements, the light emission efficiency of the three primary colors of red, green, and blue organic light-emitting elements differs depending on the material and element configuration of each emission color. At present, green is about 2 to 5 times more efficient than blue, so the current value required for each gradation is about 2 to 5 times different.

  On the other hand, the capacitance parasitic to the source signal line and the horizontal scanning period are common to all colors. For this reason, the time required to change to a predetermined current value differs by about 2 to 5 times even for the same gradation display for each display color.

  Therefore, when the same current precharge period is used, since the amount of current is large in pixels using display colors with low light emission efficiency, the voltage and current change of the source signal line after voltage precharge is large and the luminance is higher than the predetermined luminance. In a pixel that uses display colors with high light emission efficiency, the amount of current is small, so that changes in the source signal line voltage and current after voltage precharge are reduced, resulting in a dark display. That is, the phenomenon of insufficient writing occurs.

  Therefore, in the present invention, the length of the six-stage current precharge pulse can be changed for each display color, so that the output terminal corresponding to the display color with high light emission efficiency in which insufficient writing occurs causes the precharge pulse to be changed. We considered to solve the shortage of writing by increasing the length and extending the period of maximum current flow.

  FIG. 172 shows a first method for realizing the present invention. The pulse width setting of the current precharge can be controlled independently for the three colors of red, green and blue, and six current precharge pulse groups 1691 can be output for each color. Thereby, the precharge current output period shown in FIG. 123 can be independently controlled for each color.

  Considering the luminous efficiency of the current organic light emitting device, the current of the red display pixel is about 80% and the current of the green display pixel is about 50% of the current of the blue display pixel.

  If the current difference is ± 20%, even if the current precharge conditions are the same, the current value changes to the predetermined current value during the normal current flow. Therefore, the pulse width of the current precharge pulse is set individually for each color. However, if there is a current difference of 50% as in this example, when an optimal current precharge pulse is applied to blue, the current value of green does not change sufficiently to a predetermined gradation, and the luminance Becomes darker. For this reason, when a white box pattern is displayed, the brightness of only green in the white line scanned first is low, so the white display changes to magenta. For this reason, the edge of the box pattern appears colored, and the display quality deteriorates.

  Therefore, when the pulse width of the current precharge corresponding to green is set to double for each pulse, display of a predetermined gradation can be realized for green.

  The voltage precharge pulse 451 is common regardless of the color. This is because the voltage corresponding to the black display is applied from the relationship between the gate voltage and the drain current of the driving transistor 62, so that it is the same regardless of the display color, and the change time to the predetermined voltage is the capacity of the source signal line and the precharge. Since it is determined by the driving capability of the operational amplifier used in the voltage generator, it is not necessary to set for each display color. As shown in FIG. 172, only the current precharge pulse group 1174 can be individually adjusted for each color.

  The gradation that can be written without performing current precharge also differs depending on the display color. If the display one row before is gray level 0, if it is blue, writing is possible without current precharge for 36 gray levels or more, but if it is red, current precharge is available for up to 48 gray levels. In the case of green, the current precharge is required until the 75th gradation display, and there is no current precharge at the 76th gradation or more. Can also be written. For this reason, the maximum gradation of gradation setting of the longest current precharge pulse (pulse corresponding to 1174f in FIG. 123) is set to the necessary gradation for each color. This can be realized by allowing the command I to be set independently for each color from the command D input to the current precharge period selection means 578 of FIG. In the current precharge insertion method according to the present invention, data for the previous row is stored in 4 bits, and therefore, when the data for the previous row has a gradation of 15 or more, the gradation can be determined. For example, if the value of the command A is 1, but the data of the previous line is gradation 14 or higher, current precharge cannot be performed when the display gradation is 13 gradations or higher. In the case of green, 70 gradations are not applied when the data of the previous line is 0. If the data of the previous line is 14 gradations or more, data of 14 gradations or more is written even if it is green. There is no display problem because it is possible.

  FIG. 169 shows the second method of the present invention. 170 shows an example of an internal circuit of the pulse synthesizing unit 1694 of FIG. 169, and FIG. 171 shows an example of a waveform of a current precharge pulse output when the pulse generating unit 1122 of FIG. 169 is used. It is.

  In the case of the configuration of FIG. 172, the circuit scale of the pulse generating means 694 is three times that of the common color.

  Therefore, in the present invention, the generators for the six types of current precharge pulses are the same, and in the output corresponding to the pixel of a color with a small amount of current that is difficult to change, a pulse is generated for a certain period of time depending on the display color before or after the current precharge pulse. An output period is provided. In FIG. 171, the current difference correction pulse 1695 before the current precharge pulse has a different pulse width for each color (may be common, as shown in 1695c, even if there is no pulse when the current can be changed sufficiently. A period 1712 for inserting (good) is provided.

  As a result, the horizontal scanning period begins with a voltage precharge period 1711, then a period 1712 for inputting a current difference correction pulse, a period for inputting six stages of pulses common to red, green and blue, and finally a period for writing a predetermined current (gradation Current writing period).

  To simplify the circuit configuration, by making the total length of 1711 and 1712 the same, the starting position of the current precharge pulse 1691 can be fixed, so that the circuit configuration can be simplified. When the total length of the voltage precharge pulse and the current difference correction pulse is short, a normal gradation current writing period is provided between the voltage precharge pulse and the current difference correction pulse to adjust the timing.

  Thereby, the pulse output in the period 1713 can be realized by the pulse generation means B1693 according to the counter and the set values of 1096 and 933 as before. Since only the rise timing of the pulse is different from the conventional one, there is no increase in the circuit scale in this part.

  On the other hand, the current difference correction pulse 1695 is output by a counter 693 and a correction value setting signal 1697. Since there are three types of pulses, it can be configured with a circuit scale that is half that of the pulse generation means B1693.

  Since the current precharge period actually performed is the sum of the current difference correction pulse 1695 and the precharge pulse 1696 (select one of 1 to 6), the current difference correction pulse 1695 and the precharge pulse 1695 are displayed for each display. A pulse synthesizing unit 1694 for taking the logical sum of the charging pulse 1696 is provided to realize a current precharge pulse 1691 having a different length for each display color. FIG. 171 shows a waveform of the current precharge pulse 1 as an example. It can be set so that the current precharge period becomes longer with respect to the green color in which the current hardly changes. In FIG. 170, a logical sum circuit is used. However, in order to reduce the circuit scale, the output of the precharge pulse 1696 and the current difference correction pulse 1695 may be inverted in advance and configured with a NAND circuit. Good.

  Thus, if the total circuit scale of the pulse synthesizer 1694 and the pulse generation means A1692 is smaller than three times the circuit scale of the pulse generation means B1693, a circuit capable of setting a different current precharge period for each emission color according to the present invention is provided. Compared to, it was possible to realize with a small circuit configuration.

  If it is desired to lengthen the gradation current writing period after the current precharge period as much as possible, the current precharge is not performed in accordance with the length of the voltage precharge application period 1711, instead of setting the start period 1713 to a fixed value. The start position of can be changed. Immediately after the voltage precharge is applied, the period 1712 is reached. The period 1712 is different for each display color. However, the current precharge period 1713 is constant regardless of the display color. In order to change the start position of 1713 for each color, it is necessary to change the generation timing of the current precharge pulse for each color. In this case, it is necessary to generate a precharge pulse for each color. Since the precharge pulse is generated in common regardless of the color, there is a merit that the circuit scale can be reduced. Therefore, the period 1712 needs to be a constant value. In that case, the maximum width that can be set by the command is set to a period of 1712, or the length of the current difference correction pulse 1695 that detects the currently input command and outputs the maximum pulse width is set to a length of 1712. You may use the method of matching.

  In the above description, the driver is described as a monochrome output driver. However, the present invention can also be applied to a multi-color output driver. It is sufficient to prepare the same circuit for the number of display colors. For example, in the case of three-color output of red, green, and blue, three identical circuits may be placed in the same IC and used for red, green, and blue, respectively.

  In the above invention, the transistor has been described as a MOS transistor, but a MIS transistor or a bipolar transistor can be similarly applied.

  The present invention can be applied to any material such as crystalline silicon, low-temperature polysilicon, high-temperature polysilicon, amorphous silicon, and gallium arsenide compound.

  According to the current output type semiconductor circuit and the current output method according to the present invention, even if the number of output bits of the current driver is increased, the increase in circuit scale can be suppressed to a lower level. Useful.

The figure which showed the input signal waveform of the current output type semiconductor circuit in this invention Block diagram of the driver IC when it is possible to select from the outside whether or not to precharge each video signal for one dot A diagram showing a display panel using a plurality of source driver ICs Diagram showing structure of organic light emitting device (A) The figure which showed the current-voltage-luminance characteristic of the organic light emitting element (b) The figure which showed the current-voltage-luminance characteristic of the organic light emitting element The figure which showed the circuit of the active matrix type display device using the pixel circuit of the current copier configuration (A) Diagram showing operation of current copier circuit (b) Diagram showing operation of current copier circuit Diagram showing an example of a constant current source circuit The figure which showed the relationship between a precharge pulse, a precharge judgment signal, and an application judgment part output The figure which showed the circuit for outputting the electric current to each output of the conventional current output type driver The figure which showed the relationship between the transistor size of the gradation display current source 103 of FIG. 10, and output current dispersion | variation. (A) A diagram showing an equivalent circuit when a source signal line current flows through a pixel in a pixel circuit with a current copier configuration. (B) An equivalent circuit when a source signal line current flows through a pixel in a pixel circuit with a current copier configuration. Figure showing The figure which showed the relationship between the current output in one output terminal, the precharge voltage application part, and a changeover switch. (A) The figure which showed the relationship between the channel size of the transistor which comprises each transistor group, and dispersion | variation (b) The figure which showed the relationship between the channel size of the transistor which comprises each transistor group, and dispersion | variation The figure which showed the relationship between the period which performs the precharge voltage within 1 horizontal scanning period, and the period which outputs the electric current based on gradation data The figure which showed the circuit composition of the input part of the source driver which enables differential input (A) Diagram showing relationship between gradation data and precharge determination signal (b) Diagram showing relationship between gradation data and precharge determination signal (c) Relationship between gradation data and precharge determination signal Figure Diagram showing a circuit that distributes input serial current to each signal The figure which showed the relationship between the dispersion | variation between adjacent terminals, and a gradation of the output current in the source driver using the output stage shown to FIG.25 and FIG.14 (a). The figure which showed the pixel circuit using the current copier at the time of using an n-type transistor The figure which showed the case where it applied to a television as a display apparatus using embodiment of this invention The figure which showed the case where it applied to a digital camera as a display apparatus using embodiment of this invention The figure which showed the case where it applied to a portable information terminal as a display apparatus using embodiment of this invention The figure which showed the concept of the current output part of the semiconductor circuit using embodiment of this invention FIG. 24 is a diagram showing a case where the current source is configured by a transistor in the configuration of FIG. The figure which showed the relationship of the gradation of an input signal with respect to the output current by the current output part shown in FIG. 24 or FIG. The lower 1 bit of 8-bit data is output in a certain size transistor configuration, and the remaining upper 7 bits are provided with a transistor with a larger drain current than the lower 1 bit transistor. Diagram showing current output stage for display The figure which showed the time chart at the time of the data transfer when the number of input signal lines of the source driver is reduced by inputting data at high speed serially for each color The figure which showed the time chart at the time of command transmission when the number of input signal lines of the source driver is reduced by inputting data at high speed serially for each color The figure which showed the transfer order of FIG.28 and FIG.29 in 1 horizontal scanning period The figure which showed the wiring of EL power supply line in FIG. 6 or FIG. For 8-bit video input, the magnitude relationship of the current between the lower 2 bits and the upper 6 bits is adjusted by the transistor channel width, and the most significant bit in the output stage configuration in which the current is changed according to the number of transistors in each bit The figure which showed the composition which can add the current source further to the current source corresponding to The figure which showed the electric current difference of the gradation 127 and the gradation 128 FIG. 25 is a graph showing the relationship between the display gradation and the allowable limit of deviation from the theoretical value of the transistor 241 output current value in the 256 gradation display driver of FIG. FIG. 39 is a diagram showing a circuit configuration when detecting and correcting gradation inversion in a source driver having the output stage of FIG. The figure which showed the gradation difference of gradation 3 and gradation 4 The figure which showed the gradation difference of the gradation 131 and the gradation 132 The configuration of the output stage when the current corresponding to the gradation and the voltage corresponding to the gradation can be selected and output within one horizontal period or can be output in order in time. Figure The figure which showed the current output stage with the highest bit current source current raising function when using the raising signal line There are a plurality of voltages of the precharge power supply 24. Which of the plurality of voltages is selected and outputted to perform current output, a precharge pulse, a precharge determination signal and a source signal line in a source driver capable of performing only current output Figure showing the relationship The figure which showed the flowchart which determines whether the precharge voltage in this invention is output The figure which showed the precharge determination signal generation part for implement | achieving the precharge application system of this invention The figure which showed an example of the structure of the source driver which has a function which eliminates gradation inversion by changing the level of the raising signal when gradation inversion occurs The figure which showed the display device using the pixel composition of the current mirror form The figure which showed the example of the display pattern which cannot obtain predetermined brightness | luminance in the area | region 452. The figure which showed the example of the display pattern from which the brightness | luminance of about 1-5 lines above the area | region 462 becomes high The figure which showed the change of the source signal line current and voltage from the gradation 0 to the gradation 4 and the gradation 0 to the gradation 255 A diagram showing changes in source signal line current and voltage from gradation 255 to gradation 4 and from gradation 255 to gradation 0 The figure which showed the relationship between a source signal line current and a voltage in the case of providing the period which flows a maximum current in the case of the change from the gradation 0 to the gradation 4. Diagram showing the flow for determining whether to precharge voltage and current The figure which showed the relationship between the gradation of a video signal, and the data written in the memory 522 The figure which showed the circuit block which compares with the data before 1 line The figure which showed the circuit block which changes the processing method of a current precharge by comparison with the data before 1 line The figure which shows the relation between the value of command A and the condition not to precharge current The figure which showed the circuit block for determining whether the current precharge in the case of 1st line data and voltage precharge was performed. The figure which showed the block which judges whether current precharge is performed by the data before 1 line A diagram showing a block for determining which period of current precharge or no current precharge is performed according to the gradation of the video signal The figure which shows the block which sets the period which performs the current precharge whether the current precharge is done by the countermeasure against the tail The figure which showed the relationship between the command in the circuit which enabled it to change so that precharge might not be performed by command input with respect to the current precharge period determined by the current precharge period selection means, and the judgment criterion of current precharge The figure which showed the block which judges the voltage precharge The figure which showed the relationship between the value of the command L in FIG. 60, and the criterion of whether to precharge a voltage The figure which showed the precharge determination signal generation part which determines the period of a current precharge, whether to perform the current precharge and voltage precharge with respect to an input video signal Diagram showing the relationship between precharge operation and precharge determination signal The figure which showed the circuit structure of the display apparatus incorporating the source driver and control IC using this invention Block diagram of source driver with current precharge function and gate driver control signal output function The figure which showed the relationship between the gate line 651 and the gate driver control line 652 The figure which showed the block which generates the precharge judgment signal from the video signal and outputs the data serially The figure which showed the timing chart of the memory 522 and the data conversion part 521 Diagram showing a circuit block for generating a current precharge pulse and a voltage precharge pulse The figure which showed the block diagram of driver IC in the case of using a current copier circuit for an output stage The figure which showed the example of a circuit which realizes a digital-analog conversion part The figure which showed the wiring of the gradation reference current signal when a plurality of driver ICs are connected The figure which showed the circuit of the electric current holding means The figure which showed that the drain current of the node 742 and the drive transistor 731 changes with the gate signal line 741. The figure which showed the drain current-gate voltage characteristic of the drive transistor Figure showing the difference in drain current due to "punch-through" when transistors with different mobilities are used for the drive transistors of each output The figure which showed the electric current holding means at the time of inserting one transistor in order to reduce "penetration" in a current copier circuit The figure which showed the circuit of the gradation reference current generation part 77 shows waveforms of two gate signal lines in FIG. The figure which showed the circuit of the gradation reference current generation part Diagram showing the reference current generator The figure which showed the circuit of the digital analog conversion part which includes the enable signal The figure which showed the relationship between the timing pulse in one horizontal scanning period, a chip enable signal, a select signal, and a gradation current signal The figure which showed the current-voltage characteristic of the transistor from which W / L differs The figure which showed the structural example of the display panel at the time of using the source driver which transfers a video signal and a precharge flag at a low amplitude and high speed, and has a 1-bit command line for electronic volume setting and precharge period setting A diagram showing an example of a transmission pattern when high-speed transmission is performed using the same signal line for the precharge flag and the video signal line Diagram showing timing chart of command line The figure which showed the circuit structure of the precharge voltage conversion part which produces | generates the precharge voltage according to a gradation 85 is an internal block diagram of the source driver used in FIG. The figure which showed the example of the transfer of the precharge determination signal sent in synchronization with the relationship between the current voltage output corresponding to gradation data, and gradation data The figure which showed each transfer pattern example in the case of inputting a reference current setting and precharge application period setting signal to the same signal line as a video signal line The figure which showed the relationship between the period which transfers data within one horizontal scanning period, and the blanking period Diagram showing the internal configuration of the source driver when the video signal line and the reference current and precharge period setting signal line are shared Diagram showing wiring between driver ICs when using a source driver with gate driver control line output The figure which showed the data transfer method in embodiment of this invention A diagram showing an example of data transfer within one horizontal scanning period Diagram showing each signal line waveform after separating gradation data, precharge inversion signal and gate driver control line from video signal line inside source driver Diagram showing internal configuration of source driver with gate driver control line output function The figure which showed the pre-charge voltage generation part of FIG. The figure which showed the precharge voltage selection and application determination part of FIG. The figure which showed the input-output relationship of the decoding part 1001 in FIG. The figure which showed the relationship between the source signal line current when using the pixel circuit of FIG. 6, and the source signal line voltage A diagram in which a current source for supplying a current through a current precharge line is provided in the current output stage in addition to a current source corresponding to a gradation. The figure which showed the mode of a change when a source signal line current changes from 10 nA to 0 nA The figure which showed the mode of a change when a source signal line current changes from 0 nA to 10 nA 104 and 105 show the change in the current-voltage characteristics of the source signal line. Diagram showing how the source signal line current changes when current precharge is performed The figure which showed the time change of the source driver output when outputting the electric current 10 times the predetermined electric current at the beginning of the horizontal scanning period The figure which showed the structure of the source driver for implement | achieving current output like FIG. Diagram showing the configuration of the reference current generator and current output stage of the source driver that supports multi-color output Diagram showing source driver precharge current output configuration (precharge reference current generator, precharge current output stage) that supports multi-color output The figure which showed the composition of the source driver which enabled output of precharge current and precharge voltage to the source signal line 112 shows the internal configuration of the precharge current voltage output stage of FIG. The figure which showed the relationship between the input of the determination signal decoding part 1131 of FIG. 113, and the state of switches 1132 to 1135 The figure which showed the flowchart which outputs the precharge flag 862 input into a source driver The figure which showed the precharge flag production | generation part and the transmission part to a source driver The figure which showed the structure of the source driver which can perform a current precharge by selecting one period in a voltage precharge and several different periods The figure which showed the circuit of the current output part 1171 which has the function to perform an electric current precharge The figure which showed the relationship of the input / output signal of the pulse selection part 1175. 119 shows precharge pulses 1174, 451, precharge determination line 984, and output temporal changes when the pulse selection unit is operated based on FIG. The figure which showed the input signal format of the driver IC which comprised the structure of FIG. The figure which showed the circuit of the current output part 1171 which has the function to perform an electric current precharge Diagram showing the relationship between display gradation and required precharge current output period Diagram showing current change when using current precharge The figure which showed the mode of the change of the source signal line current in case each of a precharge voltage and a precharge current is output in each horizontal scanning period FIG. 5 shows a change in source signal line current when the precharge voltage application period 1251 and the precharge current output period 1252 are not provided when the source signal line current does not change over a plurality of horizontal scanning periods. The figure which showed the example of the display pattern which may change when the source signal line outputs the same current continuously, and may change 127 shows a change in source signal line current when the present invention is used in FIG. A diagram showing a determination method for generating a period in which a precharge voltage or precharge current is output only when there is a change in the current of the source signal line The figure which showed that the relationship between the drain current of the drive transistor 62 and gate voltage changes with temperature. A diagram showing a configuration in which a voltage that varies depending on temperature is input to the precharge voltage generator using a resistance element and a temperature compensation element outside the source driver The figure which showed the example of change of the precharge voltage when changing the precharge voltage by temperature FIG. 132 shows a change in drain current of the transistor 62 with respect to temperature when the precharge voltage is output as shown in FIG. The figure which showed the circuit block which applies the pre-charge voltage to the pixel circuit when the temperature compensation element is provided outside The figure which showed the circuit block which changes the value of the electronic volume for precharge voltage generation with temperature by the command control from a controller using the data of a temperature detection means. The figure which showed the relationship of the electronic volume output voltage with respect to temperature in the circuit structure of FIG. FIG. 136 is a graph showing changes due to the temperature of the transistor 62 when the precharge voltage is controlled according to the relationship between temperature and electron volume in FIG. A diagram showing the circuit configuration when a precharge voltage generating transistor is formed in the same array as the pixel circuit. The figure which showed the relationship between the gate voltage and drain current of transistors 1381 and 62 The figure which showed the arrangement plan of the transistor for precharge voltage generation of this invention A diagram showing a circuit in which one of precharge voltage generating circuits formed in the array can be selected and input to a source driver input terminal. The figure which showed the circuit structure at the time of arranging the precharge voltage generation part formed in an array in multiple distribution The figure which showed the gate voltage and drain current characteristic at the time of high temperature of the transistors 62 and 1381 The figure which showed that the electric current which flows into EL element by the Early effect of the drive transistor 62 increases The figure which showed the adjustment circuit for measuring the sum total of the electric current which flows through an EL element in the display apparatus using an organic light emitting element, and making the electric current value constant irrespective of a panel The figure which showed the adjustment method in the adjustment circuit by FIG. 145 The figure which showed the example at the time of adjusting a precharge voltage using a trimmer The figure which showed the circuit structure in the case of inputting the result of a temperature detection means into a controller, and changing the signal control of a source driver and a gate driver based on the result The figure which showed the waveform between 1 frames of the gate driver 61b in the structure of FIG. The figure which showed the waveform when the non-lighting period of the gate signal line 2 is controlled by the output enable signal Diagram showing the relationship between gradation and brightness Diagram showing the relationship between the video signal gradation when the gamma correction is applied and the source driver output gradation Diagram showing the circuit configuration for determining whether to precharge after applying gamma correction to the input video signal The figure which showed the precharge determination signal generation part in embodiment of this invention The figure which showed the display gradation of each pixel in a certain frame in the case of displaying gradation 1 on a full screen. The figure which showed the block which performs gradation conversion according to the output gradation number of the source driver the signal which performed the gamma correction The figure showing each pixel display gradation in a certain frame when the gradation of 0.25 is displayed on the first row and the gradation of 3 on the second to fourth rows is displayed with reference to the display gradation of the source driver. The figure which showed the judgment of the presence or absence of the precharge in the display pattern of FIG. 157 for every pixel The figure showing each pixel display gradation in a certain frame when the gradation of 0.25 is displayed on the first row and the gradation of 3 on the second to fourth rows is displayed with reference to the display gradation of the source driver. With reference to the display gradation of the source driver, each pixel display gradation and carry signal value in a frame in which the first row is displayed with gradation 0.25 and the second to fourth lines are displayed with gradation 3 , And the figure which showed the judgment result of precharge Diagram showing an example of a circuit block that adds gamma correction and precharge processing to a video signal Diagram showing an example of a circuit block that adds gamma correction and precharge processing to a video signal FIG. 162 is a diagram showing data corresponding to each pixel of data input to the precharge determination signal generation unit in FIG. The figure showing each pixel display gradation in a frame in which the first row is displayed with gradation 0 and the second to fourth rows are displayed with gradation 2.75 with reference to the display gradation of the source driver. FIG. 162 is a diagram showing data corresponding to each pixel of data input to the precharge determination signal generation unit in FIG. When precharging is performed when there is a difference of N gradations or more from the data of the previous line, the carry signal of the previous line and the corresponding line when there is a difference of N-1 gradations from the previous line of data. Showing precharge judgment results based on the value of When precharge is performed when there is a difference of N gradations or more from the data of the previous line, the carry signal value of the previous line and the relevant line when there is a difference of N gradations of the previous line data The figure which showed the judgment result of the precharge by Diagram showing an example of a circuit block that adds gamma correction and precharge processing to a video signal The figure which showed the circuit structure of the pulse generation part for making it possible to change a current precharge period for every luminescent color. Diagram showing an example of the internal circuit of the pulse synthesizer Diagram showing how the voltage precharge pulse, current difference correction pulse, and current precharge pulse change during a horizontal scan period The figure which showed the circuit structure of the pulse generation part for making it possible to change a current precharge period for every luminescent color.

Explanation of symbols

11 Video data 12 Data line 13 Address 14 Data after distribution 15 Clock 16 Start pulse 241 transistor

Claims (1)

A driving method of an active matrix display device,
Within a certain horizontal scanning period, there are a first period in which a voltage is applied to the source signal line, a second period in which the maximum current flows, and a third period in which a current corresponding to the gradation flows.
A driving method of an active matrix display device in which the length of the second period may be different for each display color even when the display patterns of the display colors are all the same.

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