JP2006031408A - Emulator and semiconductor integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To dramatically enhance debugging efficiency by conducting emulation with high accuracy by monitoring two or more kinds of power supply voltages. <P>SOLUTION: An emulator 3 is provided with a comparison arithmetic circuit 16 which monitors two kinds of power supply voltages used in an application system, executes comparison and detection, makes the result a detection signal K, and outputs the detection signal K to a slave microcomputer 14, a brake control section 11, and a trace control/trace memory section 12. For example, by making the detection signal K a trigger signal and using the trigger signal for the input condition of a trace function or a brake function, detection and a factor analysis are easily carried out. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to software and hardware emulation technology, and more particularly to a technology effective when applied to emulation in a user application system in which two or more power supply voltages are used.

  For example, an emulator is widely used as a support device that supports development of an application system using a microcomputer or the like from both software and hardware sides.

  The emulator is connected between the host computer, which is the parent computer for system development, and the application system under development by the user, acting as the function of the target microcomputer used in the application system, and in a state close to the product form. Detailed user system debugging can be performed.

  The connection between the emulator and the application system is performed by connecting a CPU socket connected to the tip of a cable provided in the interface section of the emulator to the application system.

  In some microcomputers used in application systems, the power supply voltage VCC may be arbitrarily changed within the rated range of the microcomputer depending on the purpose of the system.

  In order to cope with this, the emulator has, for example, a voltage monitoring function that detects the power supply voltage VCC supplied from the application system and controls the power supply voltage of the interface unit of the emulator so as to match the power supply voltage VCC. There is something.

  However, the present inventors have found that the debugging technique in the emulator as described above has the following problems.

  As the functions and performance of microcomputers have increased, the core voltage has been lowered as the wiring width has been reduced. Today, microcomputers and systems are being used for multiple power supply voltages.

  However, in the target microcomputer that supports two or more types of power supply voltages, the emulator does not have a function to warn of the voltage relationship of each power supply voltage, which leads to failure or malfunction of the application system or microcomputer. The factor may not be detected.

  Also, in application systems that use two or more types of power supply voltages, the voltage relationship between the input side / output side in the user interface could not be accurately emulated depending on the application sequence / process of each power supply voltage. There is a problem that the operation immediately after energization cannot be verified.

  Furthermore, since it is not possible to directly verify when a malfunction occurs due to power supply voltage fluctuations, power supply noise, etc. during the operation of the user target program, it takes time to debug malfunctions due to these factors, reducing debug efficiency. There is a problem of end.

  An object of the present invention is to provide a technique capable of performing emulation with high accuracy by monitoring two or more kinds of power supply voltages and greatly improving debugging efficiency.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The present invention is an emulator capable of emulating the operation of a semiconductor integrated circuit device in which two or more power supply voltages are used, and monitors each of the two or more power supply voltages of the semiconductor integrated circuit device, and detects a detection signal when an abnormality occurs. Is provided.

  Moreover, the outline | summary of the other invention of this application is shown briefly.

  In the present invention, the power supply monitoring circuit compares the voltage levels at two or more power supply voltages and monitors the energization order of the two or more power supply voltages, or the voltage level at the two or more power supply voltages, A detection signal is output when the voltage level is abnormal.

  According to another aspect of the present invention, the power supply monitoring circuit generates a power supply voltage substantially equal to the two or more power supply voltages from the two or more power supply voltages used in the semiconductor integrated circuit device, and the power generation The power supply voltage generated by the circuit is compared, and a voltage comparison circuit that outputs the comparison result is formed. The power supply generation circuit is formed of a voltage follower circuit.

  Further, according to the present invention, the power supply monitoring circuit A / D (Analog / Digital) converts each of two or more power supply voltages used in the semiconductor integrated circuit device, and the A / D converter. It comprises a comparison unit that compares the output digital data and outputs the comparison result.

  In the present invention, the detection signal output from the power supply monitoring circuit is used as a trigger signal for at least one of a break function and a trace function in an emulator.

  Further, according to the present invention, a detection signal output from the power supply monitoring circuit is output to a user interface that performs data communication between an emulator and an application system that is a user-developed device. When input, the output voltage is adjusted to protect the user interface and application system.

  The present invention is also a semiconductor integrated circuit device comprising a power input external terminal to which two or more power supply voltages are respectively input, and a plurality of internal logic blocks connected to the power input external terminal. A power supply monitoring circuit that monitors each of two or more power supply voltages input via a terminal and outputs a detection signal in the event of an abnormality is provided. The power supply monitoring circuit compares voltage levels at two or more power supply voltages. The power supply sequence of two or more power supply voltages or the voltage level at two or more power supply voltages is monitored, and a detection signal is output when the power supply sequence or the voltage level is abnormal.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  (1) It is possible to detect a problem or malfunction in the user's application system resulting from a specification violation of two or more power supply voltages, and the debugging efficiency can be greatly improved.

  (2) According to the above (1), it is possible to reduce the development cost of the user application system and shorten the development period.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  FIG. 1 is a block diagram of a debugger according to an embodiment of the present invention, FIG. 2 is a block diagram of an emulator provided in the debugger of FIG. 1, and FIG. 3 is a diagram of a comparison operation circuit provided in the emulator of FIG. FIG. 4 is a block diagram showing the configuration, FIG. 4 is a timing chart when the power supply voltage monitored and detected by the comparison operation circuit of FIG. 3 rises normally, and FIG. 5 is a power supply monitored and detected by the comparison operation circuit of FIG. FIG. 6 is a timing chart when the voltage input sequence is violated. FIG. 6 is a timing chart when an abnormality occurs in the power supply characteristics of the power supply voltage monitored and detected by the comparison operation circuit of FIG. FIG. 8 is a timing chart showing an example of when an abnormality occurs in the power supply voltage monitored and detected by the comparison operation circuit of FIG. 8, and FIG. 8 is a diagram when an abnormality occurs in the power supply voltage monitored and detected by the comparison operation circuit of FIG. Timing chart, Figure 9 showing an example of a block diagram showing another example of the comparison operation circuit provided in the emulator of FIG.

  In the present embodiment, the debugger 1 debugs a user program and supports system development. As shown in FIG. 1, the debugger 1 includes a host computer 2 and an emulator 3.

  The host computer 2 is a parent computer for system development, and is connected to the emulator 3 via the line 4. The emulator 3 is provided with an interface cable 5, and a CPU socket plug 6 is connected to the tip of the interface cable 5.

  The emulator 3 and the application system 7 under development by the user are connected via a CPU socket plug 6. The emulator 3 performs the function of the target microcomputer (semiconductor integrated circuit device) used in the application system 7 and supports detailed system debugging.

  FIG. 2 is a block diagram showing the configuration of the emulator 3.

  The emulator 3 includes a master microcomputer 8, a host interface 9, an emulation control unit 10, a break control unit 11, a trace control / trace memory unit 12, a substitute memory unit 13, a slave microcomputer 14, a user interface 15, a comparison operation circuit (power supply) (Monitoring circuit) 16, probe 17, interface cable 5 described in FIG. 1, CPU socket plug 6, and the like.

  The master microcomputer 8 manages all the controls in the emulator 3. The host interface 9 performs data communication between the host computer 2 and the emulator 3.

  The emulation control unit 10 implements emulation and various debugging functions. The break control unit 11 sets user program / trace execution and program / trace stop conditions, and stops execution of the user program and trace when the conditions are satisfied.

  The trace control / trace memory unit 12 stores trace information. The proxy memory unit 13 is a memory that is lent out when the memory of the user application system 7 is not prepared (or the memory is not expanded outside).

  The slave microcomputer 14 performs the function of the target microcomputer. The user interface 15 performs data communication between the emulator 3 and the application system 7. The user interface 15 is provided with the interface cable 5 described above, and a CPU socket plug 6 for a target microcomputer is provided at the tip of the interface cable 5.

  The comparison operation circuit 16 monitors two types (or more) of power supply voltages used in the application system 7, performs comparison detection, and the like, and uses the result as a detection signal K, the slave microcomputer 14, the break control unit 11, and The data is output to the trace control / trace memory unit 12, respectively. The probe 17 captures an external signal from the emulator 3.

  The master microcomputer 8, the host interface 9, the emulation control unit 10, the break control unit 11, the trace memory / trace control unit 12, and the substitute memory unit 13 are connected to each other via a master control bus MB. .

  Further, the emulation control unit 10, the break control unit 11, the trace memory / trace control unit 12, the substitute memory unit 13, and the slave computer 14 are connected to each other via a slave bus SB.

  Therefore, as described above, the emulator 3 samples various data and status signals for each machine cycle of the target microcomputer during emulation and stores them in the trace control / memory unit 12. Various functions such as a break function for stopping the control operation of the application system 7 by the slave microcomputer 14 are provided.

  FIG. 3 is a block diagram showing an example of the configuration of the comparison operation circuit 16.

  The comparison operation circuit 16 includes voltage follower circuits (power generation circuits) 16a and 16b, and an operational amplifier (comparison unit) 16c. The voltage follower circuit 16a is connected so as to receive an I / O (Input / Output) power supply voltage UVCC1 which is a power supply voltage of an input / output interface unit in the target microcomputer. The voltage follower circuit 16b is connected so as to receive a core power supply voltage UVCC2 which is an operation power supply voltage of the internal logic circuit in the target microcomputer.

  The voltage follower circuits 16a and 16b are configured by general voltage follower circuits, and are the same as the I / O power supply voltage UVCC1 and the core power supply voltage UVCC2 based on the I / O power supply voltage UVCC1 and the core power supply voltage UVCC2. About power supply voltages V1 and V2 are generated and output, respectively.

  As described above, by generating new power supply voltages V1 and V2 by the voltage follower circuits 16a and 16b, it is possible to avoid an extra load or influence on the power supply in the user application system 7.

  The positive (+) side input terminal of the operational amplifier 16c is connected to the output part of the voltage follower circuit 16a, and the negative (−) side input terminal of the operational amplifier 16c is connected to the output part of the voltage follower circuit 16b. Yes.

  The operational amplifier 16c compares the power supply voltages V1 and V2 input to the positive (+) side input terminal and the negative (−) side input terminal, and outputs the comparison result as a detection signal K.

  Next, the operation of the comparison arithmetic circuit 16 provided in the emulator 3 in the present embodiment will be described.

  First, the I / O power supply voltage UVCC1 and the core power supply voltage UVCC2 used in the user application system 7 are taken into the comparison operation circuit 16 via the CPU socket plug 6, the user cable 5, and the user interface 15, respectively.

  Based on the I / O power supply voltage UVCC1, the voltage follower circuit 16a generates a power supply voltage V1 that is approximately the same as the I / O power supply voltage UVCC1. The voltage follower circuit 16b generates a power supply voltage V2 of the same level as the core power supply voltage UVCC2 based on the core power supply voltage UVCC2. The operational amplifier 16c compares the power supply voltages V1 and V2 and outputs the comparison result as a detection signal K.

  The operational amplifier 16c outputs a detection signal K at the Lo level when the core power supply voltage UVCC2 becomes higher than the voltage level of the I / O power supply voltage UVCC1. By using the fall of the waveform of the detection signal K as a trigger signal as an input condition for the trace function or break function, detection and analysis factors can be easily performed.

  For example, when the detection signal K is input to the break control unit 11, it becomes a break function trigger signal and can control the break function when each condition is satisfied, and the detection signal K is used as the trace control / memory unit 12. When the signal is input to, it becomes a trace control trigger signal, and the trace function can be controlled when each condition is satisfied.

  Further, when an abnormality is detected, the detection signal K becomes an abnormality detection signal, and a protection function for avoiding an element destruction / failure of the user application system 7 and the user interface 15 by adjusting the output voltage of the user interface 15 (depressurization or interruption) is realized. can do.

  Next, examples of abnormal contents that can be detected by the comparison operation circuit 16 by comparing two power supply voltages will be described with reference to FIGS.

  4 to 8 are explanatory diagrams respectively showing examples of the waveform timing of the power supply voltage monitored and compared and detected by the comparison operation circuit 16. 4 to 8, although not particularly limited, for example, power supply voltages VCCA and VCCB are shown as two power supply voltages used in the target microcomputer. 5 to 8, the hatched portion in the figure indicates a portion where the power supply voltage is abnormal.

  FIG. 4 is a timing chart when the power supply voltages VCCA and VCCB used in the target microcomputer rise normally.

  First, when the power supply voltages VCCCA and VCCB are normal, the power supply voltage VCCA rises after the power supply voltage VCCA rises, and the voltage relationship in which the power supply voltage VCCA is always higher than the voltage level of the power supply voltage VCCB is maintained, and A voltage level within the reference range is maintained.

  FIG. 5 is a timing chart when the order of applying the power supply voltages VCCA and VCCB is violated as the specification violation detection.

  In this case, the power supply voltage VCCA rises later than the power supply voltage VCCB, and immediately after startup, a state occurs in which the power supply voltage VCCB becomes higher than the voltage level of the power supply voltage VCCCA, and malfunction or device such as initialization of the application system 7 occurs. There is a possibility of destruction in use.

  FIG. 6 is a timing chart when an abnormality occurs in the power supply characteristics of the power supply voltage VCCB.

  Here, the rising order of the power supply voltages VCCCA and VCCB is observed, but due to the difference in the power supply output characteristics and the load state, the power supply voltage VCCB may become larger than the voltage level of the power supply voltage VCCA immediately after startup. This may cause a failure or malfunction of the application system 7.

  FIG. 7 is a timing chart when an abnormality occurs in the power supply voltage VCCB.

  In this case, there are no problems such as the rising order of the power supply voltages VCCCA and VCCB, voltage transition, and reaching potential level, but there is a symptom that the voltage level of the power supply voltage VCCB instantaneously becomes higher than the power supply voltage VCCA, or The power supply voltage VCCB is in violation of the specification exceeding the upper limit of the voltage specification, and there is a possibility that the application system 7 malfunctions or is destroyed.

FIG. 8 is a timing chart when an abnormality occurs in the power supply voltage VCCB. In this case, there is no problem in the rising order of the power supply voltages VCCCA and VCCB, the voltage transition at start-up, the reached potential, etc. Therefore, the condition that the power supply voltage VCCA is larger than the voltage level of the power supply voltage VCCB is not satisfied, or is less than the minimum voltage condition, and the application system 7 may malfunction or be destroyed.

  As described above, the comparison operation circuit 16 can detect the abnormality shown in FIGS. 5 to 8 by comparing the power supply voltages VCCA and VCCB.

  The abnormalities due to noise shown in FIG. 7 and FIG. 8 are particularly effective for elucidating the cause of noise and analyzing the failure by analyzing together with the trace function / break function of the emulator 3 using a power supply fluctuation as a trigger. It becomes the target.

  In FIG. 3, two power supply voltages are detected. However, by providing two or more comparison operation circuits 16, the voltage order between various signals is compared, and the output signal is used as an input condition for the sequential break function. It is possible to detect violations of power-on or power-off procedures.

  By setting each detection condition in the comparison operation circuit 16 provided two or more as a sequential break (trigger) factor of the emulator 3, it is possible to apply to more complicated condition detection analysis.

  For example, a detection (break) is made when the power supply voltage VCCB exceeds about 3.0V before the power supply voltage VCCA reaches about 4.5V. In this case, by taking the logical product of the detection signals K output from the comparison operation circuit 16 for detecting the power supply voltage VCCA below 4.5V and the comparison operation circuit 16 for detecting the 3.0V abnormality of the power supply voltage VCCB, respectively. Can be realized.

  FIG. 9 is a block diagram showing another configuration example of the comparison operation circuit 16.

  In this case, the comparison operation circuit 16 includes A / D converters (A / D converters) 16d and 16e, and a comparator 16f.

  The A / D converter 16d is connected to receive the I / O power supply voltage UVCC1. The A / D converter 16e is connected to receive the core power supply voltage UVCC2.

  The A / D converters 16d and 16e convert the input I / O power supply voltage UVCC1 and the core power supply voltage UVCC2 into digital data and output them, respectively.

  The digital data output from the A / D converter 16d is connected to be input to one input portion of the comparator 16f. The digital data output from the A / D converter 16e is connected to be input to the other input section of the comparator 16f.

  The comparator 16f compares the input digital data and outputs the comparison result. For example, when the voltage level of the I / O power supply voltage UVCC1 is higher than the core power supply voltage UVCC2, the detection signal K1 is output, and the I / O power supply voltage UVCC1 and the core power supply voltage UVCC2 are at the same level. If the voltage level of the I / O power supply voltage UVCC1 is lower than the core power supply voltage UVCC2, the detection signal K3 is output.

  Then, by using these detection signals K1 to K3 as input conditions for the trace function / break function of the emulator 3, it becomes possible to analyze factors such as a power supply voltage variation and abnormality in the operating application system 7. .

  Even in this case, by providing two or more comparison operation circuits 16 in FIG. 9, the voltage order between the various signals is compared, and the output signal is used as the input condition of the sequential break function, so that the power-on or power-off procedure can be performed. It is possible to detect violations and the like.

  Thereby, according to the present embodiment, by providing the comparison operation circuit 16 in the emulator 3, it is possible to easily identify factors such as power supply voltage specification violation, power supply noise, and power supply voltage fluctuation malfunction. Thus, debugging efficiency can be greatly improved.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  In the above-described embodiment, the case where the comparison operation circuit is provided in the emulator is described. However, for example, the comparison operation circuit (FIG. 2) may be provided in the target microcomputer used in the user's application system.

  In this case, the comparison operation circuit monitors and detects two or more power supply voltages supplied via power supply pins (power supply input external terminals) provided in the target microcomputer. If there is an abnormality in the energization sequence or the voltage level of these two or more power supply voltages, a detection signal is output and a forced reset is performed by feeding back the detection signal.

  The emulator technology of the present invention emulates a user's application system with high accuracy by monitoring two or more power supply voltages, and greatly improves debugging efficiency.

It is a block diagram of a debugger according to an embodiment of the present invention. It is a block diagram of the emulator provided in the debugger of FIG. FIG. 3 is a block diagram showing a configuration of a comparison operation circuit provided in the emulator of FIG. 2. 4 is a timing chart when the power supply voltages monitored and detected by the comparison operation circuit of FIG. FIG. 4 is a timing chart when the power supply voltage input order monitored and detected by the comparison operation circuit of FIG. 3 is in violation. FIG. 4 is a timing chart when an abnormality occurs in the power supply characteristic of the power supply voltage monitored and detected by the comparison operation circuit of FIG. 3. 4 is a timing chart illustrating an example when an abnormality occurs in a power supply voltage monitored and detected by the comparison operation circuit of FIG. 3. 4 is a timing chart showing another example when an abnormality occurs in the power supply voltage monitored and detected by the comparison operation circuit of FIG. 3. FIG. 4 is a block diagram illustrating another example of a comparison operation circuit provided in the emulator of FIG. 2.

Explanation of symbols

1 Debugger 2 Host Computer 3 Emulator 4 Line 5 Interface Cable 6 CPU Socket Plug 7 Application System 8 Master Microcomputer 9 Host Interface 10 Emulation Control Unit 11 Break Control Unit 12 Trace Control / Trace Memory Unit 13 Proxy Memory Unit 14 Slave Microcomputer 15 User Interface 16 Comparison Operation Circuit (Power Supply Monitoring Circuit)
16a, 16b Voltage follower circuit (power generation circuit)
16c operational amplifier (comparator)
16d, 16e A / D converter 16f Comparator 17 Probe K, K1-K3 Detection signal

Claims (8)

An emulator capable of emulating the operation of a semiconductor integrated circuit device using two or more power supply voltages,
An emulator comprising a power supply monitoring circuit that monitors each of two or more power supply voltages of the semiconductor integrated circuit device and outputs a detection signal in the event of an abnormality. The emulator according to claim 1, wherein
The power monitoring circuit includes:
The voltage levels at the two or more power supply voltages are compared, the energization order of the two or more power supply voltages or the voltage level at the two or more power supply voltages is monitored, and detected when the energization order or the voltage level is abnormal An emulator characterized by outputting a signal. The emulator according to claim 1 or 2,
The power monitoring circuit includes:
A power generation circuit that generates a power supply voltage substantially equal to the two or more power supply voltages from the two or more power supply voltages used in the semiconductor integrated circuit device;
An emulator comprising: a voltage comparison circuit that compares power supply voltages generated by the power supply generation circuit and outputs a comparison result. The emulator according to claim 3, wherein
The emulator according to claim 1, wherein the power generation circuit comprises a voltage follower circuit. The emulator according to claim 1 or 2,
The power monitoring circuit includes:
An A / D converter for A / D converting each of two or more power supply voltages used in the semiconductor integrated circuit device;
An emulator comprising: a comparison unit that compares digital data output from the A / D converter and outputs the comparison result. The emulator according to any one of claims 1 to 5,
The detection signal output from the power supply monitoring circuit is used as a trigger signal for at least one of a break function and a trace function in the emulator. The emulator according to any one of claims 1 to 6,
The detection signal output from the power supply monitoring circuit is output to a user interface that performs data communication between the emulator and an application system that is a user-developed device, and the user interface receives a detection signal when the detection signal is input. An emulator that adjusts an output voltage to protect the user interface and the application system. A power input external terminal to which two or more power supply voltages are respectively input;
A semiconductor integrated circuit device comprising a plurality of internal logic blocks connected to the power input external terminal,
A power monitoring circuit that monitors each of two or more power supply voltages input via the power input external terminal and outputs a detection signal in the event of an abnormality,
The power monitoring circuit includes:
The voltage levels at the two or more power supply voltages are compared, the energization order of the two or more power supply voltages or the voltage level at the two or more power supply voltages is monitored, and detected when the energization order or the voltage level is abnormal A semiconductor integrated circuit device which outputs a signal.

Images