JP2006019505A - Method for manufacturing thin film transistor, semiconductor device, electro-optical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a TFT or the like wherein an LDD structure can be formed by dopant implantation process of one time. <P>SOLUTION: A process is contained wherein a gate electrode 20 having a slope in which film thickness becomes large gradually from an end in a channel lengthwise direction toward a central part is formed on a gate insulating film. Implantation of dopant element such as Phosphorus is performed by using the gate electrode 20 as a mask, a heavily doped n<SP>+</SP>-type region 22a as a source/drain region, a lightly doped n<SP>-</SP>-type region 22b and a channel region 24 which are shown in Fig. (B) are formed finally. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a thin film transistor, a semiconductor device, an electro-optical device, and an electronic apparatus.

In thin film transistors such as MOS transistors, an LDD (Lightly Doped Drain) structure is being adopted to reduce the so-called hot electron effect. FIG. 17 is a diagram for explaining a method of manufacturing a thin film transistor employing the LDD structure.
First, after a semiconductor layer 2 such as a silicon oxide film is formed at a predetermined position on the glass substrate 1, a gate insulating film 3 made of a silicon oxide film or the like is formed on the glass substrate 1 on which the semiconductor layer 2 is formed. Then, a gate electrode 4 is formed on the gate insulating film 3 by using a photolithography technique or the like. In this state, using the gate electrode 4 as a mask, ions 5 of impurities such as P (phosphorus) serving as donors or acceptors are implanted (see FIG. 17A).

Next, an insulating film 6 such as a silicon oxide film shown in FIG. 17B is formed on the side surface of the gate electrode 4. In this state, an impurity ion 5 such as P (phosphorus) is further implanted. Through the above steps, the LDD region 7 having a low impurity concentration and the source / drain regions 8 having a higher impurity concentration than the LDD region 7 are formed in the semiconductor layer 2. Finally, by performing a heat treatment on these, the implanted impurities are activated, and the LDD region 7 diffuses and extends from just below the side surface of the gate electrode 4 to the center of the gate electrode (for example, Patent Document 1). reference).
Japanese Patent Laid-Open No. 2-98143

However, in order to form a thin film transistor having a conventional LDD structure, two impurity implantation steps are inevitably required, and additional steps such as thin film formation are often required, resulting in poor yield. In addition, problems such as an increase in cost occur.
The present invention has been made in view of the circumstances described above, and provides a method for manufacturing a thin film transistor, a semiconductor device, an electro-optical device, and an electronic apparatus that can form an LDD structure by a single impurity implantation step. Objective.

  In order to achieve the above object, a method of manufacturing a thin film transistor according to the present invention includes a step of forming a semiconductor layer having a channel region, a step of forming a gate insulating film on the channel region, A step of forming a gate electrode having an inclined portion in which the film thickness gradually increases from the end toward the center in the channel length direction, and a source region which is a high concentration impurity region in a region not facing the gate electrode of the semiconductor layer And a step of implanting and activating impurities into the semiconductor layer so as to form a low-concentration impurity region in a region opposite to the inclined portion of the gate electrode. .

According to the manufacturing method of the present invention, the gate electrode having the inclined portion in which the film thickness gradually increases from the end portion toward the center portion in the channel length direction is formed. By forming the gate insulating film in such a shape, ion implantation of an impurity element is performed using the gate electrode as a mask, so that a high concentration as a source / drain region as shown in FIG. 3B is finally obtained. N ⁺ -type impurity diffusion regions, low-concentration N ^-- type impurity diffusion regions, and channel regions can be formed. That is, according to the present invention, it is possible to reduce ion implantation, which has conventionally been required at least twice to form an LDD structure, to one time. Further, in the present invention, it is not necessary to add an additional thin film formation process or an etching process necessary for forming the LDD structure.

  When the gate electrode is cut in the channel length direction, the cross section of the inclined portion may be a straight line, or may be an upwardly convex curve or a downwardly convex curve. Moreover, the center part, ie, the top part, may be flat. Among them, an upward convex curve is preferable, and a cross section of the gate electrode is particularly preferably a semicircular shape. A gate electrode having a substantially semicircular cross section in the channel length direction can be easily formed by causing a “pinning phenomenon” using a droplet containing a conductive material, for example.

  Here, the pinning phenomenon will be described. In general, the droplets disposed on the substrate are rapidly dried at the peripheral edge (edge). Therefore, when the droplet contains a solute or a dispersoid (hereinafter, collectively referred to as “solute or the like”), in the drying process of the droplet, the concentration of the solute or the like first reaches a saturation concentration at the periphery of the droplet, It begins to precipitate. On the other hand, in the inside of the droplet, a liquid flow from the central portion of the droplet toward the peripheral portion is generated so as to replenish the liquid lost by evaporation at the peripheral portion of the droplet. As a result, the solute and the like in the central portion of the droplet are carried to the peripheral portion according to the flow, and the precipitation from the peripheral portion is promoted as the droplet is dried. In this way, a phenomenon in which the solute or the like contained in the droplet is deposited in an annular shape along the outer periphery of the shape of the droplet disposed on the substrate is called “pinning”.

  In the method of manufacturing a thin film transistor according to the present invention, it is preferable to form the gate electrode using this “pinning” phenomenon. The gate electrode formed in this way has an inclined portion whose film thickness gradually increases from the end toward the center in the channel length direction, and has a substantially semicircular cross section. Further, if the pinning phenomenon is used, a fine gate electrode of submicron order can be formed, so that a high-performance thin film transistor having a small gate capacity can be obtained inexpensively and easily.

  Here, in the step of forming the gate electrode, it is preferable that the thickness of the inclined portion is determined according to the size of the low concentration impurity region.

  The step of forming the gate electrode includes a step of disposing a droplet containing a conductive material on the gate insulating film, and a parameter of at least one of a solid content concentration of the droplet or a drying speed of each droplet. And a step of controlling and drying the droplets.

  In addition, the step of forming the gate electrode includes a step of disposing a droplet containing a conductive material on the gate insulating film, and controlling a convection in the droplet using a temperature distribution in the droplet. An embodiment comprising a step of drying the droplets is also preferable.

  Furthermore, in the step of forming the gate electrode, the droplet is disposed so that the peripheral portion of the droplet faces the channel region, and in the step of drying the droplet, the peripheral portion of the droplet is An embodiment characterized by depositing a conductive material is also preferable.

  In the step of forming the gate insulating film, it is preferable that the gate insulating film having a flat surface is formed.

  Since the gate insulating film is planarized, the shape of the gate electrode formed by applying and drying droplets is not affected by the semiconductor pattern. As a planarization method, a method of forming by an SOG (spin-on-glass) film, a method of forming a multilayer structure of a film formed by a method such as CVD or thermal oxidation and an SOG film, or a method of CMP is used for planarization. Three methods are conceivable. Each of the methods is characterized in that the method of forming with an SOG film is simple, the method of forming with a multilayer structure is easy to control the characteristics of the MOS interface, and the method such as CMP has good flatness. is there.

  The present invention also provides a semiconductor layer having a channel region, a source region and a drain region facing each other with the channel region interposed therebetween, a gate insulating film provided on the semiconductor layer, and on the gate insulating film A gate electrode having an inclined portion whose thickness gradually increases from the end toward the center in the channel length direction, and the region of the semiconductor layer that does not face the gate electrode is the high-concentration impurity region. A thin film transistor is characterized in that a region which is a source region and a drain region and faces an inclined portion of the gate electrode of the semiconductor layer is a low concentration impurity region.

  Such a thin film transistor preferably has an LDD structure because the so-called hot electron effect can be reduced. In addition, since the gate electrode has an inclined portion whose film thickness gradually increases from the end toward the center in the channel length direction, the LDD structure can be easily formed by ion implantation of the impurity element using the gate electrode as a mask. Therefore, the number of steps required for manufacturing can be reduced.

  The gate electrode of the thin film transistor preferably has a substantially semicircular cross section when cut in the channel length direction. Such a thin film transistor can be formed by the pinning phenomenon described above. According to the pinning phenomenon, a gate electrode having a substantially semicircular cross section can be obtained by an inexpensive and simple process, and at the same time, a gate electrode having a submicron order gate length can be obtained. A thin film transistor with high performance can be obtained.

  The present invention also includes the above thin film transistor, the thin film transistor manufactured by the above-described method, an electro-optical device including the thin film transistor, and an electronic device including the thin film transistor.

  Here, the electro-optical device means a general device including an electro-optical element that emits light by an electric action or includes a semiconductor device according to the present invention or changes the state of light from the outside, and emits light by itself. Includes both those that control the passage of light from the outside. For example, as an electro-optical element, a liquid crystal element, an electrophoretic element having a dispersion medium in which electrophoretic particles are dispersed, an EL (electroluminescence) element, and an electron-emitting element that emits light by applying electrons generated by applying an electric field to a light emitting plate An active matrix display device provided.

  The electronic apparatus refers to a general apparatus having a certain function provided with the semiconductor device according to the present invention, and includes, for example, an electro-optical device and a memory. The configuration is not particularly limited, but for example, an IC card, a mobile phone, a video camera, a personal computer, a head-mounted display, a rear-type or front-type projector, a fax machine with a display function, a digital camera finder, a portable TV, A DSP device, PDA, electronic notebook, electronic bulletin board, advertising display, etc. are included.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<First embodiment>
1 and 2 are explanatory views showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.

(Semiconductor film formation process)
FIG. 1A shows a state in which a semiconductor film (semiconductor layer) 14 is formed on an insulating film 12 formed on a substrate 10. The insulating film 12 is formed on the substrate 10 made of an insulating material such as glass. In this embodiment, a silicon oxide film is formed as the insulating film 12. The silicon oxide film can be formed by, for example, a plasma chemical vapor deposition method (PECVD method), a low pressure chemical vapor deposition method (LPCVD method), a physical vapor deposition method such as a sputtering method, or the like.

In this embodiment, a silicon film is formed as the semiconductor film 14. The silicon film is formed by a CVD method such as an APCVD method, an LPCVD method, or a PECVD method, or a PVD method such as a sputtering method or an evaporation method. When the silicon film is formed by the LPCVD method, silicon is deposited using disilane (Si ₂ H ₆ ) or the like as a raw material at a substrate temperature of about 400 ° C. to 700 ° C. In the PECVD method, silicon can be deposited at a substrate temperature of about 100 ° C. to 500 ° C. using monosilane (SiH ₄ ) or the like as a raw material. When the sputtering method is used, the substrate temperature is about room temperature to 400 ° C. As described above, the deposited silicon film has various states such as an amorphous state, a mixed crystalline state, a microcrystalline state, or a polycrystalline state, and may be in any state. The thickness of the silicon film is suitably about 20 nm to 100 nm when used for a thin film transistor. The deposited semiconductor film is crystallized by applying thermal energy. In this specification, “crystallization” includes not only crystallization of an amorphous semiconductor film but also crystallization of a polycrystalline or microcrystalline semiconductor film. The semiconductor film can be crystallized by a laser irradiation method or a solid phase growth method, but is not limited thereto. Subsequently, the formed semiconductor film is patterned into a necessary shape by etching using a photolithography method to obtain a silicon film 14.

(Insulating film formation process)
A process for forming the gate insulating film 16 will be described with reference to FIGS. The gate insulating film 16 is formed so as to cover the semiconductor film 14 and the insulating film 12, and may be a silicon oxide film, for example. The silicon oxide film is formed by, for example, a film formation method such as an electron cyclotron resonance PECVD method (ECR-PECVD method), a PECVD method, an atmospheric pressure chemical vapor deposition method (APCVD method), or a low pressure chemical vapor deposition method (LPCVD method). Can be formed. As shown in FIG. 1B, the gate insulating film 16 thus formed has a level difference between a region stacked on the semiconductor film 14 and a portion stacked on the insulating film 12, Is not flat. When a droplet containing a conductive material is supplied on this, the liquid does not spread uniformly and the conductive material is deposited at a desired position, and a gate electrode cannot be obtained. Therefore, as shown in FIG. 1C, the gate insulating film 16 is planarized before the droplet containing the conductive material is disposed. The planarization can be performed by chemical mechanical polishing (CMP) or etching. The gate insulating film can also be formed by applying a liquid SOG or High-k material using a spin coater. In the case of application of a liquid material, a flat surface can be obtained, and thus it is not necessary to perform flattening after forming the insulating film.

(Droplet placement process)
Next, as illustrated in FIG. 1D, a droplet 18 containing a conductive material is provided over the insulating film 16. As the conductive material, for example, metal fine particles such as Au, Ag, and Cu having a diameter of several nanometers can be used. For example, Ag colloidal ink or the like is preferable. These metal fine particles can be dispersed in an organic dispersion medium such as tetradecane and supplied as droplets.

  Examples of the method for disposing the droplets 18 on the insulating film 16 include a method using a micropipette, a microdispenser, an ink jet method, and the like, and an ink jet method capable of performing accurate patterning is particularly preferable. The ink jet method is performed using an ink jet type ejection device described later.

  FIG. 2A shows a plan view of the droplet placement step. A cross-sectional view taken along line 1D-1D in FIG. 2A is FIG. In FIG. 2A, the gate insulating film 16 is omitted in order to clarify the positional relationship between the semiconductor film 14 and the droplet 18. The droplet 18 is arranged so that a part of the outer peripheral arc crosses the center of the semiconductor film 14.

(Conductive material deposition process)
The droplet 18 disposed on the insulating film 16 has a drying speed faster in the peripheral portion than in the central portion, and the conductive material first reaches a saturated concentration in the peripheral portion 20 and starts to be deposited (FIG. 1D). )). The peripheral portion of the droplet is pinned by the deposited conductive material, and a “pinning phenomenon” occurs in which droplet contraction (shrinkage of the outer diameter) accompanying subsequent drying is suppressed. Since the drying speed at the peripheral portion is faster than the drying speed at the central portion, a liquid flow from the central portion of the droplet toward the peripheral portion is generated, and the conductive material is carried to the peripheral portion. As a result, as shown in FIG. 2B, an annular conductive film 20 is formed in accordance with the outer shape of the droplet, part of which functions as the gate electrode 20a.

  FIG. 1E shows a state in which the gate electrode 20a forming a part of the annular conductive film 20 is formed. Note that FIG. 1E is a cross-sectional view taken along line 1E-1E in FIG. As shown in FIG. 1E, the gate electrode 20a has an inclined portion in which the film thickness gradually increases from the end toward the center in the channel length direction (left-right direction in FIG. 1E). (Details will be described later). The gate electrode 20 a is controlled to have a width of 1 μm or less and is disposed so as to cross the center of the semiconductor film 14.

  Here, in the process of drying the droplet 18, it is possible to control so as to increase the concentration of the conductive material in the peripheral portion of the droplet. To explain with a specific example, for example, by controlling at least one parameter of the solid content concentration of the conductive material or the drying speed of each droplet, a substantially semicircular cross section as shown in FIG. The film thickness and shape of the gate electrode 20a having the above can be controlled.

  As another method, by controlling the convection in the droplet using the temperature distribution in the droplet, the gate electrode 20a having a substantially semicircular cross section as shown in FIG. The film thickness and shape can be controlled. In this case, methods for controlling the temperature of the droplet include (1) a method for controlling the temperature of the substrate on which the droplet is disposed, (2) a method for partially laser heating the droplet, and (3) a droplet. There is a method for controlling the ambient temperature.

  Furthermore, as another method, fine particles of the conductive material are deposited or aggregated on the periphery of the droplet, and a convection is generated by giving a temperature difference between the top and the bottom of the droplet. The film thickness and shape of the gate electrode 20a having a substantially semicircular cross section as shown in (E) can be controlled. Specifically, the fine particles stacked at random using the convection generated in the droplets are rearranged while depositing or aggregating the fine particles of the conductive material on the periphery of the droplets. As a result, a clean close-packed gate electrode 20a can be formed at the peripheral edge of the droplet. Note that, after the conductive material is deposited, the fine metal particles may be aggregated by performing a heat treatment on the obtained conductive film, which makes it possible to increase the conductivity of the thin film.

(Source / drain region forming step)
FIG. 3A is a diagram for explaining an impurity implantation process, and is a partially enlarged view of FIG. When forming the source / drain regions, first, ion implantation of an impurity element (for example, phosphorus) serving as a donor or acceptor is performed using the gate electrode 20a having a substantially semicircular cross section as a mask. FIG. 4 is a diagram illustrating the relationship between the depth and concentration of implanted ions. In FIG. 4, Xp indicates the depth (projection range) at which the density is the highest, and a density distribution having a standard deviation σ around this Xp is shown.

  The dotted line shown in FIG. 3A represents Xp shown in FIG. That is, when ions of the impurity element are implanted from the surface as described above, the concentration concentration of the ions comes to the depth (Xp) of each of the semiconductor film 14, the gate insulating film 16, and the gate electrode 20a. The dotted line shown in FIG. 3A represents this, and the dotted line has a shape along the surface shape, that is, a shape that rises from the end to the center of the gate electrode 20a. Since the concentration distribution of implanted ions has a standard deviation σ (see FIG. 4), for example, even if there is a concentration center Xp in the gate insulating film 16, some of the ions are in the gate insulating film. The semiconductor film 14 under the 16 is entered. Accordingly, the concentration of ions implanted into the semiconductor film at the end of the gate electrode decreases rapidly corresponding to the thickness of the gate electrode, and the concentration of ions becomes zero immediately below the sufficiently thick gate electrode. That is, an LDD region is formed immediately below the end of the gate electrode.

Thereafter, the impurity element is activated by irradiating with an XeCl excimer laser adjusted to an energy density of about 400 mJ / cm ² (or by performing heat treatment at about 250 ° C. to 400 ° C.). As a result, as shown in FIG. 3B, a high concentration N ⁺ type impurity diffusion region 22a, a low concentration N ⁻ type impurity diffusion region 22b as a source / drain region, and a channel region 24 are formed. The formation of the structure is complete. Here, the dimension (width) of the N ⁻ -type impurity diffusion region 22b varies according to the film thickness of the end portion of the gate electrode 20a. More specifically, although the impurity concentration gradually changes at the end of the gate electrode 20a until the film thickness becomes zero (see FIG. 3), the ion concentration of the impurity element implanted into the semiconductor film 14 changes at this gradually changing portion. To do. That is, in the portion where the thickness of the gate electrode 20a is sufficiently thick, the impurity element ions do not reach the semiconductor film 14, but when the thickness is reduced to some extent and corresponds to σ of the distribution shown in FIG. Elemental ions reach the semiconductor film 14. In other words, the lateral dimension of the gate electrode 20a from the thickness of about σ to 2σ to zero becomes the width of the low concentration N ⁻ -type impurity diffusion region 22b, and the width is 0.01. It is controlled to about ~ 0.1 μm. When the source / drain regions are formed as described above, a contact hole is formed in the semiconductor film 14 to form a metal thin film or the like, thereby obtaining the source electrode 15a and the drain electrode 15b (see FIG. 2C).

As described above, in this embodiment, the conductive film 20 having a width of the order of submicron is formed by a simple process of dropping a droplet containing a conductive material and controlling the drying thereof, and this is formed into a gate. It can be used as the electrode 20a. Since the gate electrode 20a has a shape (substantially semicircular shape) in which the cross section gradually decreases in thickness from the center to the end, ion implantation of an impurity element is performed using the gate electrode 20a as a mask. As a result, the high concentration N ⁺ type impurity diffusion region 22a, the low concentration N ⁻ type impurity diffusion region 22b, and the channel region 24 as source / drain regions as shown in FIG. Obtainable. That is, according to the present embodiment, ion implantation, which is conventionally required at least twice to form an LDD structure, can be reduced to one time. Further, since the dimension of the N ⁻ -type impurity diffusion region 22b is formed corresponding to the change in the film thickness at the end of the gate electrode 20a, the submicron can be controlled by controlling the film thickness at the end of the gate electrode 20a. The dimensions of the N ⁻ -type impurity diffusion region 22b can be set and changed with order accuracy. Further, unlike the case of using a photolithography technique, an expensive exposure machine for forming a pattern is unnecessary, and a step of forming a sidewall and a step of etching back are not required.

  In the above-described embodiment, the case where the gate electrode 20a having a substantially semicircular cross section is formed by a simple method of dropping a droplet containing a conductive material and controlling the drying thereof has been described. However, the present invention is not limited to this, and the gate electrode 20a having an inclined portion in which the film thickness gradually increases from the end portion toward the center portion in the channel length direction by using a CVD method, a photolithography technique, or the like. Also good.

  Further, the shape of the gate electrode is not particularly limited as long as it has an inclined portion in which the film thickness gradually increases from the end portion toward the central portion in the channel length direction. For example, as shown in FIG. The cross section of the inclined portion may be linear, or the top portion may be flat as shown in FIG.

  In the above description, phosphorus is exemplified as the impurity element, but it is needless to say that arsenic or the like may be used. Here, since the mass numbers of phosphorus and arsenic are 31 and 75, respectively, if the same energy is used, phosphorus enters deeply, while arsenic enters shallower. In other words, the concentration center Xp shown in FIG. 4 is large in phosphorus and small in arsenic. Therefore, when implanting these impurities, the ion implantation energy may be determined in accordance with the type of the implanted impurity. Hereinafter, an ink jet type ejection device used for dropping droplets containing a conductive material according to the present embodiment will be described with reference to the drawings.

(Droplet discharge device)
FIG. 5 is a perspective view of the ink jet type ejection device 30. The ink jet discharge device 30 mainly includes a base 32, a first moving unit 34, a second moving unit 36, an electronic balance (not shown) as a weight measuring unit, a head 31, a capping unit 33, and a cleaning unit 35. ing. The operation of the inkjet discharge device 30 including the first moving means 34 and the second moving means 36 is controlled by a control device. In FIG. 5, the X direction is the left-right direction of the base 32, the Y direction is the front-rear direction, and the Z direction is the up-down direction.

  The first moving means 34 is directly installed on the upper surface of the base 32 with the two guide rails 38 aligned with the Y-axis direction. The first moving means 34 has a slider 39 that can move along two guide rails 38. As a driving means for the slider 39, for example, a linear motor can be employed. Thereby, the slider 39 can be moved along the Y-axis direction, and can be positioned at an arbitrary position.

  A motor 37 is fixed to the upper surface of the slider 39, and a table 46 is fixed to the rotor of the motor 37. The table 46 positions the substrate 10 while holding it. That is, by operating a suction holding means (not shown), the substrate 10 is sucked through the hole 46A of the table 46, and the substrate 10 can be held on the table 46. The motor 37 is a direct drive motor, for example. When the motor 37 is energized, the table 46 is rotated in the θz direction together with the rotor, and the table 46 is provided with a preliminary discharge area for the head 31 to discard the liquid material or to perform trial driving (preliminary discharge). It has been.

  On the other hand, two columns 36A are erected on the rear side of the base 32, and a column 36B is installed on the upper end of the column 36A. And the 2nd moving means 36 is provided in the whole surface of the column 36 part. The second moving means 36 has two guide rails 84A arranged along the X-axis direction, and has a slider 82 that can move along the guide rails 84A. As a driving means for the slider 82, for example, a linear motor can be employed. Thereby, the slider 82 can be moved along the X-axis direction and can be positioned at an arbitrary position.

  A head 31 is provided on the slider 82. The head 31 is connected to motors 84, 85, 86, 87 as swing positioning means. The motor 84 can move the head 31 in the Z-axis direction and can be positioned at an arbitrary position. The motor 85 can swing the head 31 in the β direction around the Y axis and can be positioned at an arbitrary position. The motor 86 can swing the head 31 in the γ direction around the X axis and can be positioned at an arbitrary position. The motor 87 can swing the head 31 in the α direction around the Z axis and can be positioned at any position.

  As described above, the substrate 10 can be moved and positioned in the Y direction, and can be swung and positioned in the θz direction. The head 31 can be moved and positioned in the X and Z directions, and can be swung and positioned in the α, β, and γ directions. Therefore, the ink jet type ejection device 30 of the present embodiment can accurately control the relative position and posture between the ink ejection surface 31P of the head 31 and the substrate 10 on the table.

(Inkjet head)
FIG. 6 is a side sectional view of the inkjet head. The head 31 discharges a liquid material (droplets containing a conductive material in this embodiment) L from the nozzle 41 by a droplet discharge method. As a droplet discharge method, there are various known methods such as a piezo method in which a liquid material is discharged using a piezo element as a piezoelectric element, and a method in which a liquid material is discharged by bubbles generated by heating the liquid material. Technology can be applied. Among them, the piezo method has an advantage that it does not affect the composition of the material because it does not apply heat to the liquid. The head 31 shown in FIG. 6 employs a piezo method.

  The head main body 40 of the head 31 is formed with a reservoir 45 and a plurality of ink chambers 43 branched from the reservoir 45. The reservoir 45 is a flow path for supplying the liquid material L to each ink chamber 43. A nozzle plate that constitutes an ink ejection surface is mounted on the lower end surface of the head body 40. In the nozzle plate, a plurality of nozzles 41 for discharging the liquid L are opened corresponding to the respective ink chambers 43. An ink flow path is formed from each ink chamber 43 toward the corresponding nozzle 41. On the other hand, a diaphragm 44 is attached to the upper end surface of the head body 40. The diaphragm 44 forms the wall surface of each ink chamber 43. Piezo elements 42 are provided outside the diaphragm 44 so as to correspond to the ink chambers 43. The piezoelectric element 42 is obtained by sandwiching a piezoelectric material such as quartz with a pair of electrodes (not shown). The pair of electrodes is connected to the drive circuit 49.

  When a voltage is applied from the drive circuit 49 to the piezo element 42, the piezo element 42 expands or contracts. When the piezo element 42 contracts and deforms, the pressure in the ink chamber 43 decreases, and the liquid L flows from the reservoir 45 into the ink chamber 43. Further, the pressure of the piezo element 42 decreases, and the liquid L flows from the reservoir 45 into the ink chamber 43. When the piezo element 42 expands and deforms, the pressure in the ink chamber 43 increases and the liquid L is discharged from the nozzle 41. The deformation speed of the piezo element 42 can be controlled by changing the frequency of the applied voltage. That is, the discharge condition of the liquid L can be controlled by controlling the voltage applied to the piezo element 42.

  On the other hand, the ink jet discharge apparatus shown in FIG. 5 includes a capping unit 33 and a cleaning unit 35. The capping unit 33 is for capping the ink ejection surface 31P when the ink jet ejection device 30 is on standby to prevent the ink ejection surface 31P of the head 31 from drying. The cleaning unit 35 sucks the inside of the nozzles in order to remove clogging of the nozzles in the head 31. The cleaning unit 35 can also wipe the ink discharge surface 31P in order to remove dirt on the ink discharge surface 31P in the head 31.

<Second Embodiment>
FIG. 7 shows a semiconductor device according to the second embodiment of the present invention, and FIG. 8 shows an equivalent circuit of the semiconductor device according to the present invention.

  The semiconductor device according to the present embodiment is a double-gate semiconductor device in which two thin film transistors T1 and T2 are connected in series (see FIGS. 7 and 8), and the source / source in which the source electrode 66a and the drain electrode 66b are formed. Two gate electrodes 63a and 63b are formed between the drain regions. As shown in FIG. 7, each of the gate electrodes 63a and 63b forms part of one annular conductive thin film 63.

  Each of the gate electrodes 63a and 63b is arranged such that a droplet containing a conductive material is disposed at a position where the gate electrode is to be formed, or the droplet containing the conductive material is used to allow the droplet to contract during the drying process. Place it larger than the position to be formed. For example, in the semiconductor film 64, the liquid droplets may be disposed so as to cover the remaining part of the semiconductor film 64 excluding the region where the source / drain regions are to be formed.

In this way, two sub-micron-order gate electrodes 63a and 63b (double gates) are placed at desired positions by an easy and inexpensive process in which one droplet of conductive material is placed and dried. Can be formed. Since the gate electrodes 63a and 63b have a shape in which the film thickness gradually increases from the end toward the center in the channel length direction (see the first embodiment), the gate electrodes 63a and 63b are masked. As a source / drain region as shown in FIG. 3B, the high concentration N ⁺ type impurity diffusion region 22a and the low concentration N ⁻ type impurity diffusion region are finally obtained. 22b and the channel region 24 can be formed. Such a double gate transistor can exhibit a great effect in reducing the leakage current between the source and drain and improving the breakdown voltage.

  In the above description, the case where one annular conductive thin film 63 is formed in order to form a double-gate thin film transistor is illustrated. However, the number of the annular conductive thin films 63 is equal to the number n of thin film transistors to be formed ( n ≧ 2) can be changed as appropriate. For example, in the case of forming a multi-gate thin film transistor in which four thin film transistors are connected in series, two annular conductive thin films 63 may be formed. Further, the arrangement interval, the diameter, and the like of each annular conductive thin film 63 can be appropriately changed according to the design of the thin film transistor to be formed.

<Third embodiment>
FIG. 9 shows a semiconductor device according to the third embodiment of the present invention, and FIG. 10 shows an equivalent circuit of the semiconductor device according to the present invention.

  The semiconductor device according to this embodiment includes two series of thin film transistors T1 and T2, and more specifically, a thin film transistor T1 including a source electrode 75a, a drain electrode 75b, and a gate electrode 74a, a source electrode 75c, and a drain electrode 75b. The thin film transistor T2 includes the gate electrode 74b. As shown in FIG. 10, each of the gate electrodes 74a and 74b forms a part of one annular conductive thin film 74. Such a double transistor comprises a CMOS inverter circuit if T1 is a p-channel transistor (PMOS) and T2 is an N-channel transistor, and T1 and T2 are the same conductivity type transistors. If 75a and 75b are set to the same potential, they function as transistors connected in parallel, that is, as one transistor whose gate width is doubled.

  Each of the gate electrodes 74a and 74b is arranged such that a droplet containing a conductive material is placed at a position where the gate electrode is to be formed, or a droplet containing a conductive material is used to allow the droplet to contract during the drying process. Place it larger than the position to be formed. For example, in the semiconductor film 72, the liquid droplets may be disposed so as to cover the remaining part of the semiconductor film 72 excluding the region where the source / drain regions are to be formed.

In this way, two gate electrodes 74a and 74b used for the two series of thin film transistors are formed at desired positions by an easy and inexpensive process in which one droplet of conductive material is arranged and dried. can do. Since the gate electrodes 74a and 74b have a shape in which the cross section gradually decreases in thickness from the center to the end (see the first embodiment), the gate electrodes 74a and 74b are used as impurities. By performing ion implantation of elements, finally, a high concentration N ⁺ type impurity diffusion region 22a as a source / drain region as shown in FIG. 3B, a low concentration N ⁻ type impurity diffusion region 22b, In addition, a channel region 24 can be formed.

  In the above description, the case where one annular conductive thin film 74 is formed in order to form two series of thin film transistors is illustrated, but the number of the annular conductive thin films 74 is n (n ≧ 2) to be formed. It can be appropriately changed according to the number of the thin film transistors. Further, the arrangement interval and the diameter of the annular conductive thin film 74 can be appropriately changed according to the design of the thin film transistor to be formed.

<Fourth embodiment>
FIG. 11 shows a semiconductor device according to the fourth embodiment of the present invention, and FIG. 12 shows an equivalent circuit of the semiconductor device according to the present invention.

  The gate electrodes 74a and 74b of the two thin film transistors T1 and T2 according to the present embodiment are formed by removing a part of one annular conductive thin film. Except for this point, the semiconductor device according to the present embodiment is the same as the semiconductor device shown in FIG. Accordingly, corresponding parts are denoted by the same reference numerals, and detailed description thereof is omitted. Such a transistor functions as a logic circuit having two different gate inputs.

  When forming the gate electrodes 74a and 74b, first, a droplet containing a conductive material is disposed at a position where the gate electrode is to be formed (see the third embodiment). Subsequently, when the conductive material is deposited by the drying process, the unnecessary portion of the thin film as the gate electrode is removed to obtain the gate electrodes 74a and 74b. Thin film removal methods include supplying an acidic solution such as hydrochloric acid or sulfuric acid to remove unnecessary conductive thin film together with the acidic solution, lifting silicon oxide film with hydrofluoric acid, etching method, etc. Can be used. Since the region from which the thin film is removed is not in the submicron order, a normal method that is relatively inexpensive can be used as the etching method.

In this way, two gate electrodes 74a and 74b used for the two series of thin film transistors are formed at desired positions by an easy and inexpensive process in which one droplet of conductive material is arranged and dried. can do. Since the gate electrodes 74a and 74b have a shape in which the cross section gradually decreases in thickness from the center to the end (see the first embodiment), the gate electrodes 74a and 74b are used as impurities. By performing ion implantation of elements, finally, a high concentration N ⁺ type impurity diffusion region 22a as a source / drain region as shown in FIG. 3B, a low concentration N ⁻ type impurity diffusion region 22b, In addition, a channel region 24 can be formed.

<Fifth embodiment>
FIG. 13 shows a semiconductor device according to the fifth embodiment of the present invention.

The semiconductor device according to the present embodiment, an N-channel type MOS transistor T _N containing source electrode 96a and drain electrode 96b and the gate electrode 94a, P channel MOS transistor T including the source electrode 96c and the drain electrode 96b and the gate electrode 94b _A complementary MOS semiconductor device including _P. N-channel type MOS transformer register T _N and P-channel type MOS transistors T each gate electrode 94a of the _P, 94b are all a part of one of the conductive annular thin film 94.

N-channel type MOS transformer register T _N and P-channel MOS transistor T _P each gate electrode 74a of, 74b is a droplet including a conductive material arranged at positions where the gate electrode is formed, or a conductive material The contained droplets are arranged larger than the position where the gate electrode is to be formed in anticipation of the shrinkage of the droplets during the drying process. For example, in the semiconductor film 72, the liquid droplets may be disposed so as to cover the remaining part of the semiconductor film 72 excluding the region where the source / drain regions are to be formed.

By doing so, it is possible to form N-channel type MOS transformer register T _N and P-channel type MOS transistors T _P of the two gate electrodes 94a, 94b, at a desired position. Since the gate electrodes 94a and 94b have a shape in which the cross section gradually decreases in thickness from the center portion to the end portion (see the first embodiment), the gate electrodes 94a and 94b are used as impurities as masks. By performing ion implantation of elements, finally, a high concentration N ⁺ type impurity diffusion region 22a as a source / drain region as shown in FIG. 3B, a low concentration N ⁻ type impurity diffusion region 22b, In addition, a channel region 24 can be formed.

<Sixth embodiment>
The sixth embodiment of the present invention relates to an electro-optical device including the semiconductor device according to the present invention. As an example of an electro-optical device, an organic EL (electroluminescence) display device is given.

  FIG. 14 is a diagram illustrating the configuration of the electro-optical device 100 according to the sixth embodiment. The electro-optical device (display device) 100 according to this embodiment is driven by a pixel substrate and a circuit substrate (active matrix substrate) in which pixel drive circuits including thin film transistors T1 to T4 are arranged in a matrix on the substrate. A light emitting layer that emits light and drivers 101 and 102 that supply a drive signal to a pixel drive circuit including the thin film transistors T1 to T4 are configured. The driver 101 supplies a drive signal to each pixel region via the scanning line Vsel and the light emission control line Vgp. The driver 102 supplies a drive signal to each pixel region via the data line Idata and the power supply line Vdd. By controlling the scanning line Vsel and the data line Idata, a current program for each pixel region is performed, and light emission by the light emitting unit OELD can be controlled. The thin film transistors T1 to T4 and the drivers 101 and 102 constituting the pixel driving circuit are formed by applying the manufacturing method of each embodiment described above.

  Although an organic EL display device has been described as an example of an electro-optical device, various electro-optical devices such as a liquid crystal display device can be manufactured in the same manner.

  Next, various electronic apparatuses configured by applying the electro-optical device 100 according to the invention will be described. FIG. 15 is a diagram illustrating an example of an electronic apparatus to which the electro-optical device 100 can be applied. FIG. 15A shows an application example to a mobile phone, and the mobile phone 230 includes an antenna portion 231, an audio output portion 232, an audio input portion 233, an operation portion 234, and the electro-optical device 100 of the present invention. . As described above, the electro-optical device according to the invention can be used as a display unit.

  FIG. 15B shows an application example to a video camera. The video camera 240 includes an image receiving unit 241, an operation unit 242, an audio input unit 243, and the electro-optical device 100 of the present invention. As described above, the electro-optical device according to the present invention can be used as a finder or a display unit. FIG. 15C shows an application example to a portable personal computer (so-called PDA). The computer 250 includes a camera unit 251, an operation unit 252, and the electro-optical device 100 according to the present invention. As described above, the electro-optical device according to the invention can be used as a display unit.

  FIG. 15D shows an application example to a head-mounted display. The head-mounted display 260 includes a band 261, an optical system storage unit 262, and the electro-optical device 100 according to the present invention. As described above, the electro-optical device according to the present invention can be used as an image display source. Further, the electro-optical device 100 according to the present invention is not limited to the above-described example, and can be applied to any electronic apparatus to which a display device such as an organic EL display device or a liquid crystal display device can be applied. For example, in addition to these, it can also be used for a fax machine with a display function, a finder for a digital camera, a portable TV, an electronic notebook, an electric bulletin board, a display for advertisements, and the like.

  FIG. 16A shows an application example to a television, and the television 300 includes the electro-optical device 100 according to the present invention. The electro-optical device according to the present invention can be similarly applied to a monitor device used for a personal computer or the like. FIG. 16B shows an application example to a roll-up television, and the roll-up television 310 includes the electro-optical device 100 according to the present invention.

<Seventh embodiment>
The manufacturing method according to each embodiment described above can be applied to the manufacture of various devices other than the manufacture of the electro-optical device. For example, various memories such as FeRAM (ferroelectric RAM), SRAM, DRAM, NOR type RAM, NAND type RAM, floating gate type nonvolatile memory, and magnetic RAM (MRAM) can be manufactured. Further, in a non-contact communication system using microwaves, the present invention can be applied to manufacturing an inexpensive tag mounted with a minute circuit chip (IC chip).

It is explanatory drawing of the manufacturing method of the semiconductor device of 1st embodiment. It is explanatory drawing of the manufacturing method of the semiconductor device of 1st embodiment. It is explanatory drawing of the manufacturing method of the semiconductor device of 1st embodiment. It is the figure which illustrated the relationship between the depth of implanted ion, and a density | concentration. It is a perspective view of an inkjet discharge device. It is side surface sectional drawing of an inkjet head. It is explanatory drawing of the semiconductor device which concerns on 2nd embodiment. It is a figure which shows the equivalent circuit of the semiconductor device which concerns on 2nd embodiment. It is explanatory drawing of the semiconductor device which concerns on 3rd embodiment. It is a figure which shows the equivalent circuit of the semiconductor device which concerns on 3rd embodiment. It is explanatory drawing of the semiconductor device which concerns on 4th embodiment. It is a figure which shows the equivalent circuit of the semiconductor device which concerns on 4th embodiment. It is explanatory drawing of the semiconductor device which concerns on 5th embodiment. It is a figure which shows the structure of the electro-optical apparatus which concerns on 6th embodiment. It is explanatory drawing of the various electronic devices comprised by applying an electro-optical apparatus. It is explanatory drawing of the various electronic devices comprised by applying an electro-optical apparatus. It is a figure which shows the manufacturing method of the conventional thin-film transistor which employ | adopted LDD structure. It is an example of sectional drawing of the gate electrode formed with the manufacturing method which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Substrate, 12 ... Insulating film, 18 ... Droplet, 14 ... Semiconductor film, 16 ... Gate insulating film, 20, 63, 74, 94 ... Annular conductive film, 20a, 63a, 63b, 74a, 74b, 94a, 94b ... Gate electrode, 22a ... N ⁺ type impurity diffusion region (source / drain region), 22b ... N ^- type impurity diffusion region, 24 ... channel region, T1, T2 ... thin film transistor, 20, 63, 74, 94 ... annular conductivity Sex membrane.

Claims (11)

Forming a semiconductor layer having a channel region;
Forming a gate insulating film on the channel region;
On the gate insulating film, forming a gate electrode having an inclined portion whose thickness gradually increases from the end toward the center in the channel length direction;
A source region and a drain region, which are high-concentration impurity regions, are formed in a region not facing the gate electrode of the semiconductor layer, and at the same time, a low-concentration impurity region is formed in a region facing the inclined portion of the gate electrode. And a step of injecting impurities into the semiconductor layer and activating the semiconductor layer.   The method for manufacturing a thin film transistor according to claim 1, wherein a cross section of the gate electrode in a channel length direction is substantially semicircular.   3. The method of manufacturing a thin film transistor according to claim 1, wherein in the step of forming the gate electrode, the thickness of the inclined portion is determined according to the size of the low concentration impurity region. Forming the gate electrode comprises:
Disposing a droplet containing a conductive material on the gate insulating film;
And a step of drying the droplets by controlling at least one parameter of a solid content concentration of the droplets or a drying speed of each droplet. A method for producing the thin film transistor according to claim. Forming the gate electrode comprises:
Disposing a droplet containing a conductive material on the gate insulating film;
The method of claim 1, further comprising: drying the droplet while controlling convection in the droplet using temperature distribution in the droplet. The manufacturing method of the thin-film transistor of description. In the step of disposing the droplet, the droplet is disposed so that a peripheral portion of the droplet faces the channel region,
6. The method of manufacturing a thin film transistor according to claim 4, wherein, in the step of drying the droplet, the conductive material is deposited on a peripheral portion of the droplet.   The method of manufacturing a thin film transistor according to claim 4, wherein in the step of forming the gate insulating film, the gate insulating film having a flat surface is formed. A semiconductor layer having a channel region and a source region and a drain region facing each other across the channel region;
A gate insulating film provided on the semiconductor layer;
On the gate insulating film, comprising a gate electrode having an inclined portion that gradually increases in thickness from the end toward the center in the channel length direction,
The region of the semiconductor layer that does not face the gate electrode is the source region and drain region of the high concentration impurity region, and the region of the semiconductor layer that faces the inclined portion of the gate electrode is a low concentration impurity region. A thin film transistor characterized in that:   The thin film transistor according to claim 8, wherein a cross section of the gate electrode in a channel length direction is substantially semicircular.   An electro-optical device comprising the thin film transistor according to claim 8. An electronic apparatus comprising the thin film transistor according to claim 8.

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