JP2006005231A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device that can reduce damages to the substrate or the influence on the environment, and to work a resin layer to a planarized state as a protective film, at a low cost without complicated steps. <P>SOLUTION: A post electrode 2 is formed on a semiconductor substrate 1 wherein an integrated circuit is formed. Next, a resin 3 is applied over the post electrode 2 and the surface of the semiconductor substrate 1. Then, the surface of the resin 3 is polished by mechanical grinding of a back grinding device or the like, to expose the top of the post electrode 2 therefrom. The resin 3 is heated and decomposed in an oxygen-containing atmosphere, to expose the sidewall of the post electrode 2, and plating 4 is stuck on the exposed part. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device in WL-CSP (Wafer Level Chip Size Package). In particular, the present invention relates to a method for manufacturing a semiconductor device in which problems relating to etching of a resin layer serving as a protective film are improved.

  The semiconductor manufacturing process is largely divided into a pre-process for forming an integrated circuit (IC) on a wafer and a post-process for packaging a chip processed in the pre-process. There is WL-CSP as a technique used in the subsequent process. WL-CSP is a space-saving package that realizes the ultimate miniaturization, thickness reduction, and weight reduction, in which the package size is the same real chip size as the chip size. The WL-CSP also has an advantage that batch processing can be performed in the wafer state in the pre-process and the post-process.

  FIG. 3 shows a method of manufacturing a semiconductor device in a conventional WL-CSP. In the figure, each process is illustrated as a cross-sectional view. An integrated circuit is formed on the semiconductor substrate 1 in advance in the previous process, but is not shown in FIG. First, a photosensitive film is applied on the semiconductor substrate 1, and exposure and development are performed to selectively form openings. And after making copper adhere to an opening part by electroplating, the photosensitive film is removed and the post electrode 2 for electrical connection with the exterior is formed.

  Subsequently, in order to protect the post electrode 2 and the semiconductor substrate 1 from mobile ions such as alkali metal ions and moisture (humidity), a resin 3 such as an epoxy resin is applied so as to cover the surface of the post electrode 2 and the semiconductor substrate 1. When applied, the structure shown in FIG. 3A is formed. In the resin 3, a resin component made of an epoxy resin or the like includes a filler made of silica or the like and a curing agent. The filler is included to bring the linear expansion coefficient of the resin 3 close to the linear expansion coefficient of the semiconductor substrate 1 and to improve the thermal conductivity of the resin 3. Further, a curing agent is included to heat and cure the resin 3. Subsequently, when the surface of the resin 3 is polished (ground) by mechanical grinding using a back grinding apparatus or the like, the top of the post electrode 2 is exposed to the surface, and the height of the post electrode 2 is made uniform. The structure shown in FIG. 3B is formed.

  Subsequently, when the chip is soldered to the substrate, the exposed top of the post electrode 2 is plated in order to improve the wettability of the solder and increase the adhesion strength with the solder. When a metal such as gold and nickel is attached to the post electrode 2 to form the metal plating layer 4, the structure shown in FIG. 3C is formed. At this time, plating is selectively performed only on the post electrode 2. Although not shown, when the wafer is subsequently diced and divided into individual chips, a packaged semiconductor device is completed. Each semiconductor device is soldered on a printed circuit board, for example.

  The semiconductor device manufactured by the above manufacturing method has high utility value as a semiconductor device for an electronic device that is required to be reduced in size and thickness. One example is a discrete semiconductor device such as a diode / transistor or a semiconductor integrated circuit. For example, when a p-type Si substrate is used as the semiconductor substrate 1 in FIG. 3 and impurities are implanted into the surface thereof to selectively form an n-type region, a lateral pn junction is formed. Then, post electrodes are formed on the p-type and n-type regions, respectively, and packaging is performed by the above-described method, thereby completing the diode.

The applicant forms the structure shown in FIG. 4A similar to FIG. 3A, and then polishes the surface of the resin 3 to form the structure shown in FIG. 4B, followed by H _2. The resin 3 is etched using a chemical solution such as SO ₄ to expose the top and side walls of the post electrode 2 to form the structure shown in FIG. 4C, and the metal plating layer 4 is formed on the post electrode 2 Then, a semiconductor device manufacturing method for forming the structure shown in FIG. 4D was devised (Japanese Patent Application No. 2003-354079). According to this manufacturing method, since the metal plating layer 4 is also formed on the side wall portion of the post electrode 2, the adhesive strength between the semiconductor device and the substrate can be increased. Patent Document 1 discloses a semiconductor device connection method in which a post electrode is formed on a semiconductor substrate, the surface of the semiconductor substrate and the post electrode is covered with an insulating film, and then the post electrode is exposed by etching the insulating film. Are listed.
Japanese Patent Laid-Open No. 10-340923

However, in the semiconductor device manufacturing method described above, the resin layer serving as the protective film is etched, and thus there are problems as described below. When the resin layer is etched by dry etching using reactive ions (plasma), there are the following problems.
(1) The substrate is damaged by the plasma.
(2) Since a special etching gas is used, the cost increases and the used gas exhausted into the atmosphere after the reaction has a great influence on the environment.

Further, when the resin layer is etched by liquid etching (wet etching) using a chemical solution, there are the following problems.
(1) The cost of the chemical solution is high.
(2) A complicated process such as cleaning after etching is required, which takes time.
(3) It is difficult to gradually decompose the resin, and since the decomposition starts at a certain time, it is difficult to control the etching rate.
(4) A region where the progress of etching is partly fast is likely to occur, and it is difficult to uniformly form the thickness of the resin layer over the entire semiconductor substrate. For example, when the resin layer is etched by chemical etching, the flatness of the surface of the resin 3 is lost as shown in FIG.

  The present invention has been made in view of the above-described problems, and reduces the damage to the substrate and the influence on the environment, and reduces the cost of the resin layer serving as a protective film without requiring a complicated process. An object of the present invention is to provide a method for manufacturing a semiconductor device that can be processed flatly.

  The present invention has been made to solve the above problems, and the invention according to claim 1 includes a step of forming a post electrode on a semiconductor substrate, and a protective film for protecting the semiconductor substrate and the post electrode. A part of the protective film is removed by forming on the semiconductor substrate, polishing the protective film until the post electrode is exposed, and thermally decomposing the protective film in an oxygen-containing atmosphere. And a step of exposing a side wall of the post electrode.

  The invention according to claim 2 includes a step of forming a post electrode on a semiconductor substrate, a step of forming a protective film for protecting the semiconductor substrate and the post electrode on the semiconductor substrate, and the oxygen-containing atmosphere. And a step of removing the protective film by exposing the post electrode by thermally decomposing the protective film.

  According to a third aspect of the present invention, in the method of manufacturing a semiconductor device according to the second aspect, in the step of exposing the post electrode, a part of the protective film is removed until a side wall of the post electrode is exposed. It is characterized by.

  According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device according to any one of the first to third aspects, the method further comprises a step of plating the surface of the post electrode. .

  According to the present invention, since the protective film is thermally decomposed in an oxygen-containing atmosphere, the damage to the substrate and the influence on the environment are reduced, and the resin that becomes the protective film without requiring a complicated process The effect that the layer can be processed flat at low cost is obtained.

  The best mode for carrying out the present invention will be described below with reference to the drawings. FIG. 1 is a schematic process diagram showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention. In the figure, each process is illustrated as a cross-sectional view. In the figure, a semiconductor substrate 1 is a semiconductor substrate such as silicon. Note that an integrated circuit is formed in advance on the semiconductor substrate 1 in the previous step of the semiconductor manufacturing process, but is not shown in FIG. A photosensitive film is applied onto the semiconductor substrate 1, and exposure and development are performed to selectively form openings. A photoresist may be used instead of the photosensitive film.

  Then, after making copper adhere to an opening part by electroplating, the photosensitive film is removed and the post electrode 2 for electrical connection with the outside is formed. Then, in order to protect the post electrode 2 and the semiconductor substrate 1 from mobile ions such as alkali metal ions and moisture (humidity), a resin 3 such as an epoxy resin is applied so as to cover the surface of the post electrode 2 and the semiconductor substrate 1. Then, the structure shown in FIG. 1A is formed. Note that a metal such as gold, nickel, or palladium may be used as the post electrode 2. Further, a polyimide resin may be used as the resin 3.

  In the application of the resin 3, a liquid resin is quantitatively dropped onto the semiconductor substrate 1, and spin coating is performed using a spinner (rotation speed: 1000 rpm to 3000 rpm). After the application, the resin 3 is pre-baked on a hot plate at 80 ° C. for 2 hours, followed by baking at 150 ° C. for 3 to 6 hours to cure the resin 3. The rotation speed of the spinner and the temperature / time when the resin 3 is baked are merely examples, and the present invention is not limited thereto. Further, as a method for forming the resin 3, a dispenser or a printing technique may be used instead of the above-described spinner. For baking the resin 3, a clean oven or the like may be used instead of a hot plate.

  Subsequently, when the surface of the resin 3 is polished by mechanical grinding using a back grinding apparatus or the like, and the top of the post electrode 2 is exposed to the surface, the structure shown in FIG. 1B is formed. Thereby, the height of the post electrode 2 can be made uniform. The height of the post electrode 2 is, for example, about 30 μm. Note that mechanical / chemical polishing using a CMP (Chemical Mechanical Polishing) apparatus may be performed as polishing of the resin 3.

  Subsequently, a hot plate heated to about 400 ° C. is prepared, and the semiconductor substrate 1 on which the resin 3 is formed is placed on the hot plate in an oxygen-containing atmosphere (such as in the air) for several tens of seconds to several minutes. Thereby, the resin 3 containing an organic substance reacts with oxygen and thermally decomposes, and the upper surface side of the resin 3 is removed. As a result, as shown in FIG. 1C, the top (upper surface) and the side wall (side surface) of the post electrode 2 are exposed. The height of the exposed portion of the post electrode 2 is, for example, 10 μm.

  Subsequently, when the chip is soldered to the substrate, in order to improve the wettability of the solder and increase the adhesion strength with the solder, the top and side portions of the exposed post electrode 2 are plated. When metal such as gold and nickel is attached to the post electrode 2, the structure shown in FIG. 1 (d) is formed. At this time, plating is selectively performed only on the post electrode 2. The thickness of the metal attached to the post electrode 2 by the plating process is, for example, about 1 μm. Although not shown, when the wafer is subsequently diced and divided into individual chips, a packaged semiconductor device is completed. Each semiconductor device is soldered on a printed circuit board, for example.

  According to the semiconductor device manufacturing method described above, since the resin 3 is processed by thermal decomposition in an oxygen-containing atmosphere without using reactive ions (plasma), the semiconductor substrate 1 is not damaged. Moreover, since the resin 3 is processed without using a special etching gas, the cost is low and the influence on the environment can be greatly reduced. Further, since the resin 3 is processed without using a chemical solution, the cost is low, a complicated process is not required, and labor during manufacturing can be reduced. In addition, by controlling the temperature and time during heating, the amount of molecules to be gasified can be controlled and the resin 3 can be gradually decomposed. Therefore, the removal amount of the resin 3 and the processed resin 3 The thickness can be easily controlled, and processing with excellent flatness can be performed. Therefore, the protruding height of the post electrode 2 relative to the resin 3 can be controlled with high accuracy.

  Next, a second embodiment of the present invention will be described. FIG. 2 is a schematic process diagram illustrating the method of manufacturing the semiconductor device according to the present embodiment. Hereinafter, a method for manufacturing the semiconductor device will be described with reference to FIG. The processing in FIG. 2A is the same as that in FIG. Subsequently, a hot plate heated to about 400 ° C. is prepared, and several semiconductor substrates 1 on which the resin 3 is formed are placed on the hot plate in an oxygen-containing atmosphere (such as in the air) as in the first embodiment. Place for 10 seconds to several minutes. As a result, as shown in FIG. 2B, the top and side walls of the post electrode 2 are exposed. The height of the exposed portion of the post electrode 2 is, for example, 10 μm.

  Although not shown, when plating is performed on the exposed top and side walls of the post electrode 2, the structure shown in FIG. 2C is formed. Subsequently, when the wafer is diced and divided into individual chips, a packaged semiconductor device is completed. Each semiconductor device is soldered on a printed circuit board, for example.

  According to the semiconductor device manufacturing method described above, the following effects can be obtained in addition to the effects of the first embodiment. That is, since the step of polishing the resin 3 using the back grinding apparatus or the CMP apparatus as in the first embodiment is eliminated, the resin 3 can be processed at a lower cost without using an expensive apparatus. it can. Further, when the resin 3 is polished as in the first embodiment, if the post electrode 2 is non-uniform in height, the cutting blade of the back grinding apparatus contacts the higher post electrode 2 and the post electrode 2 2 may be damaged, but according to the manufacturing method of the present embodiment, the post electrode 2 is not damaged.

  Hereinafter, other effects of the present embodiment will be described. The resin 3 covering the surface of the post electrode 2 and the semiconductor substrate 1 contains a filler and a curing agent made of silica or the like in a resin component made of an epoxy resin or the like. The filler is included to bring the linear expansion coefficient of the resin 3 close to the linear expansion coefficient of the semiconductor substrate 1 and to improve the thermal conductivity of the resin 3. Further, a curing agent is included to heat and cure the resin 3.

  Here, the filler contained in the resin 3 is composed of spherical particles such as silica, and when the upper surface of the resin 3 is polished by mechanical grinding, the filler is peeled off from the surface of the resin 3 by polishing. A concave portion is formed on the surface of the resin 3. When the recess reaches the surface of the semiconductor substrate 1, a pinhole (through hole) is formed, and this pinhole causes deterioration of moisture resistance of the semiconductor device. Conventionally, it has been necessary to form the resin 3 with a large thickness, for example, 40 μm or more so that the deterioration of characteristics due to such pinholes can be surely prevented. However, forming the resin 3 thick impairs the effect of thinning the WL-CSP.

  On the other hand, according to the manufacturing method of the semiconductor device according to the present embodiment, no forced mechanical external force is applied to the filler contained in the resin 3, and the silica covered with the resin 3 is held by the resin 3 as it is. Therefore, it is possible to prevent the filler from peeling off from the surface of the resin 3 relatively well, and to prevent generation of pinholes in the resin 3. Therefore, the thickness of the resin 3 can be further reduced.

  In this embodiment, the side wall of the post electrode 2 is not exposed, and the thermal decomposition of the resin 3 is terminated when the top of the post electrode 2 is exposed, and then the top of the post electrode 2 is plated. You may do it.

In the first or second embodiment described above, before the post electrode 2 is plated, the semiconductor substrate 1 is impregnated with an aqueous HF solution or a mixed solution of HF and NH ₄ F to thereby form the resin 3. It is desirable to remove the silica remaining on the surface and to wash the surface of the resin 3 with pure water.

  In the thermal decomposition of the resin 3 according to the first or second embodiment described above, when the resin 3 is heated to around 400 ° C., the decomposition rate reaches a peak. When the resin 3 is thermally decomposed, it is desirable to heat the resin 3 at a temperature within the range of 300 ° C to 500 ° C. In the embodiment described above, the semiconductor substrate 1 is placed on the hot plate and the resin 3 is thermally decomposed. However, the semiconductor substrate 1 is placed in a quartz tube such as a diffusion furnace, and oxygen is added. The resin 3 may be decomposed by heating while being supplied. Furthermore, although the resin 3 is thermally decomposed after the resin 3 is completely cured, the resin 3 may be thermally decomposed before the resin 3 is completely cured. In this case, since the removal and curing of the resin 3 can proceed simultaneously, the running time can be reduced.

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings, but the specific configuration is not limited to these embodiments, and includes design changes and the like within a scope not departing from the gist of the present invention. It is.

It is a schematic process drawing which shows the manufacturing method of the semiconductor device by the 1st Embodiment of this invention. It is a schematic process drawing which shows the manufacturing method of the semiconductor device by the 2nd Embodiment of this invention. It is a schematic process drawing which shows the manufacturing method of the conventional semiconductor device. It is a schematic process drawing which shows the manufacturing method of the semiconductor device which this applicant devised. It is a reference figure for demonstrating the problem at the time of the process of the protective film by the manufacturing method of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... Post electrode, 3 ... Resin, 4 ... Metal plating layer.

Claims (4)

Forming a post electrode on a semiconductor substrate;
Forming a protective film on the semiconductor substrate for protecting the semiconductor substrate and the post electrode;
Polishing the protective film until the post electrode is exposed;
Removing the part of the protective film by thermally decomposing the protective film in an oxygen-containing atmosphere, exposing the side wall of the post electrode;
A method for manufacturing a semiconductor device, comprising: Forming a post electrode on a semiconductor substrate;
Forming a protective film on the semiconductor substrate for protecting the semiconductor substrate and the post electrode;
Removing the part of the protective film by thermally decomposing the protective film in an oxygen-containing atmosphere to expose the post electrode;
A method for manufacturing a semiconductor device, comprising:   3. The method of manufacturing a semiconductor device according to claim 2, wherein in the step of exposing the post electrode, a part of the protective film is removed until a side wall of the post electrode is exposed. The method for manufacturing a semiconductor device according to claim 1, further comprising a step of plating the surface of the post electrode.

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