JP2006003102A - Semiconductor pressure sensor and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To attain a high sensitivity while securing sufficient strength to a diaphragm in a small semiconductor pressure sensor. <P>SOLUTION: The diaphragm 1 capable of displacement under measurement pressure is formed by an n-type silicon single crystal region 2 and insulation films formed on its surface and rear face. In the n-type silicon single crystal region 2, the dispersed resistance layer 7 functioning as a deformation detector is formed at the part of the diaphragm 1. The total film thickness of the SiO film 4 and the SiN film 5 being the insulation films formed on the surface of the dispersed resistance layer 7 of the n-type silicon single crystal region 2 is thinner than the film thickness of the SiON film 3 of the insulation film of the rear surface. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor pressure sensor, in particular, a resistance type pressure sensor using a diaphragm, and a manufacturing method thereof.

  2. Description of the Related Art Conventionally, semiconductor pressure sensors using a detection element such as a capacitive type or a piezoresistive type as a main configuration are known. Among them, a semiconductor pressure sensor using a silicon substrate that can be made into one chip and forming a piezoresistive detection element that is easy to produce is used for various applications, and its measurement pressure range is wide.

  FIG. 7 is a cross-sectional view schematically showing a configuration of a conventional pressure sensor using a capacitive detection element disclosed in Patent Document 1. As shown in FIG. This pressure sensor has a detection element unit 50 formed using a silicon substrate 51. In the detection element unit 50, a diaphragm 52 is formed by thinning the silicon substrate 51 so as to be easily displaced. When a pressure to be measured is applied to the diaphragm 52, the distortion of the diaphragm 52 due to the pressure is detected via the detection element, and the pressure can be measured by the detection signal. Insulating films 53 and 54 are formed on the front and back of the diaphragm 52 so that distortion due to thermal stress is less likely to occur. The insulating films 53 and 54 are similarly formed of the same material.

Also, in the pressure sensor using the resistance type detection element 61, as shown in FIG. 8, the front and back of the diaphragm 60 are similarly formed on the front and back of the diaphragm 60 using the SIMOX (Separation by IMplanted OXygen) technique. A pressure sensor having a structure sandwiched between 62 and 63 is disclosed in Patent Document 2.
JP 09-196786 A Japanese Patent Laid-Open No. 05-3328 Japanese Patent Laid-Open No. 05-211128

  In recent years, semiconductor pressure sensors have been considered to be used for in-vivo pressure measurement and used in micromachines. For this reason, semiconductor pressure sensors are formed very small, and the There is a demand for higher sensitivity. In particular, a configuration using silicon technology that can be made into one chip is suitable for such an application, but in order to reduce the size of the sensor in such a configuration, the diaphragm needs to be very small. .

In general, the change in the detection signal in the semiconductor pressure sensor increases as the change in the stress of the diaphragm when pressure is applied increases, and as a result, high sensitivity is easily obtained. For example, when a piezoresistive element is used, the magnitude of the resistance change that changes the detection signal is a value proportional to the product of the piezoresistance coefficient and the stress. On the other hand, the maximum stress of the diaphragm is proportional to (h / a) ² where the length of one side of the diaphragm is h and the thickness of the diaphragm is a. Therefore, pressure is applied when the area of the diaphragm is reduced. The amount of change in the stress of the diaphragm at the time is greatly reduced, and the sensitivity is greatly reduced. Therefore, when the diaphragm has a small area, it is preferable to improve the sensitivity by making the thickness of the diaphragm very thin.

  However, in a resistance type detection element, that is, a semiconductor pressure sensor using a piezoresistor, a sandwich structure in which an insulating film is formed on the front and back of a silicon layer when the thickness of the diaphragm is reduced to improve sensitivity, particularly when the thickness is less than 3 μm. In this diaphragm, the position of the piezoresistive portion comes near the center of the diaphragm in the thickness direction where stress is hardly applied, which leads to a decrease in sensitivity. In addition, if the film is thinned to improve sensitivity, the structure of silicon becomes insufficient in structure, and it becomes difficult to maintain a tensioned state as a diaphragm. Further, when the film thickness is reduced, the influence of the film thickness unevenness on the sensitivity unevenness is increased. Therefore, it is required to suppress the absolute value of the film thickness unevenness as much as possible.

  The present invention has been made to solve the above-mentioned problems, and an object of the present invention is a highly compact semiconductor pressure sensor with a high sensitivity and high accuracy even though the diaphragm has a sufficient strength. A semiconductor pressure sensor and a manufacturing method thereof are provided.

  In order to achieve the above-described object, a semiconductor pressure sensor according to the present invention includes a first conductivity type single crystal semiconductor substrate and at least one second conductivity type strain detection formed on the surface side of the single crystal semiconductor substrate. The single crystal semiconductor substrate at least partially forms a diaphragm that can be displaced by applying a pressure to be measured, and the measurement is performed by detecting the displacement of the diaphragm using a strain detection element. In a semiconductor pressure sensor that measures pressure, an insulating film is formed on the front and back surfaces of at least a portion of the single crystal semiconductor substrate that constitutes the diaphragm. The insulating film is thicker.

  According to this configuration, even if the diaphragm is thinned, sufficient strength can be obtained by the insulating films on the front and back sides, and the thickness of the insulating film on the front side is thinner than the thickness of the insulating film on the back side. The position of the strain detection element formed on the surface of the crystalline semiconductor substrate is a position biased toward the surface side of the diaphragm.

  The method for producing a semiconductor pressure sensor according to the present invention includes a step of forming a first conductive type non-porous single crystal semiconductor layer on the porous layer of a first substrate having a porous layer, and a non-porous single-crystal semiconductor layer. A step of bonding the crystalline semiconductor layer to the second substrate through an insulating film to form a bonded body, a step of separating the bonded body by separating the porous layer in its thickness direction, Removing the portion of the porous layer left on the porous single crystal semiconductor layer, and the second conductivity type from the surface of the non-porous single crystal semiconductor layer exposed by removing the porous layer; A step of forming a diffusion resistance layer; a metal wiring constituting a detection circuit including the diffusion resistance layer on a surface of the non-porous single crystal semiconductor layer on which the diffusion resistance layer is formed; and a total thickness of the non-porous Forming an insulating film thinner than the insulating film between the porous single crystal semiconductor layer and the second substrate Etching removes the surface of the second substrate from the surface opposite to the surface bonded to the non-porous single crystal semiconductor layer through the insulating film to form a diaphragm that can be displaced by the pressure to be measured And a step of performing.

  According to this manufacturing method, a thin diaphragm with high film thickness uniformity can be formed.

  According to the present invention, in the semiconductor pressure sensor diaphragm, by forming the insulating films on the front and back surfaces of the single crystal semiconductor substrate, sufficient strength can be ensured even if it is extremely thin. In addition, since the thickness of the insulating film on the surface of the single crystal semiconductor substrate on which the strain detecting element is formed is thinner than the thickness of the insulating film on the back surface, the strain detecting element is likely to be stressed during pressure measurement. It is arranged at a position deviated from the center in the film thickness direction, whereby stress is effectively applied to the strain resistance element, and high sensitivity can be achieved.

Embodiments of the present invention will be described below with reference to the drawings.
(First embodiment)
1 and 2 are schematic views of the semiconductor pressure sensor according to the first embodiment of the present invention. FIG. 1 is a sectional view in the thickness direction of the diaphragm, and FIG. 2 is an arrangement of a main part in a plane parallel to the diaphragm. It is a schematic diagram which shows.

  This semiconductor pressure sensor has a p-type diffusion resistance layer 7 formed in the n-type silicon single crystal region 2 as a piezoresistive element that functions as a strain detection element. Four p-type diffusion resistance layers 7 are formed in a predetermined plane pattern, and an oxide film, that is, an SiO film is formed on the surface of the n-type silicon single crystal region 2 where the p-type diffusion resistance layers 7 are formed. 4 is formed. On the SiO film 4, an Al metal wiring (generally, it may be simply a metal wiring) 6 is formed in a predetermined plane pattern. The Al metal wiring 6 is connected to the p-type diffusion resistance layer 7 through a contact hole 4a formed on the p-type diffusion resistance layer 7 of the SiO film 4, and the Al metal wiring layer 6 and the four p-type diffusion resistances are connected. The layer 7 forms a Wheatstone bridge circuit as a detection circuit. A SiN film 5 is further formed on the SiO film 4 on which the Al metal wiring 6 is formed. Although not shown, the SiN film 5 has an opening for exposing the Al metal wiring 6 at a predetermined position, and this portion is used as a pad for connection to an external circuit.

  A SiON film 3 is formed on the back surface of the n-type silicon single crystal region 2 opposite to the p-type diffusion resistance layer 7 formed thereon, and a support member is bonded to the back surface of the SiON film 3. ing. The support member has a central region cut away, and the SiON film 3 is exposed in this region. That is, in this region, the diaphragm 1 is formed as a thin film in which only the n-type silicon single crystal region 2 and the front and back insulating films are left, and the remaining portion of the support member supports the diaphragm 1. It is part 8.

  As shown in FIG. 2, two p-type diffusion resistance layers 7 facing each other are formed on the diaphragm 1, and these diaphragms are subjected to a strong compressive stress when a pressure is applied to the diaphragm 1. 1 near the edge. The other two p-type diffusion resistance layers 7 are formed across the diaphragm 1 and the region on the support portion 8. According to this configuration, when pressure is applied to the diaphragm 1, the diaphragm 1 is distorted and stress is generated, whereby the piezoresistance coefficient of each p-type diffusion resistance layer 7 changes, that is, the resistance value changes. As a result, the output of the Wheatstone bridge circuit formed by the p-type diffusion resistance layer 7 and the Al metal wiring 6 changes, and thereby the pressure can be detected.

  In the present embodiment, the planar shape of the diaphragm 1 is a substantial square whose one side is 400 μm. The thickness of each layer is 3.0 μm for the n-type silicon single crystal region 2, 1 μm for the SiON film 3 on the back surface, 200 nm for the SiO film 4 on the front surface, and 200 nm for the SiN film. Therefore, the total thickness of the insulating films (SiON film 3 and SiO film 4) on the surface of the diaphragm 1 is 400 nm, which is smaller than the thickness of the insulating film (SiON film 3) on the back surface. The p-type region forming the p-type diffused resistance layer 7 has a pn junction boundary at a depth of 300 nm from the surface of the n-type silicon single crystal region 2.

The linear expansion coefficient of each insulating film can be adjusted to some extent depending on the manufacturing method. The linear expansion coefficient of each insulating film in this embodiment is 2.9 × 10 ⁻⁶ / K for the SiON film 3, and the SiO film 4. Is 1.9 × 10 ⁻⁶ / K and the SiN film 5 is 3.1 × 10 ⁻⁶ / K, and the linear expansion coefficient is larger than that of the n-type silicon single crystal region 2. Accordingly, when the temperature is changed from a high temperature during manufacture to a temperature during use, a tensile stress is applied to the n-type silicon single crystal region 2 as a whole, whereby the diaphragm 1 is stretched. Yes.

  In the semiconductor pressure sensor of this embodiment, the p-type diffusion resistance layer 7 is seen in the thickness direction of the diaphragm 1 because the insulating film on the back surface side is thicker than the insulating film on the front surface side of the diaphragm 1. It is arranged at a position biased to the surface side. When pressure is applied to the diaphragm 1, generally, when viewed in the thickness direction of the diaphragm 1, a relatively large stress is generated at a position that is biased to either the front or back as compared to the vicinity of the center. Therefore, in the configuration of the present embodiment, the p-type diffusion resistance layer 7 is effectively stressed by disposing the p-type diffusion resistance layer 7 at a position biased toward the surface side when viewed in the thickness direction of the diaphragm 1. , Sensitivity can be improved. In particular, in the configuration of the present embodiment, a semiconductor pressure in which a 1 μm SiN insulating film is provided as a protective layer on the surface side of the n-type silicon single crystal region 2 and the thickness of the surface insulating film is substantially the same as that of the back surface insulating film. It was confirmed that the sensitivity was improved by 10% compared with the sensor, and the linearity was also good.

  Next, the manufacturing method of the semiconductor pressure sensor of this embodiment is demonstrated with reference to FIG.

  First, an SOI (Silicon On Insulator) substrate is formed by a bonding method. That is, first, a 1 μm thick SiON film 3 is formed on an n-type first silicon substrate 10 by a plasma CVD (Chemical Vapor Deposition) method. Then, after the p-type second silicon substrate 11 is overlaid in contact with the SiON film 3, heat treatment is performed at 1100 ° C. for 1 hour in a nitrogen atmosphere or an oxidizing atmosphere to improve the bonding strength, thereby improving the SOI substrate. Is formed (FIG. 3A).

Next, the n-type first silicon substrate 10 is scraped by a polishing method to form an n-type silicon single crystal region 2 leaving a thickness of about 3 μm. Next, an oxide film 12 is formed to 30 nm on the n-type silicon single crystal region 2. A resist is applied to the oxide film 12 to pattern a portion for forming the p-type diffusion resistance layer 7. Then, BF ₂ is ion-implanted at an acceleration voltage of 60 KV and a dose amount of 5 × 10 ¹³ / cm ² to form the p-type diffusion resistance layer 7 (FIG. 3B).

  Next, after activation by heat treatment at 1000 ° C. for 30 minutes in nitrogen, the oxide film 12 is removed in a cleaning process, and then a 200 nm SiO film 4 is formed by plasma CVD. Then, after the contact hole 4a is formed in the SiO film 4 by patterning and dry etching, an Al metal wiring 6 is formed by sputtering to form a Wheatstone bridge circuit. Further, after a 200 nm SiN film 5 is deposited on the surface by plasma CVD, a portion that becomes an opening (not shown) of the pad is patterned, and a part of the Al metal wiring 6 is exposed by dry etching (FIG. 3C). )).

Next, 3 μm of plasma oxide film 13 is deposited on the back surface as a mask for ICP-RIE etching (Inductively-Coupled Plasma Reactive Ion Etching). Then, a resist is applied, and a portion to be the diaphragm 1 is patterned in accordance with the formation pattern of the p-type diffusion resistance layer 7 on the surface (FIG. 3D). Next, the second silicon substrate 11 is etched by ICP-RIE by a Bosch process using SF ₆ and C ₄ F ₈ gases. The stopper at this time is the SiON film 3 which is an insulating film formed by bonding.

  With such a manufacturing method, while the diaphragm 1 is as small as 400 μm on one side, the total film thickness of the diaphragm 1 is thin while ensuring sufficient strength, and particularly the thickness of the n-type silicon single crystal region 2 is 3 μm or less, Further, it is possible to form the diaphragm 1 in which the p-type diffusion resistance layer 7 functioning as a strain detection element is disposed at a position where stress is easily applied when pressure is applied, which is biased toward the surface of the diaphragm 1 in the film thickness direction. Thereby, a highly sensitive semiconductor pressure sensor can be produced.

  Note that this embodiment exemplifies the present invention, and the detailed film configuration is not particularly limited to that shown in this embodiment. For example, the back insulating film may be formed from a plurality of films. Structurally, any structure may be used as long as the insulating film on the back surface is thicker than the insulating film on the front surface and the diffusion resistance layer is relatively displaced from the central portion of the diaphragm 1 in the surface direction. As the diaphragm 1 becomes thinner, the thickness of the insulating film greatly affects the sensitivity.

Furthermore, although depending on the thickness of the silicon layer and the size of the diaphragm 1, when the diaphragm 1 is thinned for high sensitivity, a film that applies tensile stress to silicon to stretch the diaphragm 1, that is, thermal expansion. It is important to form the insulating film with a material having a smaller coefficient than that of silicon. In general, when a silicon substrate is used, although depending on the manufacturing method, the insulating film that acts on the tensile stress can be formed of a silicon insulating film containing nitrogen, such as a SiN film, a SiON film, LP (low pressure) formed by a plasma CVD method. ) -Si ₃ N ₄ film formed by the CVD method is suitable, but it goes without saying that it is not particularly limited thereto.

As an example of the manufacturing method, an example in which an SOI substrate manufactured by a bonding method is used has been shown. However, the manufacturing method is not particularly limited. For example, a method using an ion implantation method disclosed in Patent Document 3 or a SIMOX method is used. You may use. Furthermore, instead of the SOI substrate, a normal wafer may be used to form the diaphragm 1 by an etching technique such as anisotropic etching.
(Second Embodiment)
FIG. 4 is a sectional view of a semiconductor pressure sensor according to the second embodiment of the present invention. In the figure, the same parts as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. The planar pattern of the diaphragm 1, the p-type diffusion resistance layer 7, and the Al metal wiring 6 is the same as that in the first embodiment, and detailed description thereof is omitted.

In the semiconductor pressure sensor of the present embodiment, the size of the diaphragm 1 is about 100 μm on one side, and the thickness of the n-type silicon single crystal region 2 is 1.0 μm. An Si ₃ N ₄ film 15 is formed on the back surface of the n-type silicon single crystal region 2 and has a thickness of 400 nm. A thermal oxide film, that is, an SiO ₂ film 16 is formed on the surface of the n-type silicon single crystal region 2, and the film thickness thereof is 50 nm, and the film thickness of the SiN film 5 formed on the SiO ₂ film 16 is 50 nm. is there. Therefore, the thickness of the insulating film (Si ₃ N ₄ film 15) on the back surface side is larger than the total thickness of the insulating films (SiO ₂ film 16 and SiN film 5) on the front surface side. The p-type region of the p-type diffused resistance layer 7 has a pn junction boundary at a position 300 nm from the surface. The linear expansion coefficient of each insulating film is 3.6 × 10 ⁻⁶ / K for the Si ₃ N ₄ film 15, 5 × 10 ⁻⁷ / K for the SiO ₂ film 16, and 2.2 × 10 ^{−6 for the} SiN film 5. / K, and the linear expansion coefficient of the Si ₃ N ₄ film 15 is larger than the linear expansion coefficient of the n-type silicon single crystal region 2. As a result, a tensile stress is applied to the n-type silicon single crystal region 2 as a whole, and the diaphragm 1 can be stretched.

  FIG. 5 shows a semiconductor pressure sensor of a comparative example in which a SiN insulating film having a thickness of 400 nm is provided as a protective layer on the surface, and the thickness of the insulating film on the front surface is almost the same as that of the insulating film on the back surface. About a sensor, the output characteristic when a pressure is applied in the pressure range of 0-100 kPa is shown. Compared with the comparative example having 400 nm insulating films on both sides, in the configuration of this embodiment, the p-type diffusion resistance layer 7 is more likely to be stressed. As a result, the output value becomes large, that is, high sensitivity can be obtained. . As can be seen from FIG. 5, although depending on the pressure value, according to the present embodiment, an output value about four times that of the comparative example is obtained.

Further, when a thermal oxide film is formed on the back surface instead of the Si ₃ N ₄ film 15, the diaphragm 1 cannot be stretched due to the thermal expansion coefficient, and the output characteristics are greatly deteriorated. . That is, it is preferable to provide an insulating film on the back surface that has a linear expansion coefficient larger than that of the n-type silicon single crystal region 2 and applies a tensile force to the n-type silicon single crystal region 2.

  Next, the manufacturing method of the pressure sensor of this embodiment will be briefly described with reference to FIG. FIG. 6 is a schematic view showing the manufacturing method of the present embodiment, and is shown in the form of a sectional view of the diaphragm 1 in the thickness direction.

First, a P-type or N-type first single crystal Si substrate (first base) 20 having a specific resistance of 0.01 to 0.02 Ω · cm is prepared. Then, the single crystal Si substrate 10 is anodized in an HF solution to form a porous Si layer (porous layer) 21 (FIG. 6A). The anodizing conditions are as follows.
Current density: 7 (mA · cm ⁻² )
Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
Time: 11 (minutes)
Thickness of porous Si layer: 12 (μm)
As will be described later, the porous Si layer 21 is used to form a high-quality epitaxial Si layer as an n-type single crystal Si layer (non-porous single crystal semiconductor layer) 22 and further used as a separation layer. Yes, it fulfills both functions. The solution used for anodization may be an HF-containing solution, and ethanol may not be used. Ethanol is effective in removing bubbles from the surface, and a chemical other than ethanol may be used as a chemical having this function. As such chemicals, for example, other alcohols such as methyl alcohol and isopropyl alcohol, or surfactants can be used. Further, instead of adding these chemicals, vibration may be applied by ultrasonic waves or the like to desorb bubbles from the surface. The thickness of the porous Si layer 21 is not limited to 12 μm, and can be several hundred μm to about 0.1 μm.

  Next, the substrate is oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. By this oxidation, the inner wall of the porous Si hole is covered with a thermal oxide film.

Next, an n-type single crystal Si layer 22 is epitaxially grown by 1 μm on the porous Si layer 11 by CVD (FIG. 6B). The growth conditions are as follows.
Source gas: SiH ₂ Cl ₂ / H ₂
Gas flow rate: 0.5 / 180 (l / min)
Gas pressure: 80 Torr
Temperature: 950 ° C
Growth rate: 0.3 μm / min
Prior to actual epitaxial growth, baking is carried out in a hydrogen atmosphere in an epitaxial apparatus and / or a very small amount of Si source is supplied to fill and smooth the pore openings on the surface of the porous layer. As a result, even when epitaxial growth is performed on the porous Si layer 21, the n-type single crystal Si layer 22 can be formed as an epitaxial layer having a very low defect density (104 cm ⁻² or less).

Further, a 400 nm Si ₃ N ₄ film 15 is formed on the surface of the n-type single crystal Si layer 22 by LP-CVD (FIG. 6C). At this time, for example, the Si ₃ N ₄ film 15 may be formed after forming a thin thermal oxide film.

Next, a p-type second Si substrate 23 prepared separately from the first single crystal Si substrate 21 is brought into contact with the Si ₃ N ₄ film 15 so as to overlap (FIG. 6D), and a nitrogen atmosphere. Alternatively, heat treatment is performed at 1100 ° C. for 1 hour in an oxidizing atmosphere to improve the bonding strength.

Next, high-pressure pure water is applied at a pressure of 500 kgf / cm ² from a 0.15 mm nozzle of the water jet device to the gap formed by beveling in the porous Si layer 21 portion of the wafer bonded in this manner. Spray from a direction parallel to the bonding interface (surface). that time,
1) The nozzle is scanned in a direction in which high-pressure pure water moves along a gap formed by beveling,
2) The wafer is rotated while being held between the wafer holders so that high-pressure pure water is injected into the gap formed by beveling from all directions of the wafer outer periphery,
3) (1) (2) can be used together,
Then, the wafer is separated into two parts at the porous Si layer 21 over the entire surface of the wafer.

As a result, only a part of the porous Si layer 21 remains on the surface of the first single crystal Si substrate 20, and the Si ₃ N ₄ film 15 originally formed on the first single crystal Si substrate 20, n Part of the single-crystal Si layer 22 and the porous Si layer 21 are transferred onto the second Si substrate.

At this time, instead of separation with a water jet, separation can be performed by gas jet insertion, solid wedge insertion, or a method such as tension, shear force application, or ultrasonic application.
Further, the entire surface of the porous Si layer 21 is obtained by grinding, polishing, etching or the like from the back surface side of the first single crystal Si substrate 20 on the wafer on which the two substrates are bonded without separation. May be expressed. In that case,
a) Grind to the porous Si layer 21 at once. b) Grind to just before the porous Si layer 21 and remove the remaining bulk Si by RIE (dry etching) or wet etching. c) The porous Si layer 21 The entire bulk Si layer 21 is exposed by grinding until just before and removing the remaining bulk Si by polishing.

  Next, only the porous Si layer 21 of the substrate on which the porous Si layer 21 is exposed is selectively etched uniformly. The etching method at this time will be described below.

  As the etching solution, a mixed solution of 49% hydrofluoric acid, 30% hydrogen peroxide water and water is used. Other etchants may be used as long as the etchant has an etching effect on Si. Thus, the single crystal Si portion remains without being etched, and only the porous Si portion is selectively etched using the single crystal Si layer 22 portion as an etching stop material and can be completely removed. That is, the etching rate of the non-porous Si single crystal with respect to the etching solution is extremely slow compared with the etching rate of porous Si, and the etching amount in the non-porous layer is practically negligible (several tens of angstroms). be able to.

In this manner, an SOI substrate in which the n-type silicon single crystal region 2 is formed as a single crystal Si layer having a thickness of 1 μm on the Si ₃ N ₄ film 3 can be formed (FIG. 6E). At this time, in the actual manufacturing process, the single crystal Si layer 20 was not affected by the porous Si selective etching. Further, when the film thickness of the formed single crystal Si layer 20 was measured at 100 points over the entire surface, the film thickness uniformity was 1 μm ± 20 nm. Further, as a result of cross-sectional observation with a transmission electron microscope, it was confirmed that no new crystal defects were introduced into the single crystal Si layer 20 and good crystallinity was maintained.

  Furthermore, heat treatment was performed in hydrogen at 1100 ° C. for 1 hour, and the surface roughness was evaluated with an atomic force microscope. The mean square roughness in a 50 μm square region was approximately 0.2 nm, which is usually commercially available. It was equivalent to the Si wafer. The surface planarization by annealing in hydrogen can be performed without substantially reducing the thickness of the single crystal Si layer 20.

Next, an oxide film 24 was formed to 30 nm on the n-type silicon single crystal region 2 formed by the single crystal Si layer 20 of the SOI substrate. After applying a resist on the oxide film 24 and patterning a portion for forming the p-type diffusion resistance layer 7, BF ₂ is ion-implanted at an acceleration voltage of 60 KV and a dose of 5 × 10 ¹³ / cm ² to form p-type diffusion. The resistance layer 7 is formed (FIG. 6F).

Then, after being activated by heat treatment at 1000 ° C. for 30 minutes in nitrogen, the oxide film 24 is removed by a cleaning process, and then an SiO ₂ film 9 is formed to a thickness of 50 nm by thermal oxidation. A contact hole 16a is formed in the SiO ₂ film 9 by patterning and dry etching, and then an Al metal wiring 6 is formed by sputtering to form a Wheatstone bridge circuit. Further, after depositing 50 nm of SiN film 5 on the surface by plasma CVD, the portion to be the opening of the pad is patterned, and Al metal wiring 6 is exposed from SiN film 5 at this portion by dry etching. Next, after depositing 3 μm of a plasma oxide film for ICP-RIE etching on the back surface, a resist is applied and the plasma oxide film is patterned in accordance with the pattern of the front surface, and a Bosch using SF ₆ and C ₄ F ₈ is used. By the process, the silicon is etched perpendicularly to the back surface of the Si substrate 23 at an angle of approximately 90 degrees to form the diaphragm 1 (FIG. 6G). The etching stopper at this time is the Si ₃ N ₄ film 15.

With such a manufacturing method, while the diaphragm 1 is as small as 100 μm on one side, the total film thickness of the diaphragm 1 is thin while ensuring sufficient strength, and in particular, the thickness of the n-type silicon single crystal region 2 is 3 μm or less. Further, the diaphragm 1 is formed in which the p-type diffusion resistance layer 7 that functions as a strain detection element is biased toward the surface side in the film thickness direction of the diaphragm 1 and is arranged at a position where stress is easily applied when a pressure to be measured is applied. Thus, a highly sensitive semiconductor pressure sensor can be fabricated. Furthermore, according to the manufacturing method of this embodiment, the film thickness unevenness of the diaphragm 1 can be set to 1% or less of the film thickness. Therefore, the semiconductor pressure sensor manufactured by this manufacturing method has (h / a) ² The sensitivity determined by is stable, that is, a highly accurate semiconductor pressure sensor with small sensitivity unevenness can be obtained.

It is sectional drawing which shows the structure of the semiconductor pressure sensor of the 1st Embodiment of this invention. It is a top view of the semiconductor pressure sensor of FIG. It is sectional drawing which shows the manufacturing method of the semiconductor pressure sensor of FIG. It is sectional drawing which shows the structure of the semiconductor pressure sensor of the 2nd Embodiment of this invention. It is a graph which shows the characteristic of the semiconductor pressure sensor of FIG. It is sectional drawing which shows the manufacturing method of the semiconductor pressure sensor of FIG. It is sectional drawing which shows the structure of the semiconductor pressure sensor of a prior art example. It is sectional drawing which shows the structure of the conductor pressure sensor of another prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Diaphragm 2 n-type silicon single crystal region (1st conductivity type single crystal semiconductor substrate)
3 SiON film (insulating film on the back side)
4 SiO film (insulating film on the surface side)
5 SiN film (insulating film on the surface side)
6 Al metal wiring (metal wiring)
7 p-type diffusion resistance layer (second conductivity type strain sensing element)
8 Si ₃ N ₄ film (insulating film on the back side)
9 SiO ₂ film (insulating film on the front side)
20 First single crystal Si substrate (first substrate)
21 Porous Si layer (porous layer)
22 n-type single crystal Si layer (first conductivity type non-porous single crystal semiconductor layer)
23 P-type Si substrate (second substrate)

Claims (12)

A first conductivity type single crystal semiconductor substrate; and at least one second conductivity type strain detection element formed on a surface side of the single crystal semiconductor substrate, wherein the single crystal semiconductor substrate includes at least one single crystal semiconductor substrate. In the semiconductor pressure sensor for measuring the pressure to be measured by detecting a displacement of the diaphragm using the strain detecting element, the portion forms a diaphragm that can be displaced by the pressure to be measured.
An insulating film is formed on at least the front and back surfaces of the single crystal semiconductor substrate that constitutes the diaphragm, and the insulating film on the back surface side is formed from the thickness of the insulating film on the front surface side of the single crystal semiconductor substrate. A semiconductor pressure sensor characterized in that the thickness of the semiconductor is thicker.   The semiconductor pressure sensor according to claim 1, wherein the single crystal semiconductor substrate is a silicon substrate.   The semiconductor pressure sensor according to claim 1 or 2, wherein a thermal expansion coefficient of the insulating film on the back surface side is larger than a thermal expansion coefficient of the single crystal semiconductor substrate.   The semiconductor pressure sensor according to claim 3, wherein the insulating film on the back surface side is formed of a material mainly composed of nitrogen and silicon. The semiconductor pressure sensor according to claim 4, wherein the insulating film on the back surface side is made of Si ₃ N ₄ .   The semiconductor pressure sensor according to any one of claims 1 to 5, wherein a film thickness of a portion constituting the diaphragm of the single crystal semiconductor substrate is 3 µm or less, and a film thickness unevenness is 1% or less. Forming a first conductivity type non-porous single crystal semiconductor layer on the porous layer of the first substrate having a porous layer;
Bonding the non-porous single crystal semiconductor layer with a second substrate via an insulating film to form a bonded body;
Separating the bonded body by separating the porous layer in its thickness direction; and
Removing a portion of the porous layer left on the non-porous single crystal semiconductor layer;
Forming a diffusion resistance layer of a second conductivity type from a surface of the non-porous single crystal semiconductor layer exposed by removing the porous layer;
On the surface of the non-porous single crystal semiconductor layer on which the diffusion resistance layer is formed, the metal wiring constituting the detection circuit including the diffusion resistance layer, and the total film thickness is the non-porous single crystal semiconductor layer Forming an insulating film thinner than the insulating film between the first substrate and the second substrate;
The surface of the second substrate, which is opposite to the surface bonded to the non-porous single crystal semiconductor layer through the insulating film, is removed by etching, and can be displaced by the pressure to be measured. And a step of forming a diaphragm. A method of manufacturing a semiconductor pressure sensor.   The method of manufacturing a semiconductor pressure sensor according to claim 7, wherein a silicon substrate is used as the first base.   The thermal expansion coefficient of the insulating film between the non-porous single crystal semiconductor layer and the second base is larger than the thermal expansion coefficient of the non-porous single crystal semiconductor layer. The manufacturing method of the semiconductor pressure sensor.   10. The method of manufacturing a semiconductor pressure sensor according to claim 9, wherein the insulating film between the non-porous single crystal semiconductor layer and the second base is formed of a material mainly composed of nitrogen and silicon. . The method of manufacturing a semiconductor pressure sensor according to claim 10, wherein the insulating film between the non-porous single crystal semiconductor layer and the second base is made of Si ₃ N ₄ .   The method for manufacturing a semiconductor pressure sensor according to claim 7, wherein the non-porous single crystal semiconductor layer is an epitaxial layer.

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