JP2005532692A - Defect reduction in semiconductor materials. - Google Patents

Abstract

An initial epitaxial layer (2) made of GaN is grown on a sapphire substrate (2). Next, the epitaxial layer (2) is etched in a reactive ion etching (RIE) chamber. This etching preferentially acts on the defects (3), making them enlarged cavities (5). Since the cavity (5) is too large for the crystal lattice, it does not act as a defect in the normal sense and a further GaN epitaxial layer fills the cavity. Therefore, the propagation of defects is avoided.

Description

  The present invention relates to the manufacture of epitaxial materials with reduced defect density.

  Epitaxial wafer materials are widely used as starting materials in semiconductor device manufacturing. The presence of such defects in the wafer material can seriously affect the performance of the resulting device. For example, GaN and its related compounds, InGaN and AlGaN, are widely used in the manufacture of short wavelength semiconductor laser diodes. The performance of such laser diodes is severely degraded by the presence of threading dislocations that run longitudinally through the epitaxial layer. Similar defects are observed when other material systems such as GaAs are grown on SiGe / Si. Therefore, it is preferable to reduce the dislocation density on the epitaxial wafer material. In the following description, it is understood that GaN also refers to its compound (In) (Al) (Ga) N and may be p-type, n-type or undoped. The

One conventional method that solves the problem of reducing defect density is known to the inventors by epitaxial growth (ELOG) described in US patent application US 2002/0022290. In this method, a thin strip of silicon dioxide is patterned on the GaN buffer layer. The GaN growth is then resumed until a strip of SiO ₂ is coated to achieve a flat surface. It is clear that the defects under the strip are not visible and the epitaxial material on the strip has a lower defect density than the epitaxial material grown between the strips. The material on SiO ₂ has been found to have high quality, but the material between the strips has not changed, so it is necessary to perform the ELOG process many times to make a high quality material with a large area. Seem. The defect density in good ELOG growth ranges from 10 ¹⁰ cm ⁻² in standard GaN / sapphire growth to 10 ⁸ cm ⁻² in one ELOG process, or 5.10 ⁵ cm ⁻ after multiple ELOG processes. Decrease to ² . A defect density of 5.10 ⁵ cm ⁻² corresponds to a defect number of 1 per 14 μm × 14 μm square area. Therefore, the size of the defect free area is still small compared to the 50 mm diameter wafer area available for device fabrication.

  Another problem is that this method requires much more effort in processing and regrowth, and epitaxial growth in excess of 100 μm is required for best results.

A second method described in US patent application US2002 / 0005593 is to grow a standard GaN epitaxial layer at a high temperature (1000 ° C.) and then a thin layer of GaN at a low temperature (700-900 ° C.). And then resume the growth at a high temperature (1000 ° C.). This method claims that defects are prevented from propagating in the longitudinal direction and the defect density is reduced from> 10 ¹⁰ cm ⁻² to 4.10 ⁷ cm ⁻² . This method has a problem that defects are not sufficiently removed.

A third method is to directly produce a GaN substrate from liquid gallium and very high pressure (45,000 bar) nitrogen (according to Unipress, Poland). This method suffers from the use of very highly specialized and expensive equipment and the formation of fairly small (˜1 cm ² ) GaN crystals.

  Accordingly, an object of the present invention is to provide a method and system for easily and effectively manufacturing an epitaxial material having a large area with a low defect density by using relatively common and inexpensive equipment and materials.

According to the present invention, a method of manufacturing a low defect semiconductor wafer in which an epitaxial layer is grown on a substrate, comprising:
(A) growing a layer of epitaxial material on the substrate;
(B) etching the epitaxial layer so as to preferentially etch defects in the layer, and (c) growing a next epitaxial material layer on the etched epitaxial wafer. A method is provided.

  In one embodiment, step (b) is performed by exposing the surface to dry etching by RIE, ICP (Inductively Coupled Plasma Etching), or chemically reactive ion beam etching, or other suitable dry etching method. Is done.

  In another embodiment, step (b) is performed by dipping in aqua regia, or a KOH / NaOH mixture, or other suitable wet etch solution.

  In yet another embodiment, an additional compound is added to the growth process (c) to improve surface smoothness.

  In one embodiment, the additional compound is In (Ga) N, or Al (Ga) N, or magnesium doped (Al) (In) (Ga) N.

  In another embodiment, the epitaxial material is GaN.

  In yet another embodiment, the substrate is formed from a sapphire material.

  In one embodiment, the substrate is made of Si, SiC, or diamond material.

  In one embodiment, the epitaxial material is InP.

  In another embodiment, the epitaxial material is GaAs.

  In yet another embodiment, the method further includes repeating the steps (b) and (c) one or more times until the target defect density is achieved.

  In one embodiment, the etching is performed in situ in the growth chamber.

  In another embodiment, the etching is performed under vacuum.

  According to another aspect of the present invention, a semiconductor wafer manufactured by the above-described method is provided.

  The invention can be more clearly understood from the several embodiments described in detail below, by way of example only, with reference to the accompanying drawings, in which:

  With reference to FIG. 1 (a), a sapphire substrate 1 serves as a substrate for epitaxial growth of device quality wafer material. As shown in FIG. 1B, an initial epitaxial layer 2 made of GaN is grown on a substrate 1 by a conventional method. However, there are many defects 3 that twist through the epitaxial layer 2.

  Referring to FIG. 1C, the epitaxial layer 2 is etched by wet or dry etching in the growth chamber. This etching preferentially acts on the epitaxial layer 2 against the defects 3 so that they become enlarged cavities 5, which may or may not extend to the substrate 1. These cavities appear as black dots in the photograph of the etched surface shown in FIG. Since the cavity 5 is too large for the crystal lattice, it does not act as a defect in the normal sense. Thus, when another layer of GaN is grown (FIG. 1 (d)), it fills the cavity 5 with lateral growth and produces a homogeneous, relatively defect-free epitaxial growth 10 on the epitaxial layer 2. Form. Indium or magnesium can be added to GaN to aid in planarization. Steps (c) and (d) can be repeated if the defect removal is insufficient in step (c). Further epitaxial growth can produce wafer materials for devices such as high power transistors, light emitting diodes and laser diodes.

  In the following, two embodiments embodying the present invention will be described in detail.

Example 1
Starting with a suitable substrate for GaN growth (generally sapphire, but may be SiC or another), GaN growth is initiated in a standard manner by MOVPE or MBE. Another group has found that the two-dimensional growth mode occurs after the initial three-dimensional growth. This two-dimensional growth is unintended and involves many screw dislocations that propagate upward in all subsequent growth. After the surface growth mode is established, the wafer is removed from the growth chamber and placed in a reactive ion etching (RIE) chamber. Etching is performed with a mixture of SiCl ₄ / H _{2 as} an etchant. This has been found to preferentially etch fine defects and screw dislocations. Etching time is left to the operator's discretion, but must be sufficient to substantially etch the defect, and may or may not be etched all the way to the substrate. After dry etching, the substrate is heat-treated at 300 to 1000 ° C. in an N ₂ or NH ₃ atmosphere. GaN growth is then resumed in the growth reactor until a flat surface is achieved. The wafer is now ready for subsequent growth of the required device epitaxial layer.

Example 2
Starting with a suitable substrate for GaN growth (generally sapphire, but may be SiC or another), GaN growth is initiated in a standard manner by MOVPE or MBE. After the plane growth mode is established, the wafer is removed from the growth chamber and placed in a boiled aqua regia (HCl: HNO ₃ in a 3: 1 ratio) beaker. Etching has left a good quality GaN region almost unaffected, but fine defects and screw dislocations have been found to etch substantially. Etching time is left to the operator's discretion, but must be sufficient to substantially etch the defect, and may or may not be etched all the way to the substrate. The wafer is then removed from the solution, placed in a boiled ammonia polysulfide solution for 10 minutes, removed, rinsed with ion exchange water, and then dried. Finally, GaN growth is resumed in the growth reactor until a flat surface is achieved. The wafer is now ready for subsequent growth of the required device epitaxial layer.

It will be appreciated that the present invention reduces defects more effectively with simpler processing than the prior art. For example, since the etching process is applied to the entire surface of the wafer, it is not necessary to define / mask the surface region as in the ELOG method. Furthermore, the present invention effectively provides homogeneous GaN epitaxial growth on the substrate, so there is no need to incorporate foreign materials (such as SiO ₂ or Si _x N _y in ELOG). Another advantage is that the defects are removed from the entire substrate rather than in the strip as in ELOG. Further, since only about 1 μm is lost by the dry etching, the material is wasted little and it can be seen that there is almost no material lost by the wet etching. Re-growth can achieve planarization with growth of less than 1 μm because the defect size is small. In ELOG, growth of at least 2 μm is required to cover the SiO ₂ strip and achieve a flat surface, and growth of more than 100 μm is often used.

  The present invention is believed to be applicable to the growth of other epitaxial layers for a wide variety of semiconductor devices such as InP, GaAs and Si. Furthermore, any other suitable substrate such as Si, SiC, or diamond can be used. Also, any suitable wet or dry etching method that preferentially etches defects can be used.

  The present invention is not limited to the above-described embodiments, and various changes and changes can be made in the configuration and details thereof.

FIGS. 4A to 4D are diagrams sequentially showing the semiconductor growth method of the present invention. It is a photograph which shows the surface of the etched GaN after RIE.

Claims (14)

A method of manufacturing a low-defect semiconductor wafer in which an epitaxial layer is grown on a substrate,
(A) growing a layer of epitaxial material on the substrate;
(B) etching the epitaxial layer so as to preferentially etch defects in the layer, and (c) growing a next epitaxial material layer on the etched epitaxial wafer. Method.   Step (b) is performed by exposing the surface to dry etching by RIE, ICP (Inductively Coupled Plasma Etching), or chemically reactive ion beam etching, or other suitable dry etching method. The method according to claim 1.   The method of claim 1, wherein step (b) is performed by dipping in aqua regia, a KOH / NaOH mixture, or other suitable wet etch solution.   The method according to claim 1, wherein an additional compound is added to the growth process (c) to improve surface smoothness.   5. The method of claim 4, wherein the additional compound is In (Ga) N, Al (Ga) N, or magnesium doped (Al) (In) (Ga) N.   The method according to claim 1, wherein the epitaxial material is GaN.   The method of claim 6, wherein the substrate comprises a sapphire material.   7. The method according to claim 1, wherein the substrate is made of Si, SiC, or a diamond material.   The method according to claim 1, wherein the epitaxial material is InP.   The method according to claim 1, wherein the epitaxial material is GaAs.   11. The method according to claim 1, further comprising repeating the steps (b) and (c) one or more times until a target defect density is achieved. .   12. A method according to any one of the preceding claims, wherein the etching is performed in situ in a growth chamber.   The method according to claim 1, wherein the etching is performed under vacuum.   A semiconductor wafer manufactured by the method according to claim 1.

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