JP2005352906A5 - - Google Patents

Download PDF

Info

Publication number
JP2005352906A5
JP2005352906A5 JP2004174609A JP2004174609A JP2005352906A5 JP 2005352906 A5 JP2005352906 A5 JP 2005352906A5 JP 2004174609 A JP2004174609 A JP 2004174609A JP 2004174609 A JP2004174609 A JP 2004174609A JP 2005352906 A5 JP2005352906 A5 JP 2005352906A5
Authority
JP
Japan
Prior art keywords
processing unit
memory
central processing
status information
functional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2004174609A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005352906A (ja
JP4164473B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2004174609A priority Critical patent/JP4164473B2/ja
Priority claimed from JP2004174609A external-priority patent/JP4164473B2/ja
Publication of JP2005352906A publication Critical patent/JP2005352906A/ja
Publication of JP2005352906A5 publication Critical patent/JP2005352906A5/ja
Application granted granted Critical
Publication of JP4164473B2 publication Critical patent/JP4164473B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2004174609A 2004-06-11 2004-06-11 機能メモリアクセス制御システム、機能メモリ装置及びその制御方法、プログラム Expired - Fee Related JP4164473B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004174609A JP4164473B2 (ja) 2004-06-11 2004-06-11 機能メモリアクセス制御システム、機能メモリ装置及びその制御方法、プログラム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004174609A JP4164473B2 (ja) 2004-06-11 2004-06-11 機能メモリアクセス制御システム、機能メモリ装置及びその制御方法、プログラム

Publications (3)

Publication Number Publication Date
JP2005352906A JP2005352906A (ja) 2005-12-22
JP2005352906A5 true JP2005352906A5 (fr) 2006-02-09
JP4164473B2 JP4164473B2 (ja) 2008-10-15

Family

ID=35587326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004174609A Expired - Fee Related JP4164473B2 (ja) 2004-06-11 2004-06-11 機能メモリアクセス制御システム、機能メモリ装置及びその制御方法、プログラム

Country Status (1)

Country Link
JP (1) JP4164473B2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4865016B2 (ja) * 2009-08-27 2012-02-01 株式会社東芝 プロセッサ
CN102270160B (zh) * 2010-06-03 2016-09-07 纬创资通股份有限公司 数据写入方法与计算机系统

Similar Documents

Publication Publication Date Title
JP2001517036A5 (fr)
US20070240011A1 (en) FIFO memory data pipelining system and method for increasing I²C bus speed
WO2004031964A3 (fr) Procede et dispositif permettant de reduire le temps de traitement dans un systeme de traitement de donnees au moyen d'une antemoire
JP2003241908A5 (fr)
JP2014523584A5 (fr)
JP2008191711A5 (fr)
JP2005352906A5 (fr)
JP2007086991A5 (fr)
JP2008515091A5 (fr)
JP2001209534A5 (fr)
CN115731643B (zh) 钥匙绑定方法和车辆配置方法、装置、车辆及存储介质
JP4549396B2 (ja) 車両制御装置
CN107220190B (zh) 一种与主机驱动实现双向信息交互的自定义usb鼠标和键盘的系统及方法
JP2002140284A (ja) マイクロコントローラ
JP2006293638A5 (fr)
EP1058189A3 (fr) Microprocesseur à système de débogage
JP2003196177A5 (fr)
JP2005322261A5 (fr)
JP2003345638A5 (fr)
TWI792500B (zh) 處理程式語言函數的裝置及方法
JP2003227867A5 (fr)
TW200745871A (en) System having bus architecture for improving CPU performance and method thereof
JP2007193839A5 (fr)
JP2008059373A5 (fr)
US20090327526A1 (en) Remote handler for off-chip microcontroller peripherals