JP2005332546A - Drive circuit for light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit which can drive a driving current to a light emitting element by a sufficiently high power voltage at the time of writing of data and can drive the light emitting element with low electric power consumption by a low power voltage at the time of reading. <P>SOLUTION: A DC mode drive circuit 10 operates to receive supply of electric power from a power source Vcc 1 and supplies the driving current to an LD 14 via a first output transistor 20. A pulse mode drive circuit 12 operates to receive the supply of the electric power from the power source Vcc 1 and supplies the driving current to the LD 14 via a second output transistor 22. A switching circuit 32 selects the pulse mode drive circuit 12d at the time of data writing and selects and operates the DC mode drive circuit 10 at the time of data reading out. By setting Vcc 2 at the voltage higher than Vcc 1, the responsiveness at the time of writing is assured. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a drive circuit for a light-emitting element that drives a light-emitting element with power from a battery power source to read data from and write data to an optical disk.

  Conventionally, mini-disc (MD) players have been widely used as portable recording / playback devices for music. The MD is much smaller and lighter than the CD, and can be rewritten, and has become the mainstream portable player in place of the cassette tape player.

  Here, MD is a magneto-optical recording medium, and laser light is used for writing and reading data. That is, data is written by irradiating the MD with a high-power laser pulse in accordance with the write data, and the MD is irradiated with relatively low-power continuous light, and data is read from the reflected light at that time.

  One laser diode (LD) is used as a laser light source for writing and reading, and a high output pulse or a low output DC current is supplied thereto. Accordingly, a single driving circuit is used to generate a writing pulse and a reading continuous light.

  Here, among MDs, Hi-MD that has a very large storage capacity of 1 Gbyte and can be used as data storage for computers has also been developed. In such a Hi-MD player, it is necessary to cause the LD to emit light with a high-speed pulse when data is written (recorded).

  On the other hand, if an output transistor that controls current supply to the LD is used within the saturation region of Vce (collector emitter voltage), a delay occurs. For this reason, the output transistor cannot be used in a saturated or supersaturated state during high-speed pulse driving. Further, when the size of the output transistor is increased in order to lower the saturation voltage, there is a problem that the parasitic capacitance increases and the responsiveness deteriorates. Therefore, it is necessary to set the power supply voltage high.

  On the other hand, in portable devices, it is important that the operation duration by battery drive is long. Therefore, there is a demand for various circuits in portable devices to reduce the power consumption as much as possible and to reduce battery consumption as much as possible.

  The present invention is a light-emitting element drive circuit that drives a light-emitting element with electric power from a battery power source, reads data from an optical disk, and writes data to the optical disk. A power source, a second power source having a relatively high voltage, a first drive circuit that drives the light emitting element with power from the first power source, and a second drive that drives the light emitting element with power from the second power source And a switching circuit for selecting and operating either the first drive circuit or the second drive circuit.

  The first drive circuit includes a first drive transistor that supplies a current from the first power source to the light emitting element, and the second drive circuit supplies a current from the second power source to the light emitting element. It is preferable to include a second drive transistor.

  The switching circuit selects the first drive circuit when reading data from the optical disk by the light emitting element, and selects the first drive circuit when writing data to the optical disk by the light emitting element. It is preferred to select a two drive circuit.

  The second drive circuit preferably drives the light emitting element in pulses.

  Furthermore, the first and second drive circuits have operation control circuits such as an output current control circuit that outputs a target signal of a drive current that drives the light emitting element and a reference current generation circuit that generates a reference current, These operation control circuits are also preferably operated by power from the first power source.

  In addition to the first mode in which the first drive circuit is operated and the second mode in which the second drive circuit is operated, the switching circuit has an off mode in which neither the first drive circuit nor the second drive circuit is operated. It is preferable to switch via the off mode when switching between the first mode and the second mode.

  As described above, according to the present invention, two drive circuits having different power supply voltages are provided in order to drive one light emitting element. A drive circuit having a different operating voltage can be selected by a switching circuit of the drive circuit to be operated. Therefore, the drive current to the light emitting element can be driven by a sufficiently high power supply voltage at the time of data writing, and the low power consumption light emitting element can be driven by a low power supply voltage at the time of reading.

  In addition, by setting an off period when the mode is switched, it is possible to effectively prevent current from being output from both the first and second drive circuits and supplying an excessive current to the light emitting element.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram illustrating an overall configuration of a system according to an embodiment. First, in this embodiment, both a DC mode drive circuit 10 and a pulse mode drive circuit 12 are provided, and a laser diode (LD) 14 as one light emitting element is driven by these. That is, the case where data is read from the MD is the DC mode, the DC mode drive circuit 10 operates, the case where data is written to the MD is the pulse mode, and the pulse mode drive circuit 12 operates.

  The DC mode drive circuit 10 has a PNP-type first output transistor 20, the emitter of the first output transistor 20 is connected to a first power supply Vcc1 through a resistor to be described later, and the collector through a terminal Iout. It is connected to the anode of the LD 14. Further, the cathode of the LD 14 is connected to the ground, and when the first output transistor 20 is turned on, a drive current flows through the LD 14.

  The pulse mode drive circuit 12 has a PNP-type second output transistor 22, the emitter of the second output transistor 22 is directly connected to the second power supply Vcc2, and the collector of the LD 14 via the terminal Iout. Connected to the anode. The cathode of the LD 14 is connected to the ground. Accordingly, when the second output transistor 22 is turned on, a drive current flows through the LD 14.

  The terminal Iout is provided in an IC (integrated circuit) that forms a driving circuit, and is a terminal to which an external LD 14 is connected.

  The LD 14 is provided with a photodiode (PD) 24 adjacent thereto, and receives light from the LD 14 and generates a corresponding current. That is, the light emission amount of the LD 14 can be detected by the PD 24. The output current of the PD 24 is amplified by the amplifier 26 and then supplied to the output current control circuit 28 via the Iin terminal. Here, a resistor 30 having the other end connected to the ground is connected to a path that is input from the Iin terminal to the output current control circuit 28, thereby performing current-voltage conversion, and the output current control circuit 28 includes: A voltage signal for the light emission amount of the LD 14 is supplied.

  The output current control circuit 28 determines the light emission amount of the LD 14 in accordance with an operation mode signal supplied from an external microcomputer (microcomputer) or the like, and generates a command signal Ild, but the actual current of the LD 14 from the terminal Iin. The command signal Ild is corrected by feeding back the detection result of the light emission amount. Ild is a current signal. The output current control circuit 28 is also operated by the first power supply Vcc1.

  The command signal Ild is supplied to the switching circuit 32. The switching circuit 32 is a circuit that switches whether the command signal Ild from the current output control circuit 28 is supplied to the DC mode drive circuit 10 or the pulse mode drive circuit 12, and has two switches. When the DC mode signal indicating the DC mode is supplied, the command signal Ild is supplied to the DC mode drive circuit 10, and when the pulse mode signal indicating the pulse mode is supplied, the command signal Ild is supplied. Is supplied to the pulse mode drive circuit 12. The DC mode signal and the pulse mode signal are output from the mode signal processing circuit 50. The mode signal processing circuit 50 generates and outputs a DC mode signal and a pulse mode signal in accordance with a mode signal indicating whether the mode is a write mode or a read mode supplied from the microcomputer.

  Accordingly, either the DC mode drive circuit 10 or the pulse mode drive circuit 12 supplied with the command signal Ild is operated by the switching circuit 32, and the drive current corresponding to the command signal Ild is supplied to the first and second output transistors. 20 and 22 are supplied to the LD 14.

  The pulse mode drive circuit 12 drives the second output transistor 22 in accordance with a pulse signal Cont supplied from the outside.

  FIG. 2 shows the configuration of the DC mode drive circuit 10. The command signal Ild from the switching circuit 32 is converted into a voltage signal by the resistor 34 having the other end connected to the power supply, and is input to the positive input terminal of the operational amplifier 36. The output of the operational amplifier 36 is connected to the base of the first output transistor 20. The emitter of the first output transistor 20 is connected to the power supply via the resistor 38, and the connection point between the resistor 38 and the emitter of the first output transistor 20 is connected to the negative input terminal of the operational amplifier 36. Therefore, the operational amplifier 36 operates so that the emitter of the first output transistor 20 is equal to the voltage at the positive input terminal of the operational amplifier 36.

  The voltage at the positive input terminal of the operational amplifier 36 is Vcc1-Ild · R34 if the resistance value of the resistor 34 is R34, and the voltage at the negative input terminal of the operational amplifier 36 is the current flowing through the first output transistor 20 as Iout, If the resistance value of the resistor 38 is R38, then Vcc1-Iout · R38. Therefore, by setting the ratio of the resistance values of the resistor 34 and the resistor 38, R34: R38 to 100: 1, for example, Iout = 100 · Ild, and the DC mode drive circuit 10 makes the current obtained by multiplying the command signal Ild by 100. Thus, the LD 14 can be driven.

  FIG. 3 shows the configuration of the pulse mode drive circuit 12. The command signal Ild from the switching circuit 32 is supplied to the pulse output circuit 40. The command signal Ild is a signal indicating the light emission intensity of the LD 14 when data is written to the pulse mode MD, and is set sufficiently larger than when reading data from the DC mode MD. The Ild itself may be of the same level.

  A pulse signal Cont is input to the pulse output circuit 40, and the command signal Ild is converted into a pulse current corresponding to the pulse signal Cont.

  The output of the pulse output circuit 40 is supplied to the collector of a PNP transistor 42 whose emitter is connected to the power supply Vcc2 and whose base and collector are short-circuited. The base of the transistor 42 is connected in common with the base of the second output transistor 22, and the transistor 42 and the second output transistor 22 form a current mirror. Accordingly, a current corresponding to the pulse current output from the pulse output circuit 40 flows to the second output transistor 22 and is supplied to the LD 14.

  In the pulse output circuit 40, the amount of current flowing through the second transistor 22 is increased by increasing the amount of current supplied to the transistor 42 by performing predetermined amplification, or by adjusting the emitter areas of the transistor 42 and the second transistor 22. The amount of drive current supplied to the LD 14 can be adjusted.

  Thus, the pulse mode drive circuit 12 is not provided with a feedback loop therein. This is because sufficient feedback control of the pulse current value cannot be performed in high-frequency pulse driving. Since there is no unnecessary circuit, a high-speed response is obtained, and a high-frequency pulse current can be obtained effectively. Since feedback control based on the detection value of the PD 24 is performed, feedback control as a whole for the light emission amount of the LD 14 is performed.

  Here, it is preferable to adopt about 2.8V, which is about 2.2V higher than the first power source Vcc1, and about 2.8V higher than the first power source Vcc1 as the second power source Vcc2.

  In order to operate various circuits in the IC, a power supply voltage of 2.2 V is sufficient. The first output transistor 20 is DC driven and does not require high-speed response. Therefore, the DC mode drive circuit 10, the switching circuit 32, and the output current control circuit 28 are operated with the first power supply Vcc1 of 2.2V.

  On the other hand, the pulse mode drive circuit 12 is required to have a high-speed response. Therefore, the second power supply Vcc2 of about 2.8V is used as the power supply for the transistors 42 and 22. When causing the LD 14 to emit light, the voltage drop in the LD 14 is usually about 2V. On the other hand, the second output transistor 22 is saturated when its Vce is about 100 to 200 mV. Therefore, if the first power supply Vcc1 is used, the second transistor 22 is saturated and the high-speed response cannot be sufficiently maintained.

  In the present embodiment, the second power supply Vcc2 of about 2.8V is used as the power supply for the pulse mode drive circuit 12 including the second transistors 22 and 52. Therefore, even if a relatively small transistor is used, the second output transistor 22 is not saturated, and high-speed response can be improved. In addition, about other circuits, the increase in the power consumption of those circuits is suppressed by using 1st power supply Vcc1.

  The switching circuit 32 selects the pulse mode drive circuit 12 at the time of data writing, and selects the DC mode drive circuit 10 at the time of data reading, so that both low power consumption and high-speed response data writing can be performed. Realized.

  FIG. 4 shows a configuration example of a mode signal processing circuit 50 that generates a pulse mode signal and a DC mode signal supplied to the switching circuit 32. The mode signal processing circuit 50 includes two comparators 52a and 52b and a division resistor 54a connected in series between a power source for generating two reference voltages Vta and Vtb input to the comparators 52a and 52b and the ground. , 54b, 54c. A mode signal is input to the positive input terminal of the comparator 52a, and an intermediate point between the dividing resistors 54a and 54b is connected to the negative input terminal. On the other hand, the intermediate point of the dividing resistors 54a and 54c is connected to the positive input terminal of the comparator 52b, and the mode signal is input to the negative input terminal.

  If the resistance values of the dividing resistors 54a to 54c are Ra, Rb, and Rc, respectively, the power supply voltage is Vcc1, so the reference voltage Vta input to the comparator 52a is Vta = Vcc1 · (Rb + Rc) / (Ra + Rb + Rc) The reference voltage Vtb input to the comparator 52b is Vtb = Vcc1 · Rc / (Ra + Rb + Rc). Therefore, as shown in FIG. 5, the output for the voltage value of the mode switching signal input to the mode signal processing circuit 50 is a DC mode signal (H level) at a voltage equal to or lower than Vtb, and a pulse at a voltage higher than Vta. A mode signal is output (H level), and no signal is output at an intermediate voltage between Vta and Vtb. Therefore, the switching circuit 32 always gives an off mode during which both circuits are turned off when switching to which of the DC mode drive circuit 10 and the pulse mode drive circuit 12 the command signal is supplied.

  That is, when the mode is switched by using one switching voltage, the current from both the DC mode drive circuit 10 and the pulse mode drive circuit 12 as shown by the solid line in FIG. Is output, and a large current is generated as the current Iout when the current Iout is switched between modes. According to the present embodiment, as indicated by the wavy line in FIG. 6, the current Iout supplied to the LD 14 once becomes zero at the time of switching. Accordingly, it is possible to prevent generation of an unnecessary large current at the time of mode switching.

It is a figure which shows the whole structure of a system. 2 is a diagram showing a configuration of a DC mode drive circuit 10. FIG. 2 is a diagram showing a configuration of a pulse mode drive circuit 12. FIG. 3 is a diagram showing a configuration of a mode signal processing circuit 50. FIG. It is a figure explaining mode switching. It is a figure which shows the switching timing of a mode.

Explanation of symbols

  10 mode drive circuit, 12 pulse mode drive circuit, 14 LD, 20 first output transistor, 22 second transistor, 26 amplifier, 28 output current control circuit, 30 resistor, 32 switching circuit, 32a, 32b switch, 34 resistor, 36 Operational amplifier, 38 resistor, 40 pulse output circuit, 42 transistor, 50 mode signal processing circuit, 52a, 52b comparator, 54a, 54b, 54c Dividing resistor.

Claims (6)

A drive circuit for a light-emitting element that drives a light-emitting element by power from a battery power source, reads data from an optical disk, and writes data to the optical disk,
A first power source having a relatively low voltage;
A second power source having a relatively high voltage;
A first drive circuit that drives the light-emitting element with power from a first power source;
A second drive circuit for driving the light-emitting element with electric power from a second power source;
A switching circuit for selecting and operating either the first drive circuit or the second drive circuit;
A drive circuit for a light-emitting element, comprising: The circuit of claim 1, wherein
The first drive circuit includes a first drive transistor that supplies a current from the first power source to the light emitting element,
The second drive circuit includes a second drive transistor that supplies a current from the second power source to the light emitting element.
A drive circuit for a light-emitting element. The circuit according to claim 1 or 2,
The switching circuit is
Selecting the first drive circuit when reading data from the optical disk by the light emitting element;
A drive circuit for a light emitting element, wherein the second drive circuit is selected when data is written to the optical disk by the light emitting element. The circuit of claim 3, wherein
The light emitting element drive circuit, wherein the second drive circuit drives the light emitting element in pulses. In the circuit according to any one of claims 1 to 4,
Furthermore, the first and second drive circuits have operation control circuits such as an output current control circuit that outputs a target signal of a drive current that drives the light emitting element, and a reference current generation circuit that generates a reference current, A drive circuit for a light emitting element, wherein these operation control circuits are also operated by power from a first power source. In the circuit according to any one of claims 1 to 5,
The switching circuit has an off mode in which neither the first drive circuit nor the second drive circuit is operated, in addition to a first mode in which the first drive circuit is operated and a second mode in which the second drive circuit is operated. A light emitting element driving circuit, wherein switching between the first mode and the second mode is performed via an off mode.

Images