JP2005328397A - Interleave transmission system, transmitting device, and receiving device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To shorten an interleave time required for achieving a desired service time ratio. <P>SOLUTION: The interleave transmission system comprises a transmitting device for transmitting a transmission packet interleaved based on a time set beforehand, and a receiving device for receiving the transmission packet from the transmitting device and reproduces it as a packet data. The transmitting device includes an encoding means for encoding an inputted packet data to a transmission packet composed of product codes synthesized with a plurality of codes. The receiving device includes a first decoding means for detecting a data error for the transmission packet, and performing decoding or erasures in packet units, based on the detection result; and a second decoding means for performing error correction on the erased packet obtained by the first decoding means. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an interleave transmission system, a transmission device, and a reception device, and more particularly, to an interleave transmission system, a transmission device, and a reception device for reducing the interleaving time.

  In recent years, information transmission using a wide band has been studied. For example, a 21 GHz band (21.4 to 22.0 GHz, a bandwidth of 600 MHz) is an HDTV (High) serviced in the BS digital direction of the current 12 GHz band. It enables a broadcasting service or the like using ultra-high-definition video having 4000 scanning lines corresponding to about 4 times as many scanning lines (Definition Television).

  However, it is known that the 21 GHz band has a greater attenuation of radio waves due to rain or the like than the 12 GHz band, and it is necessary to take measures against the attenuation of radio waves in order to improve the reliability of the line.

  Thus, for example, a long-period interleaving method has been proposed as a technique for improving rain attenuation on a transmission line (see, for example, Patent Document 1 and Non-Patent Document 1). The long-period interleaving method focuses on the property that “rainfall tends to concentrate in a short time”, and partial continuous errors caused by rain concentration in a short time It spreads for a time sufficiently longer than the generation time, and is restored to the original signal by error correction processing.

  Here, a configuration example of the interleave transmission system in the conventional method will be described with reference to the drawings. FIG. 1 is an example of a schematic configuration of a conventional interleave transmission system.

  In FIG. 1, an interleave transmission system 10 is configured to include a transmission device 11 and a reception device 12, and radio waves transmitted from the transmission device 11 are transmitted via a broadcasting satellite 13 through a satellite propagation path to the reception device 12. Sent to.

  The transmission device 11 is configured to include an RS (Reed Solomon) encoding unit 21, a long-period interleaver 22, a modulation unit 23, and a transmission antenna 24. In addition, the reception device 12 is configured to include a reception antenna 25, a demodulation unit 26, a long-period deinterleaver 27, and an RS decoding unit 28. Note that the long-cycle interleaver 22 and the long-cycle deinterleaver 27 shown in FIG. 1 have a memory, a hard disk, and the like as data storage means for writing and reading data.

  First, in the transmission device 11, packet data is input to the RS encoding unit 21. The RS encoder 21 performs RS encoding by adding a parity for correcting missing of data caused by rain attenuation or the like on the receiving side. Also, the RS encoder 21 outputs the transmission packet after RS encoding to the long-period interleaver 22.

  The long-period interleaver 22 performs writing for input data for a preset interleave time. Next, the long-period interleaver 22 reads the accumulated data in a direction different from the direction in which it was written, and outputs it to the modulation unit 23. The modulation unit 23 modulates the transmission packet read from the long-period interleaver 22 by a method suitable for a modulation application, a satellite transmission path, or the like, and transmits the transmission packet from the transmission antenna 24 as a radio wave having a predetermined carrier frequency, for example. .

  Here, the transmitted radio wave is relayed through the broadcasting satellite 13 and is transmitted to the receiving device 12 under the influence of rain attenuation, assuming that there is strong rainfall or the like in the middle of the transmission path.

  In the receiving device 12, the radio wave affected by rain attenuation is received by the receiving antenna 25 and output to the demodulator 26. The demodulator 26 converts the frequency to the demodulator input frequency, detects the modulation method in the modulator, and outputs the modulation scheme to the long-period deinterleaver 27.

  After inputting the demodulated transmission packet, the long-period deinterleaver 27 performs writing for a preset interleaving time, and rearranges it so as to be the same as the frame configuration of the transmission device 11. Further, the long cycle deinterleaver 27 reads the accumulated data in a direction different from the writing direction, and outputs it to the RS decoding unit 28. The RS decoding unit 28 performs error correction using the parity added to the input data, and then outputs (reproduces) it as packet data.

  Here, the configuration of the transmission frame stored in the above-described long-period interleaver 22 will be described with reference to the drawings. FIG. 2 is a diagram illustrating an example of a transmission frame configuration stored in a conventional long-period interleaver. The transmission frame shown in FIG. 2 has a configuration in which transmission packets having an RS code length of K bytes are arranged in the X-axis direction and L transmission packets are arranged in the Y-axis direction. K represents a code block length, and M represents an information block length. The coding rate of this RS code is represented by M / K. Further, errors are detected and corrected using the parity N (= K−M) added to the information block.

  The transmission packet after the RS encoding in the RS encoding unit 21 is for the interleave time (K × L bytes in FIG. 2) set in advance in the order of the arrow 31 shown in FIG. Writing is performed. In addition, after the writing for the transmission frame is completed, the long-period interleaver 22 reads the accumulated data in the order of the arrows 32 shown in FIG.

  Here, if L in the Y-axis direction, which is the data reading direction, is set to a very large value as the transmission frame configuration, the storage capacity increases, but the interleaving time can be extended.

  The configuration of the transmission frame stored in the long-period deinterleaver 27 will be described with reference to the drawings. FIG. 3 is a diagram illustrating an example of a transmission frame configuration stored in a conventional long-period deinterleaver. In addition, each code | symbol (K, L, M, N) in FIG. 3 is the same as that of FIG.

  The demodulated transmission packet demodulated by the demodulator 26 is set in advance in the order of the arrow 33 shown in FIG. 3 so as to have the same frame configuration as that on the transmission side. Data is written.

  Here, on the transmitting side, as shown in FIG. 3, data loss (missing) caused by rain attenuation or the like during transmission occurs continuously in the Y-axis direction. However, when this is viewed on the X axis, the data loss is 1 / L byte, and the error is distributed to L packets after deinterleaving. Therefore, if the number of errors included in each packet is reduced and the missing data portion is within the correction capability range by the RS code, the transmission signal can be reproduced at the time of RS decoding.

  When data is read, data of K × L bytes is read in the order of the arrow 34 shown in FIG. 3 and output to the RS decoding unit 28. The RS decoding unit 28 receives, for example, a received code polynomial R ( x) is generated to decode the packet data. Here, the generation process of the reception code polynomial R (x) at the time of RS decoding will be described with reference to the drawings. FIG. 4 is a diagram illustrating an example of a process for generating a reception code polynomial R (x) at the time of RS decoding. In FIG. 4, as an example, a process of generating a reception code polynomial R (x) in the case where a packet of 2 bytes (188 bytes, 189 bytes) is lost in a packet composed of an information block of 188 bytes and a check block of 16 bytes. explain.

  First, assuming that the code polynomial F (x) on the transmission side is the following equation (1), the code polynomial R (x) on the reception side is represented by the following equation (2).

ここで、一般にＲＳの符号化、復号化には、「０」，「１」という２つの元を持ち、ｍｏｄ２の和と積の演算が定義されているガロア体ＧＦ（２）に仮想的な根αを付加するＧＦ（２^Ｐ）ガロア拡大体が使用され計算される。また、ＧＦ（２^Ｐ）では、２^Ｐ（Ｐ：正の整数）個の元があり、その元の間で自由に四則演算が行える。

Here, in general, for RS encoding and decoding, a virtual Galois field GF (2) having two elements “0” and “1” and defining a sum and product operation of mod 2 is assumed. A GF (2 ^P ) Galois extension that adds the root α is used and calculated. In GF (2 ^P ), there are 2 ^P (P: positive integer) elements, and four arithmetic operations can be freely performed between these elements.

Therefore, the root values α ^{0 to} α ¹⁵ that are elements of the Galois extension field GF (2 ⁸ ) are substituted into the reception code polynomial R (x) of the above-described equation (2) to calculate the syndrome values S0 to S15.

次に、誤り位置多項式を導出するため、以下に示す（４）式に上述した（３）式の値を代入して連立方程式（４）’を解き、σ_１〜σ_８の解を求める。ここで、σ_ｉは誤りの位置を表す変数であり、ｔは最大訂正可能なブロック数である。

Next, in order to derive an error position polynomial, the value of the above-described equation (3) is substituted into the following equation (4) to solve the simultaneous equations (4) ′ to obtain solutions of σ _{1 to} σ ₈ . Here, σ _i is a variable representing the position of the error, and t is the maximum number of blocks that can be corrected.

次に、以下に示す（５）式にσ_１〜σ_８の解を代入して、誤り位置多項式σ（ｘ）を導出する。

Next, the error position polynomial σ (x) is derived by substituting the solutions of σ ₁ to σ ₈ into the following equation (5).

その後、誤り位置の罫線を行うため、σ（ｘ）を０にするｘの値を算出する。ｘに代入する値は、α^０〜α^２５５である。図４に示す例では、左から数えて１８８、１８９バイト目に誤りが発生しているため、σ（ｘ）＝０となる条件は、ｘ＝α^１８７、α^１８８のときとなる。このαのべき乗の値に１を加えたものが誤り位置となる。

Thereafter, in order to perform a ruled line at an error position, a value of x that makes σ (x) 0 is calculated. Values to be substituted for x are α ^{0 to} α ²⁵⁵ . In the example shown in FIG. 4, since an error has occurred in the 188th and 189th bytes from the left, the condition for σ (x) = 0 is when x = α ¹⁸⁷ and α ¹⁸⁸ . An error position is obtained by adding 1 to the value of the power of α.

Next, an error value is calculated. The derivation formula is as shown in the following formula (7). Here, Y _i is a variable representing the magnitude (value) of the error.

最後に、上述した（７）式に（６）式を代入して以下に示す（８）式の連立方程式からσ_１〜σ_８の解を求める。

Finally, by substituting the equation (6) into the equation (7) described above, the solutions of σ ₁ to σ ₈ are obtained from the simultaneous equations of the following equation (8).

以上の処理により、（８）式に示す連立方程式からＹ_１〜Ｙ_８が算出される。つまり、σ_ｉに対応した誤り位置をＹ_ｉで置き換えれば、誤り訂正が行われたことになる。

Through the above processing, Y ₁ to Y ₈ are calculated from the simultaneous equations shown in the equation (8). That is, if the error position corresponding to σ _i is replaced with Y _i , error correction is performed.

Data can be decoded by using the above-described error correction and error detection algorithms. Note that when all of the syndromes in the above formula (3) are 0, no error has occurred, and when all of the syndromes have not become 0, an error has occurred somewhere. become.
JP 2003-101419 A Hashimoto, Masaru Kamei, Yamazaki, Ryota, Yutaka Kawaguchi, “Long-Period Interleaved Transmission System”, IEICE Technical Report, SAT 2001-93, pp. 69-76, Jan. 2002

  By the way, when the packet frame to be transmitted is RS (K, M) and N = K−M, when an error of N / 2 bytes or more occurs, if it is decoded as it is, it cannot be restored to normal data. Therefore, in order to restore data normally with a small check block length, it is necessary to lengthen the interleaving time and sufficiently disperse the error data. However, if the interleaving time becomes long, a large amount of storage is required on the receiving side.

  However, in order to restore a data error due to rainfall interruption or the like and achieve a service time rate of 100% in the conventional method, for example, for the interruption time Y = 30 minutes, the code block length K = 204 bytes, When the information block length M = 188 bytes and the check block (parity) N = 16 bytes added to the information block, Y / (N / 2 / K) = 30 / (16/2/204) = 765 minutes Interleaving time is required.

  In addition, under the above-described conditions, when the transmission rate is 20 Mbps, the data storage capacity needs to be as large as 20 (Mbps) × 765 (minutes) × 60 (seconds) / 8 (bits) = 114 GB. End up.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide an interleave transmission system, a transmission device, and a reception device for improving error correction capability and shortening the interleaving time.

  In order to solve the above problems, the present invention employs means for solving the problems having the following characteristics.

  The invention described in claim 1 includes: a transmission device that transmits a transmission packet interleaved based on a preset time; and a reception device that receives the transmission packet from the transmission device and reproduces it as packet data. In the interleaved transmission system, the transmission device includes encoding means for encoding input packet data into a transmission packet composed of a product code obtained by combining a plurality of codes, and the reception device A first decoding means for detecting data errors and decoding or erasing in units of packets based on the detection results; and a second error correction for erasing lost packets obtained by the first decoding means. And a decoding means.

  According to the first aspect of the present invention, it is possible to improve the error correction capability and shorten the interleaving time required to achieve a desired service time rate. Specifically, the interleaved transmission frame configuration is related to a product code, which is a combination of multiple codes, error position detection is performed with one code, and erasure correction is performed with the other code. Ability can be improved.

  According to the second aspect of the present invention, in the transmission device that transmits the interleaved transmission packet based on the preset time, the input packet data is written for the preset time and written. The interleaver that reads packet data in a direction different from the writing direction, and the transmission side performs encoding by adding a parity for correcting the packet data read from the interleaver on the reception side. A first encoding unit that outputs the converted transmission packet to the interleaver, and a parity for erasing the packet data read from the interleaver in units of packets on the receiving side And a second encoding means.

  According to the second aspect of the present invention, the error correction capability can be improved by detecting the error position with one code and performing erasure correction with the other code on the transmission side. Thereby, the interleaving time required for achieving a desired service time rate can be shortened.

  The invention described in claim 3 is characterized in that the transmission packet obtained by the second encoding means has a frame configuration composed of a product code obtained by combining a plurality of codes.

  According to the third aspect of the present invention, the error correction capability can be improved in the interleaving method in which writing and reading are performed in different directions by using a product code relationship that is a combination of a plurality of codes.

  The invention described in claim 4 is characterized in that it has data buffer means for adjusting the packet length to be lost on the receiving side.

  According to the fourth aspect of the invention, it is possible to adjust the packet length to be lost on the transmission side according to the attenuation state of the transmission path, the desired error correction capability, and the like. Thereby, for example, since the information block length at the time of RS encoding can be set short, the calculation time of RS encoding can be shortened.

  The invention described in claim 5 includes a plurality of storage units that store the packet data, a switching unit that switches the plurality of storage units to alternately write and read the packet data, and And control means for controlling the storage means and the switching means to output alternately continuous packet data from the plurality of storage means.

  According to the fifth aspect of the present invention, by having a plurality of storage means, for example, data can be read by the other storage means while data is being written by one storage means. Thereby, stagnation of data can be prevented.

  According to a sixth aspect of the present invention, in a receiving device that receives a transmission packet interleaved based on a preset time, a data error is detected for the transmission packet, and a packet unit is detected based on the detection result. The first decoding means for performing decoding or erasure in step (2), and the second decoding means for correcting an error of the lost packet obtained by the first decoding means.

  According to the sixth aspect of the present invention, the first decoding unit performs error position detection, and erases the corresponding packet unit based on the detection result, so that the second decoding unit determines the error detection position. Since it can be easily identified and only erasure correction needs to be performed, the error correction capability can be improved. Thereby, the interleaving time required for achieving a desired service time rate can be shortened.

  The invention described in claim 7 is characterized in that the first decoding means detects an error of the input transmission packet, and if the number of errors exceeds a correctable number, the decoding is not performed and the packet unit It is characterized by erasing with.

  According to the seventh aspect of the invention, the decoding time can be shortened by omitting the time for the detection process.

  The invention described in claim 8 comprises a plurality of storage means for storing the transmission packets, a switching means for switching the plurality of storage means to alternately write and read the transmission packets, Control means for controlling the storage means and the switching means to output alternately continuous transmission packets from the plurality of storage means.

  According to the eighth aspect of the present invention, by having a plurality of storage means, data can be read out by the other storage means while data is being written by one storage means. Thereby, stagnation of data can be prevented.

  According to the present invention, it is possible to improve the error correction capability and shorten the interleaving time required to achieve a desired service time rate.

<Outline of the present invention>
In the present invention, a frame structure of a packet used for long-period interleaving is related to a product code that is a combination of a plurality of codes, error position detection is performed with one code, and erasure correction is performed with the other code.

  Here, the product code will be described with reference to the drawings. FIG. 5 is a diagram illustrating an example for explaining a product code. When two block codes C1 (K, M) and C2 (k, m) are given, the product codes are arranged in a two-dimensional array of K rows and k columns as shown in FIG. Is encoded, and then m information blocks in each row are encoded to obtain a code word having a length of Kk as a whole. This code can be expressed as (Kk, Mm). This is called a product code of C1 and C2. Note that the code word C obtained is the same even if the order of encoding C1 and C2 is changed.

  In the present invention, by adopting the frame configuration shown in FIG. 5, a product code that is a combination of C1 and C2 codes is used, for example, erasure is performed at C1 and erasure correction is performed at C2. Improve the correction ability and reduce the interleaving time.

  Here, erasure means that the data is treated as having been lost without being forcibly determined when it is difficult to determine “0” or “1” during error correction. In addition, erasure correction refers to performing only correction processing on data whose erasure position in a code is known.

<Embodiment>
Hereinafter, preferred embodiments of an interleave transmission system, a transmission device, and a reception device according to the present invention having the above-described features will be described in detail with reference to the drawings.

<System configuration>
FIG. 6 is an example of a schematic configuration of an interleave transmission system according to the present invention. The interleave transmission system 60 shown in FIG. 6 is configured to include a transmission device 61 and a reception device 62, and radio waves transmitted from the transmission device 61 are received by the reception device 62 via a broadcasting satellite 63 through a satellite propagation path. Sent to.

  The transmission device 61 is configured to include a long-period interleaver 71, a first RS encoding unit 72, a second RS encoding unit 73, a modulation unit 74, and a transmission antenna 75. The receiving device 62 is configured to include a receiving antenna 76, a demodulating unit 77, a first RS decoding unit 78, a long-period deinterleaver 79, and a second RS decoding unit 80. Note that the long-cycle interleaver 71 and the long-cycle deinterleaver 79 shown in FIG. 6 have a memory, a hard disk, and the like as data storage means for writing and reading data.

  First, in the transmission device 61, when packet data is input to the long cycle interleaver 71, the long cycle interleaver 71 writes data for a preset time. Further, the long cycle interleaver 71 reads the accumulated data in a direction different from the writing direction, and outputs it to the first RS encoding unit 72. The first RS encoding unit 72 performs RS encoding by adding a parity for correcting the lack of data caused by rain attenuation or the like during transmission on the transmission side.

  Next, the first RS encoder 72 outputs the RS-encoded transmission packet to the long-period interleaver 71. The long-period interleaver 71 performs writing for the interleave time set in advance for the transmission packet input from the first RS encoding unit 72. Further, the long cycle interleaver 71 reads the accumulated data in a direction different from the writing direction, and outputs it to the second RS encoding unit 73.

  The 2nd RS encoding part 73 performs RS encoding for making the missing part generated by the rain attenuation etc. during transmission disappear on the transmission side. In addition, the second RS encoding unit 73 outputs the encoded transmission packet to the modulation unit 74. The modulation unit 74 modulates the input transmission packet by a method suitable for an application that modulates the transmission packet, a satellite transmission path, or the like, and causes the transmission antenna 75 to transmit the radio wave with a predetermined carrier frequency, for example. Note that the modulation method in the modulation unit 74 is not limited to phase modulation.

  Here, the data relayed by the broadcasting satellite 63 is transmitted to the receiving device 62 under the influence of radio wave attenuation, assuming that there is heavy rainfall or the like in the middle of the transmission path.

  In the receiving device 62, the reception antenna 76 receives the radio wave affected by the rain attenuation, and outputs the received data to the demodulation unit 77. The demodulator 77 performs demodulation using a method corresponding to the modulation method of the input transmission packet. Also, frequency conversion to the demodulation unit input frequency is performed. Further, the demodulation unit 77 outputs the demodulated data to the first RS decoding unit 78.

  The first RS decoding unit 78 performs error detection on the input data, and performs RS decoding or erasure based on the detected result. Specifically, error detection is performed on the input data, and if the number of errors exceeds the number that can be corrected, RS decoding is not performed and erasure is performed on a packet basis. Note that an initial value such as NULL is set in the lost packet portion.

  Further, data that is not lost in the first RS decoding unit 78 is decoded and output to the long-period deinterleaver 79. The long-period deinterleaver 79 writes the input data for a preset interleave time, and rearranges it with the same frame configuration as that on the transmission side. Further, the long-period deinterleaver 79 reads the accumulated data in a direction different from the writing direction, and outputs it to the second RS decoding unit 80.

  The second RS decoding unit 80 performs error correction (erasure correction) on the input data. Second RS decoding section 80 outputs the decoded data to long-period deinterleaver 79.

  The long cycle deinterleaver 79 writes the data input from the second RS decoding unit 80 for a predetermined time. The long-cycle deinterleaver 79 reads (stores) the accumulated data as read packet data in a direction different from the writing direction.

  As described above, using the first RS encoding unit 72 and the second RS encoding unit 73, the first RS decoding unit 78 and the second RS decoding unit 80 are related to a product code that is a combination of a plurality of codes. It is possible to improve the error correction capability and restore the error data distributed by the long period interleaver 71 and the long period deinterleaver 79 to the original signal.

<Transmission device functional configuration>
Next, a specific functional configuration example of the transmission device 61 in the present embodiment will be described with reference to the drawings. In addition, although the function structure mentioned later shows the example which transmits an MPEG (Moving Picture Experts Group) packet as an example of packet data, the packet data applicable in this invention are not this limitation.

  FIG. 7 is a diagram illustrating an example of a functional configuration of the transmission apparatus according to the present embodiment. 7 includes a first data switching unit 101, a first data storage unit 102, a second data storage unit 103, a first control unit 104, a second data switching unit 105, and a first RS. Encoding means 106, third data switching means 107, third data storage means 108, fourth data storage means 109, second control means 110, fourth data switching means 111, data buffer means 112, The second RS encoding means 113, the modulation means 114, and the transmission means 115 are configured.

  Here, in FIG. 7, the first data switching means 101, the first data storage means 102, the second data storage means 103, the first control means 104, the second data switching means 105, and the third data switching. The means 107, the third data storage means 108, the fourth data storage means 109, the second control means 110, the fourth data switching means 111, and the data buffer means 112 are functions provided in the long cycle interleaver. It is.

  The first data storage unit 102, the second data storage unit 103, the third data storage unit 108, and the fourth data storage unit 109 all have the same data writing speed, reading speed, and storage capacity. Shall.

  The first data storage means 102 and the second data storage means 103 write data for a predetermined time, and the third data storage means 108 and the fourth data storage means 109 write data for an interleave time. Is completed, the first data storage means 102 or the second data storage means 103 outputs the voltage High of the control signal to the first control means 104, and the third data storage means 108 or the fourth data storage means 109 The control signal voltage High is output to the second control means 110.

  As described above, the reason why the first data storage means 102 and the second data storage means 103 and the third data storage means 108 and the fourth data storage means 109 are paired with each other is that the double buffer configuration is used. This is to prevent data stagnation by alternately repeating the writing and reading timings. Note that the data storage means is not limited to two but may be a plurality.

  Further, the first data switching means 101 and the third data switching means 107 receive the input data when the control signal voltage High is received from the first control means 104 and the second control means 110, respectively, and FIG. When it outputs to Side 1 and receives the voltage Low of the control signal, it plays the role of a switch that outputs input data to Side 2 shown in FIG.

  On the other hand, when the second data switching unit 105 and the fourth data switching unit 111 receive the voltage High of the control signal from the first control unit 104 and the second control unit 110, respectively, the data from the Side 2 shown in FIG. When the control signal voltage Low is received, the data is switched to the data from Side 1 shown in FIG.

  Further, the first control unit 104 controls operations in the first data storage unit 102, the second data storage unit 103, the first data switching unit 101, and the second data switching unit 105. Specifically, every time the control signal voltage High from the first data storage means 102 or the second data storage means 103 is received, the same control signal voltage High or Low is switched and output to each part.

  Similarly, the second control unit 110 controls operations in the third data storage unit 108, the fourth data storage unit 109, the third data switching unit 107, and the fourth data switching unit 111. Specifically, every time the control signal voltage High from the third data storage means 108 or the fourth data storage means 109 is received, the same control signal voltage High or Low is switched and output to each unit.

  Further, the first RS encoding means 106 performs RS encoding by adding a parity for correcting the lack of data caused by rain attenuation or the like on the receiving side. Further, the data buffer unit 112 accumulates information blocks of RS codes. Also, the second RS encoding means 113 performs RS encoding by adding a parity for erasing a missing portion of data caused by rain attenuation or the like. The modulation unit 114 performs modulation by a method suitable for an application or a satellite transmission path. Further, the transmission unit 115 transmits the data modulated by the modulation unit 114.

  Here, specific operation contents will be described. For example, when the voltage of the control signal of the first control means 104 and the second control means 110 is in a high state, the first switching means 101 selects Side1 shown in FIG. 7 as the data output destination, and the first data storage The MPEG packet is output to the means 102. Here, an example of a frame configuration stored in the first data storage unit 102 will be described with reference to the drawings.

  FIG. 8 is a diagram illustrating an example of a frame configuration stored in the first data storage unit on the transmission side. As shown in FIG. 8, the first data accumulating unit 102 receives the input MPEG packet according to the direction of the arrow 35 for a predetermined time (in FIG. 8, M (Y axis) × L (X axis) bytes [bytes]. ] Minutes). Note that Fn indicates a minimum interleave frame.

  The first data storage unit 102 transmits the voltage High of the control signal to the first control unit 104 after the writing for the transmission frame is completed, and waits until the control signal Low from the first control unit 104 is received.

  Next, after receiving the voltage Low of the control signal from the first control means 104, the first data storage means 102 outputs the stored MPEG packets for a predetermined time in the order of the arrow 36 shown in FIG.

  Further, when the second data switching unit 105 receives the voltage Low of the control signal from the first control unit 104, the second data switching unit 105 outputs the data from Side1, and the MPEG packet read from the first data storage unit 102 is the first RS. It is output to the encoding means 106.

  Note that when the voltage of the control signal of the first control unit 104 is switched to Low, the MPEG packet input to the first data switching unit 101 is written by the second data storage unit 103 for a predetermined time.

  The first RS encoding means 106 performs RS encoding of the code block length of K bytes, assuming that the input MPEG packet has an information block length of M bytes and a check block as N bytes. The transmission packet after the RS encoding is output to Side 1 in the third data switching unit 107 that has received the voltage High of the control signal from the second control unit 110. Here, an example of a frame configuration stored in the third data storage unit 108 will be described with reference to the drawings.

  FIG. 9 is a diagram illustrating an example of a frame configuration stored in the third data storage unit on the transmission side. As shown in FIG. 9, the third data storage means 108 writes the transmission packet for the input transmission frame (in FIG. 9, K × L bytes [bytes]) according to the direction of the arrow 37. The third data accumulating unit 108 transmits the control signal voltage High to the second control unit 110 after the transmission of the transmission frame is completed, and receives the control signal voltage Low from the second control unit 110. In the order of the arrow 38 shown in FIG. 9, the accumulated data for the time (K × L bytes) is read and output to the data buffer means 112.

  The data buffer unit 112 inputs and outputs transmission packets in units of m bytes using an m-byte FIFO (First In First Out). This can adjust the information block length at the time of RS encoding according to the attenuation state of the transmission path, the desired error correction capability, and the like. For example, the calculation time of RS encoding can be shortened by setting the information block length at the time of RS encoding short.

  The data buffer unit 112 outputs the transmission packet in units of m bytes to the second RS encoding unit 113. The second RS encoding means 113 performs RS encoding using an inspection block length of n bytes and a code block length of k bytes, where the information block is m bytes.

  Here, an example of the frame configuration after being encoded by the second RS encoding means 113 will be described with reference to the drawings. FIG. 10 is a diagram illustrating an example of a frame configuration after RS encoding. FIG. 10 shows a configuration in which transmission packets of RS code length k bytes × Fn in the X-axis direction and transmission packets of RS code length K bytes in the Y-axis direction are arranged.

  This transmission frame can be said to be Fn multiplexed small transmission frames of k × K bytes. Since the RS code length k bytes and the RS code length K bytes are in a product code relationship, for example, , Data can be erased with n bytes, and erasure correction can be performed with N bytes.

  As described above, when the data buffer unit 112 assumes a FIFO of about m bytes, RS coding can be performed for each k bytes in the X-axis direction, and the entire k × Fn bytes are set as the RS code length. Compared with the case, the calculation time of RS encoding can be shortened.

  Here, specific examples of the data writing direction and the reading direction will be described with reference to the drawings. FIG. 11 is a diagram illustrating an example of a specific example of the data writing direction / reading direction.

  As shown in FIG. 11, the frame configuration in which RS code length 200 [bytes] × 400 transmission packets in the X-axis direction and RS code length 400 [bytes] transmission packets in the Y-axis direction is 400 × 200. It can be considered that 400 transmission frames with small bytes are multiplexed. For example, assume that a continuous data error of 80000 bytes has occurred. If data writing / reading is folded at 200 bytes × 400 according to the order of the arrow 39-1 shown in FIG. 11 and when it is folded back at 200 bytes according to the order of the arrow 39-2 shown in FIG. In the case of arrow 39-1, when viewed in the Y-axis direction, the error rate can be reduced to 1/400, and error data can be efficiently restored. In this case, all 400 × 200 small transmission frames have data errors and cannot be restored. Therefore, it is desirable to perform the data reading direction and the writing direction as shown by the arrow 39-1.

  The second RS encoding means 113 outputs the RS-encoded transmission packet to the modulation means 114. The modulation unit 114 modulates the input transmission packet and then outputs the modulated transmission packet to the transmission unit 115. The transmission unit 115 transmits the modulated signal as a radio wave.

<Receiver functional configuration>
Next, a functional configuration example of the receiving device 62 in the present embodiment will be described with reference to the drawings. In the functional configuration described later, an example in which an MPEG packet is received as an example of packet data is shown, but a packet applicable in the present invention is not limited to this.

  FIG. 12 is a diagram illustrating an example of a functional configuration of the receiving device according to the present embodiment. 12 includes a receiving unit 121, a demodulating unit 122, a data buffer unit 123, a data erasing unit 124, a first data switching unit 125, a first control unit 126, and a first data storage. Means 127, second data storage means 128, second data switching means 129, data loss correction means 130, third data switching means 131, second control means 132, third data storage means 133, A fourth data storage unit 134 and a fourth data switching unit 135 are included.

  Here, in FIG. 12, the data buffer means 123, the first data switching means 125, the first control means 126, the first data storage means 127, the second data storage means 128, and the second data switching means 129. The third data switching unit 131, the second control unit 132, the third data storage unit 133, the fourth data storage unit 134, and the fourth data switching unit 135 are provided in the long period deinterleaver. It is a function. The data erasure unit 124 and the data erasure correction unit 130 are functions provided in the RS decoding unit.

  Furthermore, the first data storage unit 127, the second data storage unit 128, the third data storage unit 133, and the fourth data storage unit 134 all have the same data writing speed, reading speed, and storage capacity. Shall.

  The receiving unit 121 receives a radio wave transmitted from the transmission device 61 by the broadcasting satellite 63 or the like. The demodulator 122 demodulates the transmission packet input from the receiver 121. The data buffer means 123 is assumed to be, for example, a FIFO of about several hundred bytes, which is the same as that on the transmission side, and accumulates data set in advance in order to shorten the calculation time required for RS decoding.

  The data erasure unit 124 detects an error in the data of the transmission packet, and decodes or deletes the corresponding packet based on the detection result. Further, the data loss correction unit 130 performs error correction processing on the lost data.

  The first data storage means 127 and the second data storage means 128 are written when the interleaving time has been written, and the third data storage means 133 and the fourth data storage means 134 are written with data for a predetermined time. Is completed, the first data storage means 127 or the second data storage means 128 outputs the voltage High of the control signal to the first control means 126, and the third data storage means 133 or the fourth data storage means 134 The control signal voltage High is output to the second control means 132.

  As described above, the reason why the first data storage unit 127, the second data storage unit 128, the third data storage unit 133, and the fourth data storage unit 134 are paired is the same as that of the transmission apparatus described above. This is because a double buffer configuration is used to prevent data stagnation. Note that the data storage means is not limited to two but may be a plurality.

  The first data switching means 125 and the third data switching means 131 are shown in FIG. 12 when the control signal voltage High is received from the first control means 126 and the second control means 132, respectively. When it outputs to Side 1 and receives the voltage Low of the control signal, it plays the role of a switch that outputs input data to Side 2 shown in FIG.

  On the other hand, when the second data switching unit 129 and the fourth data switching unit 135 receive the voltage High of the control signal from the first control unit 126 and the second control unit 132, respectively, the data from the Side 2 shown in FIG. When the control signal voltage Low is received, the data is switched to the data from Side 1 shown in FIG.

  Further, the first control unit 126 controls operations in the first data storage unit 127, the second data storage unit 128, the first data switching unit 125, and the second data switching unit 129. Specifically, every time the control signal voltage High from the first data storage means 127 or the second data storage means 128 is received, the voltage High or Low of the same control signal is switched and output to each unit.

  Similarly, the second control unit 132 controls operations in the third data storage unit 133, the fourth data storage unit 134, the third data switching unit 131, and the fourth data switching unit 135. Specifically, every time the control signal voltage High from the third data storage means 133 or the fourth data storage means 134 is received, the same control signal voltage High or Low is switched and output to each unit.

  Here, specific operation contents will be described. The receiving unit 121 receives the radio wave transmitted from the transmission device 61 by the broadcasting satellite 63 or the like, and outputs it to the demodulating unit 122. The demodulator 122 demodulates the received signal input from the receiver 121 in accordance with the modulation method on the transmission side. Further, the demodulating means 122 outputs the demodulated data to the data buffer means 123.

  The data buffer unit 123 accumulates data set in advance. Further, the data buffer unit 123 outputs the accumulated data to the data erasure unit 124.

  The data erasure unit 124 detects the error position x where σ (x) = 0 by the above-described equation (6) for the input transmission packet (RS [k, m] code, n = k−m). To do.

  Next, RS decoding or erasure is performed for each packet based on the detection result. Here, the above-described content will be specifically described. For example, when the number of αs where σ = 0 is n / 2 or more, RS decoding is not performed, and all the data in packet units corresponding to the code block length is stored. Is lost so that the data of the packet is not output (however, the write position to the storage means is counted up at this time, and an initial value such as NULL is set in the lost packet part) .)

  Normally, in the RS code, an error is detected after the error is detected, so that an error is detected with n / 2 bytes for the check block n and an error is corrected with the remaining n / 2 bytes. However, if the erasure position is known, erasure correction that restores all n-byte data is possible. If erasure correction can be performed, the number of data can be corrected twice as compared with a normal RS decoding system that simply detects and corrects error positions.

  The data after the data erasure is performed by the data erasure means 124 is switched to Side1 by the first data switching means 125 that receives the control voltage High from the first control means 126, for example, and is stored in the first data. It is output to the means 127.

  Here, a frame configuration example of the transmission packet stored in the first data storage unit on the receiving side will be described with reference to the drawings. FIG. 13 is a diagram illustrating an example of a frame configuration of a transmission packet stored in the first data storage unit on the receiving side.

  The first data storage means 127 writes the input transmission packet for the interleaving time (K × L bytes in FIG. 13) in the order of the arrow 40 shown in FIG. Note that data loss caused by rain attenuation or the like during transmission occurs continuously in the X-axis direction as a lost packet as shown by the hatched line in FIG. 13, but this is seen in the Y-axis direction. In addition, data loss is only 1 / L byte with respect to packet loss, and the data is lost in units of packets, so that the error position can be easily identified, which is more effective than the conventional method. Error correction can be performed.

  Next, after the writing for the transmission frame is completed, the first data storage unit 127 transmits the voltage High of the control signal to the first control unit 126, and sets the voltage Low of the control signal from the first control unit 126. Wait for reception. Further, after receiving the control voltage Low from the first control unit 126, the first data storage unit 127 reads out the transmission packet for the interleave time (K × L bytes) in the order of the arrow 41 shown in FIG.

  Thereafter, the data output by the first data storage unit 127 is output to the data loss correction unit 130 by the second data switching unit 129. The data loss correction unit 130 corrects the loss of input data. That is, only correction processing is performed on data whose erasure position in the code is known. In addition, since the lost transmission packet that has not been stored in the first data storage unit 127 can be regarded as the error position, it is not necessary to derive the error position polynomial using the above equation (4). Become.

  Here, the above-mentioned content is demonstrated using figures. FIG. 14 is a diagram for explaining a reception polynomial generation process at the time of RS decoding. The data lost in FIG. 14 will be described as the 186th to 188th bytes.

  Since there is no x term corresponding to the 186th to 188th bytes in the received code polynomial R (x) shown in FIG. 14, the error position can be specified only by confirming the received polynomial itself.

Thereby, by calculating using the formulas (3) and (6) in which the above-described formula (4) is omitted, σ _{1 to} σ _2t are calculated, and by solving the above-described formula (7), Error correction up to 2t (= N) bytes is possible. Therefore, it can be said that the correction capability is twice that of the correction capability of the conventional RS code.

  The data erasure correction unit 130 performs erasure correction using the remaining parity (code) of the product code, and outputs the MPEG packet after the erasure correction to the third data switching unit 131. The third data switching unit 131 receives the control voltage High from the second control unit 132, switches to Side1, and outputs an MPEG packet. Here, a frame configuration example of the MPEG packet stored in the third data storage unit 133 will be described with reference to the drawings.

  FIG. 15 is an example of a frame configuration example stored in the third storage unit on the receiving side. The third data storage means 133 writes a preset frame (M × L bytes) in the order of the arrow 42 shown in FIG. The third data storage means 133 transmits the control signal voltage High to the second control means 132 after the MPEG data has been stored, and receives the control signal voltage from the second control means 132. In accordance with the order of the arrow 43 shown in FIG. 15, the data (M × L bytes) stored in the third data storage unit 133 is read, and the MPEG data is output (reproduced) by the fourth data switching unit 135.

  As described above, the transmission frame configuration of the long-period interleave method is related to the product code that is a combination of a plurality of codes, error position detection is performed with one code, and erasure correction is performed with the other code. Thus, when the error correction capability is improved and compared with the transmission efficiency of the same information as in the conventional system, the interleaving time required to achieve the desired service time rate can be reduced.

<Comparison between conventional and present invention>
Here, the comparison between the conventional method and the transmission method to which the present invention is applied will be described based on the measurement result of the interleave time and the service time rate with the transmission efficiency set to the same condition.

  Note that, as a conventional method, an RS [204,150] code (information transmission efficiency of 74%) is used, and an RS [204,188] code (information transmission efficiency of 92%) and an RS in the transmission to which the present invention is applied. [204, 163] code (information transmission efficiency 80%) was used.

  In addition, the period from May 2002 to April 2003 was used as the rain attenuation data, and the long-period interleaving method was applied to the transmission method of the current 12 GHz band BS digital broadcasting.

  Further, the transmission parameters for BS digital broadcasting are as follows: satellite EIRP (Equivalent Isotropy Radiated Power) is 59 dBW, modulation method is TC8PSK (Tellis Coded 8 Phase Shift Keying), rainfall margin is 4.8 dB, and modulation rate is 86 b. The receiving antenna diameter was 45 cm (efficiency: 70%).

  FIG. 16 shows the relationship between the interleave time and the service time rate measured based on the above-described conditions. As shown in FIG. 16, when the interleaving time of the conventional method and the transmission method to which the present invention is applied is compared, the transmission method to which the present invention is applied has, for example, a service time rate of 99.98 compared to the conventional transmission method. The interleaving time required to achieve% can be reduced by about 3 hours.

  In addition, the conventional method requires an interleaving time of 765 minutes for the interruption time Y = 30 minutes in order to restore the data error due to the rain interruption and achieve a service time rate of 100%. The storage capacity was 114 GB when the transmission rate was 20 Mbps.

  However, the error structure is corrected by performing error position detection with one code and erasure correction with the other code, with the long-period interleaved frame structure in the present invention as a product code that is a combination of multiple codes. Even if the conditions are the same as K = 204, M = 188, and N = 16, the interleaving time can be shortened to Y / (N / K) = 30 / (16/204) = 383 minutes. . Furthermore, the storage capacity can be reduced to about ½, 20 × 383 × 60/8 = 57 GB.

  As described above, according to the present invention, the interleaving time required to achieve a desired service time rate can be reduced. Specifically, the interleaved transmission frame configuration is related to a product code, which is a combination of multiple codes, and error correction is performed by performing error position detection with one code and erasure correction with the other code. Ability can be improved. Further, the storage capacity can be further reduced.

  The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to such specific embodiments, and various modifications, within the scope of the gist of the present invention described in the claims, It can be changed.

It is a figure of an example which shows schematic structure of the conventional interleave transmission system. It is a figure which shows an example of the transmission frame structure accumulate | stored in the conventional long period interleaver. It is a figure which shows an example of the transmission frame structure accumulate | stored in the conventional long period deinterleaver. It is a figure of an example for demonstrating the production | generation process of the reception code polynomial R (x) at the time of RS decoding. It is a figure of an example for demonstrating a product code | symbol. It is a figure of an example which shows schematic structure of the interleave transmission system in this invention. It is a figure which shows an example of a function structure of the transmitter in this embodiment. It is a figure which shows an example of the frame structure accumulate | stored in the 1st data storage means in the transmission side. It is a figure which shows an example of the frame structure accumulate | stored in the 3rd data storage means in the transmission side. It is a figure which shows an example of the frame structure after RS encoding. FIG. 5 is an example illustrating a specific example of a data writing direction and a data reading direction. It is a figure which shows an example of a function structure of the receiver in this embodiment. It is a figure which shows an example of the frame structure of the transmission packet accumulate | stored in the 1st data storage means in the receiving side. It is a figure for demonstrating the reception polynomial production | generation process at the time of RS decoding. It is a figure of an example which shows the example of a frame structure accumulate | stored in the 3rd storage means in the receiving side. It is a figure which shows the relationship between interleaving time and a service time rate.

Explanation of symbols

10, 60 Interleaved transmission system 11, 61 Transmitter 12, 62 Receiver 13, 63 Broadcast satellite 21 RS encoder 22, 71 Long-period interleaver 23, 74 Modulator 24, 75 Transmit antenna 25, 76 Receive antenna 26, 77 Demodulator 27, 79 Long-period deinterleaver 28 RS decoder 31-43 Arrow 72 First RS encoder 73 Second RS encoder 78 First RS decoder 80 Second RS decoder 101, 125 First data Switching means 102, 127 First data storage means 103, 128 Second data storage means 104, 126 First control means 105, 129 Second data switching means 106 First RS encoding means 107, 131 Third data switching means 108, 133 Third data storage means 109, 134 Fourth data storage means 11 0, 132 Second control means 111, 135 Fourth data switching means 112, 123 Data buffer means 113 Second RS encoding means 114 Modulation means 121 Receiving means 122 Demodulation means 124 Data erasure means 130 Data erasure correction means

Claims (8)

In an interleaved transmission system comprising a transmission device that transmits interleaved transmission packets based on a preset time, and a reception device that receives transmission packets from the transmission device and reproduces them as packet data,
The transmission device has encoding means for encoding input packet data into a transmission packet composed of a product code obtained by combining a plurality of codes,
The receiving apparatus detects a data error in the transmission packet, and performs decoding or erasure in units of packets based on a detection result, and erasure obtained by the first decoding means And an interleave transmission system comprising: a second decoding unit configured to perform error correction on the received packet. In a transmitting device that transmits a transmission packet interleaved based on a preset time,
An interleaver that writes the input packet data for a preset time and reads the written packet data in a direction different from the writing direction;
On the transmission side, encoding is performed by adding parity for correcting the packet data read from the interleaver on the reception side, and the encoded transmission packet is output to the interleaver. Means,
And a second encoding unit that performs encoding by adding a parity for erasing the packet data read from the interleaver in units of packets on the receiving side. The transmission packet obtained by the second encoding means is
The transmission apparatus according to claim 2, wherein the transmission apparatus has a frame configuration including a product code obtained by combining a plurality of codes.   4. The transmission apparatus according to claim 2, further comprising data buffer means for adjusting a packet length to be lost on the transmission side. A plurality of storage means for storing the packet data;
Switching means for switching to alternately write and read the packet data to and from the plurality of storage means;
5. The control unit according to claim 2, further comprising a control unit configured to control the storage unit and the switching unit to output alternately continuous packet data from the plurality of storage units. The transmitting device described. In a receiving apparatus that receives a transmission packet interleaved based on a preset time,
First decoding means for detecting an error in the data with respect to the transmission packet and performing decoding or erasure in units of packets based on the detection result;
And a second decoding means for correcting an error of the lost packet obtained by the first decoding means. The first decoding means includes
7. The receiving apparatus according to claim 6, wherein error detection is performed on the input transmission packet, and if the number of errors exceeds a correctable number, the packet is erased in units of packets without being decoded. A plurality of storage means for storing the transmission packet;
Switching means for switching to alternately write and read the transmission packet with respect to the plurality of storage means;
8. The receiving apparatus according to claim 6, further comprising a control unit configured to control the storage unit and the switching unit to output alternately continuous transmission packets from the plurality of storage units.

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