JP2005327947A - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

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Publication number
JP2005327947A
JP2005327947A JP2004145741A JP2004145741A JP2005327947A JP 2005327947 A JP2005327947 A JP 2005327947A JP 2004145741 A JP2004145741 A JP 2004145741A JP 2004145741 A JP2004145741 A JP 2004145741A JP 2005327947 A JP2005327947 A JP 2005327947A
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circuit board
semiconductor chip
sealing material
semiconductor device
manufacturing
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Japanese (ja)
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Tetsuya Tokunaga
哲也 徳永
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2004145741A priority Critical patent/JP2005327947A/en
Publication of JP2005327947A publication Critical patent/JP2005327947A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

Abstract

<P>PROBLEM TO BE SOLVED: To reduce generation of a void in a gap between bumps by avoiding air from being involved into the gap when a semiconductor chip is mounted on a circuit board in a process for manufacturing a semiconductor device, wherein the semiconductor chip is mounted with face-down on the circuit board and the gap between the semiconductor chip and the circuit board is filled with a sealing material. <P>SOLUTION: A sealing material 3 is mounted on a circuit board 1, an opening 3a is formed in the sealing material 3 at a predetermined position corresponding to a bump 6 formed on an electrode 5 of a semiconductor chip 4, and the semiconductor chip 4 is mounted on the circuit board 1 having the sealing material 3 having the opening 3a mounted thereon. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、半導体チップがフリップチップ方式で回路基板上に搭載され、半導体チップと回路基板との間隙に封止材料が介在する構造を有する半導体装置の製造方法に関するものである。   The present invention relates to a method of manufacturing a semiconductor device having a structure in which a semiconductor chip is mounted on a circuit board in a flip-chip manner, and a sealing material is interposed in a gap between the semiconductor chip and the circuit board.

従来の技術として、図７に示すように、半導体チップ４を回路基板１上へフリップチップ方式で実装する方法が知られている。この方法では、半導体チップ４の電極５上にバンプ６を形成しておき、導電性粒子を含まない絶縁性熱硬化性樹脂である封止材料３を半導体チップ４と回路基板１との間に介在させた状態で、バンプ６と回路基板１表面の配線電極２とを位置合わせし、加熱された加圧ヘッド７で半導体チップ４を回路基板１に押圧することにより、半導体チップ４と回路基板１の反りを矯正しながら両者間の封止材料３を融解、硬化させて、半導体チップ４と回路基板１とを接合する（例えば特許文献１参照）。
特許第３１５０３４７号 As a conventional technique, as shown in FIG. 7, a method of mounting a semiconductor chip 4 on a circuit board 1 by a flip chip method is known. In this method, bumps 6 are formed on the electrodes 5 of the semiconductor chip 4, and the sealing material 3, which is an insulating thermosetting resin not containing conductive particles, is interposed between the semiconductor chip 4 and the circuit board 1. The bumps 6 and the wiring electrodes 2 on the surface of the circuit board 1 are aligned with each other, and the semiconductor chip 4 and the circuit board are pressed by pressing the semiconductor chip 4 against the circuit board 1 with a heated pressure head 7. While the warp 1 is corrected, the sealing material 3 between the two is melted and cured to bond the semiconductor chip 4 and the circuit board 1 (see, for example, Patent Document 1).
Japanese Patent No. 3150347

しかし近年、半導体チップ４上の回路の高密度化によって、電極５が狭ピッチ化し、バンプ６同士の間隔が狭くなってきており、バンプ６同士の間隙における封止材料３の流動性の低下を来たしている。そのため、ヘッド７により半導体チップ４を回路基板１に押圧する際に、バンプ６が潰れて変形しながら融解した封止材料３をバンプ６の周囲に押しのける時に、バンプ６同士の間隙に空気を巻き込みやすく、それによるボイドが発生し、品質不良を生ずることがあった。   However, in recent years, the density of the circuit on the semiconductor chip 4 has increased, and the pitch of the electrodes 5 has been narrowed and the distance between the bumps 6 has been narrowed. Have come. Therefore, when the semiconductor chip 4 is pressed against the circuit board 1 by the head 7, when the sealing material 3 melted while the bumps 6 are crushed and deformed is pushed around the bumps 6, air is caught in the gaps between the bumps 6. It was easy to cause voids, resulting in poor quality.

本発明は上記問題を解決するもので、半導体チップを回路基板上に搭載する際にバンプ同士の間隙に空気を巻き込みにくい半導体装置の製造方法を提供することを目的とする。   SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device in which air is not easily caught in a gap between bumps when a semiconductor chip is mounted on a circuit board.

上記課題を解決するために、本発明の第１の半導体装置の製造方法は、半導体チップを回路基板上にフェースダウンで搭載し、前記半導体チップと回路基板との間隙に封止材料を充填した半導体装置を製造する際に、前記回路基板上に封止材料を搭載するとともに、前記半導体チップの電極上に形成されたバンプに対応する前記封止材料の所定位置に孔部または凹部を形成し、前記孔部または凹部が形成された封止材料を搭載した前記回路基板上に前記半導体チップを搭載することを特徴とする。封止材料に対する孔部または凹部の形成は、封止材料を回路基板上に搭載する前に行ってもよいし搭載後に行ってもよいが、搭載前に行う方が生産性を向上できる。   In order to solve the above-described problems, in a first method of manufacturing a semiconductor device according to the present invention, a semiconductor chip is mounted face-down on a circuit board, and a gap between the semiconductor chip and the circuit board is filled with a sealing material. When manufacturing a semiconductor device, a sealing material is mounted on the circuit board, and a hole or a recess is formed at a predetermined position of the sealing material corresponding to a bump formed on the electrode of the semiconductor chip. The semiconductor chip is mounted on the circuit board on which the sealing material in which the hole or the recess is formed is mounted. The formation of the hole or recess in the sealing material may be performed before or after the sealing material is mounted on the circuit board, but the productivity can be improved by performing it before the mounting.

また本発明の第２の半導体装置の製造方法は、半導体チップを回路基板上にフェースダウンで搭載し、前記半導体チップと回路基板との間隙に封止材料を充填した半導体装置を製造する際に、前記半導体チップの電極に対応する前記回路基板の配線電極上の所定位置にバンプを形成するとともに、前記半導体チップの電極に対応する前記封止材料の所定位置に孔部または凹部を形成し、前記バンプが形成された回路基板上に前記孔部または凹部が形成された封止材料を位置合わせして搭載した後、前記半導体チップを搭載することを特徴とする。   According to a second method of manufacturing a semiconductor device of the present invention, a semiconductor chip is mounted face-down on a circuit board, and a semiconductor device in which a gap between the semiconductor chip and the circuit board is filled with a sealing material is manufactured. Forming bumps at predetermined positions on the wiring electrodes of the circuit board corresponding to the electrodes of the semiconductor chip, and forming holes or recesses at predetermined positions of the sealing material corresponding to the electrodes of the semiconductor chip; The semiconductor chip is mounted after the sealing material in which the hole or recess is formed is positioned and mounted on the circuit board on which the bump is formed.

上記した各製造方法によれば、封止材料に孔部または凹部を形成するので、各バンプはその孔部または凹部内に入り込み、バンプ同士の間には封止材料が配置されることになり、各バンプの周りに僅かに形成される間隙も、半導体チップの搭載時の加熱加圧で潰されて変形するバンプと融解した封止材料とにより徐々にかつ確実に埋められる。したがって、バンプ同士の間隔が狭い場合も、従来のようにバンプ同士の間隙の空気を巻き込むことは殆どなく、この箇所におけるボイドの発生を低減できる。さらに第２の製造方法によれば、半導体チップを回路基板上に搭載する際に、半導体チップのバンプの先端が回路基板上の配線電極のエッジに当たりながら変形することで半導体チップが受ける水平方向の抗力で起こるチップ搭載位置ずれを防止することができる。   According to each manufacturing method described above, since the hole or recess is formed in the sealing material, each bump enters the hole or recess, and the sealing material is disposed between the bumps. The gaps slightly formed around each bump are gradually and surely filled with the bumps that are crushed and deformed by heat and pressure when the semiconductor chip is mounted and the melted sealing material. Therefore, even when the distance between the bumps is narrow, the air in the gap between the bumps is hardly involved as in the conventional case, and the generation of voids at this point can be reduced. Further, according to the second manufacturing method, when the semiconductor chip is mounted on the circuit board, the tip of the bump of the semiconductor chip is deformed while hitting the edge of the wiring electrode on the circuit board. The chip mounting position shift caused by drag can be prevented.

本発明の半導体装置の製造方法は、半導体チップと回路基板との間に介在させる封止材料のバンプ対応位置に予め孔部または凹部を形成する構成を有することにより、半導体チップを回路基板上に搭載する際にバンプ同士の間隙に空気を巻き込む現象を抑えることができ、この箇所におけるボイドの発生を低減できる。またこの内、回路基板側にバンプを形成する方法によれば、半導体チップを回路基板上に搭載する際に、半導体チップのバンプの先端が回路基板上の配線電極のエッジに当たりながら変形することで起こるチップ搭載位置ずれを防止できる。   The method for manufacturing a semiconductor device according to the present invention has a configuration in which a hole or a recess is formed in advance at a bump corresponding position of a sealing material interposed between a semiconductor chip and a circuit board, so that the semiconductor chip is formed on the circuit board. It is possible to suppress the phenomenon that air is caught in the gap between the bumps when mounting, and the generation of voids at this location can be reduced. Of these, according to the method of forming bumps on the circuit board side, when the semiconductor chip is mounted on the circuit board, the tip of the bump of the semiconductor chip is deformed while hitting the edge of the wiring electrode on the circuit board. It is possible to prevent the chip mounting position shift that occurs.

以下、本発明の実施の形態について、図面を参照しながら説明する。製造される半導体装置の構成は先に図７を用いて説明した従来のものと同様なので、図７と同じ符号を付して説明する。
（第１の実施形態）
図１は本発明の第１の実施形態における半導体装置の製造方法を示す工程断面図である。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. Since the structure of the semiconductor device to be manufactured is the same as that of the conventional device described with reference to FIG. 7, the same reference numerals as those in FIG.
(First embodiment)
FIG. 1 is a process sectional view showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

図１（ａ）に示すように、回路基板１上には配線電極２が形成されている。この回路基板１上に、図１（ｂ）に示すように封止材料３を実装する。封止材料３は導電性粒子を含まない絶縁性熱硬化性樹脂、例えばエポキシ系樹脂であり、シート形態であってもペースト状のものであってもよい。   As shown in FIG. 1A, wiring electrodes 2 are formed on the circuit board 1. A sealing material 3 is mounted on the circuit board 1 as shown in FIG. The sealing material 3 is an insulating thermosetting resin containing no conductive particles, for example, an epoxy resin, and may be in a sheet form or a paste form.

次に、図１（ｃ）に示すように、封止材料３の所定位置に、封止材料３を厚み方向に貫通する孔部３ａをレーザー、ウォータージェット、ドリル等により形成する。孔部３ａの位置は、図１（ｄ）に示す半導体チップ４の電極５上に予め形成した複数のバンプ６のそれぞれに対応する位置である。   Next, as shown in FIG. 1C, a hole 3a penetrating the sealing material 3 in the thickness direction is formed at a predetermined position of the sealing material 3 by a laser, a water jet, a drill, or the like. The position of the hole 3a is a position corresponding to each of the plurality of bumps 6 formed in advance on the electrode 5 of the semiconductor chip 4 shown in FIG.

次に、図１（ｅ）に示すように、加熱された、吸引孔７ａを備えた加圧ヘッド７にて半導体チップ４を吸着し、そのバンプ６と回路基板１上の配線電極２とを位置合わせした上で所定の加圧力で押圧することにより、半導体チップ４と回路基板１の反りを矯正しながら封止材料３を溶融、硬化させて、半導体チップ４を回路基板１上に固定する。   Next, as shown in FIG. 1 (e), the semiconductor chip 4 is adsorbed by a heated pressure head 7 having a suction hole 7a, and the bump 6 and the wiring electrode 2 on the circuit board 1 are connected. By aligning and pressing with a predetermined pressure, the sealing material 3 is melted and cured while correcting the warp of the semiconductor chip 4 and the circuit board 1, and the semiconductor chip 4 is fixed on the circuit board 1. .

図１（ｆ）は、以上のようにして構成された半導体装置を示し、半導体チップ４がフリップチップ方式で回路基板１上に搭載され、半導体チップ４と回路基板１との間隙に封止材料３が介在する構造を有する。   FIG. 1 (f) shows the semiconductor device configured as described above, in which the semiconductor chip 4 is mounted on the circuit board 1 by the flip chip method, and a sealing material is provided in the gap between the semiconductor chip 4 and the circuit board 1. 3 has an intervening structure.

この第１の実施形態の製造方法では、上記したように封止材料３に予め孔部３ａを形成するため、各バンプ６は孔部３ａ内に入り込み、バンプ６同士の間には封止材料３が配置されることになり、各バンプ６の周りに僅かに形成される間隙も、半導体チップ４の搭載時の加熱加圧で潰されて変形するバンプ６と封止材料３とにより徐々にかつ確実に埋められる。したがって、バンプ６同士の間隔が狭い場合も、従来のようにバンプ６同士の間隙の空気を巻き込むことは殆どなく、この箇所におけるボイドの発生を低減できる。
（第２の実施形態）
図２は本発明の第２の実施形態における半導体装置の製造方法を示す工程断面図である。 In the manufacturing method of the first embodiment, since the hole 3a is formed in the sealing material 3 in advance as described above, each bump 6 enters the hole 3a, and the sealing material is interposed between the bumps 6. 3 is arranged, and the gap formed slightly around each bump 6 is gradually reduced by the bump 6 and the sealing material 3 that are crushed and deformed by heat and pressure when the semiconductor chip 4 is mounted. And surely filled. Therefore, even when the interval between the bumps 6 is narrow, the air in the gap between the bumps 6 is hardly involved as in the conventional case, and the generation of voids at this point can be reduced.
(Second Embodiment)
FIG. 2 is a process sectional view showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

この第２の実施形態が上記第１の実施形態と相違するのは、図２（ｃ）に示すように、封止材料３の所定位置に凹部３ｂを孔部３ａに代えて形成する点である。
この第２の実施形態の製造方法によっても、第１の実施形態と同様の半導体装置を構成できる。この場合、各バンプ６が凹部３ｂ内に入り込み、バンプ６同士の間に封止材料３が配置されることで、加熱加圧時にバンプ６同士の間隙の空気が巻き込まれるのが防止される。
（第３の実施形態）
図３は本発明の第３の実施形態における半導体装置の製造方法を示す工程断面図である。 The second embodiment is different from the first embodiment in that, as shown in FIG. 2C, a recess 3b is formed at a predetermined position of the sealing material 3 in place of the hole 3a. is there.
A semiconductor device similar to that of the first embodiment can also be configured by the manufacturing method of the second embodiment. In this case, each bump 6 enters the recess 3b, and the sealing material 3 is disposed between the bumps 6 to prevent air in the gap between the bumps 6 from being caught during heating and pressurization.
(Third embodiment)
FIG. 3 is a process sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

この第３の実施形態が上記第１の実施形態と相違するのは、図３（ｂ）に示すように、実装前のシート状封止材料８における半導体チップ４のバンプ６の配列に対応する位置に、封止材料８を厚み方向に貫通する孔部８ａをレーザー、ウォータージェット、ドリル、プレス金型等により形成し、この封止材料８を、図３（ｃ）に示すように、半導体チップ４のバンプ６が接続される配線電極２上の所定位置に孔部８ａが位置するように、位置決めして実装する点である。この方法によっても、第１の実施形態と同様の半導体装置を構成できる。
（第４の実施形態）
図４は本発明の第４の実施形態における半導体装置の製造方法を示す工程断面図である。 The third embodiment differs from the first embodiment in that it corresponds to the arrangement of the bumps 6 of the semiconductor chip 4 in the sheet-shaped sealing material 8 before mounting, as shown in FIG. 3B. A hole 8a penetrating the sealing material 8 in the thickness direction is formed at a position by a laser, a water jet, a drill, a press die or the like, and the sealing material 8 is formed as a semiconductor as shown in FIG. The point is that mounting is performed such that the hole 8a is positioned at a predetermined position on the wiring electrode 2 to which the bump 6 of the chip 4 is connected. Also by this method, a semiconductor device similar to that of the first embodiment can be configured.
(Fourth embodiment)
FIG. 4 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.

この第４の実施形態が上記第１の実施形態と相違するのは、図４（ｂ）に示すように、実装前のシート状封止材料８における半導体チップ４のバンプ６の配列に対応する位置に、封止材料８を厚み方向に貫通しない凹部８ｂをレーザー、ウォータージェット、ドリル等により形成し、この封止材料８を、図４（ｃ）に示すように、半導体チップ４のバンプ６が接続される配線電極２上の所定位置に凹部８ａが位置するように、位置決めして実装する点である。この方法によっても、第１の実施形態と同様の半導体装置を構成できる。
（第５の実施形態）
図５は本発明の第５の実施形態における半導体装置の製造方法を示す工程断面図である。 The fourth embodiment is different from the first embodiment in that it corresponds to the arrangement of the bumps 6 of the semiconductor chip 4 in the sheet-shaped sealing material 8 before mounting, as shown in FIG. 4B. A recess 8b that does not penetrate the sealing material 8 in the thickness direction is formed at a position by a laser, a water jet, a drill, or the like, and the sealing material 8 is formed into bumps 6 of the semiconductor chip 4 as shown in FIG. This is the point of positioning and mounting so that the concave portion 8a is located at a predetermined position on the wiring electrode 2 to which is connected. Also by this method, a semiconductor device similar to that of the first embodiment can be configured.
(Fifth embodiment)
FIG. 5 is a process sectional view showing a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.

まず、図５（ａ）に示すように、回路基板１の配線電極２上、半導体チップ４の電極５が接続される所定位置にバンプ６を形成する。
また、図５（ｂ）に示すように、実装前のシート状封止材料８における半導体チップ４の電極５の配列に対応する位置に、封止材料８を厚み方向に貫通する凹部８ａをレーザー、ウォータージェット、ドリル、プレス金型等により形成する。 First, as shown in FIG. 5A, bumps 6 are formed on the wiring electrodes 2 of the circuit board 1 at predetermined positions where the electrodes 5 of the semiconductor chip 4 are connected.
Moreover, as shown in FIG.5 (b), the recessed part 8a which penetrates the sealing material 8 to the thickness direction in the position corresponding to the arrangement | sequence of the electrode 5 of the semiconductor chip 4 in the sheet-like sealing material 8 before mounting is laser-beamed. , Water jet, drill, press die, etc.

次に、図５（ｃ）に示すように、回路基板１上のバンプ６が凹部８ａ内に位置するようにシート状封止材料８を回路基板１上に位置決めし、搭載する。
次に、図５（ｄ）に示すように、吸引孔７ａを備え、加熱された加圧ヘッド７にて半導体チップ４を吸着し、電極５と回路基板１上のバンプ６とを位置合わせした上で、所定の加圧力で押圧することにより、半導体チップ４と回路基板１の反りを矯正しながら封止材料３を溶融、硬化させて、半導体チップ４を回路基板１上に固定する。 Next, as shown in FIG. 5C, the sheet-shaped sealing material 8 is positioned and mounted on the circuit board 1 so that the bumps 6 on the circuit board 1 are positioned in the recesses 8a.
Next, as shown in FIG. 5D, the semiconductor chip 4 is sucked by the heated pressure head 7 provided with the suction hole 7a, and the electrode 5 and the bump 6 on the circuit board 1 are aligned. The sealing material 3 is melted and cured while correcting the warp of the semiconductor chip 4 and the circuit board 1 by pressing with a predetermined pressure, and the semiconductor chip 4 is fixed on the circuit board 1.

図５（ｅ）は、以上のようにして構成された半導体装置を示し、第１の実施形態の半導体装置と同様に、半導体チップ４がフリップチップ方式で回路基板１上に搭載され、半導体チップ４と回路基板１との間隙に封止材料３が介在する構造を有する。   FIG. 5E shows the semiconductor device configured as described above. Like the semiconductor device of the first embodiment, the semiconductor chip 4 is mounted on the circuit board 1 by the flip chip method, and the semiconductor chip 4 and the circuit board 1 have a structure in which a sealing material 3 is interposed.

さらにこの第５の製造方法によれば、半導体チップ４を回路基板１上に搭載する際に、半導体チップ側にバンプを形成する場合に起こりがちなチップ搭載位置ずれ、つまり、半導体チップのバンプの先端が回路基板上の配線電極のエッジに当たりながら変形することで半導体チップが受ける水平方向の抗力によるチップ搭載位置ずれを防止できる。
（第６の実施形態）
図６は本発明の第６の実施形態における半導体装置の製造方法を示す工程断面図である。 Furthermore, according to the fifth manufacturing method, when the semiconductor chip 4 is mounted on the circuit board 1, the chip mounting position shift, which is likely to occur when the bump is formed on the semiconductor chip side, that is, the bump of the semiconductor chip is Since the tip is deformed while hitting the edge of the wiring electrode on the circuit board, it is possible to prevent the chip mounting position shift due to the horizontal drag that the semiconductor chip receives.
(Sixth embodiment)
FIG. 6 is a process sectional view showing a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.

この第６の実施形態が上記第５の実施形態と相違するのは、図６（ｂ）に示すように、実装前のシート状封止材料８において、半導体チップ４の電極５の配列に対応する位置に凹部８ｂをレーザー、ウォータージェット、ドリル等により形成し、この封止材料８を、図６（ｃ）に示すように、凹部８ｂとバンプ６とを位置合わせしたうえで回路基板１上に搭載する点である。この方法によっても、第１の実施形態と同様の半導体装置を構成できる。なおここでは、封止材料８をその凹部８ｂの開口部が回路基板１の配線電極２形成面に対向するように下向きに搭載しており、バンプ６の基部が凹部８ｂ内に位置し、先端部が凹部８ｂ底部を貫通する状態となっているが、封止材料８を逆向きに搭載してもよい。   The sixth embodiment differs from the fifth embodiment in that it corresponds to the arrangement of the electrodes 5 of the semiconductor chip 4 in the sheet-shaped sealing material 8 before mounting, as shown in FIG. 6B. A recess 8b is formed at a position to be formed by a laser, a water jet, a drill or the like, and the sealing material 8 is positioned on the circuit board 1 after aligning the recess 8b and the bump 6 as shown in FIG. It is a point to be mounted on. Also by this method, a semiconductor device similar to that of the first embodiment can be configured. Here, the sealing material 8 is mounted downward so that the opening of the recess 8b faces the wiring electrode 2 forming surface of the circuit board 1, and the base of the bump 6 is located in the recess 8b. However, the sealing material 8 may be mounted in the opposite direction.

本発明の半導体装置の製造方法は、半導体チップがフリップチップ方式で回路基板上に搭載され、半導体チップと回路基板との間隙に封止材料が介在する構造を有する半導体装置の製造方法として有用である。   The method for manufacturing a semiconductor device of the present invention is useful as a method for manufacturing a semiconductor device having a structure in which a semiconductor chip is mounted on a circuit board in a flip-chip manner, and a sealing material is interposed in a gap between the semiconductor chip and the circuit board. is there.

本発明の第１の実施形態における半導体装置の製造方法を示す工程断面図Process sectional drawing which shows the manufacturing method of the semiconductor device in the 1st Embodiment of this invention 本発明の第２の実施形態における半導体装置の製造方法を示す工程断面図Sectional drawing which shows the manufacturing method of the semiconductor device in the 2nd Embodiment of this invention 本発明の第３の実施形態における半導体装置の製造方法を示す工程断面図Process sectional drawing which shows the manufacturing method of the semiconductor device in the 3rd Embodiment of this invention 本発明の第４の実施形態における半導体装置の製造方法を示す工程断面図Sectional drawing which shows the manufacturing method of the semiconductor device in the 4th Embodiment of this invention 本発明の第５の実施形態における半導体装置の製造方法を示す工程断面図Sectional drawing which shows the manufacturing method of the semiconductor device in the 5th Embodiment of this invention 本発明の第６の実施形態における半導体装置の製造方法を示す工程断面図Sectional drawing which shows the manufacturing method of the semiconductor device in the 6th Embodiment of this invention 従来の半導体装置の製造方法を示す工程断面図Process sectional view showing a conventional method of manufacturing a semiconductor device

符号の説明Explanation of symbols

１ 回路基板
２ 配線電極
３ 封止材料
３ａ 孔部
３ｂ 凹部
４ 半導体チップ
５ 電極
６ バンプ
８ 封止材料
８ａ 孔部
８ｂ 凹部 DESCRIPTION OF SYMBOLS 1 Circuit board 2 Wiring electrode 3 Sealing material 3a Hole 3b Recess 4 Semiconductor chip 5 Electrode 6 Bump 8 Sealing material 8a Hole 8b Recess

Claims (2)

半導体チップを回路基板上にフェースダウンで搭載し、前記半導体チップと回路基板との間隙に封止材料を充填した半導体装置の製造方法であって、前記回路基板上に封止材料を搭載するとともに、前記半導体チップの電極上に形成されたバンプに対応する前記封止材料の所定位置に孔部または凹部を形成し、前記孔部または凹部が形成された封止材料を搭載した前記回路基板上に前記半導体チップを搭載する半導体装置の製造方法。   A method of manufacturing a semiconductor device in which a semiconductor chip is mounted face-down on a circuit board, and a gap between the semiconductor chip and the circuit board is filled with a sealing material, the sealing material being mounted on the circuit board On the circuit board on which the hole or recess is formed at a predetermined position of the sealing material corresponding to the bump formed on the electrode of the semiconductor chip, and the sealing material on which the hole or recess is formed is mounted A method of manufacturing a semiconductor device having the semiconductor chip mounted thereon. 半導体チップを回路基板上にフェースダウンで搭載し、前記半導体チップと回路基板との間隙に封止材料を充填した半導体装置の製造方法であって、前記半導体チップの電極に対応する前記回路基板の配線電極上の所定位置にバンプを形成するとともに、前記半導体チップの電極に対応する前記封止材料の所定位置に孔部または凹部を形成し、前記バンプが形成された回路基板上に前記孔部または凹部が形成された封止材料を位置合わせして搭載した後、前記半導体チップを搭載する半導体装置の製造方法。   A method of manufacturing a semiconductor device in which a semiconductor chip is mounted face-down on a circuit board, and a gap between the semiconductor chip and the circuit board is filled with a sealing material, wherein the circuit board corresponding to the electrode of the semiconductor chip A bump is formed at a predetermined position on the wiring electrode, a hole or a recess is formed at a predetermined position of the sealing material corresponding to the electrode of the semiconductor chip, and the hole is formed on the circuit board on which the bump is formed. Alternatively, a method for manufacturing a semiconductor device in which the semiconductor chip is mounted after the sealing material in which the recess is formed is positioned and mounted.
JP2004145741A 2004-05-17 2004-05-17 Method for manufacturing semiconductor device Pending JP2005327947A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7477523B2 (en) 2006-02-24 2009-01-13 Elpida Memory, Inc. Semiconductor device and method of manufacturing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7477523B2 (en) 2006-02-24 2009-01-13 Elpida Memory, Inc. Semiconductor device and method of manufacturing semiconductor device

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