JP2005327027A - Overshoot control circuit for voltage regulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the following problem of a circuit of reference voltage incorporated in a voltage regulator: because output of the reference voltage rapidly rises when supplying power, an excessive overshoot amount appears in output of the voltage regulator. <P>SOLUTION: By providing a soft start time by a CR time constant to the output in the reference voltage incorporated in the voltage regulator, the reference voltage output is made to gently rise to reduce the overshoot amount of the voltage regulator output. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a voltage regulator that suppresses an overshoot appearing in a voltage regulator output when power is turned on by an output voltage control circuit of a semiconductor integrated circuit device.

FIG. 2 is a configuration diagram of a conventional voltage regulator. (See Patent Document 1)
The reference voltage output signal 3 rises rapidly when the power is turned on. Further, since the signal 7 obtained by dividing the output voltage by the feedback resistor 6 at that time is the GND potential, the output 5 of the error amplifier 4 compared with the output signal 3 of the reference voltage is necessary to maintain a constant output voltage. The above gate voltage is applied to the output transistor 8. As a result, an excessive overshoot appears at the output terminal 2.
Japanese Patent Laid-Open No. 2002-258954

  Conventionally, in a reference voltage circuit built in a voltage regulator, the output of the reference voltage rises rapidly when the power is turned on. For this reason, there has been a drawback that excessive overshoot appears in the output of the voltage regulator. In order to solve such a conventional drawback, the present invention is intended to reduce the overshoot amount of the voltage regulator output at the time of power-on by providing a soft start time for the output of the reference voltage. is there.

  In order to solve the above problems, the present invention provides a soft start time based on a CR time constant on the output of a reference voltage built in a voltage regulator so as to reduce the overshoot amount of the voltage regulator output.

  The present invention has the effect of reducing the overshoot amount of the voltage regulator output by providing a soft start time with a CR time constant at the output of the reference voltage built in the voltage regulator.

  The voltage regulator built-in reference voltage output has a soft start time with a CR time constant, and the reference voltage output rises gently when power is steeply turned on. An attempt is made to give a proper gate voltage to the output transistor. As a result, an excessive voltage is not applied to the gate voltage of the output transistor, and the amount of overshoot of the voltage regulator output is reduced.

  Embodiments of an overshoot control circuit for a voltage regulator according to the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of a voltage regulator overshoot control circuit according to an embodiment of the present invention. The entire voltage regulator includes a power supply terminal 1, an output terminal 2, a reference voltage output 3, an error amplifier 4, an error amplification output 5, a feedback resistor 6, a resistance voltage dividing output 7, an output transistor 8, and an overshoot that appears in the output of the voltage regulator. Is composed of a CR circuit 9 and a CR output 10 in which a time constant is given to a reference voltage output for reducing the above.

  Next, the operation will be described with reference to FIG. When a steep power supply voltage is applied to the power supply terminal 1, the reference voltage output 3 also rises following the power supply voltage. The CR output 10 rises according to the CR time constant of the CR circuit 9, and the time tr is a soft start of tr = 2.2CR with respect to the reference voltage output 3. In that case, the resistance voltage dividing output 7 by the feedback resistor 6 is in the state of the GND potential level, and the error amplification output 5 of the error amplifier 4 comparing the CR output 10 and the resistance voltage dividing output 7 is soft-started. The maximum amplitude output is not achieved, and a voltage necessary for maintaining a constant output voltage of the voltage regulator is applied to the gate voltage of the output transistor 8. As a result, the amount of overshoot at the voltage regulator output terminal 2 is reduced.

It is a block diagram which shows the overshoot control circuit for voltage regulators of the said Claim 1 of embodiment of this invention. It is a block diagram of the conventional voltage regulator control circuit.

Explanation of symbols

1: Power supply terminal 2: Output terminal 3: Reference voltage output 4: Error amplifier 5: Error amplification output 6: Feedback resistor 7: Resistance voltage dividing output 8: Output transistor 9: CR circuit 10: CR output

Claims (1)

  In a voltage regulator that supplies a gate voltage required to hold a constant output voltage to an output transistor by an error amplifier that compares the reference voltage and the divided output voltage of the feedback resistor, a CR circuit is used as an output of the reference voltage. An overshoot control circuit for a voltage regulator, comprising:

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